I.

D IGITAL - TO -A NALOG C ONVERTER

1. Binary Weighted Resistor Type DAC: The circuit diagram of Weighted resistor type DAC for 4-bit
is shown in figure below.

For 4-bit binary input is b3 b2 b1 b0 . Here, the bits b3 and b0 denote the Most Significant Bit (MSB) and

s
Least Significant Bit (LSB) respectively. The digital switches shown in the above figure will be connected

m
to the negative reference voltage, −VR when the corresponding input bits are equal to ‘1’.
0 − (−VR b3 ) 0 − (−VR b2 ) 0 − (−VR b1 ) 0 − (−VR b0 ) 0 − V0
+ + + + = 0
20 R 21 R 22 R 23 R
te Rf
VR b3 VR b2 VR b1 VR b0 V0
+ 1 + 2 + 3 =
s
0
2R 2R 2R 2R Rf
Sy

( )
VR Rf b3 b2 b1 b0
0
+ 1+ 2+ 3 = V0
R 2 2 2 2
Substituting R = Rf , it gives
M

( ) ( )
VR R b3 b2 b1 b0 b3 b2 b1 b0
V0 = 0
+ 1+ 2+ 3 = VR 0
+ 1+ 2+ 3
R 2 2 2 2 2 2 2 2
The above equation represents the output voltage equation of a 4-bit binary weighted resistor DAC. Since
I&

the number of bits are four in the binary (digital) input, we will get 16 possible values of output voltage
by varying the binary input from 0000 to 1111 for a fixed reference voltage, VR . We can write the
generalized output voltage equation of an N-bit binary weighted resistor DAC as
( )
bN −1 bN −2 b0
V0 = VR + + .... +
20 21 2N −1
The disadvantages of a binary weighted resistor DAC are as follows:
(i) The difference between the resistance values corresponding to LSB & MSB will increase as the number
of bits present in the digital input increases.
(ii) It is difficult to design more accurate resistors as the number of bits present in the digital input
increases.

2. R-2R Ladder type DAC: The circuit diagram of R-2R Ladder type DAC for 3-bit is shown in figure
below. We can apply Thevenin’s equivalent circuits to compute Thevenin’s voltage Vth and resistance
Rth for each input point from the dotted line.
(i) For MSB (b2 in this case), it has Vth = VR /2 and Rth = 2R. Therefore, the output voltage
corresponding to b2 b1 b0 = 100 of the circuit for Rf = 2R will be
!
2R −VR b2 V R b2 VR b2
V0 = − = = 1
2R 2 2 2

1
(ii) For 2nd MSB (b1 in this case), it has Vth = (V4R
R /2)
(2R) = VR /4 and Rth = 2R. Therefore, the output
voltage corresponding to b2 b1 b0 = 010 of the circuit for Rf = 2R will be
!
2R −VR b1 V R b1 VR b1
V0 = − = = 2
2R 4 4 2
(iii) For LSB (b0 in this case), it has Vth = (V4R
R /4)
(2R) = VR /8 and Rth = 2R. Therefore, the output
voltage corresponding to b2 b1 b0 = 001 of the circuit for Rf = 2R will be

s
!
2R −VR b0 V R b0 VR b0

m
V0 = − = = 3
2R 8 8 2
Therefore, the total output voltage contributing from all inputs is
te
VR b0 VR b1 VR b2 VR (b0 + 2b1 + 4b2 ) VR (20 b0 + 21 b1 + 22 b2 )
Vtotal = + + = =
23 23
s
8 4 2
In general, the output of N-bit R-2R DAC for Rf = 2R is defined as
Sy

20 b0 + 21 b1 + 22 b2 + ... + 2N −1 bN −1
" #
V0 = VR
2N
M

The advantages of a R-2R Ladder DAC are as follows:

(i) R-2R Ladder DAC contains only two values of resistor R and 2R. So, it is easy to select and design
more accurate resistors
(ii) If more number of bits are present in the digital input, then we have to include required number of
I&

R-2R sections additionally.

(iii) Regardless of the number of bits, impedance of inverting input is always 2R
Due to the above advantages, R-2R Ladder DAC is preferable over binary weighted resistor DAC.

II. A NALOG - TO -D IGITAL C ONVERTER

1. Dual Slop Type ADC: The integrator generates two different ramps, one with the analog input
voltage VA and another with a known reference voltage –Vref . Hence it is called dual slope A-to-D
converter.
Working Principle:
1. Initially, integrator and binary counter are reset to zero value and input to the integrator is switched
to an unknown analog input voltage VA . Then, the analog input voltage VA is integrated by the inverting
integrator and generates a negative ramp (- ve slope) output.
2. The output of comparator is now positive. Therefore, AND gate will pass the clock pulses.
3. The binary counter stars counting up the incoming clock pluses that correspond to the unknown input
VA .
4. The negative ramp continues for a fixed time period t1 , which is determined by a count detector. At
the end of the fixed time period t1 , the ramp output of integrator is given by
1 Z t1 VA t1 VA N1 TC
V0 = − VA dt = − =−
RC 0 RC RC
2
where t1 = N1 TC , N1 is the number of clock pulses during counter time t1 and TC is the time period of

s
clock pulse.

m
5. When the counter reaches the fixed count at time period t1 , the binary counter resets to 0000 and
switches the integrator input to a negative reference voltage –Vref .
6. Now the ramp generator starts with the initial value -V0 and increases in positive direction (+ve slope)
te
until it reaches 0V and the counter gets advanced.
7. When V0 reaches 0V , comparator output becomes negative (logic= 0) and the AND gate (zero output)
is deactivated. Hence no further clock is applied through AND gate.
s
8. The conversion cycle is said to be completed here and the positive ramp voltage is given by
Sy

1 Z tf
0 = − (−Vref )dt + V0
RC t1
Vref (tf − t1 ) VA t1
0 = −
M

RC RC
Vref t2 VA t1
0 = −
RC RC
Vref t2 Vref N2 TC Vref N2
I&

VA = or = = KN2
t1 N1 TC N1
where tf − t1 = t2 = N2 TC and N2 is the number of clock pulses during time t2 , Vref , RC, N1 and
K = Vref /N1 are constants.

Thus, the unknown analog input voltage VA is proportional to the time period t2 , because Vref is a known
reference voltage and t1 is the predetermined time period.

3
Example: If the clock frequency is given as fC = 1 M Hz, the reference voltage is −1 V , the fixed
time period t1 of counter is 1ms and the RC time constant is also 1 ms. Assuming the unknown analog
input voltage as VA = 5V , find the ADC output.
Soln: The integrator output V0 at end of fixed time period t1 is
VA t1 VA N1 TC 5 × 10−3
V0 = − or − =− = −5 V
RC RC 10−3
During the time period t2 , integrator output is back to 0V
RCV0 10−3 (−5)
t2 = = = 5ms = 5000 µs
Vref −1
Since the clock frequency is given as fC = 1 M Hz, the time period TC of clock pulse is TC =
1/1M Hz = 1µs. The counter output N2 correspond to 5 V input is NC = t2 /TC = 5000µs/1µs = 5000.
The count 5000 is represented by unsigned 16-bit binary as 0101 0000 0000 0000.

2. Counter-Ramp ADC (Simplest):

The Counter type ADC is the basic type of ADC which is also called as digital ramp type ADC or stair
case approximation ADC. This circuit consists of N bit counter, DAC and Op-amp comparator as shown

s
in below figure.

m
s te
Sy
M
I&

Operation of counter type ADC The N bit counter generates an n bit digital output which is applied
as an input to the DAC. The analog output corresponding to the digital input from DAC is compared
with the input analog voltage using an op-amp comparator. The op-amp compares the two voltages and
if the generated DAC voltage is less, it generates a high pulse to the N bit counter as a clock pulse
to increment the counter. The same process will be repeated until the DAC output equals to the input
analog voltage. If the DAC output voltage is equal to the input analog voltage, then it generates low
clock pulse and it also generates a clear signal to the counter and load signal to the storage resistor to
store the corresponding digital bits. These digital values are closely matched with the input analog values
with small quantization error. For every sampling interval the DAC output follows a ramp fashion so that
it is called as Digital ramp type ADC. And this ramp looks like stair cases for every sampling time so
that it is also called as staircase approximation type ADC.
Data valid signal changes it’s state to indicate conversion in completed.
Advantages of Counter type ADC:
Simple to understand and operate.
Cost is less because of less complexity in design.

4
Disadvantages or limitations of Counter type of ADC:
Speed is less because every time the counter has to start from ZERO.
There may be clash or aliasing effect if the next input is sampled before completion of one operation.

s
m
s te
Sy
M
I&

5
 Instrumentation Amplifier: An instrumentation (or instrumentational) amplifier is a type of differential
amplifier that has been outfitted with input buffer amplifiers, which eliminate the need for input impedance
matching and thus make the amplifier particularly suitable for use in measurement and test equipment.
It is direct-coupled amplifiers that optimized for low-temperature drift and low offset and bias currents.

Construction and Working Principle:

(i) The most commonly used Instrumentation amplifiers consist of three op-amps as shown in figure below.
In this circuit, a non-inverting amplifier is connected to each input of the differential amplifier. These are
arranged so that there is one op-amp to buffer each input (+,-), and one to produce the desired output
with adequate impedance matching for the function.
(ii) The first stage is a balanced input, balanced output amplifier formed by A1 and A2 which amplifies
the differential signal but passes the common mode signal without amplification.
(iii) The second stage formed by A3 is a differential amplifier which largely removes the common mode
signal.
(iv) The voltage V01 consists of two components, the voltage due to V1 and the voltage due to V2 . If
V2 = 0 then point a will be a virtual earth and amplifier A1 will act as a non-inverting amplifier.

s
m
s te
Sy
M
I&

Output of Instrumentation Amplifier:

R4 R1
 
V0 = (V2 − V1 ) 1+2
R3 R2
R4 R1
 
G = 1+2
R3 R2
When same voltage is applied to input opamp stages the Voltage difference across resistor R2 will be
zero no current flows in the circuit and output will be zero.
An instrumentation amplifier is usually employed to amplify low-level signals, rejecting noise and
interference signals. Therefore, a good instrumentation amplifier has to meet the following specifications
(characteristics):
Finite, Accurate and Stable Gain: Since the instrumentation amplifiers are required to amplify very low-
level signals from the transducer device, high and finite gain is the basic requirement. The gain also
needs to be accurate and the closed-loop gain must be stable.
Easier Gain Adjustment: Apart from a finite and stable gain, variation in the gain factor over a prescribed
range of values is also necessary. The gain adjustment must be easier and precise.
High Input Impedance: To avoid the loading of input sources, the input impedance of the instrumentation
amplifier must be very high (ideally infinite).
Low Output Impedance: The output impedance of a good instrumentation amplifier must be very low

6
(ideally zero), to avoid loading effect on the immediate next stage.
High CMRR: The output from the transducer usually contains common mode signals, when transmitted
over long wires. A good instrumentation amplifier must amplify only the differential input, completely
rejecting common mode inputs. Thus, the CMRR of the instrumentation amplifier must be ideally infinite.
The Common Mode rejection Ratio of instrumentation amplifier depends on matching of resistors R3, R4
in both branches of differential amplifier individually that is R3 in inverting terminal should be matched
with R3 in non inverting terminal. The instrumentation amplifier has superior CMMR compared to single
op-amp differential amplifier.
High Slew Rate: The slew rate of the instrumentation amplifier must be as high as possible to provide
maximum undistorted output voltage swing.
Advantages of instrumentation amplifier:
1. The gain of the instrumentation amplifier can be varied by just varying resistors in input circuit without
affecting the resistors in difference amplifier circuit.
2. High CMMR.
3. High input resistance.
Some of the applications in which instrumentation amplifiers are used are:
In Data acquisition from low output transducers such as strain gauges, Thermocouples, Wheatstone

s
bridge measurements e.t.c. In Medical instrumentation, Navigation, Radar instrumentation e.t.c. In Audio
applications involving low amplitude audio signals in noisy environments to improve the signal to noise

m
ratio. High-speed signal conditioning for video data acquisition and imaging. High frequency signal
amplification in cable RF systems. te
The applications of the instrumentation amplifier include the following.

These amplifiers mainly involve where the accuracy of high differential gain is required, strength must
s
be preserved in noisy surroundings, as well as where huge common-mode signals are there. Some of the
Sy

applications are
Instrumentation amplifiers are used in data acquisition from small o/p transducers like thermocouples,
strain gauges, measurements of Wheatstone bridge, etc.
These amplifiers are used in navigation, medical, radar, etc.
M

These amplifiers are used to enhance the S/N ratio (signal to noise) in audio applications like audio
signals with low amplitude.
These amplifiers are used for imaging as well as video data acquisition in the conditioning of high-speed
signal.
I&

These amplifiers are used in RF cable systems for amplification of the high-frequency signal.

Difference between Operational Amplifier and Instrumentation Amplifier

The key differences between the operational amplifier and instrumentation amplifier include the following.

An operational amplifier (op-amp) is one kind of an integrated circuit The instrumentation amplifier
is one type of differential amplifier
Instrumentation amplifier can be built with three operational amplifiers.
The differential amplifier can be built with a single operational amplifier.
The output voltage of difference amplifier gets affected because of the mismatch resistors Instrumentation
amplifier offers gain with a single resistor of its primary phase which does not need a resistor matching.