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DEPT. OF ELECTRONICS AND COMMUNICATION ENGG .

EXPRIMENT No.: 2
AIM: To Study and Perform Data Transfer , Branch and Loop Instructions for AVR
ATmega32.

APPARTUS : Atmel studio software

THEORY:

Data Transfer Instructions

Cycles
Mnemonic Operands Description Operation Flags
MOV Rd,Rr Copy register Rd = Rr None 1
Rd+1:Rd =
1
MOVW Rd,Rr Copy register pair Rr+1:Rr, r,d even None
LDI Rd,K8 Load Immediate Rd = K None 1
LDS Rd,k Load Direct Rd = (k) None 2*
LD Rd,X Load Indirect Rd = (X) None 2*
Load Indirect and Post-
2*
LD Rd,X+ Increment Rd = (X), X=X+1 None
Load Indirect and Pre-
2*
LD Rd,-X Decrement X=X-1, Rd = (X) None
LD Rd,Y Load Indirect Rd = (Y) None 2*
Load Indirect and Post-
2*
LD Rd,Y+ Increment Rd = (Y), Y=Y+1 None
Load Indirect and Pre-
2*
LD Rd,-Y Decrement Y=Y-1, Rd = (Y) None
Load Indirect with
2*
LDD Rd,Y+q displacement Rd = (Y+q) None
LD Rd,Z Load Indirect  Rd = (Z) None 2*
Load Indirect and Post-
2*
LD Rd,Z+ Increment Rd = (Z), Z=Z+1 None
Load Indirect and Pre-
2*
LD Rd,-Z Decrement Z=Z-1, Rd = (Z) None
Load Indirect with
2*
LDD Rd,Z+q displacement Rd = (Z+q) None
STS k,Rr Store Direct (k) = Rr None 2*
ST X,Rr Store Indirect (X) = Rr None 2*
Store Indirect and Post-
2*
ST X+,Rr Increment (X) = Rr, X=X+1 None
ST -X,Rr Store Indirect and Pre- X=X-1, (X)=Rr None 2*

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Decrement
ST Y,Rr Store Indirect (Y) = Rr None 2*
Store Indirect and Post-
2
ST Y+,Rr Increment (Y) = Rr, Y=Y+1 None
Store Indirect and Pre-
2
ST -Y,Rr Decrement Y=Y-1, (Y) = Rr None
Store Indirect with
2
ST Y+q,Rr displacement (Y+q) = Rr None
ST Z,Rr Store Indirect (Z) = Rr None 2
Store Indirect and Post-
2
ST Z+,Rr Increment (Z) = Rr, Z=Z+1 None
Store Indirect and Pre-
2
ST -Z,Rr Decrement Z=Z-1, (Z) = Rr None
Store Indirect with
2
ST Z+q,Rr displacement (Z+q) = Rr None
LPM None Load Program Memory R0 = (Z) None 3
LPM Rd,Z Load Program Memory Rd = (Z) None 3
Load Program Memory 3
LPM Rd,Z+ and Post-Increment Rd = (Z), Z=Z+1 None
SPM None Store Program Memory (Z) = R1:R0 None -
IN Rd,P In Port Rd = P None 1
OUT P,Rr Out Port P = Rr None 1
PUSH Rr Push register on Stack STACK = Rr None 2
POP Rd Pop register from Stack Rd = STACK None 2

Branch and Loop instructions

A computer program is, fundamentally, the use of instructions executed by a computer. By

default, instructions are executed in sequence as they appear in the program, but the
exception to this rule is the execution of branch or jump instructions that (may) cause the
computer to begin execution of a different part of the program than the next instruction,
thus "jumping" (or "branching") from one part of the program to another. Branch
instructions are used to implement control flow constructs such as conditionals or loops. A
branch instruction can be either an unconditional branch, which always results in
branching, or a conditional branch, which may or may not cause branching depending on
some condition.

Mnemoni
c Operands Description Operation
RJMP k Relative Jump PC = PC + k +1
IJMP None Indirect Jump to (X,Y,Z) PC = Z

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STACK = PC+1, PC(15:0) =

EIJMP None Extended Indirect Jump (X,Y,Z) Z, PC(21:16) = EIND
JMP k Jump PC = k
STACK = PC+1, PC = PC + k
RCALL k Relative Call Subroutine +1
ICALL None Indirect Call to (X,Y,Z) STACK = PC+1, PC = Z
STACK = PC+1, PC(15:0) =
EICALL None Extended Indirect Call to (X,Y,Z) Z, PC(21:16) =EIND
CALL k Call Subroutine STACK = PC+2, PC = k
RET None Subroutine Return PC = STACK
RETI None Interrupt Return PC = STACK
CPSE Rd,Rr Compare, Skip if equal if (Rd ==Rr) PC = PC 2 or 3
CP Rd,Rr Compare Rd -Rr
CPC Rd,Rr Compare with Carry Rd - Rr – C
CPI Rd,K8 Compare with Immediate Rd – K
if(Rr(b)==0) PC = PC + 2 or
SBRC Rr,b Skip if bit in register cleared 3
if(Rr(b)==1) PC = PC + 2 or
SBRS Rr,b Skip if bit in register set 3
if(I/O(P,b)==0) PC = PC + 2
SBIC P,b Skip if bit in I/O register cleared or 3
if(I/O(P,b)==1) PC = PC + 2
SBIS P,b Skip if bit in I/O register set or 3
if(SREG(s)==0) PC = PC + k
BRBC s,k Branch if Status flag cleared +1
if(SREG(s)==1) PC = PC + k
BRBS s,k Branch if Status flag set +1
BREQ k Branch if equal if(Z==1) PC = PC + k + 1
BRNE k Branch if not equal if(Z==0) PC = PC + k + 1
BRCS k Branch if carry set if(C==1) PC = PC + k + 1
BRCC k Branch if carry cleared if(C==0) PC = PC + k + 1
BRSH k Branch if same or higher if(C==0) PC = PC + k + 1
BRLO k Branch if lower if(C==1) PC = PC + k + 1
BRMI k Branch if minus if(N==1) PC = PC + k + 1
BRPL k Branch if plus if(N==0) PC = PC + k + 1
Branch if greater than or equal
BRGE k (signed) if(S==0) PC = PC + k + 1
BRLT k Branch if less than (signed) if(S==1) PC = PC + k + 1
BRHS k Branch if half carry flag set if(H==1) PC = PC + k + 1
BRHC k Branch if half carry flag cleared if(H==0) PC = PC + k + 1

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BRTS k Branch if T flag set if(T==1) PC = PC + k + 1

BRTC k Branch if T flag cleared if(T==0) PC = PC + k + 1
BRVS k Branch if overflow flag set if(V==1) PC = PC + k + 1
BRVC k Branch if overflow flag cleared if(V==0) PC = PC + k + 1
BRIE k Branch if interrupt enabled if(I==1) PC = PC + k + 1
BRID k Branch if interrupt disabled if(I==0) PC = PC + k + 1

PROGRAMS:

1. Show a simple code to load values $30 and $97 into location $105,$106 respectively.

Label Mnemonics Comments

.ORG 0x0000 Start program from ROM location 0x0000
LDI R18,0x30 Load 0x30 to R18
STS 0X0105,R18 Store R18 value to location 0x0105
LDI R19,0x97 Load 0x97 to R19
STS 0X0106,R19 Store R19 value to location 0x0106

OUTPUT :

Location 0x105 has value 30H and location 0x106 has value 97H.

2. Show a simple code to load the values $55 into location $300 to $305.

Label Mnemonics Comments

.ORG 0x0000
LDI R17, $55
STS 0X0300,R17
STS 0X0301, R17
STS 0X0302, R17
STS 0X0303, R17
STS 0X0304, R17
STS 0X0305, R17
Start program from ROM location 0x0000
Load $55 to register R17
Store R17 value to location 0x0300
Store R17 value to location 0x0301
Store R17 value to location 0x0302
Store R17 value to location 0x0303
Store R17 value to location 0x0304
Store R17 value to location 0x0305

OUTPUT:

Location 300H to 305H has value 55H.

3. Show a simple code to

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(a) load the value $15 into location $67.

(b)Add it to R19 five times and place the result in R19 as the value added. R19
should be zero.

Label Mnemonics Comments

.ORG 0x0000 Start program from ROM location 0x0000
LDI R22,$15 Load $15 to register R22
STS 0X0067,R22 Store R22 value to location 0x0067
LDS R21,0X0067 Load value from location 0x0067 and store in R21
LDI R19,$00 Load $00 to register R19
ADD R19,R21 R19 =R19 + R21 = $00 + $ 15 = $15
ADD R19,R21 R19 =R19 + R21 = $15 + $ 15 = $30
ADD R19,R21 R19 =R19 + R21 = $30 + $ 15 = $45
ADD R19,R21 R19 =R19 + R21 = $45 + $ 15 = $60
ADD R19,R21 R19 =R19 + R21 = $60 + $ 15 = $75

OUTPUT: Location 0067H has value 15H. At the end of the program R21 has value 75H.

4. Write and assemble a program to load values into each of registers R20 –
R24 and then push each of these registers onto the stack. Single-step the
program, and examine the stack and the SP register after the execution of each
instruction.

Label Mnemonics Comments

.ORG 0x0000 Start program from ROM location 0x0000
LDI R20,HIGH(RAMEND) Load R20 with higher byte of RAMEND
  OUT SPH,R20 The high byte of address
  LDI R20,LOW(RAMEND) Load R20 with lower byte of RAMEND
  OUT SPL,R20 The low byte of address
  LDI R20, $20 Load value $20 in register R20
  LDI R21, $31 Load value $31 in register R21
  LDI R22, $42 Load value $42 in register R22
  LDI R23, $53 Load value $53 in register R23
  LDI R24, $64 Load value $64 in register R24
  PUSH R20 Push R20 to stack
  PUSH R21 Push R21 to stack
  PUSH R22 Push R22 to stack
  PUSH R23 Push R23 to stack
  PUSH R24 Push R24 to stack
L1: RJMP L1 Jump to L1

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OUTPUT : Different Values are loaded to location 20H to 24H and the values are pushed to
stack using PUSH instruction.

5. Write a program to

a. Clear R20, then

b. Add 3 to R20 ten times, and
c. Send the sum of PORTB. Use the Zero flag and BRNE.

Label Mnemonics Comments

.ORG 0x0000 Start program from ROM location 0x0000
LDI R16, 0XFF Load lower byte of second number in R16
OUT DDRB, R16 Making PORT B as output
LDI R16, 10 Value 10 is loaded in register R16
  LDI R20, 0 Value 0 is loaded in register R20
  LDI R21, 3 Value 3 is loaded in register R21
AGAIN: ADD R20, R21 R20 = R20 + R21
  DEC R16 Decrement in value of R16 by1
  BRNE AGAIN Loop until it becomes zero
OUT PORTB, R20 Send it to PORT B

OUTPUT : By using BRNE instruction 3 is added to R20 ten times , and the output at PORT
B = 0X1E

6. Write a program to (a) load the PORTB register with the value of 0x55, and (b)
complement Port B 700 times.

Label Mnemonics Comments

.ORG 0x0000 Start program from ROM location 0x0000
LDI R16, 0XFF Load lower byte of second number in R16
  OUT DDRB, R16 Making PORT B as output
  LDI R16, 0X55 Load $55 into register R16
  LDI R20, 10 Load value 10 in register R20
LOOP1: LDI R21, 70 Load value 70 in register R21
LOOP2: COM R16 Complement of R16 and store it in R16
OUT PORTB, R16 Making PORT B as a output
DEC R21 Decrement the value of R21 by 1
  BRNE LOOP2 Loop until it becomes zero
DEC R20 Decrement the value of R20 by 1
  BRNE LOOP1 Loop until it becomes zero

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OUTPUT: PORTB register is loaded with value 0x55. By complementing R16 we get value
0x55 at PORTB as output.

7. Write and assemble a program to toggle all the bits of PORTA, PORTB, and PORTC
continuously by sending $55 and $AA to these ports. Put a time delay between the
"on" and "off" states. Then using the simulator, single-step through the program and
examine the ports. Do not single-step through the time delay call.

Label Mnemonics Comments

.ORG 0x0000 Start program from ROM location 0x0000
LDI R16, HIGH(RAMEND) Load R16 with higher byte of RAMEND
OUT SPH, R16 The high byte of address
LDI R16, LOW(RAMEND) Load R16 with lower byte of RAMEND
OUT SPL, R16 The lower byte of address
LDI R16, 0XFF Load lower byte of second number in R16
OUT DDRA,R16 Making PORT A as output
OUT DDRB,R16 Making PORT B as output
OUT DDRC,R16 Making PORT C as output
BACK: LDI R16, 0X55 Load 0x55 to R16
OUT PORTA, R16 Send 55H to PORT A
OUT PORTB, R16 Send 55H to PORT B
OUT PORTC, R16 Send 55H to PORT C
CALL DELAY Time Delay
LDI R16, 0XAA Load 0xAA to R16
OUT PORTA, R16 Send 0xAA to PORT A
OUT PORTB, R16 Send 0xAA to PORT B
OUT PORTC, R16 Send 0xAA to PORT C
CALL DELAY Time Delay
RJMP BACK Keep doing this indefinitely
.ORG 0X0300 Put time delay at address 0x300
DELAY: LDI R20, 0XFF R20 = 255 , the counter
AGAIN:
NOP No operation wastes the clock cycles
NOP No operation wastes the clock cycles
DEC R20 Decrement R20 by 1
BRNE AGAIN Loop until it becomes zero
RET Return to caller

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OUTPUT : At the end of the program PORTA , PORTB , PORTC has the value 55H as output.
In DELAY subroutine R20 is set to 0xFF therefore loop is repeated 255 times, when R20
becomes zero it fall to RET and resumes the executing instruction after CALL.

Exercise: Write Following Assembly Language Program

1. Write and assemble a program to:

a) Set SP = $9D,
b) Put a different value in each of RAM locations $9D, $9C, $9B, $9A, $99, and $98,
c) POP each stack location into registers R20 – R24.
d) Use the simulator to single-step and examine the registers, the stack, and the stack
pointer.

Solution :

.INCLUDE "M32DEF.INC"

LDI R20, HIGH($9D)

OUT SPH, R20
LDI R20, LOW($9D)
OUT SPL, R20

LDI R16, 1
STS $98, R16
LDI R16, 2
STS $99, R16
LDI R16, 3
STS $9A, R16
LDI R16, 4
STS $9B, R16
LDI R16, 5
STS $9C, R16
LDI R16, 6
STS $9D, R16

POP R20
POP R21
POP R22
POP R23
POP R24

L1: RJMP L1

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2. Write and run a program to get data from PORTA and after adding a fixed value of 5
send it to PORTB.

Solution :

INCLUDE "M32DEF.INC"

LDI R20, 0x00 ;make port A an input port

OUT DDRA, R20
LDI R20, 0xFF ;make port B an output port
OUT DDRB, R20
OUT PORTA, R20 ;enable pull-up resistors

L1: IN R20,PINA ;get data from port A

ADD R20, 5
OUT PORTB,R20 ;send it to port B
RJMP L1 ;keep doing this

3. Write a program to toggle all bits of I/O register PORTB every 1sec. Assume that the
crystal frequency is 8 MHz and the system is using an ATmega32

Solution :
.ORG 0x0000
LDI R16,HIGH(RAMEND)
OUT SPH,R16
LDI R16,LOW(RAMEND)
OUT SPL,R16
LDI R16,0X55
BACK : COM R16
OUT PORTB,R16
CALL DELAY_1S
RJMP BACK
DELAY_1S :
LDI R20,32
L1 : LDI R21,200
L2 : LDI R22,250
L3 : NOP
NOP
DEC R22
BRNE L3
DEC R21

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BRNE L2
DEC R20
BRNE L1
RET

4. Write a program to determine if RAM location 0x200 contains the value 0. If so, put 0x55
into it.

Solution :

.EQU MYLOC=0X200

LDS R30, MYLOC

TST R30

BRNE NEXT

NEXT : LDI R30, 0X55

STS MYLOC,R30

Conclusion:
Data Transfer instructions are used to load and store data to the General Purpose Registers,
also known as the Register File. Exceptions are the push and pop instructions which modify
the Stack Pointer. Arithmetic and Logic Instructions plus Bit and Bit-Test Instructions use
the ALU to operate on the data contained in the general purpose registers.

Microprocessor and Microcontroller Subject Code: 3141008