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Compal Confidential
2 2

CIUSA/SB/SD

Cruze I/O Board Schematic Document

LS-E542P
3

2017-01-06 3

REV:1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/01/06 Deciphered Date 2018/01/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LS-E542P
Date: Friday, January 06, 2017 Sheet 1 of 3
A B C D E
USB2.0 Port LID I/O CONN
+5V_CHGUSB

JUSB1 ME@
1
USB20_N3_L 2 VBUS

ESD USB20_P3_L 3
4
5
D-
D+
GND
6 GND
7 GND
D3 ESD@ 8 GND JIO1 ME@
2 USB20_N3_L GND PLT_RST# 32 34
1 ACON_UARBD-4K19A6
pull up on M/B side 31 32 GND 33
3 USB20_P3_L 30 31 GND
DC23300H300 30
R273 @ 29
YSLC05CH_SOT23-3 1 2 28 29
+3VALW 28
100K_0402_5% 27
+5V_CHGUSB 26 27
PCIE_PRX_DTX_N5 25 26
25

2
PCIE_PRX_DTX_P5 24
23 24
Closer JUSB1 1

VDD
C273 CLK_PCIE_CR# 22 23
Card Reader CLK_PCIE_CR 21 22
1 LID_SW# 21
0.1U_0201_10V K X5R 3 20
+ C31 @ 2 OUTPUT PCIE_PTX_C_DRX_N5 19 20

EMI PCIE_PTX_C_DRX_P5 18 19

GND
150U_D2_6.3VY_R17M 17 18
2 +5VALW USB20_N3_R 17
2 C274 16
U281 10P_0402_50V8J USB20_P3_R 15 16

1
APX8132 SOT-23F 3P 14 15
1 +3VALW LID_SW# 14
SA00008K800 13
12 13
+RTCBATT W=20mils 11 12
+3VS 11
L1 EMI@ 10
USB20_N3_R 1 2 USB20_N3_L Novo# 9 10
8 9
7 8
USB20_P3_R 4 3 USB20_P3_L +5V_CHGUSB 6 7
+5V_CHGUSB W=100mils 5 6
MCM1012B900F06BP_4P 4 5
3 4
Closer JUSB1 2 3
1 2
1
1 1 ACES_51547-03201-P01
C32 C33 SP01001PC00
100U_1206_6.3V 47U_0805_6.3V6M

2 2

W=20mils W=20mils W=20mils

+AV12 +DV12S +DV33_18

Card Reader 1 1 2
Novo Button
1

1
CC1 CC2 @ CC3 @ CC4 CC10

W=40mils

1U_0402_6.3V6K
0.1U_0201_10V6K

0.1U_0201_10V6K
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
2

2
2 2 1 SW5 NOVO#
+3VS NTC303-DA1J-L180T_4P

2
1 2 NOVO# D1 ESD@
L03ESDL5V0CC3-2_SOT23-3
CC5 1 2 4.7U_0603_6.3V6K

G
G
SN10000AL00

3
4
UCR1
CC6 1 2 0.1U_0201_10V6K 9
+DV33_18 15 3V3_IN
W=40mils +AV12 7 DV33_18

1
+Card_3V3 +DV12S 11 AV12
DV12_S
+Card_3V3 LC1 1 2 0_0603_5% +Card_3V3_R 10
Card_3V3 25
1 2 8 GND
W=12mils
RC1 6.2K_0402_1% RREF
EMI
PCIE_PRX_DTX_P5 CC7 1 2 0.1U_0201_10V6K
PCIE_PTX_C_DRX_P5
PCIE_PTX_C_DRX_N5
PCIE_PRX_DTX_P5_C
1
2
5
HSIP
HSIN
SP1
SP2
12
13
14
SD_D1_R
SD_D0_R
RC2
RC3
1
1
2 0_0402_5%
2 0_0402_5%
SD_D1
SD_D0
SD_CLK_R RC4 1 EMI@ 2 33_0402_5% SD_CLK
RTC CONN
PCIE_PRX_DTX_N5 CC8 1 2 0.1U_0201_10V6K PCIE_PRX_DTX_N5_C 6 HSOP SP3 16 SD_CMD_R RC5 1 2 0_0402_5% SD_CMD
HSON SP4 17 SD_D3_R RC6 1 2 0_0402_5% SD_D3
SP5 SD_D2_R SD_D2 1
18 RC7 1 2 0_0402_5% @EMI@ +RTCBATT
CLK_PCIE_CR 3 SP6 CC13 JRTC1 ME@
CLK_PCIE_CR# 4 REFCLKP 5.6P 50V D NPO 0402 1
REFCLKN Close to UCR1 2 2 1
CR_CLKREQ# PLT_RST# 23 20 SD_WP RC11 2 @ 1 0_0402_5% SD_WP_N 2
PERST# SP7 3
CR_CLKREQ# 24 21 SD_CD# 4 GND
1

CLK_REQ# SD_CD# GND

RC20 2 1 SD_GPIO1 19 22
+3VS ACES_50271-0020N-001
RC8 10K_0402_5% GPIO NC
0_0402_5%
RTS5220-GRT_QFN24_4X4
2

Connector W/P Type : Normal Close FD1 FD2 FD3 FD4

+3VS

1
JSD1 ME@ ZZZ
+3VS SD_D2 1
DAT2
1

SD_D3 2
RC9 @ DAT3
SD_CMD 3
10K_0402_5%
CMD
2

PCB 1YN LS-E542P REV0 IO/B

2

SD_CD# 4 DA80019U010
RC10 SD_WP CD H1 H2 H3 H4
100K_0402_5% +Card_3V3 5 HOLEA HOLEA HOLEA HOLEA
VSS1
1

6 ZZZ X4E@
VDD
1

1
D SD_CLK 7
1 CLK
1

SD_WP_N 2 QC1 CC11 @ CC12

G 8
VSS2 H_2P5 H_2P5 H_2P5 H_2P5N
0.1U_0201_10V6K
4.7U_0603_6.3V6K

S
2

2N7002K_SOT23-3 2 SD_D0 9 SMT EMC FOR EE IO/B SE542 CIUSA

3

DAT0 X4EOCY38L01
SD_D1 10 12
DAT1 G1
SD_WP_N 11 13
W/P G2
TAITWUN_PSDATL-09GLBS1NN4H0
SP07001G700
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2017/01/06 Deciphered Date 2018/01/06 Title

For W/P normal close type connector THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IO/SD/USB CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LS-E542P
Date: Monday, January 09, 2017 Sheet 2 of 3
 5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1

for HW
Item Reason for change PG# Modify List Date Phase

1 ME modify 2 Remove H5 09/15 EVT to DVT

D D

2 DFX Request (Factory Rule) 2 Remove R101 and R102 (Remove 0-ohm path, remain choke) 11/09 DVT to PVT

C 7 C

10

11

12

B B
13

14

15

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/01/06 Deciphered Date 2018/01/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LS-E542P
Date: Friday, January 06, 2017 Sheet 3 of 3
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