3 PROTOTYPING AND EMULATION

Wolfgang Rosenstiel

Technische Informatik
Universitat Tiibingen
Tiibingen, Germany

3.1 INTRODUCTION
ASICs will continue to grow increasingly complex. Errors of specification, de-
sign and implementation are unavoidable . Consequently, designers need vali-
dation methods and tools to ensure a perfect design before the production is
started. Errors caught after fabrication incur not only added production costs,
but also delay the product, which is an increasingly serious detriment in today's
fast-paced international markets. "First-time-right silicon" is, therefore, one of
the most important goals of chip-design projects.
Figure 3.1 shows loss due to relatively late marketing. In order to get "first-
time-right silicon," a variety of approaches is needed. Figure 3.2 describes the
necessary steps of synthesis and validation for the design of integrated circuits .
There are four methods to reach the goal of "first-time-right silicon":
• specification on high levels of abstraction followed by automatic synthesis;
• simulation on various levels;
75

J. Staunstrup and W. Wolf (eds.), Hardware/Software Co-Design: Principles and Practice. 75-112.
© 1997 Kluwer AcademicPublishers.
76 HARDWARE/SOFTWARE CO-DESIGN: PRINCIPLES AND PRACTICE

2000

x 1000 DM
1500

1 1000

500

o
o 2 4 6 8 10 12 14 Weeks 18
Delay

Figure 3.1 Cost of product delays.

• formal verification;

• prototyping and emulation.

In the last few years the growing significance of synthesis has become ap-
parent, that is synthesis in a general sense and-more specifically-synthesis
on higher levels of abstraction, such as RT level synthesis and the so-called
high-level synthesis, i.e. synthesis from behavioral descriptions. The increas-
ing number of available commercial tools for RT and high-level synthesis in-
dicates that the abstraction level of the design entry will increase to higher
levels in the near future. Especially with respect to hardware/software co-
design high level synthesis gathers momentum. Only by integrating high-level
synthesis in the hardware software co-design cycle real hardware/software co-
design will be possible. The investigation of various possibilities with different
hardware/software trade-offs is only sensible if the different hardware parti-
tions can be implemented as fast as software can be compiled into machine