1890 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO.

5, SEPTEMBER 2007

A Transformer Inrush Mitigation Method

for Series Voltage Sag Compensators
Po-Tai Cheng, Wei-Ting Chen, Yu-Hsing Chen, Chia-Long Ni, and Jarsun Lin

Abstract—Voltage sags are major power quality problems en-

countered by industries. Especially for high-tech companies inside
industry parks, any voltage sag event in the distribution system
could affect many manufacturers and inflict significant losses.
The voltage sag compensator, based on a transformer-coupled
series-connected voltage source inverter, is among the most cost-
effective solution to protect sensitive loads. One important issue of
this system is the transformer inrush at the start of sag compensa-
tion. The inrush current may trigger the over-current protection of
the compensator inverter, and the compensation voltage is greatly
reduced due the magnetic saturation of the coupling transformer.
Oversizing the transformer is a common approach to avoid the
inrush current. However, this would dramatically increase the size
and weight of the sag compensation system. This paper proposes a
new technique for mitigating the inrush of the coupling transformer
and preserving the output voltage for effective sag compensation.
Detailed explanations of the proposed inrush mitigation technique
are presented, and the effectiveness of the proposed scheme is ver-
ified by laboratory test results. The inverter-assisted commutation
sequence of the bypass thyristors for fast start of the compensator
is also presented and verified by test results.
Index Terms—Transformer inrush, voltage sag compensator,
voltage sags.
I. INTRODUCTION
P OWER QUALITY issues have received much attention in
recent years. Survey results suggest that 92% of the inter-
ruptions at industrial installations are voltage-sag related [1]. In
many countries, high-tech manufacturers often concentrate in
industry parks, therefore any power quality events, especially
voltage sags, in the utility grid can affect a large number of
manufacturers. For example, a typical semiconductor fabhouse
which processes 200 mm wafers could suffer up to US$ 1
million of losses per voltage sag event and it will be much more
severe for the current generation of 300 mm-based production
lines. In recent years, significant research efforts focus on uti-
lizing pulsewidth modulated (PWM) voltage source inverters
(VSIs) for voltage sag compensation [2]–[13]. As shown in
Fig. 1, the compensator consists of a conventional three-phase
VSI and a coupling transformer for serial connection. For an
offline compensator system, the inverter is bypassed by the
Manuscript received June 23, 2006; revised October 23, 2006. This work was
supported by Rhymebus Corporation, Taiwan, and the National Science Council
of Taiwan, R.O.C., under Grant NSC-93-2622-E-007-019-CC3. Recommended
for publication by Associate Editor S. Bernet.
P.-T. Cheng, Y.-H. Chen, and C.-L. Ni are with the Center for Advanced
Power Technologies, Department of Electrical Engineering, National Tsing Hua
University, Hsinchu 30013, Taiwan, R.O.C. (e-mail: ptcheng@ee.nthu.edu.tw).
W.-T. Chen is with the Advantech Corporation, Taipei 231, Taiwan, R.O.C.
J. Lin is with the Rhymebus Corporation, Taichung 407, Taiwan, R.O.C.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2007.904186
0885-8993/$25.00 © 2007 IEEE
Fig. 1. Simplified one-line diagram of the offline series voltage sag compen-
sator.
thyristors when the grid is normal to lower operational losses.
Thus, the compensator must detect voltage sags and then inject
the compensation voltage very quickly (typically within a
quarter cycle) to protect sensitive loads. Several manufacturers
adopt this circuit topology for their voltage sag compensation
products.
One important issue of this system is the transformer inrush
at the start of sag compensation. The inrush current may trigger
the over-current protection of the compensator inverter, and
the transformer output voltage is also reduced due to the mag-
netics saturation. Eventually the system fails to compensate the
voltage sag. Oversizing the transformer at more than the rated
flux density is a common approach to avoid the inrush current.
However, this would dramatically increase the size and weight
of the sag compensation system, which could be prohibitive
due to the space constraint for many manufacturers in densely
developed high-tech industry parks. In this paper, a new tech-
nique for mitigating the inrush of the coupling transformer
is presented. By controlling the voltage injection of the sag
compensator properly, the transformer inrush can be mitigated
while preserving the output voltage for effective sag compen-
sation. With the inrush mitigating technique, the transformer
derating can be scaled down to maintain the compactness of the
sag compensation system. A brief survey of inrush mitigation
techniques is provided, and then detailed explanation of the
proposed inrush mitigation technique and test results will be
presented. The inverter-assisted commutation sequence of
the bypass thyristors for fast start of the compensator is also
presented and verified by test results.
II. SURVEY OF INRUSH MITIGATION
Several inrush mitigation methods have been proposed in the
past. The conventional approach is to gradually increase the ap-
plied voltage on the transformer, by means of electronic soft-
start control [14] or by inserting additional reactors [15], so
the transformer flux will not exceed the saturation knee of the
B–H curve. Magnetics saturation could also be prevented if the
CHENG et al.: TRANSFORMER INRUSH MITIGATION METHOD 1891

Fig. 2. Control diagram of series voltage sag compensator.

voltage is applied at a proper point-on-wave (like the peak of

the sine wave) [16], [17]. However, the aforementioned methods
may seriously impede the capability of the sag compensator be-
cause the injected voltage, which is vital for sag compensation,
is compromised by these inrush mitigation methods.
Another approach is to adjust the shape of the injection voltage
by applying a certain form factor to avoid magnetics saturation
[18]. The constant form factor scheme scales down the injection
voltage by 50% for the first half cycle. In the adaptive form factor
scheme, the injection voltage is scaled based on the magnitude
and the phase angle of the voltage command. Test results of the
adaptive form factor method shows the load voltage drops below
0.9 pu at the beginning of the compensation, and this may not
be sufficient for the ride-through of many sensitive loads. The
calculation of the form factor assumes sinusoidal compensation
voltage, but the line voltages within industrial installations are
often distorted, in some cases the voltage total harmonic dis-
tortion (THD) may reach 8% due to the high concentration of
nonlinear loads [19], [20]. Fig. 3. Compensation voltage and the developed flux linkage of the coupling
transformer.
III. PROPOSED APPROACH TO INRUSH CURRENT MITIGATION
The control block diagram of the series sag compensator is
shown in Fig. 2. The controller uses the magnitude of the posi- ). and are then transformed into the
tive sequence component of the line voltages to identify voltage three-phase voltage commands , and . The in-
sags. The three phase voltages are transformed into the syn- rush mitigation procedures will adjust the shape of the original
chronous reference frame, and the positive sequence compo- voltage commands to alleviate the inrush, and then apply the
nents are extracted by a disturbance filter, which is a low-pass modified commands , and to the PWM inverter.
filter and contains a notch at 120 Hz. The disturbance filter can The basic principle of the proposed inrush mitigation method
remove the negative sequence components and other harmonics is to control the injection voltage so that the flux linkage of
components of the line voltages and extract only the positive transformer does not exceed the pre-determined maximum flux
sequence components. Note that the width of the notch filter linkage . This can be achieved by modifying the voltage
should be sufficiently wide to cope with the variation of the grid applied to the transformer when the flux linkage reaches .
frequency. The voltage sag detection block then calculates the Assume the original compensation voltage command and the
magnitude of the positive sequence voltages, if the magnitude modified voltage command are and , respectively,
is lower than a pre-determined threshold level (0.85–0.9 pu for and their projected flux linkages are and . The flux linkages
example), then the detection block will issue the compensation developed by and can be expressed as follows, as-
command. The threshold can be adjusted based on the sag sensi- suming no residual flux in the transformer
tivity of critical loads. Most voltage sags can be detected within
4 ms by this control [10]. (1)
The compensation voltage command is de-
termined by the difference between the pre-fault voltages Fig. 3 shows how the proposed inrush mitigation method adjusts
stored in the resistor and the faulted voltages the command voltage. The compensation voltage is injected at
1892 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 5, SEPTEMBER 2007

Fig. 4. Proposed inrush mitigation scheme and the dc thrust (VDCT). Fig. 5. Proposed inrush mitigation and the ac thrust.

. There is no need to modify the injection voltage at this

moment as the flux linkage builds up within the transformer. As
the projected flux linkage reaches at , the risk of
high inrush current becomes apparent because of magnetics sat-
uration. The proposed mitigation scheme modifies the original
voltage command into by cutting off the voltage
for as illustrated. The developed flux linkage by
will not exceed , thus, the inrush can be avoided. For
, the negative injection voltage lowers the flux linkage
and the transformer is then out of the danger of saturation.
Although the flux linkage is maintained at and the in-
rush is avoided by the proposed mitigation scheme, the output Fig. 6. B–H curve measurement circuit.
voltage is reduced and the effectiveness of voltage sag com-
pensation is also affected. In addition, if the dc offset of the
flux linkage remains, the modification of compensation voltage could reach its steady state value of at the end of the
may continue in the next cycle and the effectiveness of the sag negative half cycle, which is described in (4)
compensation might be reduced even further. To address this
problem, two voltage adjustment schemes, the dc thrust and the (4)
ac thrust, are presented in the following. Both schemes can drive
the flux linkage to its steady state level at the end of the neg- Therefore, can be calculated as
ative half cycle to avoid any further magnetics saturation.
The dc thrust scheme is illustrated in Fig. 4. Assuming the (5)
voltage command is a sinusoid with the peak value of , so
the peak value of the steady state flux linkage can be easily cal- The proposed inrush mitigation scheme can effectively sup-
culated as . In Fig. 4, the injection starts at an arbitrary press the inrush current when the inverter starts injecting the
instant . As the voltage increases, the developed flux compensation voltage, so the size of the coupling transformer
linkage exceeds at . The proposed scheme cuts off can be reduced, and eliminate the risk of tripping the over-cur-
the voltage for the remaining positive half cycle and maintains rent protection of the inverter. The subsequent dc thrust and ac
the flux linkage at the level of to avoid the inrush. thrust can drive the flux linkage into steady state immediately
A dc voltage thrust of is added to the negative half to avoid further saturation, and also increase the compensation
cycle of the voltage command as shown in Fig. 4. The purpose voltage to make up the loss for the inrush mitigation. Note that if
of is to drive the flux linkage to its steady state value of the projected flux linkage reaches or due to voltage
at , the end of the negative half cycle as in distortion which is not accounted for in the calculation of the
dc thrust and the ac thrust, then the proposed inrush mitigation
(2) method will again cut-off the voltage command to avoid mag-
netics saturation.
Therefore, the magnitude of the dc thrust can be derived as
IV. EXPERIMENTAL RESULTS
(3)
A. Transformer Identification
The ac thrust scheme is shown in Fig. 5. The magnitude of The circuit illustrated in Fig. 6 is to estimate the relation-
the negative half cycle is adjusted to so the flux linkage ship between the flux linkage and the magnetizing current of
CHENG et al.: TRANSFORMER INRUSH MITIGATION METHOD 1893

TABLE I TABLE II
TRANSFORMER PARAMETERS MEASURED FLUX DENSITY AND CURRENT

Fig. 7. Test waveform of the coupling transformer: v versus i . (Ch 1: 5 A/div,

Ch 2: 1 V/div)

the transformer. An adjustable ac sinusoidal voltage is ap-

plied to the transformer. The specifications of the transformer is
given in Table I.
In Fig. 6, 24 k and 4 F. The relationship be- Fig. 8. Derived B –I curve of the coupling transformer.
tween the capacitor voltage , the input voltage and the es-
timated flux linkage can be expressed as

(6)

The experimental waveform of versus is plotted in

Fig. 7.
The estimated flux linkage and the magnetizing current are Fig. 9. No load test circuit.
summarized in Table II and Fig. 8. Note that the flux linkage
associated with the transformer leakage inductance is also in- TABLE III
cluded in the estimation of the flux density. CIRCUIT PARAMETERS OF THE COMPENSATION INVERTER
Appropriate can be determined to achieve the desired in-
rush mitigation.

B. No Load Test
To demonstrate the operation of the proposed inrush miti-
gation method, a no-load test on a single-phase transformer in
Fig. 9 is performed. The transformer is the same one identified
in part A. The circuit parameters are given in Table III.
Fig. 10 shows the waveforms of injected voltage command
, projected flux linkage , and transformer output voltage
1894
Fig. 10. Test waveforms without inrush mitigation, v : 100 V/div;
10 A/div.
Fig. 11. Waveforms with inrush mitigation. ( = 0.184 Wb-T),
100 V/div; i : 10 A/div.
, and the inverter output current , respectively, at the instant
of inverter starting. The inverter injects a sinusoidal voltage with
the peak value of 37.76 V (26.0 V RMS) into the transformer.
Without any inrush mitigation, the inverter current reaches the
peak of 23.6 A near the end of the positive half cycle due to
the magnetic saturation. In the meantime, the output voltage
on the secondary side decreases as the inrush occurs. The RMS
value of in the first cycle is only 32.8 V (RMS), 63% of its
steady state value of 51.5 V (RMS).
Fig. 11 shows the test results of the proposed inrush miti-
gation scheme with of 0.184 Wb-T. As the projected flux
linkage reaches the pre-determined , the voltage command
is suppressed to zero, so remains at the level of for
the remainder of the positive half cycle. The proposed scheme
reduces the inrush current down to 14 A. Although the voltage
command is suppressed to mitigation the inrush current,
the first cycle RMS value of is 34.4 V (RMS), or 66.8% of the
steady state 51.5 V (RMS). This is slightly improved compared
to Fig. 10 because the inrush current is reduced.
The test results of the proposed inrush mitigation scheme and
the subsequent dc voltage thrust and the ac voltage thrust are
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 5, SEPTEMBER 2007
i :
Fig. 12. Waveforms with inrush mitigation ( =0.184 Wb-T) and dc voltage
thrust, v : 100 V/div; i : 10 A/div.
v :
Fig. 13. Waveforms with inrush mitigation ( = 0.184 Wb-T) and ac voltage
thrust, v : 100 V/div; i : 10 A/div.
given in Figs. 12 and 13, respectively. The voltage command
is suppressed to zero as the flux linkage reaches . At
the beginning of the negative half cycle of , the voltage
thrusts, in Fig. 12 and in Fig. 13 are applied. The
flux linkage in both figures reaches its steady state level at the
end of the cycle, so the dc offset of the flux linkage is eliminated.
Compare to the flux linkage in Figs. 10 and 11, where the dc
offset of the flux linkage remains significant, both the dc voltage
thrust and the ac voltage thrust can effectively reduce further risk
of magnetics saturation by driving the flux into its steady state
level. In addition, the voltage thrusts increase the RMS value of
in the first cycle to 43.2 V (RMS, dc thrust) and 44.5 V (RMS,
ac thrust), or 83.8% and 86.4%, respectively, of the steady state
51.5 V (RMS).
The reduction of inrush current can be more effective if a
lower setting is chosen. Test results in Fig. 14 uses of
0.112 Wb-T, the inrush current is limited down to 3 A. However,
CHENG et al.: TRANSFORMER INRUSH MITIGATION METHOD 1895

Fig. 16. Sag compensation system.

Fig. 14. Waveforms with inrush mitigation at a lower. ( = 0.112 Wb-T) scheme of the coupling transformer. The system parameters are
setting, v : 100 V/div; i : 10 A/div.
given as follows.
1) Source: 220 V (RMS), 60 Hz.
2) Load: Linear load of 93.33 and 2 mH.
3) Compensation inverter: conventional voltage source in-
verter with three switch poles. dc bus voltage 300 V,
switching frequency 20 kHz. Its controller as illus-
trated in Fig. 2 is implemented in a TMS320C6711 floating
point digital signal processor of Texas Instruments.
4) Coupling transformer: Three single phase transformers are
used for series connection of the three-phase compensation
inverter, the transformer parameters are given in Table I.
Capacitors of 4 F are placed on the utility side of the
transformer to form low-pass filters together with the trans-
former leakage inductance. The corner frequency is ap-
proximately at 2.0 kHz.
A three-phase balanced fault with duration of 0.1 s is intro-
Fig. 15. Ratio between the first cycle RMS value and the steady state RMS
value (V =V ) of the secondary side output voltage with respect to
duced in the ac source. When the fault occurs, the load volt-
different  settings under no load tests. ages reduce down to 50%, and the sag compensator is triggered
into operation. Fig. 17(a) shows the operation of the sag com-
pensator without employing the inrush mitigation scheme. As
a large portion of the command voltage is suppressed the sag compensator starts, a peak current of 40 A near the end
to zero in exchange for the reduction of peak flux linkage and of the first half cycle can be clearly observed in Fig. 17(a), and
hence the inrush current. the compensation voltage diminishes as the inrush occurs.
In order to evaluate the influence of the proposed inrush miti- Fig. 17(b) shows the load voltages also reduces in the first half
gation scheme and the correction thrust voltages, the RMS value cycle of compensation due to the inrush, thus the restoration of
of the first complete cycle of the output voltage is load voltages is not complete.
compared against the RMS value at the steady state Fig. 18 shows the test results of the proposed inrush mitiga-
with various settings. Fig. 15 shows the that higher tion scheme and the ac voltage thrust. In Fig. 18(a), the voltage
causes larger inrush current as expected. With inrush mitiga- commands are reduced to zero as the developed flux linkage
tion alone, although higher allows more volts per second reaches. 0.184Wb T , then in the second half cycle,
in the command voltage, the corresponding high inrush current the ac voltage thrust adjusts the command voltage so the flux can
causes more voltage drop across the leakage, and the ratio be- reach its steady state level immediately afterwards. The inrush
tween and of the output voltage is not signif- current is effectively suppressed below 4 A in the first half cycle
icantly affected by settings. If dc thrust and ac thrust are as in Fig. 18(b), a significant improvement compared to nearly
employed with the inrush mitigation, then higher settings 40 A of inrush current when inrush mitigation is not applied in
contribute to higher thrust voltages and as in (3) Fig. 17(a). The load voltages in Fig. 18(c) reduce slightly in the
and (5), thus increases along with higher as shown first half cycle due to the proposed inrush mitigation, and then
in Fig. 15. the ac thrust increases the compensation voltage in the
second half cycle, thus the load voltages receive a boost as il-
C. Sag Compensation System lustrated. Fig. 19 shows the test results of the proposed inrush
Fig. 16 shows the scaled-down laboratory test bench for mitigation and the dc voltage thrust under the same condition.
testing the sag compensator and the proposed inrush mitigation Similar level of inrush current reduction is accomplished, and
1896
(a)
(b)
Fig. 17. (a) Test results without inrush mitigation; top: Load voltage V
(200 V/div); middle: inverter output voltage V (200 V/div); bottom:
inverter output current I (20 A/div). (b) Line-to-neutral load voltages
without inrush mitigation, V ; V ; V : 100 V/div.
the dc thrust also boosts the load voltage in the second half cycle
and drives the flux to the steady state level to avoid any further
magnetics saturation.
Compared to the test waveforms without inrush mitigation
in Fig. 17, the proposed inrush mitigation can effectively sup-
press the inrush current of the coupling transformer when the
compensation is injected. In addition, the proposed ac and dc
voltage thrusts can boost the compensation voltage for better
ride-through as discussed in the next paragraph.
Typically, sag compensators have to restore the load voltage
within a quarter cycle after the sag occurs in order to meet the in-
dustry standards such as SEMI F47 [21] and ICI (CBEMA) curve
[22]. However, inrush suppression techniques, in principle, pre-
vent magnetic saturation by reducing the voltage applied to the
transformer in the starting process. Such voltage reduction in the
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 5, SEPTEMBER 2007
Fig. 18. Test results of the proposed inrush mitigation and the ac thrust
voltage. (a). Voltage commands of all three phases with inrush mitigation and
ac voltage thrust. (b). Load voltage V (200 V/div), compensation voltage
command V (200 V/div), and compensator current IinvA (20 A/div).
(c). Line-to-neutral load voltages of all three phases, V : 100 V/div, V :
100 V/div, V : 100 V/div.
Fig. 19. Test results of the proposed inrush mitigation and the dc thrust
voltage. (a) Voltage commands of all three phases with inrush mitigation and
dc voltage thrust. (b) Load voltage V (200 V/div), compensation voltage
command V (200 V/div), and compensator current I (20 A/div).
(c) Line-to-neutral load voltages of all three phases, V : 100 V/div, V :
100 V/div, V : 100 V/div.
early stage of the compensation needs to be carefully examined in
order to assess whether a certain inrush suppression technique is
suitable for voltage sag compensators. To evaluate this, the ratios
between the first cycle RMS voltage of the load and the
steady state RMS voltage of the load under various in-
rush mitigation methods are presented in Fig. 20 for comparison.
Voltage sags of 50% occurring at various phase angle (between
0 to 120 , where 90 is the positive peak of the voltage wave-
form) are generated on the testbench of Fig. 16 with the same
circuit parameters used in previous laboratory tests, and the sag
CHENG et al.: TRANSFORMER INRUSH MITIGATION METHOD 1897

Fig. 21. Stationary d–q frame representation of the load current flowing
through the bypass thyristors.

Fig. 20. Comparison of V =V of the load voltage with respect

to phase angle of the compensation voltage under different inrush mitigation
methods (inrush mitigation and ac thrust, inrush mitigation and dc thrust, inrush
mitigation, reactor start, point-on wave, and form factor).

compensator injects the compensation voltage using various in-

rush mitigation methods. The constant form factor method scaled
down the output voltage by 50% for the first half cycle [18], thus
its ratio can reach only 92%, and the sensi-
tive loads may be interrupted. The point-on-wave method [16],
[17] offers slightly higher ratio. However, this Fig. 22. Stationary d–q frame representation of the voltage pulses for the
method introduces significant delay in the compensation voltage forced commutation of bypass thyristors.
because the voltage injection starts at the peak of its waveform
(i.e., at 90 phase angle). The reactor starting method [15] uses
additional reactor in series with the transformer to suppress the
inrush current, and the voltage drop across the reactor also re-
duces the compensation voltage. The proposed inrush mitiga-
tion method allows the compensation voltage injection as much
as possible until the developed flux linkage reaches the prede-
termined level of , thus its ratio reaches
above 95% and is higher than the aforementioned inrush suppres- Fig. 23. Simplified equivalent circuit.
sion techniques. The proposed ac thrust and dc thrust increase
the voltage magnitude in the second half cycle to drive the flux
linkage into its steady state level, the thrust voltages also make up Fig. 23 shows the simplified equivalent circuit to explain the
for the voltage reduction due to the proposed inrush mitigation forced commutation, where is the inverter output voltage,
method, thus their ratios increase further as il- is the transformer leakage and the filter inductor, is the
lustrated. The proposed inrush mitigation and the subsequent ac filtering capacitor, is the thyristor equivalent current, and
or dc thrust can effectively suppress the inrush current and main- is the load equivalent current. The waveforms of the forced
tain sufficient injected voltage for successful sag compensation. commutation process are illustrated in Fig. 24.
Compared with other inrush mitigation methods, the combina- When the power system is in normal operation, the compen-
tion of the proposed inrush mitigation method and the voltage sator is bypassed by the thyristors, thus the thyristor current
thrusts is very suitable for voltage sag compensator system. is equal to the load current and the filter capacitor voltage is
equal to zero. Upon detection of voltage sags at , the com-
V. FORCED COMMUTATION OF THYRISTORS pensation inverter injects the forced commutation voltage pulse
The sag compensator uses thyristor bypass to conduct load to cut-off the bypass-thyristor. The sag compensation voltage is
current while the grid voltage is normal. This offline system can injected after the thyristor is completely cut-off at as il-
improve the operating efficiency significantly compared to the lustrated in Fig. 24.
online compensator. A thyristor commutation scheme is pro- When , the inverter voltage pulse is injected
posed to cut off the thyristor current immediately upon detection to suppress the thyristor current, and the fall time for the
of voltage sags. The proposed method uses the compensation thyristor current to reach zero can be estimated as
inverter to produce voltage pulses across the thyristors upon de-
tection of voltage sags, so the thyristor current is reduced imme- (7)
diately. By converting the thyristor current in the stationary –
frame as in Fig. 21, the required commutation voltage pulses With the given circuit parameters, the required fall time is ap-
can be quickly determined as in Fig. 22. proximately 30 s at full load.
1898
Fig. 24. Forced commutation waveforms.
Fig. 25. Inverter output when turning off (sag detected), v : 100 V/div,
100 V/div, v : 100 V/div.
When , sufficient duration of the forced com-
mutation voltage pulse is required so that the thyristor is re-
versed-biased throughout its required turn-off time. The filter
capacitor can also limit dv/dt to avoid re-triggering. Typically
the turn-off time of inverter-grade thyristors is within 50 s,
thus the total duration of the forced-commutation voltage pulse
is set at 100 s to ensure the complete
turn-off of bypass thyristors.
Fig. 25 shows the forced commutation voltage pulses of all
three phases of the inverter as the voltage sag is detected. The
current of all three phases are cut-off instantaneously as the
forced commutation voltage pulses are injected as in Fig. 26.
The polarity of the voltage pulses and the direction of phase
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 5, SEPTEMBER 2007
Fig. 26. Conducting current when turning off (sag occurs; sag detected), i :
1 A/div, i : 1 A/div, i : 1 A/div.
currents are correctly matched as illustrated in Figs. 21 and 22
for successful commutation.
The proposed forced-commutation process can expedite the
turn-off of bypass thyristors so the compensation voltage can
be injected very quickly upon detection of voltage sags. Oth-
erwise the natural commutation may require half cycle and re-
sult in interruption of sensitive loads. The developed flux from
the forced-commutation process can be easily estimated by the
proposed inrush mitigation scheme and does not affect the sub-
sequent injection of compensation voltage. As voltage sags are
cleared, the compensator reduces its output voltage to zero, and
then the bypass thyristors are triggered to carry the load current
before the compensator stops switching.
VI. CONCLUSION
With the proposed inrush mitigation method and the forced
commutation scheme of thyristors, the sag compensator can de-
liver proper compensation voltages immediately after voltage
sags occur without the risk of inrush current, which may trigger
the over-current protection of the compensator and reduce the
v :
compensation voltage. The proposed ac voltage thrust and the dc
voltage thrust associated with the inrush mitigation can drive the
flux linkage of the transformer into steady state in one cycle to
avoid further magnetics saturation at the starting of the compen-
sator. The combination of the proposed inrush mitigation and
the ac or dc voltage thrusts restores the load voltage to more
than 95% in the first cycle after the voltage sag is detected,
and then full restoration afterwards. Compared to other inrush
suppression techniques, the proposed method can inject more
voltage for successful ride-through and limit the inrush current
down to an acceptable level with a very simple estimation of the
flux linkage. This paper uses an offline compensator to verify
the proposed inrush mitigation method, and this method is suit-
able for online compensators as well. The offline compensator
system with the thyristor bypass has very high operating effi-
ciency when the grid is normal, and the commutation scheme al-
lows fast cut-off of thyristors to ensure the compensation voltage
CHENG et al.: TRANSFORMER INRUSH MITIGATION METHOD 1899

can be delivered very quickly. The proposed inrush mitigation [19] Y. H. Yan, C. S. Chen, C. S. Moo, and C. T. Hsu, “Harmonic analysis
method eliminates the need for de-rating the coupling trans- for industrial customers,” IEEE Trans. Ind. Appl., vol. 30, no. 2, pp.
462–468, Mar./Apr. 1994.
former, therefore improves the compactness of the compensator [20] E. J. Currence, J. E. Plizga, and H. N. Nelson, “Harmonic resonance at
system. The features of high operating efficiency, fast response, a medium-sized industrial plant,” IEEE Trans. Ind. Appl., vol. 31, no.
and compact circuit system are attractive for many high-tech 4, pp. 682–690, Jul./Aug. 1995.
[21] Specification for Semiconductor Processing Equipment Voltage Sag
manufacturers with limited space within the facility. Immunity, Std. SEMI F47-0200, Semiconductor Equipment and Ma-
terials International (SEMI), Aug. 1999.
[22] Information Technology Industry Council, “ITI (CBEMA) Curve,”
ACKNOWLEDGMENT App. Note, 2000.
The authors would like to thank F. Chang, B. Chang, and
several colleagues at Rhymebus Corporation, for their support Po-Tai Cheng received the B.S. degree from Na-
in the test facility. tional Chiao Tung University, Hsinchu, Taiwan,
R.O.C., in 1990 and the M.S.E.E. and Ph.D. degrees
from the University of Wisconsin, Madison, in 1994
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