The University of the South Pacific (USP)

School of Engineering & Physics

Faculty of Science & Technology
Electrical & Electronics Engineering Discipline

EE225 : Analog Electronics II

Name: Aashutosh pratap

ID# S11187390
Lab #2
Lab Title: Op-amp based Digital to Analog Conversion (DAC)

OBJECTIVE:
To build and characterize two different 4-bit digital to analog converters (DACs). Observe the
effects of component mismatches on the output signal levels.

CIRCUIT DIAGRAM

Figure 1: Shows the circuit diagram of a binary weighted digital analog converter at digital
signal 1111.

Figure 2: Shows the circuit diagram of R2R ladder digital analog converter at digital signal 0010.

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OBSERVATION:

Table 1: Showing observation made in the experiment of Binary weighted DAC and R2R
Ladder.

Voltage Binary weighted DAC R2R Ladder

Digital The value of output voltage measured was
voltage 1.99nV which was a very small value of
0000 voltage, this was due small amount of DC
offset voltage present in the op amp due to the
presence of bias current.
Digital The output analog voltage kept on increasing
voltage as the input digital voltage kept on increasing.
0001-1111 The graph was plotted to see the relationship
between the two analog and digital voltage.
The shape of the graph was perfect linear
between the analog output and digital input.
Also the outputs were positive values since a
negative 5 volt was applied as a reference
voltage. Since the amplifier configuration used
was an inverting amplifier the output voltage
will always be the opposite polarity of the
input voltage.
The value of output voltage measured was
2nV which was a very small value of
voltage, this was due small amount of DC
offset voltage present in the op amp due
to the presence of bias current.
The output analog voltage kept on
increasing as the input digital voltage kept
on increasing. The graph of the R2R
ladder was also same as the binary
weighted DAC, which was a perfect
linear. Also the outputs were positive
values since a negative 5 volt was applied
as a reference voltage. Also same
observation was made for R2R ladder
where the output voltage was positive.

RESULTS
Calculation:
Table 2: showing calculation of Binary weighted DAC and R2R ladder.

Input Binary weighted DAC R2R ladder

0000 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 21 22 23 24
1� 1� 1� 1� ( − 5) 0 0 0 0
���� = − (0) + (0) + (0) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 0�
���� = 0�
0001 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 0 0 0 1
���� = − (0) + (0) + (0) + ( − 5) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 0.3125�
���� = 0.3125�

2
0010 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 0 0 1 0
���� = − (0) + (0) + ( − 5) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 0.625�
���� = 0.625�
0011 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 0 0 1 1
���� = − (0) + (0) + ( − 5) + ( − 5) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 0.9375�
���� = 0.9375�
0100 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 0 1 0 0
���� = − (0) + ( − 5) + (0) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 1.25�
���� = 1.25�
0101 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 0 1 0 1
���� = − (0) + ( − 5) + (0) + ( − 5) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 1.5625�
���� = 1.5625�
0110 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 0 1 1 0
���� = − (0) + ( − 5) + ( − 5) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 1.875�
���� = 1.875�
0111 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 0 1 1 1
���� = − (0) + ( − 5) + ( − 5) + ( − 5) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 2.1875�
���� = 2.1875�

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1000 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 1 0 0 0
���� = − ( − 5) + (0) + (0) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 2.5�
���� = 2.5�

1001 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 1 0 0 1
���� = − ( − 5) + (0) + (0) + ( − 5) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 2.8125�
���� = 2.8125�
1010 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 1 0 1 0
���� = − ( − 5) + (0) + ( − 5) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 3.125�
���� = 3.125�
1011 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 1 0 1 1
���� = − ( − 5) + (0) + ( − 5) + ( − 5) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 3.4375�
���� = 3.4375�
1100 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 1 1 0 0
���� = − ( − 5) + ( − 5) + (0) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 3.75�
���� = 3.75�
1101 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 1 1 0 1
���� = − ( − 5) + ( − 5) + (0) + ( − 5) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 4.0625�
���� = 4.0625�

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1110 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1� ( − 5) 1 1 1 0
���� = − ( − 5) + ( − 5) + ( − 5) + (0) ���� =− + + + 1�
2� 4� 8� 16�
1� 2 4 8 16
���� = 4.375�
���� = 4.375�

1111 �� �� �� �� � �1 �2 �3 �4
���� = − �4 + �3 + �2 + �1 ���� =− + + + ��
�1 �2 �3 �4 � 2 4 8 16
1� 1� 1� 1�
���� =− ( − 5) + ( − 5) + ( − 5) + ( − 5) ( − 5) 1 1 1 1
2� 4� 8� 16� ���� =− + + + 1�
1� 2 4 8 16
���� = 4.6875�
���� = 4.6875�

Table 3: showing calculation of linearity of the graph for Binary weighted DAC and R2R
ladder.

Slope Binary weighted DAC R2R Ladder

Theoretical
� −� � −�
m = �2−�1 m = �2−�1
2 1 2 1

0−4.6875 0−4.6875
= 0−15
= 0−15

m=0.3125 m=0.3125

Simulation
� −� � −�
m = �2−�1 m = �2−�1
2 1 2 1

1.99�10−9 −4.687 2�10−9 −4.687

= 0−15
= 0−15

m=0.31247 m=0.31247

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Table 4: Shows the theoretical and simulated results for binary weighted DAC and R2R
ladder.

Inputs Output (V) Output (V)

Binary weighted DAC R2R Ladder
D3 D2 D1 D0 Theoretical simulation Theoretical Simulation
0000 0V 1.99nV 0V 2nV
0001 0.3125V 0.312V 0.3125V 0.312V
0010 0.625V 0.625V 0.625V 0.625V
0011 0.9375V 0.937V 0.9375V 0.937V
0100 1.25V 1.25V 1.25V 1.25V
0101 1.5625V 1.56V 1.5625V 1.5625V
0110 1.875V 1.87V 1.875V 1.875V
0111 2.1875V 2.187V 2.1875V 2.187V
1000 2.5V 2.499V 2.5V 2.499V
1001 2.8125V 2.812V 2.8125V 2.812V
1010 3.125V 3.125V 3.125V 3.125V
1011 3.4375V 3.437V 3.4375V 3.437V
1100 3.75V 3.749V 3.75V 3.749V
1101 4.0625V 4.062V 4.0625V 4.062V
1110 4.375V 4.375V 4.375V 4.375V
1111 4.6875V 4.687V 4.6875V 4.687V

Table 5: Showing calculation of resolution of DAC

Binary weighted DAC R2R ladder
Step size max voltage max voltage
resolution = resolution =
num of bits num of bits
5 5
=16 =16
Resolution =0.3125 Resolution =0.3125

Graphs

Figure 3: Shows the graph of analog output voltage vs input digital voltage of binary weighted
DAC.

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Figure 4: Shows the graph of analog output voltage vs digital input voltage of R2R ladder.

DISCUSSION
The lab focused on digital to analog converter circuits. Two types of circuits was discussed,
which was binary weighted DAC and R2R ladder. A binary weighted DAC circuit is basically a
simple summing amplifier configuration with its supply voltage being either high (5V) or low
(0V) which are supplied to individual input resistors. Its input resistors are increased by a factor
of 2nR, which is why the circuit is named as binary weighted because the resistors are arranged
as based on the number of bit a binary weighted DAC is. For example for a 4 bit circuit 4 input
resistors are needed and arranged as, the MSB input are connected to the lowest resistor value,
the next resistor towards the LSB are increased by a factor of 2, the next resistor will again be
doubled from the previous resistor. The LSB resistor will have the highest value of resistance
which will be 8 times larger than the MSB. The 4 resistors will be arranged as if R=1kΩ. (1K,
2K, 4k and 8K). The reason of the arrangement of resistor is that LSB should receive the lowest
current and MSB should receive a large current.[1]
In this experiment for binary weighted DAC size of 4 bit. The reference voltage of -5V was
applied to the input resistors. The digital signal was converted to analog signal where the -5V
acts as a binary input high. A system of 4 bit will have 16 binary code where it ranges from 0000
to 1111 (0 to 15). The 0000 means in digital signal that all the 4 input resistors will be shorted so
that there will be no voltage to the resistors meaning 0V. The output voltage measured was

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1.99nV. Practically this small amount of voltage is there because of offset error. Ideally the
output voltage is 0V. Then the binary code was increased to 0001 where its output voltage was
calculated as 0.3125. Both theoretical and simulated results were similar to each other. The
method was repeated until 1111. At 1111 the full scale output voltage calculated was 4.6875. To
see the relationship between the digital signal and analog signal a graph was plotted. The graph
was a perfect linear graph with both the simulation and theoretical graph being superimposed on
top of each other. Also the slope of the graph both theoretically and simulation was calculated to
check if the graph had a perfect shape. The slope value was very similar to each other. The
perfect shape of this graph is only due to the simulation, whereas in practical the graphs will
differ due the resistor value not being perfect. Also resolution which is the step size was also
calculated which was found to be 0.3125V this value determines the constant rise of output
voltage as the input digital signal are increased. The problem with binary weighted DAC in
terms of resolution is when a larger number of bits is used it requires a larger difference of
resistors between LSB and MSB. For a 12 bit system if the MSB is 1K than the required
resistance for LSB is 2M. The requirement of higher resistance causes it to reduce maintenance
of its accuracy.[1]

A R2R ladder is a circuit where it has only two types of input resistors which is R and 2R. The
R2R resistor are easy to implement and it does not require any precision resistors for
implementation when compared with binary weighted DAC. If the bit size are increased in R2R
ladder only the 2 resistor are increased instead of increasing the value of high precision
resistors.[2]
In this experiment a 4 bit R2R ladder was used. The reference voltage was provided as -5V. The
digital signal was converted to analog signal where the -5V acts as a binary input high. A system
of 4 bit will have 16 binary code where it ranges from 0000 to 1111 (0 to 15). The 0000 means in
digital signal that all the 4 input resistors will be shorted so that there will be no voltage to the
resistors meaning 0V. The output voltage measured was 2nV, the output voltage being relatively
small due to the offset error. If theoretically compared the output voltage was 0V. At digital
signal 0001 the output voltage was calculated as 0.3125V which was same for binary weighted
DAC and calculated theoretically. The output voltage was calculated for other digital signal
until 1111 where its output voltage increased at a resolution of 0.3125V with the full scale output

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voltage of 4.6875 at digital signal 1111. The graph of both simulated and theoretical values of
digital signal and analog output were plotted. The slope of graph was also calculated to see the
difference between the theoretical and simulated results. The graph was a perfect linear graph
with the simulated and theoretical values were both super imposed indicating that accurate
results were obtained from the experiment. This type of accurate results is only application to
theoretical whereas in real world there are lot of limitation to get accurate results such as, the
resistor value not being exactly accurate, but in case of R2R the results are accurate than binary
weighted DAC because in binary weighted DAC there is a large difference between LSB resistor
with MSB resistor.
Some difference between binary weighted DAC and R2R ladder. A R2R resistor has a lower
conversion rate than binary weighted DAC, so binary weighted DAC are used in higher
frequency application which requires a faster conversion speed. A R2R ladder are more stable
than binary weighted resistor since, binary weighted resistor require large range of resistors
which may change its resistivity due to a change in temperature. A R2R resistor is cheaper than
binary weighted resistors due to large range of resistors are required for construction in binary
weighted resistor.[3]

CONCLUSION:
After completing this experiment, it can be concluded that both the theoretical and simulated
results were similar to each other. The digital input voltage vs analog output voltage graph of
both binary weighted and R2R ladder was sketched with the graph being perfectly linear, also
this was confirmed by calculating the slope of the graph. The perfect linearity of graph is only
visible in theoretical results whereas, in real world many factors such as resistor values, stability
of the device and accuracy of the system causes the results to vary to being imperfect. According
to the statistics gathered in the results both the binary weighted and R2R ladder had the same
output analog voltage produced. In the real world R2R ladder is preferred as a more highly used
DAC because it is cheaper, stable and accurate than binary weighted DAC where binary
weighted resistor is mostly used for high frequency application due to faster conversion rate. The
accuracy of binary weighted DAC decreases as the number of bits are increased due large
difference between the LSB and MSB resistors. In most case the resistor value required are in
mega ohms.

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REFERENCE:
[1]“A/D and D/A converter”, 2019. [Online]. Available:
https://www.ebookbou.edu.bd/Books/Text/SST/DCSA/dcsa_2301/Unit-07.pdf . [Accessed 11th
September 2021]
[2]“Digital to Analog converter”, 2021. [Online]. Available:
https://www.tutorialspoint.com/linear_integrated_circuits_applications/linear_integrated_circuits
_applications_digital_to_analog_converters.htm . [Accessed 11th September 11, 2021]
[3]“ Basic electronics tutorial”, 2020. [Online]. Available:
https://www.electronics-tutorial.net/Mini-Projects/A-statistical-comparison-of-binary-weighted-
and-R-2R-4-Bit-DAC/ . [Accessed 11th September 2021]

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