ICA-ACCA 2018, October 17-19, 2018, Greater Concepci´on, Chile
Reduced Modified T-Type Topology for Cascaded
Multilevel Inverters
M. Ali Hosseinzadeh, M. Sarbanzadeh, E. Sarebanzadeh, M. Rivera and J. Mun˜oz
Abstract—Multilevel inverters are applied in medium-voltage
high power applications, nowadays. The drawback of multilevel
inverters is required for a high number of power electronics
devices to generate more voltage levels in order to reduce THD’s
magnitude. This paper presents a reduced T-type topology for
a cascaded multilevel inverter. The main advantages of the
proposed topology are reducing the switching elements and
the total blocking voltage for generating a high number of
levels. A comprehensive comparison is done with other similar
multilevel inverter topologies to show the superiority of the
reduced topology. The performance of the reduced multilevel
inverter is presented for a 61-levels cascaded topology.
Index Terms—T-type inverter; cascaded topology; multilevel
inverter; switching elements.
I NTRODUCTION
I.
A multi-level inverter (MLI) is a power architecture which
generates an ac output level by considering several DC power
supplies [1]. This type of inverter uses lots of DC supplies and
semiconductor switches counts, to generate a large number
of voltage levels at the output. MLIs can be applied in high
power, high voltage applications because they share the
voltage on their switches [2].
In addition, MLIs have several advantages, among them
high power quality, lower total harmonic distortion (THD),
lower , etc. [3]. The conventional multilevel inverter
structures with industrial applications include neutral point
clamped (NPC) [4], flying capacitor (FC) [5], cascade H-
bridge (CHB) MLIs [6]. CHBs applied for various applica-
tions due to their simplified model can be categorized into
symmetrical and asymmetrical modes. In symmetrical (CHB)
the magnitude of all DC supplies are the same and in the
case of an asymmetrical (CHB), DC supply magnitudes are
incremented to accomplish required voltage level. CHB is
employed for medium and higher voltage levels whereas in
both NPC MLIs and FC MLIs structures voltage balancing
and sharing is challenging for higher voltage levels [7], [8].
In NPC and FC MLIs topologies, there are many flying
capacitors and diodes clamped to generate more levels [9],
[10]. The CHB structure includes the series connection of
several H-bridges. Three different methods are used to define
the value of DC supplies [11]. In [12] a symmetric cascaded
MLI structure is developed. The main problems of symmetric
cascaded converters are: the requirement of high number of
components to increase the levels because the magnitude of
M. Ali Hosseinzadeh, M. Sarbanzadeh, M. Rivera and J. Mun˜oz
are with the Faculty of Engineering, Universidad de Talca, Curico, Chile. (e-
mail: m.a hosseinzadeh@yahoo.com; maryam sarbanzadeh@yahoo.com;
marcoriv@utalca.cl; jamunoz@utalca.cl.
E. Sarebanzadeh is with the University of Tabriz, Tabriz, Iran. (e-mail:
el sarebanzade@yahoo.com; .
978-1-5386-5586-3/18/$31.00 Ⓧc 2018 IEEE
Authorized licensed use limited to: MALAVIYA NATIONAL INSTITUTE OF TECHNOLOGY. Downloaded on September 17,2021 at 04:44:52 UTC from IEEE Xplore. Restrictions apply.
DC supplies are the same. To mitigate these drawbacks,
several topologies have been proposed in [13]–[15]. Despite
the fact that these topologies have novel topologies, the switch
count still stands high. Researchers are continuously making
efforts to develop novel structures [16].
Recapitulating the above remarks, in this paper, a reduced
modified T-type MLI is introduced. Next, a cascade
connection based on proposed structure is extended. To
highlight the capability of the presented structure, a deep
comparative analysis is presented among the proposed
reduced module and well known MLI structures to
understand its benefits and drawbacks. The simulation results
are provided for the cascade of two units to obtain 61 levels.
II. M ETHODOLOGY
A. Modified T-Type Inverter
Fig. 1(a) depicts a T-type Inverter. It generates two voltage
levels and . Fig. 1(b) indicates a modified power
cir- cuit of a T-type inverter. This inverter uses four
unidirectional switches instead of a bidirectional switch
between and
in conventional T- connection inverter [17]. So, this circuit
can generate more levels compared to the conventional T-type
inverter so that generated level will have the following levels
and . Considering Fig. 1, for generating more
voltage levels, two other switches have been placed in parallel
to switches of and (these switches produce positive and
negative voltage levels) and have been cascaded to two other
DC supplies. However, this inverter includes ten unidirectional
power and can generated 15 voltage levels with magnitudes
of , , , , , , and
in the output. Fig. 2 indicates the power circuit of this
structure. All the voltage levels of a modified T-type power
structure are provided in Table II. An interesting idea would
be to mix a half-inverter to a modified T-type inverter, to have
a new basic module inverter which generates more voltage
levels.
B. Proposed Module Structure
A new basic module is designed by back-to-back con-
nections with a modified T-type and half-bridge inverter
(BBTHB). That means, a half-bridge inverter is connected
from points A and B according to Fig. 2. The number of
DC supplies will be five and their magnitudes are different.
This idea gives a new structure for MLIs that creates more
number levels with lower components. The power circuit of
the proposed BBTHB module is indicated in Fig. 3, that can
1
produce 31 levels with 5 DC supplies and 12 power switches.
 ICA-ACCA 2018, October 17-19, 2018, Greater Concepci´on, Chile
2

TABLE I: Output Voltage Levels of 15-Level Modified T-Type

A
Inverter
S
V1
V 1 1 Output Voltage Levels S S S T T
S1 S1
1 1 1 1 0 0 0
A 1 0 1 1 0 0 0
1 1 0 1 0 0 0
1 0 0 1 0 0 0
S 3 V S2 2 1 1 1 0 1 0 0
V 2 1 0 1 0 1 0 0
S2
S1 1 1 0 0 1 0 0
1 0 0 0 1 0 0
B 0 1 0 0 1 1 0
B (b) 0 0 1 0 0 1 0
(a) 0 1 1 1 1 1 0
Fig. 1: (a) Classical T-type converter; 0
0 1 0 0 10 0 1 0 0 0 0 1
(b) modified T-type converter 1 0 1 0 0 1 0
0 1 1 0 0 1 0

D1
T2
negative levels by

V 4 T2 V1 the switches , ,
S1 S3
, , respectively. To
S1
simplify, the voltage
drop of switch
V2 conduction state is
V 3 T1 S 2
S2 S3 eliminated. To stay
away of short-
circuits of DC
D2 T 1 supplies, the
unidirectional
switches , , , , , , , ,
,,
B A
and operate in an
opposite mode.
BBTH module
produces nine levels
when the DC supply
magnitudes are all
equal and if values
are chosen
differently then the
BBTH module
generates higher
voltage levels, we
consider their
magnitudes as
follows:

(
Fig. 2: Modified T-type 1
inverter. )
(
2
This configuration can generate the )
negative levels without H-bridge at the
C. Total Blocking (
output. In this module two switch
Voltage Calculation 3
configura- tions are used: unidirectional
and bidirectional. )
The difference between these types of
switches are the num- (
4

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 ICA-ACCA 2018, October 17-19, 2018, Greater Concepci´on, Chile
3
)
ber of diodes In BBTH
and insulated module, the
gate bipolar equations of
transistors total blocking
(IGBTs) where voltage (TBV)
unidirectional of the switches
uses an IGBT is obtained as
and a reverse follows:
diode and the
bidirectional
uses two IGBTs (5)
and two reverse
diodes. Table I The blocking
depicts the voltage on
available each
commutation switching
states for the device is:
modified T-
Type inverter
module. This
structure
presents both
positive and
(6)
D1
T2 (7)
 (8)
V5 T2V1
S 1(9) S3
S4 S1
B
V
3 (10)
V2
(11)
S4 V T1 S 2 S2 S3
4

Considering the above

equations and (1)
D2 T 1

is
(12)
Fig. 3: BBTHB
proposed structure.

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 ICA-ACCA 2018, October 17-19, 2018, Greater Concepci´on, Chile
3

TABLE II: Output Voltage Levels of 31-Level BBTHB In-

verter D1,1
T 2,1

Output Voltage S S S S T T
1 1 1 1 1 0 0 0 V 5,1 T 2,1 V 1,1
S1,1
1 0 1 1 1 0 0 1 S 4,1 S 1,1 S 3,1
1 1 0 1 1 0 0 0 V A
1 0 0 1 1 0 0 0 3,1

1 1 1 0 1 0 0 0 V 2,1
1 0 1 0 1 0 0 0 S 4,1 V T 1S
4,11,
2,1 S 2,1S 3,1
1 1 0 0 1 0 0 0 v
o,1

1 0 0 0 1 0 0 0
1 1 1 0 0 1 0 0 D 2,1 T 1,1
1 0 1 1 0 1 0 0
1 1 0 1 0 1 0 0
1 0 0 1 0 1 0 0
1 1 1 0 0 1 0 0 D1,2
1 0 1 0 0 1 0 0 T 2,2
1 1 0 0 0 1 0 0
1 0 0 0 0 1 0 0 5,2 2,2 1,2
0 1 0 1 0 0 0 1 V S1,2T V S 3,2
S 4,2 S 1,2
0 0 1 1 0 0 0 1
V
0 1 1 1 0 0 0 1 3,2

0 0 0 0 0 0 0 1 V 2,2
0 1 0 0 0 0 0 1 S 4,2 T1,2S S 2,2S 3,2
V 4,2 2,2
0 0 1 0 0 0 0 1 vo
0 1 1 0 0 0 0 1 v o ,2
0 0 0 1 0 0 1 0
D 2,2 T 1,2
0 1 0 1 0 0 1 0
0 0 1 1 0 0 1 0
0 1 1 1 0 0 1 0
0 0 0 0 0 0 1 0 D1,n
0 1 0 0 0 0 1 0 T 2,n
0 0 1 0 0 0 1 0

0 1 1 0 0 0 1 0
V 5,n T 2,n V 1,n
S1,n S 1,nS 3,n
S 4,n
V
3,n

D. Proposed Extended Module V 2,n

To minimize the number of components, a cascaded struc- S 4,n V1,nT S 2,n

4,n
S 2,nS 3,n

ture is developed based on the cascaded connection of BBTH v o ,n

module. Fig. 4 indicates the cascaded structure of BBTH D 2,n T 1,n

module with modules.
TABLE III: Equations of Extended Module
number of module
No. Switches
No. IGBTs
No. Diodes
No. DC Sources
TBV
To maintain the modulatory, each module connected in
cascade is considered to be identical with constant number
of components. This will generate the maximum quantity of
levels from the cascaded connection with a constant number
of devices. The equations of the components and for
the proposed configuration with modules in the cascade are
expressed in Table III.
III. C OMPARISON B ETWEEN MLI S TRUCTURES
To study the behaviour of the proposal, a comparison with
other cascaded MLIs [12]–[16] is presented in this section.
The comparison includes switches count, IGBTs count, DC
B
Fig. 4: The cascade arrangement of proposed structure.
supplies count, the variety of DC supplies and TBV. In this
comparison, in the proposed structure three methods of a sym-
) metrical and two asymmetrical states are used to determine the
magnitudes of DC supplies. Table V gives the operation
modes of the comparison structures presented in [11]–[16].
Fig. 5 presents a comparison among the proposed MLI
structure and others. Fig. 5(a) illustrates the plot of the
variation of the levels versus the switches count for the
proposal and other cascaded MLIs. It is evident, that, in
comparison with other structures with equal number of power
devices, more levels are obtained for the proposal when
methods and
are considered. For example, the proposed topology generates
more than fifty-levels with fourteen switches in and other
structures generates less than forty-levels. Fig. 5(b) displays
the variation between the quantity of levels and IGBTs count
for the proposed cascaded MLI and other cascaded MLIs. The
presented cascaded MLIs in [15], [16] require two IGBTs in

3
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 ICA-ACCA 2018, October 17-19, 2018, Greater Concepci´on, Chile
TABLE IV: Proposed Values of DC Supplies and other Parameters
Modes Mode I (M1)
Magnitudes
DC Supplies
for
Maximum Output Voltage
Number of Levels
each switch because they use bidirectional switches in their
configurations. So, a comparison has been done among the
proposed cascaded MLI and other cascaded MLIs in terms
of the number of levels versus IGBTs count. As one can
see, the produced levels with the proposed cascaded MLI
is higher than other MLIs with the same IGBTs count. The
number of DC supplies is another important criterion in whilst
designing MLIs. The variation between the number of DC
supplies required among the proposed cascaded MLI and
other MLIs is illustrated in Fig. 5(c). As the reader can see
from this figure and considering , the proposed MLI
generates a higher number of levels with the same number of
DC supplies compared to other cascaded MLIs. For example
the proposed topology generates more than fifty-level with
four power supplies in and other structures generates this
levels with five DC power supplies.
The variation of DC supply magnitudes is another
important component for comparison with respect to the
increase of the cost. Fig. 5(d) illustrates the plot of the
variation between and the number of levels presented in MLIs
structures.
As can be seen from Fig. 5(d), the proposed cascaded BBTHB
in the asymmetrical case, creates more levels with lower
than other MLIs except for the presented MLIs in R6,
R8, and R11. This component is a drawback of the proposed
cascaded MLI. Fig. 5(e) illustrates the variation TBV and
the levels among the proposed MLI and other MLIs. The
TBV’s value is not the same for the two magnitudes methods
presented MLI in [14]. But for other structures, TBV factor is
the same in the rest of the presented MLIs. According to Fig.
5(e), the proposed cascaded structure has decreased the value
of the TBV compared to other MLIs for producing the same
number of levels.
Based on presented comparison between proposed cas-
caded structure and other MLIs structures, it is clear that
the proposed cascaded structure generates more voltage levels
with less number of components such as power switches,
IGBTs and drivers circuit. In additional, the proposed
structure reduced the magnitude of TBV than other MLIs.
S IMULATION R ESULTS
IV.
To depict the behavior of the BBTHB module proposed in
this paper a 61-level inverter with a cascaded two BBMHB
module connection is simulated, in this paper. For this sim-
ulation, an R-L load is considered of 150 and 10 with
50 output frequency, respectively. In this simulation, for the
proposed MLI for production of the gate pulse of switches,
the fundamental frequency control switching is applied be-
cause this strategy works with the fundamental frequency that
decreases the switching losses.
4
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4
Mode II (M2) Mode III (M3)
, ,
, ,
, ,
A 61-level cascaded topology used two series BBTHB
mod- ules. The number of DC supplies and semiconductor
switches are five and twelve for each module, respectively.
The method of is chosen for the magnitudes of DC supplies.
So, these magnitudes are , ,
, .
The peak of the output voltage is 1500 having a voltage step
of 50 . Figs. 6(a) and (b) illustrate the load voltage curves
of each BBTHB module for the generation of 61-levels at the
output. Fig. 6(c) indicates 61-levels curve for the proposed
cascaded MLI. Fig. 6(d) shows the load current curve of the
proposed cascaded MLI. FFT of the load voltage and current
are indicated in Figs.6(e) and (f). As can seen from these
figures, THD values are 0.64% and 0.44% for the voltage and
current of the 61-leveld cascaded MLI proposed, respectively.
V. C ONCLUSION
A new module presented for the cascaded multilevel in-
verter that was called back-to-back modified T-type half-
bridge (BBTHB) was exposed in this paper. This
configuration generates a large number of voltage levels with
lower switch- ing devices count. In addition, a cascaded
connection of the configuration is introduced which
increments the value of the voltage levels. The merits of the
proposed BBTHB module is evaluated through various
comparisons with other prior art MLI structures. The results
shown by simulations, have demonstrated the improved
capability of the suggested MLI regarding reduced switching
devices count and total blocking voltage. The operation of a
61-level cascade connection of two modules is evaluated
under MATLAB/Simulink software.
ACKNOWLEDGMENT
The authors would like to thank the financial support of
FONDECYT Regular 1160690 and 1160806 Research
Projects as well as 14-INV-097.
REFERENCES
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 ICA-ACCA 2018, October 17-19, 2018, Greater Concepci´on, Chile
5

60
60
50 M3 M3
50
R6 R11
40 R6
R2 40 R2
R8 R4 R8
Nlevel M2 R4
R9 Nlevel M2 R9
20 M1, R5 M1, R5, R10
20
10
10
0
R10 0 R11
R1, R3 R7
10 R1, R3 R7
0

4 6 Nswitch 10 12 14 16 10 2 4 6 NIGBT 10 12 14 16
0
2 (a) (b)

60 400
M3 R6 M3
R6 350
50 R2 R11 R8
300
R4 R4
40 R11 R8 250 R2
R7, R9 M1, R1, R3, R5, R7, R10
M2R 2 Nlevel
Nlevel M1, R5
150 M2
20 100 R9

R1, R3, R5, R10 50

10
0
0  50

350
300 R7
250 R8
TSV R4
R9
150
100
50
R1, R2, R3, R5, R6, R10, R11
0
 50 M3, M2, M1
0
10 20 30 40 Nlevel 60 70 80 90 100

(e)
Fig. 5: Comparative studies; (a) the switches count versus ; (b) the IGBTs count versus ; (c) DC supplies count versus
; (d) the variety of DC supplies (Nvariety) versus ; (e) versus .

TABLE V: Comparison Requirements For The Presented Cascaded MLIs Based On Their Methods
Structures Methods N N N N TBV(p.u)
CHB [11] R1 1
R2
(BCMLI) [12] R3 1
R4
(DCHB) [13] R5 1
R6
(BUMLI) [14] R7 1
R8
(E-Type) [15] R9
(BUMLC) [16] R10 1
R11

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 ICA-ACCA 2018, October 17-19, 2018, Greater Concepci´on, Chile
6

First unit output voltage (v) Second unit output voltage (v)
800 800  800  800
600 600 0 0.01 0 0.01 0.02
400 400
0.02 0.03 0.04
200 200
0 0 0.03 0.05
 200  200
 400  400 0.04 (
 600  600
0.05 b
)

Output current (A)

Output 10
8
1500 6
voltage (v) 4
1 2
0
0  2
0  4
0  6
 8
5
0
0
0


5
0
0


1
0
0
0
 1500  10
0 0.01 0.02 0 0.01
0.03 0.02
0.04 0.03
0.05 0.04
0.05
(
c (d)
)

(e)
Fig. 6: Simulation studies; (a) output voltage curve of
first module; (b) output voltage curve of second
module; (c); total output voltage curve of the 61 level
proposed cascaded MLI; (d) output current curve; (e)
FFT of the voltage (THDv = 0.64%); f) FFT of the
current (THDi = 0.44%).

Very high resolution

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. 3- M. Hos it p.
N 3 A. sein h 1-
o 2, Hos zad re 6.
el F sein eh, d [10] M
, e zad M. u .
“ b. eh, Sar c A.
C 2 E. ban e H
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6
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