Subroutines and Interrupts

Sistemas Embebidos
Oscar Acevedo, PhD
Subroutines

• Also called function in C/C++

• In computer programming, a subroutine is a sequence of program instructions that

perform a specific task, packaged as a unit. This unit can then be used in programs
wherever that particular task should be performed.
Subroutine Example in C
#include<stdio.h>
float square ( float x );

int main( )
{
float m, n ;
printf ( "\nEnter some number for finding square \n");
scanf ( "%f", &m ) ;
n = square ( m ) ;
printf ( "\nSquare of the given number %f is %f",m,n );
}

float square ( float x )

{
float p ;
p=x*x;
return ( p ) ;
}
Subroutine Example in µC Assembly
.include "m8515def.inc"

;Initialize the microcontroller stack pointer

LDI R16, low(RAMEND)
OUT SPL, R16
LDI R16, high(RAMEND)
OUT SPH, R16

;Configure portB as an output put

LDI R16, 0xFF
OUT DDRB, R16

;Toggle the pins of portB

LDI R16, 0xFF
OUT PORTB, R16
RCALL Delay
LDI R16, 0x00
OUT PORTB, R16
RCALL Delay

;Delay subroutine
Delay: LDI R17, 0xFF
loop: DEC R17
BRNE loop
RET
Subroutine in µC

• During a subroutine call, the return address Program Counter (PC) is stored on the Stack
automatically by the µC

• If your subroutine shares register with the calling program, you must store them in the
Stack before the subroutine starts and recover them when the subroutine ends
• C does this for you automatically
Interrupts

• Interrupts are subroutines invoked by hardware events

• Signal change
• Timer ends
• Communication event
• A/D end of conversion
• etc
µC Interrupts

• During interrupts, the return address Program Counter (PC) is stored on the Stack

• Each interrupt has its own control registers:

• Configuration
• Flags

• There is a Global Interrupt Enable bit in the Status Register

µC Interrupts

• The Global interrupt bit is cleared by hardware after an interrupt has occurred, and is set
by the return instruction to enable subsequent interrupts
• To avoid interrupt over interrupt calls

• All interrupts have a separate Interrupt Vector in the Interrupt Vector table. The interrupts
have priority in accordance with their Interrupt Vector position
• The lower the Interrupt Vector address, the higher the priority
Interrupt Vector Table ATMega328
Interrupt Response Time

• The interrupt execution response for all the enabled AVR interrupts is four clock cycles
minimum.
• The Program Counter is pushed onto the Stack
• Jump to the interrupt routine, and this jump takes three clock cycles

• After four clock cycles the program vector address for the actual interrupt handling
routine is executed
Interrupt Response Time

• If an interrupt occurs during execution of a multi-cycle instruction, this instruction is

completed before the interrupt is served

• A return from an interrupt handling routine takes four clock cycles.

• The Program Counter is popped back from the Stack
• the Stack Pointer is updated
• the I-bit in SREG is set (global interrupt bit)
Fin de la presentación