Ankit Jain is seeking an internship or full-time position in ASIC/VLSI design, validation, or verification. He has a Master's degree in Electrical and Electronics Engineering from California State University, Sacramento and a Bachelor's degree from Saurashtra University in India. His technical skills include Verilog, VHDL, C/C++, and he has experience with tools like Modelsim, Synopsys, and Xilinx. For academic projects, he has worked on projects involving vector multiplication, digital cell libraries, PCI devices, and microprocessor design. He has also worked as a lecturer and electrical engineer.
Ankit Jain is seeking an internship or full-time position in ASIC/VLSI design, validation, or verification. He has a Master's degree in Electrical and Electronics Engineering from California State University, Sacramento and a Bachelor's degree from Saurashtra University in India. His technical skills include Verilog, VHDL, C/C++, and he has experience with tools like Modelsim, Synopsys, and Xilinx. For academic projects, he has worked on projects involving vector multiplication, digital cell libraries, PCI devices, and microprocessor design. He has also worked as a lecturer and electrical engineer.
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Ankit Jain is seeking an internship or full-time position in ASIC/VLSI design, validation, or verification. He has a Master's degree in Electrical and Electronics Engineering from California State University, Sacramento and a Bachelor's degree from Saurashtra University in India. His technical skills include Verilog, VHDL, C/C++, and he has experience with tools like Modelsim, Synopsys, and Xilinx. For academic projects, he has worked on projects involving vector multiplication, digital cell libraries, PCI devices, and microprocessor design. He has also worked as a lecturer and electrical engineer.
Copyright:
Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOC, PDF, TXT or read online from Scribd
1025, University Avenue, Apartment # 65, Sacramento, CA 95825 * 916-251-6784 * ankit1312@gmail.com
Objective: Seeking for fulltime or intern position in the field of ASIC/VLSI Design, Validation, Verification. Education Master of Science, Electrical and Electronics Engineering, California State University, Sacramento, CA Expected Graduation: Fall 2011 GPA 3.6 Bachelor of Science, Electrical and Electronics Engineering Saurashtra University, India June 2008 GPA 3.8 Technical Skills Languages: Verilog, VHDL, C, C++, SQL, Assembly Scripting Languages: Perl, Tcl Operating Systems/Platforms: UNIX, Windows XP/Vista/7 Equipment: Logic Analyzer Tools/Simulators: Modelsim, VCS, Xilinx ISE, Matlab, Synopsis Design Vision, PSPICE, Microwind, L-Edit, AutoCAD, VIM Text Editor Academic Projects • Pipelined Vector Multiplier: Performed multiplication between two 64-element vectors, element by element, and stored the product in another vector using 32-bit single precision floating point numbers expressed in IEEE 754 format. • Digital Standard Cell Library: Designed and laid out Digital Standard Cell Library in 90nm CMOS using ‘Microwind’ layout and simulation tool. Developed back-end-design and area optimized layouts for mask creation and simulated using cmos90n.rul technology. • PCI Card and Cache Logic: Designed two PCI devices in verilog HDL with the given Arbitration Logic and performed data transactions with cache memory management. • Microprocessor Data path and Control in Verilog HDL: Implemented the concept of microprocessor which performs a particular function. • ADC and Logic Analyzer in VHDL: Gave an analog input with a variable resistor (potentiometer) to the ADC which caused ADC to generate 8 bit digital output and displayed it on LEDs. • 32-bit ALU: Designed a 32-bit ALU which can perform signed logical and arithmetic manipulations. Implemented Overflow, Negative and Zero Flags. Designed in Verilog and tested in Synopsys. Work Experience Lecturer, Government Polytechnic, Ahmedabad, India Duration: 4 months • Designed and conducted lessons in major subject areas: Engineering Mathematics and Digital Electronics. • Attended professional growth seminars and workshops Electrical and Electronics Engineer, MBH Pumps Pvt. Ltd., India Duration: 5 months • Monitored and controlled pressure, temperature, efficiency and electrical ratings of electrical pumps • Worked with designing and manufacturing departments to ensure consistent quality and coordinated effort Related Seminars, Paper Presentations and Certification • Presented a seminar on Spintronics • Presented a paper on Plasmonics • Attended Workshop on Energy Conservation Awareness (Held by G.E.D.A.)
• Attended seminar on Emerging Trend in Power System
• Undergone training of Personality Development, Communication Skills, Leadership skills and Language & Presentation skills.