HCIA-Intelligent Computing V1.

0 mock exam

1. (Single choice) Which of the following statements about high-performance computing (HPC)
is incorrect? (    )
A. A single computer system that uses a large number of processors or a computing system or
environment that uses multiple computer clusters to deliver high computing performance.
B. In the early stage, the HPC is used in specific fields, such as basic science research and
defense technologies, based on customized computers. With the development of HPC
technologies, most HPC systems are built on x86 server clusters.
C. The HPC cluster consists of computing servers, shared storage, high-speed interconnection
devices, management software, platform software, and application software.
D. HPC is supercomputing, which uses computers to study and design product and support
complex decisions.

2. (Multiple Choice) Typical HPC applications include (    ).

A. Satellite mapping
B. Meteorological science
C. Aerospace
D. Energy exploration

3. (Single choice) Huawei intelligent edge architecture has full-stack capabilities. Which of the
following is not a Huawei product in the hardware layer in the intelligent edge architecture. (    )
A. Atlas 300 AI Accelerator Card
B. G2500 Intelligent Server 
C. Atlas 500 AI Edge Station 
D. InfiniBand NIC

4. (Multiple Choice) Which of the following are Huawei Atlas series products? (    )
A. Atlas 200 AI acceleration module
B. Atlas 300 AI accelerator card
C. Atlas 500 Smart Small Cell
D. X6800 high-density server
E. Atlas 800 deep learning system

5. (True or False) The essence of intelligent computing is to break through boundaries of CPUs,
servers, and data centers and provide a full-stack full-scenario intelligent cloud, edge, and end
solutions based on computing, management, AI, storage, and transmission chips.
A. TRUE
B. FALSE

6. (Single Choice) Which of the following is not a part of a CPU?

A. Register
B. Arithmetic logic unit
C. Control unit
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D. Process

7. (Multiple Choice) Which of the following types of processors involve smaller sets of
instructions and higher chip usage?
A. ARM
B. X86
C. PowerPC
D. MIPS

8. (Single choice) Which of the following statements about RISC is incorrect? (    )
A. RISC designers focus their efforts on making instructions that are often used simple and
efficient. 
B. RISC machines deliver lower efficiency when implementing special functions. 
C. RISC assembly language programs generally require larger memory space. When
implementing special functions, the programs are complex and difficult to design.
D. A RISC CPU consists of various circuit units and therefore has powerful functions, large size,
and high power consumption.

9. (True or False) Based on RISC technology, MIPS architecture incorporates extensible hardware
and software design. Therefore, MIPS delivers higher performance, lower power, and smaller
size than peer ARM products.
A. TRUE
B. FALSE

10. (Single choice) After ARMv7, ARM processor architectures were named Cortex architectures.
Which of the following Cortex architectures is used by the Huawei-developed mobile phone
processor chip Kirin? (    )
A. Cortex-A
B. Cortex-R
C. Cortex-M 

11. (Multiple Choice) Which of the following statements about the Kunpeng and x86
architectures are correct? (    )
A. The x86 architecture is a heavy-core, multi-core, multi-thread, high-frequency architecture.
B. The Kunpeng architecture is a light-core, many-core architecture.
C. In the PC field, both the x86 and Kunpeng architectures have mature ecosystems.
D. The x86 architecture adopts the CISC architecture.

12. (Single choice) ARM microprocessors are widely used in various product markets, such as
industrial control, consumer electronics, communications systems, network systems, and
wireless systems. Which of the following statements about ARM architecture is incorrect? (    )
A. When delivering the same functions and performance, ARM microprocessors feature smaller
chip sizes, lower power consumption, higher integration, more hardware CPU cores, and better
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concurrency performance.
B. Support 16-bit, 32-bit, and 64-bit instruction sets, and are compatible with various
application scenarios from IoT, devices, to cloud.
C. Use a large number of registers, and most data operations are performed in registers,
enabling faster command execution.
D. Use complex instruction sets, leading to low processing efficiency.

13. (Single Choice) Heterogeneous computing is a new computing model that emerged after
single-core computing and multi-core parallel computing. Which of the following statements
about heterogeneous computing is incorrect? (    )
A. Moore's law is getting closer to its physical limits, and it's increasingly difficult and expensive
to improve single-core performance.
B. Multi-core parallel computing brings limited performance boost. With the increase of
parallelism, the problems of heat dissipation and power consumption are becoming more and
more prominent.
C. Heterogeneous computing maximizes the performance of each processor and allocates tasks
to computing units that are best-suited.
D. NUMA is a heterogeneous computing mode.

14. (Single choice) Which of the following is not a typical GPU application scenario? (    )
A. HPC acceleration scenario
B. General-purpose computing for complex logical operations
C. Mixed-app HPC with best throughput
D. Video and image processing

15. (Multiple Choice) Which of the following statements about heterogeneous computing are
correct? (    )
A. Heterogeneous computing allows different types of computing devices to share computing
processes and results based on a series of software and hardware standards.
B. The purpose of heterogeneous computing is to solve the problem of insufficient CPU
computing capability.
C. Common heterogeneous system architectures include CPU+GPU, GPU+FPGA, and CPU+
Dedicated chip.
D. A heterogeneous computing system involve the collaboration of GPUs and CPUs. The
advantages of heterogeneous computing are computing acceleration and energy efficiency.

16. (True or False) In the Go match between AlphaGo and Ke Jie in 2017, Google used an ASIC
chip called TPU.
A. TRUE
B. FALSE

17. (Multiple Choice) Common hardware computing platforms include CPUs, GPUs, ASICs, and
FPGAs. Among which, (    ) are high-performance programmable chips that allow multiple
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processing units to process different instruction streams at the same time.

A. GPU
B. ASIC
C. FPGA
D. CPU

18. (Multiple Choice) Which of the following statements about the functions and features of
Huawei's intelligent management software FusionDirector is incorrect? (    )
A. FusionDirector implements functions including intelligent software management, fault
management, asset management, power consumption management, and automatic
deployment management.
B. FusionDirector supports automatic provisioning of BMC, BIOS, and RAID configurations and
automatic OS installation.
C. Currently, FusionDirector does not support the initial configuration of third-party servers.
D. FusionDirector adopts the microservice-based architecture and scale-out architecture to
support elastic scale-out and multi-node multi-active features.

19. (Multiple Choice) Common instruction sets for microprocessors include CISC, RISC, and EPIC.
Which of the following statements about the instruction sets are correct? (    )
A. In CISC microprocessors, instructions of a program and operations in each instruction are
sequentially executed in sequence.
B. RISC simplifies the number of instructions and addressing modes, facilitating implementation,
enhancing instruction parallel execution, and improving compiler efficiency.
C. EPIC allows the processor to execute instructions in parallel according to the scheduling of
the compiler without increasing hardware complexity. This architecture is developed based on
the very-long instruction word (VLIW) architecture and incorporates many improvements.
D. VLIW packs multiple instructions into an instruction word, which effectively improves the
utilization efficiency of each computing function component of the CPU and improves the
program performance.

20. (Multiple Choice) Which of the following interfaces are provided by the iBMC? (    )
A. Web-based user interface
B. SNMP interface
C. Redfish interface
D. IPMI interface

Answer:
1 D / 2 ABCD / 3 D / 4 ABCE / 5 A / 6 D / 7 ACD / 8 D / 9 A / 10 A / 11 ABD / 12 D / 13 D / 14 B /
15 ABD / 16 A / 17 BC / 18 C / 19 ABCD / 20 ABCD

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