ABHILASH O.

S
abhilashiit@gmail.com
09496350129

Career Objective

To give my best effort in executing my responsibilities for the

achievement of organizational goals.

Educational Qualifications

Degree/Course Board/Institute/University Year Percentage

B.Tech. Kerala University 2010 60%
(Electronics and
communication)
10+2 HSE 2006 82%
10 SSLC -KERALA 2004 89%

PG Diploma in VLSI DOEACC Centre, Calicut 2011

& Embedded
Hardware Design

Projects and seminar

Mini Project: ‘Directional Sound Generator’

2. Done mini project on an innovative technology ‘Directional Sound System’. Its
aim was to make a novel speaker system which can direct the sound within a
small angle, with low scattering. A report about our project was published by the
daily ‘The Hindu’.

3. RISC Simp-A simple customizable Microprocessor, UART using VHDL @

(DOEACC)
 Main Project: ‘Blood Vessel Detection from Retinal Image Based on K-Median
Clustering’
The procedure is used in the case of surgeries to sensitive human organs such as retina,
brain etc. On operating the doctors have to be very careful so that no vital parts are
damaged which may lead to vision loss, paralysis etc. The conventional method is more
based on human perception. But the conventional techniques fail in the case of
hemorrhage or similar situations in which the blood vessels and nerves are mistaken. This
can be avoided by the use of new image processing technology called k-median
clustering

Seminar: EMP-
Generation of EMP and hazards.

EDA Tools :
MentorGraphics Modelsim,Keil C, Xilinx ISE 12.1,Altera Quartus
II,OrCAD,PADSLOGIC,PSoC Designer,PSoC Creator

Languages

4. VHDL
5. Verilog HDL
6. Embedded C

Target Platforms

1. Xilinx &Altera FPGA’s

2. PSoC
3.8051
4.8086
ACTIVITIES AND ACHIEVEMENTS
7. Participated in Science Exhibitions.
8. Panchayath topper in 10th.
9. Mini Project: ‘Directional Sound Generator’ reported in news paper
‘Hindu’
10.First prize in Paper Presentation conducted by Lourdes Matha College
of Engineering (2009).
 11.Second prize in Paper Presentation conducted by University College
of Engineering, Kariavattom (2009).
12.Participated in Technical Fests conducted by several Engineering
Colleges.
13.Captain of school football team
14.Won merit certificate for PCM in National level.
15.Won certificate for running race in school level
16.Event organizer in school and college functions and other technical
events

Projects Handled
17.Industry standard project in VLSI in DOEACC Centre, Calicut.

18. Major Project: Implementation of CPU in VHDL

Description: This CPU takes input from memory module and
performs various operations and then stores results into the memory
module
.
Skill set

19.Basic Understanding of fundamentals of VLSI.

20.Understanding of VHDL, Verilog.
21.Basic Understanding of Digital circuit design fundamentals.
22.Basic Understanding of electronics concepts.
23.Basic knowledge of microcontroller(8051)/ microprocessor (8086).
24.Understanding of CMOS design.
25.Basics of C and Assembly programming.
26.Basics of FPGA Design Concepts
27.Development using ModelSim, Xilinx ISE tool.
28.Hands on experience on PSOC.
29.Basic Understanding of FPGA design methodology and prototyping.
30.EDA/ASIC / Chip Designing.

Key Strengths

31.Positive mind.
32.Confidence.
33.Self Motivated.
 34.Leadership.
35.Adaptive towards circumstances.

Hobbies
36.Playing football and cricket.
37.enjoyment with friends.

Personal Information

PERSONAL PROFILE
Name : ABHILASH O.S
Date of Birth : 24-DEC-1987
Father’s Name : O.K SREENIVAS
Address : ‘ABHILASHA’ ODATHUPARAMBIL
HOUSE
NEAR MARY MATHA THEATRE,
KANIMANGALAM. P. O;
PIN-680027
Phone : 0487 2448791
Mobile : 9496350129
Email : abhilashiit@gmail.com

Declaration

I hereby declare that the details furnished above are correct to the best of my
knowledge.

Date : 02-03-2011
Station : CALICUT Abhilash o.s