Link 1

 Windows 95a with microsoft internet Explorer 3 and internet mall and
news

Based on my evaluation, windows it has Operating System: Microsoft

windows 95 4.00.950a and has a 16 MB RAM File system of windows, file
system. It has a feature "Make new conncetion" it's like a telephone style but
in the computer, this is the old style Synchronous communications. It has a
kernel type Monolithic. It run as well windows 3.11 and Ms Dos programs.

Link 2

 https://www.onworks.net/ Ubuntu 20

Ubuntu 20 feels stable, cohesive, and familiar, which is not surprising given

the changes since the 18.04 release, such as the move to to newer versions
of the Linux Kernel and Gnome. As a result, the user interface looks excellent
and feels smoother in operation than the previous LTS version.

Link 3

 https://www.makeuseof.com/tag/4-classic-operating-systems-
can-access-browser/?fbclid=IwAR0v-eML6nzg-
XU5dpx2UV6Hy3q03_wrjsSMoSVBCSZbJAX7-y7iJvXmZ3M

 Macintosh Plus
It had an original price tag of $2,600, proving that Apple's penchant
for exorbitant prices is far from a modern phenomenon. The
computer shipped with 1MB of RAM (and support for up to 4MB), it
supported up to seven peripherals, and it had an 800KB floppy disk
drive.

 By 1986, significantly more apps and games were available. This

emulation includes Risk, Cannon Fodder, and Shufflepuck.

Link 4 https://teach-sim.com/cpu-2/?fbclid=IwAR202yrcMheti6-
4bmvMWJiGvQun8Fm8bMs9JAZrBOS_VOIqOGsPSA565h8

 CPU simulator

The CPU Simulator is loosely based on Reduced Instruction Set Computer

(RISC) architecture with a prominent register file composed of from 8 to
64 configurable fast registers, a minimal set of variable-length instructions
(pure RISC has fixed length instructions), a limited number of addressing
modes, data and instruction caches and a 5-stage instruction pipeline.
Except two instructions, viz. load and store, the CPU instruction set is
based on register to register addressing. The CPU instructions can be
entered manually by selecting valid instructions and operand(s) from a list
of instructions and operands. In selecting operands the associated
addressing modes can also be specified at the same time. The selected
assembler instruction is then added to the CPU instruction memory. The
stored instructions can then be individually selected and manually
executed one by one or run as a program. The simulator provides runtime
debugging facilities for the selected instructions, registers and memory
locations. A stack is provided that demonstrates support for interrupts,
system calls, subroutine parameters, saving register values between
subroutine calls, and return addresses.

A further refinement to CPU simulator is the inclusion of cache and

pipeline simulations both of which provide highly configurable and visual
operations. These advanced simulators can be used to demonstrate
technology specific details and their impact on system performance. The
cache placement and replacement policies can be selected; the hit/miss
ratios for different cache organizations can be plotted and compared. The
pipeline stages are colour coded and animated. Different methods of
eliminating pipeline hazards to improve performance can be clearly
demonstrated to improve understanding. A history of pipeline activity is
maintained that can be used to investigate the stages of the pipeline.