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DLD-EXP 01 (Studying Different Digital Integrated Circuits (ICs)
DLD-EXP 01 (Studying Different Digital Integrated Circuits (ICs)
Laboratory Report
Digital Logic Design Laboratory
Semester: Fall 2021-22
Group Members
Group No.
ID Name
18-36543-1
1. NAHID, MD AKRAMUL HOQUE
SIFATULLAH
2. 18-36576-1
SOUMIK, NAHIDUL HOQUE
3. 18-36579-1
6 KHAN, MD. SHAWON
4. 18-36592-1
JOTY, SHAKILA FARHANA
5. 18-36627-1
Title:
Studying different digital Integrated Circuits (ICs).
Abstract:
An electronic circuit formed on a little piece of semiconducting material, playing out a similar capacity as a
bigger circuit produced using discrete parts is called an incorporated Circuit or IC. We learned with regards to
various kinds of rationale gates and for all intents and purposes confirmed their reality tables by utilizing fitting
incorporated Circuits or ICs. A logic gate is a rudimentary structure square of an advanced circuit.
Theory:
In analog signals, data is converted into electric beats of shifting sufficiency yet in the event of computerized,
interpretation of data is in paired configuration (zero or one) where each piece is illustrative of two particular
amplitudes.Analog signals fluctuate ceaselessly and their worth is influenced by all degrees of clamor. Advanced
signs can be handled by computerized circuit parts, which are modest and effortlessly created in a large number
on a solitary chip.
There are two kinds of circuits which are known as incorporated circuit and discrete circuit. The two principle
benefits of ICs over discrete circuits are cost and execution. Cost is low in light of the fact that the chips, with
every one of their parts, are printed as a unit by photolithography instead of being developed each semiconductor
in turn. . Execution is high on the grounds that the parts switch rapidly and burn-through little force (contrasted
with their discrete partners) because of the little size and nearness of the parts. There are seven fundamenta logic
gates: AND, OR, NOT, NOR, NAND,XOR and XNOR. Boolean articulation for every one of these logic gate
are given beneath:
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
AND operation:
The AND operation produces a high if and only if all the inputs are high. An AND gate can have two or more
inputs and performs AND operation or logical multiplication.
Truth Table:
Input, A Input, B Output, F
0 0 0
0 1 0
1 0 0
OR operation: 1 1 1
The OR operation produces a high output when any of the inputs are
high. It has two or more inputs and one output which performs OR operation or logical addition.
Truth Table:
Input, A Input, B Output, F
0 0 0
0 1 1
1 0 1
1 1 1
NOT operation:
The NOT operation changes one logic level to the opposite logic level. It is implemented by a logic circuit known
as an inverter.
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
NAND operation:
The NAND gate operates as an AND gate followed by a NOT gate. It acts in the manner of the logical operation
"AND" followed by negation. The output will be low if both inputs are high. Otherwise, the output is high.
NOR operation:
The NOR gate is a combination OR gate followed by an inverter. Its output is high if both inputs are low.
Otherwise, the output is low.
XOR operation:
The XOR (exclusive OR) gate acts in the same way as the logical "either/or" .The output is high if either, but
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
not both, of the inputs are high. The output is low if both inputs are low or if both inputs are high. Another way
of looking at this circuit is to observe that the output is 1 if the inputs are different, but 0 if the inputs are the
same.
XNOR operation:
The XNOR (exclusive-NOR) gate is a combination XOR gate followed by an inverter. Its output is high if
the inputs are the same, and low if the inputs are different.
Apparatus:
1. Digital trainer board
2. Integrated Circuits ( 7400, 7402, 7404, 7408, 7432, 7486 )
3. Power supply
4. Connecting wires
Resut:
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
Circuit 2: Or gate.
Result:
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
Result:
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
Result:
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
Result:
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
Result:
Department of Electrical and Electronic Engineering/
Department of Computer Science/
Department of Computer Engineering
American International University- Bangladesh (AIUB)
Result:
1. Vcc represents voltage at gatherer. Essentially Vcc is associated in the normal gatherer pin of an
IC. It is consistently the positive pin. Ground of an IC method negative inventory voltage. In
computerized rationale, this is almost consistently the negative pin. The greater part of the Ics are worked
in 5V DC power.
2. To build a 4I/p AND gate we need three 2 I/p AND gate. First we need to utilize two 2 I/p AND
gate to interface every one of the four sources of info. Then, at that point, the yields of these AND gate
ought to be associated with the contribution of the third 2 I/p And door. This way we can develop a 4 I/p
AND entryway by utilizing 2 I/p AND door.
3. We can develop a XOR gate circuit straightforwardly utilizing AND, OR and NOT gate. The
articulation will be ( ) . Nonetheless, this methodology requires five entryways of these three sorts. In
this manner we can develop a XOR gate.
References:
1) Whatis.techtarget.com
2) digital-signal-process.blogspot.com
3) www.jameco.com
List the references that you have used to answer the Report section above.