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Course Code: Course Title: Pre-Requisite: Course Content
Course Code: Course Title: Pre-Requisite: Course Content
Course Content
MOS devices and technology: Different MOS models, simulation and associated accuracy; Brief
introduction to IC fabrication: Wafer processing, die preparation and interrelation between device
simulation, CAD layout and processing; Layout for VLSI: Standard cell layout, Design rules, Full and
semi-custom design, Floorplanning, Bit slice design; transmission gates, inverter, ring oscillator and
latch up effects; Interconnects; Performance estimation: rise time & fall times, gate sizing & power
consumption; VLSI architecture design and optimization: Basic gates: NAND, AND, NOR, OR, XOR,
multiplexor, shifters; Arithmetic circuits: Adder, subtractor, comparator, multiplier; Sequential cell
design: Latch, registers, counters; Embedded memories: RAM, EEPROM etc; simple microprocessor;
Digital design using System Verilog: Introduction to SystemVerilog, module design, place & route;
layout optimization; IC packaging and testing.
Course Objectives
The course aims to provide an understanding of the design and layout of digital VLSI circuits/
systems and will allow design exercises using appropriate CAD tools. Having successfully completed
the module the students will be able to:
• Understand standard submicron CMOS devices and the principles of digital CMOS integrated
circuit design
• Demonstrate knowledge and understanding of VLSI architectures like basic gates, arithmetic
circuits, Sequential cell, Embedded memories, simple microprocessor and optimisation.
• Identify issues related with transistor sizing, power consumption and parasitic effects on
system design.
• Manage a complex system through systematic approach of cell design, the use of hierarchy,
place & route and test strategy to reduce the problems of debugging large system.
• Design complex systems using a hardware description language.
• Verify function and performance of designs using digital and analogue simulators.
Course Outcomes:
Having successfully completed the module, you will be able to:
• Demonstrate knowledge and understanding of digital CMOS integrated circuit design
considering fabrication steps starting from basic device simulation, transferring them into
CAD layout and possible fabrication steps through process simulation (CO1/Understand &
Apply).
• Analyze VLSI architectures considering issues related with transistor sizing, power
consumption and parasitic effects. (CO2/Analyze).
• Design a complete IC using systematic approach of cell design, the use of hierarchy, place &
route and performance verification (CO3/Design).
• Design complex systems using a hardware description language (CO4/Design).
Text books:
Basics of CMOS Cell Design by Etienne Sicard and Sonia Delmas Bendhia
CMOS VLSI Design by Neil Weste and David Harris
Tentative evaluation:
Attendance 10%
Class tests 10%
Lab 20%
Midterm I 10%
Midterm II 20%
Final 30%