Linear Integrated Circuits Applications

Unit – I
Objectives:
⮚ To introduce the students about symbol, pin diagram, specifications and
characteristics of an operational amplifier.

Syllabus:
The Operational Amplifier- Schematic symbol, Ideal and Practical op-amp specifications,
Equivalent Circuit, IC 741 pin configuration and internal circuit, DC and AC Characteristics.

Outcomes:
Students will be able to
⮚ identify the symbol and equivalent notation of an operational amplifier.
⮚ distinguish between ideal and practical specifications of an operational amplifier.
⮚ classify various DC and AC characteristics of an operational amplifier.
 Learning Material
Operational Amplifier:
⮚ Op-Amp is a direct coupled high gain differential amplifier, which consists of one or
more difference (differential) amplifiers, and is followed by a level translator and the
output stage.
⮚ Op-Amp is a versatile device that can be used to amplify AC as well as DC input signals
and designed for computing mathematical functions such as addition, subtraction,
multiplication, integration and differentiation.
⮚ Op-Amp has two inputs and one output. The input marked as “–” known as Inverting
input and input marked with “+” is known as Non-inverting input.
Block diagram:
⮚ The Op-Amp is mainly divided into four main blocks as shown in fig.1.1.
o Input Stage
o Intermediate Stage
o Level Shifting Circuit
o Output Stage

Fig.1.1 Block Diagram of an Operational Amplifier

Input Stage:
⮚ The input stage is a dual input, balanced output differential amplifier shown in fig.1.2.
The basic requirements at the input stage of the Op-Amp are;
- High voltage gain
- High input impedance to avoid loading on the source
- Two input terminals
- Small input offset voltage
- Small input offset current
- High CMRR
- Low input bias current
⮚ All such requirements are achieved by using the dual input, balanced output differential
amplifier as an input stage.

Fig.1.2 A Dual Input Balanced Output Differential Amplifier

⮚ Input stage provides most of the voltage gain of the amplifier and also establishes the
input resistance of the Op-Amp.
Intermediate Stage:
⮚ The intermediate stage shown in fig.1.3, is dual input, unbalanced output differential
amplifier, which is driven by the output of the first block.
⮚ The overall gain requirement of the Op-Amp is very high and it is achieved by the
intermediate stage.
⮚ Basically, the intermediate stage is not a single amplifier but it is a chain of cascaded
amplifiers.

Fig.1.3 A Dual Input Un-balanced Output Differential Amplifier

Level Shifting Circuit:
⮚ The Level Shifting circuit is an emitter follower, using a constant current source.
⮚ The Op-Amp also amplifies the DC signals and the DC quiescent voltage level of earlier
blocks which may get amplified and applied as the input to the next block affecting the
output which may result in distortion.
⮚ Due to direct coupling, the dc voltage level at the output of the intermediate stage is well
above the ground potential. Therefore, the level shifting block is used to change the DC
level at the output to zero with respect to ground, when no signal is applied at the input
terminals.
 ⮚ Figure 1.4 shows an emitter-follower hence also called as a buffer that can provide
impedance matching.

Fig.1.4 An Emitter follower circuit

Output Stage:
⮚ The output stage is generally a complementary push-pull amplifier is given in fig.1.5.
This amplifier increases the output voltage swing and raises the current supplying
capability of the Op- Amp and also provides low output impedance.
⮚ The requirements of Output Block are:
- Large output voltage swing capability
- Large output current swing capability
- Low output impedance
- Low quiescent power dissipation
- Short circuit protection
⮚ A class AB or class B amplifier is suitable for the Output stage.

Fig.1.5 A Complementary Push-Pull Amplifier

Schematic Symbol:
⮚ The most commonly used schematic symbol of an op-amp is shown in fig.1.6 which
consists of two inputs and one output.
⮚ Since the input differential amplifier stage of the op-amp is designed to be operated in
differential mode, the differential inputs are non-inverting input designated as (+) and
inverting input designated as (-).
⮚ An AC or DC signal applied to the non-inverting terminal produces an in phase signal at
the output. On the other hand, if the signal is connected to inverting terminal produces an
out of phase signal at the output terminal.
 Fig.1.6 Schematic Symbol of an Op-Amp.
Where, V+ : Non-inverting input (volts)
V- : Inverting input (volts)
Vout : Output (volts)
VS+ : Positive power supply (volts)
VS- : Negative power supply (volts)
Equivalent Circuit:
⮚ Figure 1.7 shows the equivalent circuit of an op-amp.

Fig.1.7 Equivalent Circuit of an Op-Amp

⮚ AVid is an equivalent thevenin voltage source and R0 is the thevenin equivalent resistance
looking into the output terminals of an op-amp.
⮚ The output voltage is
V0 =AVid = A (V 1-V2)

Where, A = large signal voltage gain; V id = differential input voltage

▪ V1 = voltage at the non-inverting terminal with respect to ground

▪ V2 = voltage at the inverting terminal with respect to ground

⮚ The above equation indicates that the output voltage is directly proportional to the
algebraic difference between the two input voltages.
⮚ In other words, the op-amp amplifies the difference between two input signals not the
individual inputs.
Ideal and Practical Op-Amp Specifications:
Ideal op-amp specifications:
⮚ Infinite voltage gain A.
⮚ Infinite input resistance Ri so that almost any signal source can drive it and there is no
loading of the preceding stage.
⮚ Zero output resistance R0 so that output can drive an infinite number of other devices.
⮚ Zero output voltage when input voltage is zero.
⮚ Infinite bandwidth so that any frequency signal can be amplified.
⮚ Infinite CMRR so that output common mode noise voltage is zero.
⮚ Infinite slew rate so that output voltage changes occur simultaneously with input voltage
changes.
Practical op-amp specifications:
⮚ Very high voltage gain A OL 2×105.
⮚ Very high input resistance 2MΩ.
⮚ Output resistance is about 75 ohms.
⮚ Band width 1MHz.
⮚ Output voltage / offset voltage (2mV) when input voltage is zero.
⮚ The input bias current is about 80 nA
⮚ The input offset current is about 10 nA
⮚ The common mode voltage should be within +/-12V for +/-15V supply
⮚ The voltage gain rolls off 6dB per octave starting at 100KHz.
⮚ The slew rate is 0.5V/microsecond.

DC and AC Characteristics:

DC Characteristics:

⮚ Input Bias Current, Input Offset Current, Input Offset Voltage, Thermal Drift,
Total Output Offset Voltage.

Input Bias current: Depending on the type of input transistor, the bias current can flow in or
out of the input terminals.

Fig.1.8 (a) Input Bias Currents (b) Inverting Amplifier with Bias Currents

The input current is modeled as current sources, IB+ and IB-, in parallel with the positive and
negative input terminals as shown in fig.1.8. The magnitudes can range from μA down to pA.
Although IB+ and IB-, are similar in magnitude, there not exactly the same. This difference, called
the input bias current, is described by 
Input Offset current: Figure 1.9 shows the input offset current, IOS, is the difference between
IB+ and IB- or IOS = IB+ − IB–.

Fig.1.9 Input Offset Currents

Note also that IOS is only meaningful where the two individual bias currents are fundamentally
reasonably well-matched, to begin with. This is true for most voltage feedback (VFB) op amps.

Input Offset Voltage: The input offset voltage is defined as the voltage that must be applied
between the two input terminals of the op amp to obtain zero volts at the output as shown in
fig 1.10. Ideally the output of the op amp should be at zero volts when the inputs are grounded.

Fig.1.10 Op-amp Showing Input Offset Voltage

Thermal Drift: Bias current, offset current and offset voltage change with temperature.
A circuit carefully nulled at 25°C may not remain so, when the temperature rises to 35°C. This is
called thermal drift. Thermal drift can be minimized using the following techniques: The
Op-Amp must be kept away from the source of heat when they used in circuit boards. Forced
cooling such as fans are used to maintain specific temperature.

Total Output Offset Voltage: The total output offset voltage (VOT) is the offset voltage
produced because of the input bias current or the input offset voltage alone.
The input offset voltage and the input bias current might be either positive or negative with
respect to ground. The total offset voltage at the output of the inverting and the non-inverting
amplifier without any technical compensation is given as;

AC Characteristics of OP Amp:

⮚ The AC characteristics of an Op-Amp are:

● Frequency Response
● Slew Rate
 ● Frequency Compensation Techniques
Frequency Response: Ideally an op-amp should have an infinite bandwidth. This means
the gain of op-amp must remain same for all the frequencies from zero to infinite.
An ideal op-amp will have an infinite bandwidth. It indicates that the open loop gain of op-amp
is the same for both AC and DC signals. But, in the practical Op-Amps, the gain decreases at
higher frequencies due to the presence of capacitor yC' at the output terminal. The fig.1.11 shows
that there is one pole because RC and gain falls at - 20dB/decade.

Fig.1.11 Frequency Response

Slew Rate: The slew rate of an op amp or any amplifier circuit is the rate of change in the
output voltage caused by a step change on the input. It is measured as a voltage change in a given
time - typically V/µs or V/ms.
Op-amp Slew Rate Illustration:
⮚ A typical general purpose device may have a slew rate of 10 V/microsecond. This means
that when a large step change is placed on the input, the device would be able to provide
an output 10 volt change in one microsecond.
⮚ The slew rate is defined as the maximum rate of change of output with time. The slew
rate is specified in volts per micro second and thus it is given as,

Fig.1.12 (a) Voltage Follower (b) Input/Output Waveform

⮚ Let Vs is the sinusoidal then output also sinusoidal because the circuit is a voltage
follower as shown in fig.1.12 (a). As shown in fig1.12 (b) for non-inverting amplifier a
square wave input is applied to the circuit. Then, the frequency of the applied input
increases till the distorted output is visualized, as shown in the above figure. Output
voltage follows input voltage and it is given as,
 ⮚ If frequency or amplitude of input signal is increased to exceed slew rate of op-amp, the
output will be distorted. Thus, the maximum input frequency at which an undistorted
output voltage of peak value is given by, fmax= (slew rate/6.28 x Vm) x 106.

IC 741- Pin diagram:

⮚ The 741 integrated circuit looks like any other ‘chip’. However, it is a general purpose
op-amp. As shown in fig 1.17 the important pins are 2, 3 and 6 because these represent
inverting input, non-inverting input and output.

Fig.1.17 Pin diagram of IC 741

⮚ Pin 1 (Offset Null):
Offset nulling, since the op-amp is the differential type, input offset voltage must be
controlled so as to minimize offset. Offset voltage is nulled by application of a voltage of
opposite polarity to the offset. An offset null-adjustment potentiometer may be used to
compensate for offset voltage. The null-offset potentiometer also compensates for
irregularities in the operational amplifier manufacturing process which may cause an
offset.
⮚ Pin 2 (Inverted Input): All input signals at this pin will be inverted at output pin 6. Pins
2 and 3 are very important to get the correct input signals or the op amp cannot do its
work.
⮚ Pin 3 (Non-Inverted Input): All input signals at this pin will be processed normally
without inversion. The rest is the same as pin 2.
⮚ Pin 4 (-V): The V- pin (also referred to as Vss) is the negative supply voltage terminal.
Supply-voltage operating range for the 741 is -4.5 volts (minimum) to -18 volts (max),
and it is specified for operation between -5 and -15 Vdc. The device will operate
 essentially the same over this range of voltages without change in timing period.
Sensitivity of time interval to supply voltage change is low, typically 0.1% per volt.
⮚ Pin 5 (Offset Null): Same as pin 1, and offset nulling.
⮚ Pin 6 (Output): Output signals polarity will be the opposite of the inputs when this
signal is applied to the op-amps inverting input.
⮚ Pin 7 (+V): The V+ pin (also referred to as Vcc) is the positive supply voltage terminal
of the 741 Op-Amp IC. Supply-voltage operating range for the 741 is +4.5 volts
(minimum) to +18 volts (maximum), and it is specified for operation between +5 and
+15Vdc. The device will operate essentially the same over this range of voltages without
change in timing period. Actually, the most significant operational difference is the
output drive capability, which increases for both current and voltage range as the supply
voltage is increased. Sensitivity of time interval to supply voltage change is low, typically
0.1% per volt.
⮚ Pin 8 (N/C): The ´N/C´ stands for ´Not Connected´. There is no other explanation.
There is nothing connected to this pin, it is just there to make it a standard 8-pin package.

Specifications:
⮚ Absolute Maximum Ratings
over virtual junction temperature range (unless otherwise noted)(1)
PARAMETER µA741C µA741M
UNIT
MIN MAX MIN MAX
V
cc Supply voltage(2) –18 18 –22 22 C
V
ID Differential input voltage(3) –15 15 –30 30 V
VI Input voltage, any input(2)(4) –15 15 –15 15 V
Voltage between offset null (either OFFSET N1 or
OFFSET N2) and V CC– –15 15 –0.5 0.5 V
Duration of output short circuit(5) Unlimited
Operating free-air temperature
TA range 0 70 –55 125 °C
Case temperature for 60 seconds FK package N/A N/A 260 °C

Lead temperature 1.6 mm (1/16

inch) from case for 60 seconds
J, JG, or U package N/A N/A 300 °C

Lead temperature 1.6 mm (1/16

inch) from case for 10 seconds
D, P, or PS package 260 N/A N/A °C

T
stg Storage temperature range –65 150 –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to
the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under recommended operating conditions is
not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
(2) All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and
VCC–.
(3) Differential voltages are at IN+ with respect to IN –.
(4) The magnitude of the input voltage must never exceed the magnitude of the supply voltage or
15 V, whichever is less.
(5) The output may be shorted to ground or either power supply. For the µA741M only, the
unlimited duration of the short circuit applies at (or below) 125°C case temperature or 75°C
free-air temperature.
(6)
⮚ Recommended Operating Conditions

PARAMETER
MIN MAX UNIT
V
CC+ 5 15
Supply voltage V
V
CC– –5 –15
Operating free-air µA741C 0 70
TA temperature °C
µA741M –55 125
 Assignment-Cum-Tutorial Questions
I) Objective Questions
1. An op-amp is a ____________ amplifier [ ]
A) High gain differential B) low gain differential C) Moderate gain differential
D) unity gain
2. Draw the schematic symbol of an op-amp.
3. Draw the equivalent symbol of an op-amp and indicate all the parameters.
4. The common-mode rejection ratio of an ideal op-amp is [ ]
A)very high B) Infinity C) always unity D) unpredictable
5. The differential gain of an op-amp is [ ]
A) very high B) very low C) dependent on input voltage D) about 100
6. The total output offset voltage is given by ___________
7. The output of a particular op-amp increases 8V in 12μs. The slew rate is [ ]
A) 90 V/μs B) 0.67 V/μs C) 1.5 V/μs D) none of these
8. The input offset current equals the [ ]
A) difference between two base currents B) average of two base currents
C) collector current divided by current gain D) none of these
9. The output resistance of an ideal operational amplifier is [ ]
A) Infinity B) Low C) Very low D) Zero
0
10. For μA741C, at 25 C ambient temperature the maximum input offset current is ______
11. Output of an operational amplifier is measured at pin number [ ]
A) 2 B) 4 C) 6 D) 8
12. The output voltage of an ideal op-amp is obtained by [ ]
A) Amplifying the difference between the two input voltages
B) Amplifying individual input voltages
C) Amplifying products of two input voltage
D) None of the mentioned

13. With zero volts on both inputs, an op-amp ideally should have an output voltage [ ]
A) Zero B) Equal to the positive supply voltage C) Equal to negative supply
voltage D) Equal to CMMR.

14. An Op – Amp has offset voltage of 1mV and is ideal in all other respects. If this Op –
Amp is used in the circuit shown in figure.
 The output voltage will be (Select the nearest value)

a. 1 mV b. 1 V c. ± 1V d. 0 V

II) Descriptive Questions:

1) Explain the functions of all the basic building blocks of an op-amp with neat sketches.
2) Find the significance of level translator in an op-amp.
3) List out the ideal and practical specifications of an op-amp?
4) Define the following parameters with respect to op-amp
A) Input bias current B) Input offset current C) Input offset voltage D) Slew rate
5) Illustrate and explain pin diagram of IC741 op-amp.

6) Identify what can be the maximum gain of op-amp with the slew rate of 0.3V/µs when
the input signal to op-amp is 0.03 sin 2x105t.

7) If the response to a square wave input, the output of an op-amp changes from -12v to
+12v over a time interval of 0.5µs identify the slew of the op-amp?

8) How fast can the output of op-amp change by 15v if its slew rate is 0.5v/µs?