58 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 33, NO.

1, JANUARYiFEBRUARY 1997

Vikram Kaura, Memher, IEEE, and Vladimir Blasko, Member, IEEE

Abstract- Operation of a phase locked loop (PLL) system

under distorted utility conditons is presented. A control model of
the PLL system is developed and recommendations are made on
tuning of this model specially for operation under common utility
distortions as line notching, vollage unbalance/loss, frequency
variations. The PLL is completely implemented in software with-
out any filters. All analytical results are experimentally verified.
Index Terms-Phase locked loop (PLL), utility interface, utility
angle, utility synchronization.

I. INTRODUCTION
HE phase angle of the utility voltage is a critical piece
of information for the operation of most apparatuses as:
controlled ac cs dc converters, static VAR compensators, cy- Fig. 1. Corih-01diagram of the phase locked loop.
cloconverters, active harmonic filters and other energy storage
systems coupled with the electric utility [ 2 ] .This information
completely implemented in software on a DSP. All analytical
may be used to synchronize the turning odoff of power
results are experimentally verified.
devices, calculate and control the flow of active/reactive power
or transform the feedback variables to a reference frame suit-
able for control purposes. The angle information is typically 11. THE PLL SYSTEM
extracted using some form of a phase locked loop (PLL) [l].
Besides utility interface applications, PLL methods are also A. Principle of Operation
used in motor control to estimate the electrical angular speed The basic configuration of the PLL system is shown in
of the rotor [3], [4]. The quality of the lock directly effects Fig. 1. The phase voltages U,,, U,,, U,, are obtained from
the performance of the control loops in above applications. sampled line to line voltages. These stationary reference frame
Line notching, voltage unbalance, line dips, phase loss, voltages are then transformed to voltages U,,, U,, (in a
and frequency variations are common conditions faced by frame of reference synchronized to the utility frequency)
equipment interfacing with electric utility. Any PLL used using the 3/2 and e / s transformations. The angle 0* used in
under such conditiviis should not only be able to phase lock these transformations is obtained by integrating a frequency
to utility voltages as quickly as possible and maintain lock but command w*. If the frequency command w* is identical to
also provide low distortion output. the utility frequency, the voltages and U,, appear as dc
This paper examines a simple, fast and robust three-phase vahes depending on the angle 0".
PLL for utility applications with emphasis on operation under In the given method, a PI regulator is used to obtain that
distorted utility conditions. Ample information is available in value of 8* (or U * ) which drives the feedback voltage U&
literature about PLL's as applied to communication systems. It to a commanded value U:,. In other words, the regulator
is our intent to treat the PLL system purely as a control prob- results in a rotating frame of reference with respect to which
lem. The topology used is similar in nature to a field-oriented the transformed voltage U,, has the desired dc value Qe.
controller, commonly used for converter/inverter control. A The frequency of rotation of this reference frame is identical
control model of the PLL is developed and used for time- and to the frequency of the utility voltage. The Magnitude of
frequency-domain analyses. Recommendations are made for the controlled quantity U,, determines the phase difference
selection of appropriate regulator gains. The PLL system is between the utility voltages and sin(8*) or cos(0*)).
The method results not only in the utility frequency w* but
Paper IPCSD 96-45, approved by the Industrial Power Converter Comrmt-
tee of the IEEE Industry Applications Society for presentation at the IEEE also allows one to lock at an arbitrary phase angle 8* with re-
Applied Power Electronics Conference and Exposition, San Jose, CA, March spect to the utility angle 8. The angle A0 (Fig. 2) is controlled
3-7. Manuscript released for publication July 15, 1996. by the commanded values U:,. Analytical development of a
The authors are with Rockwell Automahon, Allen-Bradley Company,
Meqnon, WI 51092 USA simplified model suitable for time/frequency domain analysis
Publisher Item IdenQfier S 0093-9994(97)00988-2. follows.
0093-9994/97$10.1 30 0 1997 IEEE
KAURA AND BLASKO: OPERATION OF PLL SYSTEM 59

700 20
600 18
16
14
p
12 .-
5 IOE
3 300 88
U
I 1 :200
D
6
Fig. 2. Input phase voltage and PLL output. 4
100
2

mq -& 0
0 10 U)
a
30

Fig. 4. Control of bandwidth and damping using a.

40
0

"de C. Selection of Gains

With the above configuration, the control problem reduces
to picking the correct gains for the model of Fig. 3 for various
operating conditions. Taking the sampling delay into account,
Fig. 3. Simplified control model of the PLL system.
the plant is a simple lag along with an integrating element (5):

B. SimpliJied PLL Model
The sampled phase voltages U,, , U,, ,U,, when transformed
to the synchronous frame of reference result in the quadrature
voltages U d s , U,, (Fig. 1). In vector control scheme, typically
two independent regulators are used to control these voltages.
In the PLL presented here, only a single control loop is
closed around Ude. Assuming a balanced three phase utility, a
simplified control model of the PLL can be developed using
the following transformations:
Substituting (1) and (2) in (3), the voltages U,,, U,& are given
by (4):
1
Hplant = (GZ) )(:
where T, is the sampling time. The open-loop transfer function
H0l with the controller then becomes
where Kpll,Tpll are the gains associated with the PI regulator.
This is a standard control problem very similar to a current
controlled speed loop of a drive system where the integral term
in the plant mimics the mechanical inertia and the lag element
emulates the current control loop. Several methods can be used
to select the gains based on the desired performance criteria.
The method of symmetrical optimum [5]was used to calcu-
late the regulator gains. According to this method, the regulator
gains Kpll and Tpll are selected such that the amplitude and
the phase plot of Hot are symmetrical about the crossover
frequency wc, which is at the geometric mean of the two
corner frequencies of Hol. Given a normalizing factor a , the
frequency w,, Kpll, Tpll are related as following:

(4)

If the error A0 between the utility angle O and the PLL

Substituting (7) into (6) it can be shown [6] that the factor a
output O* is set to zero, U,, = U and Ud, = 0. This
and the damping factor E are related by the relationship:
offers immediate possibility to lock onto the utility voltage
by regulation of U,, to zero. No information is needed about
the magnitude U of the utility voltage. c x a-1
-,
2
The simplified control model is shown is Fig. 3. For
small values of AO, the term sin(AO) behaves linearly, i.e., The relationship between a, damping factor E and band-
sin(AO) AO.The PLL can thus be treated as a linear control
N width w, is shown in Fig. 4 for a sampling time T, = 100
system with the utility magnitude U appearing as a gain in p. By changing a , the system bandwidth and damping can
the forward path, the plant being a simple integrator. be controlled.
60 IEEE TRANSACT113NS ON INDUSTRY APPLICATIONS, VOL. 33, NO. 1, JANUARYPEBRUARY 1997

111. UTILITYDISTORTIONS
When operating on a grid, it is normal to have such
utility distortions as: line notching, voltage unbalance, line
dip/loss. frequency variation etc. These distortions can pose
three possible problems for the PLL system.

A. Polluted PLL Output

Notching of the utility will generate harmonics which will
enter the PLL loop through the sampled phase voltages
U,,, U,,, U,. (Fig. 1). While the notches normally will
not effect the locking capability of the PLL, they will
cause harmonics in the PLL output, propagating to the
associated control utilizing 8".Obvious method to eliminate
the harmonics is to use filters; either on the sampled voltages
or on the error term of the control loop. However, it must
be noted that the PLL system inherently has strong filtering
properties due to the two integrators in series in the forward Fig. 5 . Undistorted utility and PLL output. cy = 2.4.
path. As demonstrated in the following sections, the factor
Q provides a simple handle to modify the inherent filtering
TABLE I
properties of the system without the use of any additional CALCULATED
GAINSAND PERFORMANCE
CHARACTERISTICS.
filters.
a I OcOIz) I KPII I ~,,,(msec)I
I
B. Loss of Gain 2.4 1663.14 12.04 0.576
30 153.05 0.96 90
Because the amplitude of the utility voltage appears as a
gain term in the forward path (Fig. 3), any dip or unbalance
in the line voltage will cause a loss of gain U for the control
in Fig. 5 for undistorted conditions. The PLL locks on to the
system. This effect can be eliminated by normalizing the
utility voltage quickly and produces a clean output signal.
feedback term U d e for the utility magnitude U . Calculation of
Table I shows two sets of gains and calculated performance
an accurate value of U poses interesting problems if the utility characteristics corresponding to Q of 2.4 and 30. PLL per-
is distorted. As a first approximation: if U& = 0, the feedback
formance was tested for the three cases described in Section
term U,, could be substituted for U . Alternatively, the gains of
111.
the PI regulator should be changed to accommodate variations
in U .
A. Utility Harmonics
C. Phase Deviations A startup transient under distorted conditions is shown in
Fig. 6(a). The presence of utility distortion does not effect the
The utility grid is typically a very stiff system as regards to
quick startup transient which is similar to the case of Fig. 5.
the supply frequency. A deviation in the supply frequency will
The high bandwidth of the PLL is confirmed by the frequency
cause the angle error A6 to increase. The PI regulator naturally
response plots of Fig. 7. The measured crossover frequency
works to bring this error to zero. The reaction to frequency
in the open loop response (594 Hz) is within -10% of the
fluctuations is thus completely predictable by the closed-loop
calculated value of 663 Hz.For the closed loop response, the
response of the PLL system. The feedforward term W E applied
bandwidth taken conservatively at a phase angle of -45O, is
through the gain Kff facilitates the function of the regulator
to a large extend. 456 Hz.
If the supply frequency is inclined to change (e.g., stand While excellent for initially locking to the utility, the
high bandwidth enhances the voltage distortions resulting in
alone power systems as diesel generators which are not very
severe harmonics in the PLL output (Fig. 6(b)). Although this
stiff>,there will be tracking error in the phase angle B as long as
distorted output provides the correct value of the utility phase
the frequency is changing. If the change in frequency is know,
the tracking error can be eliminated by the feedforward term. angle on an average basis, it will necessitate the use of filters at
some point in the control system of which this PLL may form
If the change in frequency is not predictable, an additional
an integral component. For utility interface applications where
integral term may be used in the PI regulator to achieve the
same result. This is of use in motor control applications where the frequency does not change substantially this bandwidth
is more than adequate and can be sacrificed for cleaner PLL
catching a spinning motor is a common requirement.
output.
This is achieved by changing a to 30.0 and computing Kpll
IV. EXPERIMENTALRESULTS and T,,, accordingly. Fig. 8 shows the performance of the PLL
The PLL was implemented for a 460 V/60 Hz utility; on a under such conditions. The PLL output remains clean inspite
DSP with sampling rate of 10 kHz. A startup transient is shown of the line notches. The reduced bandwidth is confirmed by
KAURA AND BLASKO OPERATION OF PLL SYSTEM 61

I:.. . . i . . . . I . . ..i . , .. i . I . . I f . . . .-
, I.. ' ' i. . . .:I
(b)
Fig. 6 . Distorted utility and PLL output a = 2.4. (a) Startup and (b) steady
state.

the bode plots of Fig. 9. The measured crossover frequency

(Fig. 9(a)) is 55 Hz as against the predicted value of 53 Hz
(Table I). This close correlation is also evident from the closed
loop response (Fig. 9(b)) where the measured bandwidth is 51
Hz. In practice, a low value of a could be used to obtain a
quick initial lock and later changed to a suitable value to get
a cleaner output.

B. Unbalanced Utility
PLL performance is demonstrated for the case of utility
unbalance in Fig. 10. At time t = 0, the DSP starts to sample
the phase voltages. Before this time the PLL integraters are (b)
empty. The PLL output becomes available, synchronized to Fig. 7. PLL response for a = 2.4. (a) Open loop and (b) closed loop.
phase A, within a cycle. As explained in Section 111-B, utility
unbalance results in loss of the control loop gain. Since a is
inversely proportional to the gain term K,n of the PI regulator
(7), a balance needs to be struck between the need to have a
clean output from the PLL and its ability to operate under
utility unbalance. Note that this transient is also extreme case
for conditions as temporary dip in the line or complete line
loss and recovery.

C. Variations in Supply Frequency

A step change in the supply frequency appears as a ramp .....
change in the phase angle 8. This causes the error A0 to
increase. The ability of the PLL to respond to supply frequency
variations is thus dependent on its ability to bring A6 to zero Fig. 8. a = 30. Distorted utility and PLL output.
as quickly as possible.
This ability was tested as following: instead of changing allowing the PLL angle O* to follow it, the supply angle O
the supply angle O (by changing the supply frequency) and was kept constant (because the supply frequency could not
62 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 33, NO. 1, JANUARYREBRUARY 1997

Functn Lou Mz
XS5.5Hz Y:-I 13Q56m68

.
. .. ..
....__-, .. . .,_.-
-_.__
.. ..
-"I"

.
Fig. 10. PLL with unbalanced utility. cy = 30
y:-93,7976Deg

Req Response Ch 2 :1

Y:-2.4363dB

Fig. 11. PLL step response. a = 30

X61Hz t-45.4699Deg V. CONCLUSION

(b)
Fig. 9. PLL response for a = 30. (a) Open loop and (b) closed loop.
be changed) and the PLL output angle d* was commanded
to lead the supply angle 0 by 90". This was initiated by a
step change in (Fig. 11). The PLL output cos(Q*)and the
utility voltage U,, remained in phase until the step change in
was introduced. The PLL output cos(8*) settled to the
commanded angle within 10 ms. Looking at U,, and it
is evident that the change of 7r/2 radians in the angle occurs
in 10 ms. This rate of change translates into a step change
in frequency of -987 Hz. When the step command in Ude
was withdrawn, cos(Q*) synchronized again with the phase
voltage Uas.
It is interesting to note the presence of deep notches in the
Uas. In the absence of any filter, these notches also appear
in the feedback Ude. The inherent smoothing action of the
integrator in the PI regulator and the integral plant it drives
result in the clean output waveform cos(O*).
A three-phase PLL system was presented for utility in-
terface applications. A control model of the PLL, suitable
for time/frequency domain analysis, was developed. Operation
was studied specially under distorted utility conditions and
recommendations made to tune the control model to counter
such effects as loss of gain, line harmonics, and frequency dis-
turbances. The PLL was completely implemented in software
without the use of any hardware filters. All analytical results
were experimentally verified.
ACKNOWLEDGMENT
The authors would like to acknowledge the discussions with
their colleague L. Garces during the course of writing this
paper.
REFERENCES
[I] D. H. Wolaver, Phase-Locked Loop Circuit Design. Englewood Cliffs,
NJ: Prentice Hall, 1991.
[2] T. M. Mohan, Undeland, and W. F. Robbins, Power Electronics:
Converters, Applications and Design. New York Wiley, 1989.
KAURA AND BLASKO: OPERATION OF PLL SYSTEM
[3] V. Blasko, J. C. Moreira, and T. A. Lipo, “A new field oriented controller
utilising spatial position measurement of rotor end ring current,” in Proc.
PESC, 1989, pp. 295-299
[4] F. Nozari, P. A. Mezs, A. L. Julian, C. Sun, and T. A. Lipo, “Sensorless
synchronous motor drive for use on commercial transport rurplanes,”
IEEE Trans. Ind. Applicat., vol. 31, no. 4,July/Aug. 1995.
[5] W. Leonhard, Control ofElectrical Drtves. Berlin, Germany: Springer-
Verlag, 1985.
[6] W. Leonhard, Introduction to Control Engineering and Linear Control
Systems, translated by T. Rajagopalan and D. V R L Rao. New Delhi,
India: Allied-New Delhi, 1976.
Vikram Kaura (SM’8&#89) received the B.E,
degree in electrical engineering from ~ ~
neering college, chandigarh, India, in 1987 and the
M,S, degree in electrical engineering from univer.
sity of Wisconsin, Madison, in 1989. He is currently
a student at the University of Chicago Graduate
School of Business.
From 1989 to 1991, he was a Design Engineer
with the Drive Systems Division, General Electric
Company, Salem, VA, developing self tuning algo-
rithms for AC drive control. Since then, he has been
with the Standard Drives Business, Allen Bradley Co., Meqnon, WI, where as
a Project Engineer he is currently involved with the design and development
of high performance ac drives and low harmonic regenerative converters. His
areas of interest include real time control and applied mathematics.
63
Vladimir Blasko (M’89) was born in Klenovnik,
Croatia, in 1953. He received the B.Sc., M.S., and
Ph.D. degrees in electrical engineering from the
University of Zagreb, Zagreb, Croatia, in 1976,
1982, and 1986, respectively.
From 1976 to 1988, he was with the Electrotech-
nical Institute Rade Koncar, Zagreb, in the Power
Electronics and Automatic Control Department.
During the academic year 1988-1989, he was with
the University of Wisconsin, Madison, as a recipient
of the IREX scholarship. From 1989 to 1992, he
was with the Research and Development Center, Otis Elevator Company,
Farmington, MI. Since 1992, he has been with Standard Drives Division,
Allen-Bradley Company, Mequon, WI. He has been working on the research,
development-and design or high power transistor choppers, drives for electrical
vehicles,
~ i high
- performance ac elevator drives and low harmonics regenerative
three phase voltage sonrce converters. His primary areas of interest are ac
drives, intelligent power management, power electronics, applied modern
and