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Department of Electrical Engineering & Technology

Faculty of Engineering & Applied Sciences


Riphah International University Faisalabad Campus

Lab Manual
Electronics Devices and Circuits

(EEL-213)

Name: ______________________________________________________________________

Roll Number: ______________________ CMS: _______________________________

Semester: _________________________ Group: ______________________________


Contents

I. Lab Safety Policies..................................................................................................................3


1. General lab safety.................................................................................................................3
2. Clothing:...............................................................................................................................3
3. Equipment Failure................................................................................................................3
4. Electrical safety....................................................................................................................3
5. Fire........................................................................................................................................4
6. In Case of emergency...........................................................................................................4
II. Safety Undertaking.............................................................................................................5
III. Grading Policy....................................................................................................................6
IV. Rubrics.................................................................................................................................7
V. Level of Inquiry.................................................................................................................17
VI. Lab’s Course Learning Outcomes..................................................................................18
VII. List of Experiments...........................................................................................................19
I. Lab Safety Policies

1. General lab safety


 Never eat or drink while working in the lab.

 Read labels carefully.

 Do not use any equipment unless you are trained and approved as a user by your supervisor.

 Never do unauthorized experiments.

 Never work alone in laboratory.

 Keep your lab space clean and organized.

 Do not leave an on-going experiment unattended.

 Never use open flames in laboratory unless instructed by TA.

2. Clothing:
 Shorts and sandals should not be worn in the lab at any time. Shoes are required when working
in the machine shops.

 If you have long hair or loose clothes, make sure it is tied back or confined.

 Keep the work area clear of all materials except those needed for your work.

3. Equipment Failure
 If a piece of equipment fails while being used, report it immediately to Lab Engineer/Assistant.
Never try to fix the problem yourself because you could harm yourself and others.

 If leaving a lab unattended, turn off all ignition sources and lock the doors.

 Clean up your work area before leaving.

4. Electrical safety
 Obtain permission by the safety coordinator before operating any high voltage equipment

 Maintain an unobstructed access to all electrical panels.

 Avoid using extension cords whenever possible.

 Never, ever modify or otherwise change any high voltage equipment.

 Before attaching the power supply to your setup make sure there are no “live” wires which can
be touched.
 When attaching a high voltage power supply ALWAYS switch off the supply

5. Fire.
 If a person’s clothing catches on fire, he/she needs help.
 Prevent him/her from running.
 Make him/her lie down and smother the flames by rolling, wrapping with lab coats,
blankets, towels, etc.
 Never turn a carbon dioxide extinguisher on a person.
 If a fire breaks out, (if time allows) turn off all burners and remove solvents, place the
chemical and equipment safely to the nearest possible table/bench, exit the building
calmly.
 If you do not use the fire extinguisher, leave the room immediately to a safer place
possibly outside. There are carbon dioxide extinguishers in the building and the positions
and operation of these should be known.
 Point the extinguisher at the base of the flames.
 Very small fires can be put out with a damp towel by smothering.
 Only after the safety of all is assured should the matter of extinguishing the fire be
considered.
Because a few seconds delay can result in very serious injury, Laboratory staff will guide you on what
to do and how to exit during the case of such an emergency.

6. In Case of emergency
 Report the location of the emergency; give your name, telephone number, and building
and floor number.
 Report the nature of the emergency whether an explosion has occurred and whether there
has been a chemical or electrical fire.

Rescue: 1122
Police Emergency Control Room: 041-9200264
Army Control Room: 1135
Emergency Police Number: 15
University Administration Number: 041-8777210, 8777310
II. Safety Undertaking

I HAVE READ ALL OF THE ABOVE, AND I AGREE TO CONFORM TO


ITS CONTENTS.

Student Name: ______________________________________

Student ID/Roll No./ Reg.: ____________________________ Section: _________________

Lab Course Title: ___________________________________

Lab Instructor Name: ________________________________

Signature: __________________________________________ Room: __________________

Date: ______________________________________________
III. Grading Policy

Lab Performance 30%


Lab Report 20%
Lab Project 20%
Final Lab Viva/ Performance 20%
Class Participation 10%
IV. Rubrics

Lab Performance (Continuous Assessment) / Performance Test/ Home Task

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Ability to Conduct Fully understand the lab Has very good Has some understanding Has poor understanding of
Experiment instruments including its understanding of the lab of the lab instruments the lab instruments including
purpose and quite able to instruments including its including its purpose and its purpose and unable to
conduct the entire experiment purpose and able to conduct able to conduct conduct experiment on his
with negligible help from lab experiment with some help experiment with a lot of own; lab instructor provides
instructor from lab instructor help from lab instructor help in almost every step of
the experiment

2. Data Analysis & Always analyzes and interprets Analyzes and interprets data Analyzes and interprets Analyzes and interprets data
Interpretation data correctly and precisely; correctly most of the time; data correctly incorrectly most of the time;
always draws correct and most of the conclusion are occasionally; some many conclusions are
useful conclusions; always correct and useful; conclusion is incorrect; incorrect; most of the time
compares theory against compares theory against occasionally compares never attempts to compare
experimental results and experimental results and theory against theory against experimental
calculates related error calculates related error most experimental results and results
of the time calculates related error.
Home Task

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Ability to Conduct Fully understand the home task Has good understanding of Has some understanding Has poor understanding of
Home Task including its purpose and quite the home task including its of the home task the home task including its
able to complete the entire purpose and almost including its purpose and purpose and unable to
home task. complete the home task able to complete the complete the home task.
with minor deficiencies. home task with major
deficiencies.

2. Organization / Information is presented in a Information is presented in Information is presented


Structure logical, interesting way, which somewhat logical manner. in quite less continuity
is easy to follow. All sections All sections are in a correct and less logical manner. Unable to submit the lab
are in a correct order and order as directed and Sections are not in proper report.
submitted on a time submitted on a time order as directed unable
to follow the submission
deadline

3. Data Presentation Presents data very clearly using Presents data appropriate Data presentation is not Presents data in a very
appropriate graphs/waveforms. Figure that clear. obscure manner.
graphs/waveforms. Figure captions and units are Graphs/waveforms, Graphs/waveforms, figure
captions and units are always included most of the time. figure captions and units captions and units are never
included. are not always included included.

4. Literature Collected a great deal of Collected some basic Collected very little Did not collect any
Review information--all relates to the information--most relates to information--some relates information that relates to
topic. the topic to the topic the topic
5. Comprehensive Data write in a very good Data write in good manner Data write in just good Did not write Data and write
manner and cover every side of and cover almost every side manner and shortly cover irrelevant data.
the topic. of the topic. the topic.

6. Methodology Student shows high capability Student shows good Student shows fair Student shows poor capability
of analyzing the given problem capability of analyzing the capability of analyzing the of analyzing the given
and designing the appropriate given problem and designing given problem and problem and unable to design
solution for it the appropriate solution for designing the appropriate the solution for it
it solution for it

7. Implementation Task is completed without any Task is completed with quite Task is completed with a Task is not completed
and Completion external assistance and is less technical assistance lot of technical assistance
working properly from instructor or others in from instructor or others
order to complete the given in order to complete the
task and is working properly given task

8. Results and Clearly discusses what results Generally clear discussion of Limited discussion of Reader can gain very little
Discussion mean and what conclusions results and conclusions, but results and conclusions. information about why the
may be drawn from them. Cites may miss some points. Some Little or no reference to project was done and what
published standards or other use of references and published standards or the results may mean. No
related reports. published standards. other reports. reference to other studies
Reports/ Assignment

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Organization / Information is presented in a Information is presented in Information is presented Sequence of information is


Structure logical, interesting way, which is somewhat logical manner. All in quite less continuity difficult to follow. No logical
easy to follow. All sections are sections are in a correct and less logical manner. manner or continuity.
in a correct order and submitted order as directed and Sections are not in proper Objective, results and
on a time submitted on a time order as directed unable Conclusion are not stated.
to follow the submission
deadline or

Unable to submit the lab


report.

Calculations are completely Calculations are quite logical Calculations are somewhat Most of the calculations are
2. Calculations and logical and systematic. and systematic. logical and systematic. inaccurate. No logical and
Data Presentation Results and conclusion are systematic calculations.
Results and conclusion are Results and conclusion are stated but reflect little Presents data in a very obscure
stated and reflect complete stated and reflect acceptable knowledge of the manner. Graphs/waveforms,
knowledge of the experiment. knowledge of the experiment. figure captions and units are
Presents data very clearly using experiment. Presents data never included.
appropriate graphs/waveforms. appropriate Data presentation is not or
Figure captions and units are graphs/waveforms. Figure that clear.
always included captions and units are Graphs/waveforms, figure Unable to submit the lab
included most of the time captions and units are not report
always included
Viva Voce

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Responsiveness to Responds well, quick and very Generally responsive and Responsive but evasive or Non-responsive
accurate all the time accurate most of the times inaccurate most of the times
Questions/Accuracy

2. Level of Demonstration of full At ease with content and Only basic concepts are No grasp of
Understanding of knowledge of the subject with able to elaborate and demonstrated and interpreted information. Clearly no
the learned skills explanations and elaboration explain to some degree knowledge of subject
matter. No questions
are answered. No
interpretation made

Open-Ended Labs

Lab Performance

Performance
Sr. No. Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Methodology Student shows high capability of Student shows good Student shows fair Student shows poor capability
analyzing the given problem and capability of analyzing the capability of analyzing the of analyzing the given
designing the appropriate given problem and designing given problem and problem and unable to design
solution for it the appropriate solution for designing the appropriate the solution for it.
it. solution for it.

2. Implementation Task is completed without any Task is completed with quite Task is completed with a Task is not completed.
and Completion external assistance and is less technical assistance lot of technical assistance
working properly from instructor or others in from instructor or others
order to complete the given in order to complete the
task and is working properly. given task.

Lab Report

1. Organization/ Information is presented in a Information is presented in Information is presented Sequence of information is


Structure logical, interesting way, which is somewhat logical manner. in quite less continuity difficult to follow. No logical
easy to follow. All sections are in All sections are in a correct and less logical manner. manner or continuity.
a correct order and submitted on order as directed and Sections are not in proper Objective, results and
a time. submitted on a time. order as directed unable to Conclusion are not stated.
follow the submission
deadline. Or

Unable to submit the lab


report.

2. Results, Results and conclusion are stated Results and conclusion stated Results and conclusion are Results and conclusion are
Discussion and and reflect complete knowledge and reflect acceptable stated but reflect little inaccurate. Presents data in a
Data Presentation of the given task. Presents data knowledge of the knowledge of the very obscure manner.
very clearly using appropriate experiment. Presents data experiment.
graphs/waveforms. Figure appropriate graphs/ Graphs/ waveforms, figure
captions and units are always waveform. Data presentation is not captions and units are never
included that clear. Graphs/ included.
Figure captions and units are waveforms, figure
included most of the time. captions and units are not Or
always included.
Unable to submit the lab
report.
(Lab Project)

Project Design

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Implementation Project is completed without any Project is completed with Project is completed but The project is not implemented
and Completion external assistance and is quite less technical assistance not working properly. or not completed with
working properly. from the instructor or others implementation in initial phase
in order to complete the Or only.
project and is working
properly Project is completed and
working properly but with
Or unreasonable amount of
technical assistance from
Project is completed with no the instructor or others in
external assistance at all but order to complete the
is not working properly. project

2. Problem Analysis Student chose an innovative, Student chooses a complex Student chose a project Student chose a simple project
and Designing challenging project that required project with good technical with acceptable scope that with limited scope that
Solution an effort that exceeds the normal challenges that required solves a technical problem required very little creative
expectations for the course innovative problem solving and required some development or technical
project and engineering. technical expertise in expertise.
hardware and/or software.
3 Testing and Student developed a good Student demonstrated the Student was able to Student demonstrated little or
Analysis systematic procedure for testing ability to test hardware identify the problems in no ability to troubleshoot
hardware and/or software that and/or software in order to hardware and/or software hardware and/or software for
allowed for quick identification identify technical problems but required some the project.
of technical problems. Student and was able to solve any assistance in fixing some
was very good at analyzing and problems with little or no of the problems.
quickly solving all technical assistance.
problems

Lab Project Report

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Organization/ Information is presented in a Information is presented in Information is presented Unable to submit the lab
logical, interesting way, which somewhat logical manner. in quite less continuity report.
Structure is easy to follow. All sections All sections are in a correct and less logical manner.
are in a correct order and order as directed and Sections are not in proper
submitted on a time. submitted on a time. order as directed unable to
follow the submission
deadline.

2. Literature Review Collected a great deal of Collected some basic Collected very little Did not collect any
information--all relates to the information--most relates to information--some relates information that relates to the
topic. the topic to the topic topic

3. Results and Clearly discusses what results Generally clear discussion of Limited discussion of Reader can gain very little
Discussion mean and what conclusions may results and conclusions, but results and conclusions. information about why the
be drawn from them. Cites may miss some points. Some Little or no reference to project was done and what the
published standards or other use of references and published standards or results may mean. No
related reports. published standards. other reports. reference to other studies

Lab Viva

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Responsiveness to Responds well, quick and very Generally Responsive and Responsive but evasive or Non-responsive
Questions/ accurate all the time accurate most of the times inaccurate most of the
Accuracy times

2. Depth of Demonstration of full At ease with content and Only basic concepts are No grasp of information.
Knowledge knowledge of the project with able to elaborate and explain demonstrated and Clearly no knowledge of
explanations and elaboration. to some degree interpreted subject matter. No questions
are answered. No
interpretation made

Team Work

Sr. No. Performance Exemplary (15-11) Satisfactory (10-6) Developing (5-1) Unsatisfactory (0)
Indicators

1. Share Information Relays a great deal of Relays some basic Relays very little Does not relay any information
information--all relates to the information--most relates to information--some relates to teammates
topic. the topic to the topic

2. Fulfill Team Role’s Performs all duties of assigned Performs nearly all duties Performs very little duties Does not perform any duties of
Duties team role assigned team role

3 Share Equally Always does the assigned work Usually does the assigned Rarely does the assigned Always relies on others to do
without having to be reminded work--rarely needs reminding work- often needs the work
reminding
V. Level of Inquiry

Level Problem/ Question Procedure/ Method Solution


0 Provided to student Provided to student Provided to student
1 Provided to student Provided to student Constructed by student
2 Provided to student Constructed by student Constructed by student
3 Constructed by student Constructed by student Constructed by student

Level of inquiry Description

The problem, procedure, and methods to solutions are provided to the student.
0 The student performs the experiment and verifies the results with the manual.

The problem and procedure are provided to the student. The student interprets
1 the data in order to propose viable solutions.

The problem is provided to the student. The student develops a procedure for
investigating the problem, decides what data to gather, and interprets the data in
2
order to propose viable solutions.

A “raw” phenomenon is provided to the student. The student chooses (or


constructs) the problem to explore, develops a procedure for investigating the
3 problem, decides what data to gather, and interprets the data in order to propose
viable solutions.
VI. Lab’s Course Learning Outcomes
Course Title: Electronics Devices and Circuits
Laboratory: Electronics Lab
Instructor: Engr. Muhammad Umair Manzoor
Designation: Lab Engineer
E-mail: umair.manzoor@riphahafsd.edu.pk

After completion of this lab, students will be able to:

Taxonomy Emphasis
CLO Description
Level Level
Show the operation and characteristic of semiconductor P2 3
1
devices.
Reproduce the different transistor circuits to study their biasing P3 1
2 methodology by employing discrete electronic components.
Response on different OP-AMP circuits to study their P3 2
3 amplification by utilizing the discrete electronic components.

Emphasis Level: 1 = High, 2 = Medium 3 = Low


Mapping of Course Learning Outcomes (CLO) to Program Learning Outcomes (PLO) / Graduate Attribute

Course CLOs/ PLO PLO PLO


PLO1 PLO2 PLO3 PLO4 PLO5 PLO6 PLO7 PLO8 PLO9
Code PLOs 10 11 12

EEL- CLO1 3
213 CLO2 1
CLO3 2

PLO1: Engineering Knowledge PLO7: Environment and Sustainability

PLO2: Problem Analysis PLO8: Ethics

PLO3: Design/Development of Solutions PLO9: Individual and Team Work

PLO4: Investigation PLO10: Communication

PLO5: Modern Tool Usage PLO11: Project Management

PLO6: The Engineer and Society PLO12: Lifelong Learning


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: 4th


Subject: Electronics Devices and Circuits Session: Spring - 2021

VII. List of Experiments


Level of
Sr. No. CLO
Title of experiment Inquiry

Experiment 1 To study and observe semiconductor diode 0 1


characteristics
Experiment 2 To implementation of diode as clipper and clamper 1 1

Experiment 3 To Study Characteristics of bipolar junction transistor 1 2


(BJT).
Experiment 4 To Study Common Emitter Characteristics of BJT. 1 2

Experiment 5 To Study Common Base Characteristics of BJT 1 2

Experiment 6 To Study Common Collector Characteristics of BJT 1 2

Experiment 7 To Study FET (Field Effect Transistor) 0 1

Experiment 8 To Study JFET (Junction Field Effect Transistor) 1 2

Experiment 9 To Study MOSFET (Metal Oxide Semiconductor Field 1 2


Effect Transistor)
Experiment 10 To Study OP-AMP Parameters 1 3

Experiment 11 To design and test non-Inverting op-amp amplifiers 1 3

Experiment 12 To design and test Inverting op-amp amplifiers 1 3

Experiment 13 To design the Active low pass filters using Op-Amp. 1 3

Experiment 14 To design the Active high pass filters using Op-Amp. 1 3

Semester Project
Semester Project Design and Implementation 3
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan
Program: B.Sc. Electrical Engineering Semester: 4th
Subject: Electronics Devices and Circuits Session: Spring - 2021
Sr. Date Title of experiment Marks Sign
No.
Performance Lab
(30) Report
(20)
1. To study and observe semiconductor diode characteristics

2. To implementation of diode as clipper and clamper

3. To Study Characteristics of bipolar junction transistor (BJT).

4. To Study Common Emitter Characteristics of BJT.

5. To Study Common Base Characteristics of BJT

6. To Study Common Collector Characteristics of BJT

7. To Study FET (Field Effect Transistor)

8. To Study JFET (Junction Field Effect Transistor)

9. To Study MOSFET (Metal Oxide Semiconductor Field Effect


Transistor)
10. To Study OP-AMP Parameters

11. To design and test non-Inverting op-amp amplifiers

12. To design and test Inverting op-amp amplifiers

13. To design the Active low pass filters using Op-Amp.

14. To design the Active high pass filters using Op-Amp.

Semester Project

15. Semester Project Design and Implementation


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 1: To study and observe semiconductor diode characteristics


OBJECTIVES:

You will learn following.

 To observe and draw the forward bias V-I Characteristics of a P-N Junction diode.
 To observe and draw the reverse bias V-I Characteristics of a P-N Junction diode.

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Organization/Structure
experiment

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Theory

The semiconductor diode is formed by doping P-type impurity in one side and N-
type of impurity in another side of the semiconductor crystal forming a p-n
Junction as shown in figure 1.1.

Apparatus

 P-N Diode
 Regulated Power supply
 Resistor
 Ammeter
 Voltmeter
 Breadboard
 Connecting wires
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Circuit diagram (Forward bias):

Figure 1.1: Diode is

Circuit diagram (Reverse Bias):

Figure 1.2: Diode is

Procedure:
1. Connect the power supply, voltmeter, current meter with the diode as shown in the
figure 1.1 for forward bias diode. You can use two multi meter (one to measure current
through diode and other to measure voltage across diode).
2. Increase voltage from the power supply from 0V to 20V in step as shown in the
observation table measure voltage across diode and current through diode.
3. Note down readings in the observation table Reverse DC power supply polarity for
reverse bias as shown in figure 1.2.
4. Repeat the above procedure for the different values of supply voltage for reverse bias.
5. Draw VI characteristics for forward bias and reverse bias in one graph

Table-I: Results
Sr. No Source Voltage Forward bias Forward Reverse bias Reverse
Volatge Current Volatge Current

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 2: To implementation of diode as clipper and clamper

OBJECTIVES:

You will learn following.

 To implement the diode as clipper


 To implement the diode as clamper

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Organization/Structure
experiment

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Circuits:

Fig: 1 Clipper Circuit

Fig: 2 Clamper Circuit

Procedure:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan
Results:

Conclusion:

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan
Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 3: To Study Characteristics of bipolar junction transistor (BJT).

OBJECTIVES:

You will learn following.

 To check the terminals of a transistor with a multimeter


 To connect correctly a emitter transistor circuit
 To study the input and output characteristics of NPN transistor

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Organization/Structure
experiment

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Theory:
A transistor with 2 junction called bipolar junction transistor (BJT) is divided into two
types, according to the structure of a P-N junction of the devices which are NPN and PNP
transistors.

Transistor is widely used as the amplifier, Fig.9-2 showing the switching circuits where
the variety of transistors is circuit is different.
1. To give a forward based junction between the base and emitter.
2. To give a reverse biased to the junction b/w the collector & the base as shown in fig.

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan
Procedure:

1. Assume the terminal (A),(B),(C) at the transistor 2N3053 as in fig.

2. Use a multimeter at the measurement range of R *10KQ to measure the resistance of the
3 resistor terminals. Record the measure values in the table.

Result:
Read wire probe Black wire probe resistance
A B
A C
B A
B C
C A
C B

Conclusion:

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan
Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 4: To Study Common Emitter Characteristics of BJT.

OBJECTIVES:

You will learn following.

 Understand input and output characteristics of Common Emitter amplifier


 Understand the phase relationship between input and output voltages of CE amplifier

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Organization/Structure
experiment

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Apparatus:

 DC Supply
 Transistor C828
 Digital Multimeter
 Connecting wires
 Bread board
 Resistors 100Ω, 1KΩ
 Potentiometers 250K, 10K

Circuit Diagram:

Procedure:

1. To determine the input characteristics of common emitter amplifier, connect the circuit as
shown above.
2. Adjust 250K and 10K variable resistors to set Vce and Vbe as shown in the table.
3. Measure and record the voltage across 1K resistor Vb for each combination of Vce and
Vbe.
4. To determine the output characteristics of the common emitter configuration, set the 10K
potentiometer to its max value. This will cause Vce to decrease to 0 volts.
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

5. Adjust 250K potentiometer to set Ib to some value of μA.


6. Adjust the 10K potentiometer for all values of Vce in table making sure that Ib remains
constant.
Results:
Input Characteristics:

Output Characteristics:

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 5: To Study Common Base Characteristics of BJT

OBJECTIVES:

You will learn following.

 Understand the input and output characteristics of Common base amplifier


 Understand the phase relationship between input and output voltages of CB amplifier

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Organization/Structure
experiment

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Apparatus:
 DC Supply
 Transistor C828
 Digital Multimeter
 Connecting wires
 Bread board
 Resistors 4.7KΩ, 22KΩ, 1KΩ

Circuit Diagram:

Procedure
1. To measure transistor’s common base characteristics, connect the circuit as shown
above
2. Adjust Vcc to obtain Vcb of 5V
3. Adjust Vee to obtain Vbe of 0V
4. Measure and record Ve to determine emitter current Ie
5. Repeat the procedure for all values of Vbe in table.
6. Repeat the above procedure for each value of Vcb
7. To determine common base output characteristics, connect the circuit as shown

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8. Adjust Vee to obtain Ie of 1mA (Ve=1V)


9. Adjust Vcc to obtain the desired values for both Vcb and Ie
10. Measure and record Vc which is used to calculate Ic
11. Repeat above procedure for all values of Ie in table.

Results:
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Riphah International University Faisalabad Campus, Pakistan

Input Characteristics:
Output Characteristics

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 6: To Study Common Collector Characteristics of BJT

OBJECTIVES:

You will learn following.

 Understand the input and output characteristics of Common collector amplifier


 Understand the phase relationship between input and output voltages of CC amplifier

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
15 10
Methodology Organization/Structure

Implementation 15 Results, 10
Discussion and
and Completion
Data Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Procedure:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Results:
Input Characteristics:

Output Characteristics:

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 7: To Study FET (Field Effect Transistor)

OBJECTIVES:

You will learn following.

 Understand the drain characteristics of a FET

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Organization/Structure
experiment

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Theory:
A field effect transistor or FET is a special transistor with uni junction which differ from a
bipolar junction transistor the current is controlled to flow through FET by controlling the input
voltage of FET or the gate voltage. But the transistor is controlled by base current. FET is
divided according to the main structures into 2 types as below.

1. JFET(junction field-effect transistor)


2. MOSFET (metal-oxide semiconductor field-effect transistor)

Apparatus:
 Multimeter
 Experimental kit
 MOSFET :2N4351, JFET: 2N4391
 Variable resistor: 5KQ*2
 Resistor : 1KQ,10KQ,300Q
 Connecting wires

PROCEDURES:
Characteristics MOSFET

1. Connect the circuit.

2. Adjust v=20V. Adjust V so that V is 0v and adjust V so that V reads the same as
in table. Record I in table
3. Read adjusts V so that V reads 3v and repeat step and record the results in table.

VDS(Volts) 0.2 0.4 0.6 0.8 1 2 4 6 8 10


VGS=0V I(mA)
VGS=3V I(mA)
VGS=3.2 I(mA)

V
VGS=3.4 I(mA)

4. Adjust V so that V are 3.2v and 3.4v, then repeat step again and record the measured
results of I in table.
5. Use the data from table to draw the MOSFET (2N4351) characteristics ID from step
6. According to the equation=f (V).

Characteristics of n-channel JFET 2N4319:


1. Connect the experimental circuit of fig.

2. Determine the transfer characteristics of JFET by adjusting V so that V=0v and


adjusting V so that I=10mA as listed in table.
3. Gradually adjust V to get V increasing in negative value until I is I equal to 0mA by
increasing V of 1 volt for each step. Record the current ID in table.

VGS(Volts) 0 -0.25 -0.5 -0.75 -1.0 -1.25


ID(mA)

4. Determine the drain characteristics of JFET by using the experimental circuit of fig.
adjust V so that V=0v and adjust V so that is V obtained according to the listed in table.
Record the current ID in table.
5. Experiment again by adjusting V to -0.25v,-0.5v, and -0.75v and repeat step. Record
the current I for each value in table.
6. Write the data in table and draw transfer characteristics graph
7. Use the data from table to draw a drain characteristics graph.

Conclusion:

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 8: To Study JFET (Junction Field Effect Transistor)

OBJECTIVES:

You will learn following.

• Understand the drain characteristics of a JFET

Name: ……………………………

Rubrics

Performance Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Organization/Structure
experiment

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Theory:

The junction gate field-effect transistor (JFET or JUGFET) is the simplest type of field-effect


transistor. They are three-terminal semiconductor devices that can be used as electronically-
controlled switches, amplifiers, or voltage-controlled resistors.
Unlike bipolar transistors, JFETs are exclusively voltage-controlled in that they do not need a
biasing current. Electric charge flows through a semiconducting channel
between source and drain terminals. By applying a reverse bias voltage to a gate terminal, the
channel is "pinched", so that the electric current is impeded or switched off completely. A JFET
is usually on when there is no potential difference between its gate and source terminals. If a
potential difference of the proper polarity is applied between its gate and source terminals, the
JFET will be more resistive to current flow, which means less current would flow in the channel

Between the source and drain terminals. Thus, JFETs are sometimes referred to as depletion-
mode devices. JFETs can have an n-type or p-type channel. In the n-type, if the voltage applied
to the gate is less than that applied to the source, the current will be reduced (similarly in the p-
type, if the voltage applied to the gate is greater than that applied to the source). A JFET has a
large input impedance (sometimes on the order of 100 ohms), which means that it has a
negligible effect on external components or circuits connected to its gate.
Type: Active
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Pin Configuration: Drain, Gate, Source

Figure 2

JFET operation can be compared to that of a dam. The flow of water through a dam can be
controlled by the gates, by lowering the gates and hence reducing the cross section and the flow
of electric charge through a JFET is controlled by constricting the current-carrying channel. The
current also depends on the electric field between source and drain (analogous to the difference
in pressure on either end of the dam).
Constriction of the conducting channel is accomplished using the field effect: a voltage between
the gate and the source is applied to reverse bias the gate-source pn-junction, thereby widening
the depletion layer of this junction (see top figure), encroaching upon the conducting channel and
restricting its cross-sectional area. The depletion layer is so-called because it is depleted of
mobile carriers and so is electrically non-conducting for practical purposes.
When the depletion layer spans the width of the conduction channel, pinch-off is achieved and
drain-to-source conduction stops. Pinch-off occurs at a particular reverse bias (VGS) of the gate-
source junction. The pinch-off voltage (Vp) varies considerably, even among devices of the same
type. For example, VGS (off) for the Temic J202 device varies from −0.8 V to −4V.Typical
values vary from −0.3 V to −10 V .To switch off an n-channel device requires a negative gate-
source voltage (VGS). Conversely, to switch off a p-channel device requires positive VGS.
In normal operation, the electric field developed by the gate blocks source-drain conduction to
some extent. Some JFET devices are symmetrical with respect to the source and drain.

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Circuit Diagram:

Figure-3
Apparatus
 Two DC Supplies
 JFET
 Digital Multimeter
 Connecting wires
 Bread board
 Resistors 100KΩ, 100Ω, 1KΩ,
 Potentiometers 100K, 1K
Procedure:
1. Connect the circuit as shown above
2. Turn potentiometers fully counter clock wise, and turn on power supply
3. Leave 100K potentiometer fully counter clock wise so that Vgs = 0
4. Adjust 1K potentiometer to get desired values of Vds.
5. Measure voltage across 1K resistor. Use this value to find out the value of Id and fill in
the corresponding place in the above table
6. Now adjust 100K potentiometer so that Vgs = -0.25 volts.
7. Repeat above steps to find Vds and Id and fill table.
8. Now adjust 100K potentiometer so that Vgs = -0.5 volts.
9. Repeat above steps to find Vds and Id and fill tabl.
10. Now adjust 100K potentiometer so that Vgs = -0.75 volts.
11. Repeat above steps to find Vds and Id and fill table.
12. Use the corresponding values of Id and Vds to draw the drain characteristics

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Drain characteristics:

Transfer Characteristics:
Conclusion:

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 9: To Study MOSFET (Metal Oxide Semiconductor Field Effect


Transistor)

OBJECTIVES:
You will learn following.

 Understand the drain characteristics of a MOSFET


 Understand the difference between MOSFET and JFET

Name: ……………………………

Rubrics

Home Task Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Home Organization/Structure
Task

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Theory:
The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET) is a
type of transistor used for amplifying or switching electronic signals. Although the MOSFET is a
four-terminal device with source (S), gate (G), drain (D), and body (B) terminals, The body (or
substrate) of the MOSFET is often connected to the source terminal, making it a three-terminal
device like other field-effect transistors. Because these two terminals are normally connected to
each other (short-circuited) internally, only three terminals appear in electrical diagrams. The
MOSFET is by far the most common transistor in both digital and analog circuits, though
the bipolar junction transistor was at one time much more common.
The main advantage of a MOSFET over a regular transistor is that it requires very little current
to turn on (less than 1mA), while delivering a much higher current to a load (10 to 50A or more).
However, the MOSFET requires a higher gate voltage (3-4V) to turn on.

Figure 9.1

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Apparatus:
 Two DC Supplies
 MOSFET
 Digital Multimeter
 Connecting wires
 Bread board
 Resistors 100KΩ, 1KΩ, 4.7K
 Potentiometers 100K, 1K
Circuit Diagram:

Figure 9.2

Procedure:
1. Connect the circuit as shown above.
2. Turn potentiometers fully counter clock wise, and turn on power supply
3. Leave 100K potentiometer fully counter clock wise so that Vgs = 0
4. Adjust 1K potentiometer to get desired values of Vds.
5. Measure voltage across 1K resistor. Use this value to find out the value of Id and fill in
the table.
6. Adjust 100K potentiometer so that Vgs = -0.5 volts.
7. Repeat above steps to find Vds and Id and fill the table.
8. Invert the leads of the supply connected to the gate of the MOSFET and adjust the 100K
potentiometer so that Vgs = 0.5 volts.
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

9. Repeat above steps to find Vds and Id and fill the table.
10. Use the corresponding values of Id and Vds to draw the drain characteristics.
Drain characteristics:
Transfer
Characteristics:

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 10: To Study OP-AMP Parameters


OBJECTIVES:

You will learn following.


 To study the characteristics and the operation of IC Op-Amp.
 Some Parameters of IC Op-Amp can be measured.
 To understand the various application of IC Op-Amp

Name: ……………………………

Rubrics

Home Task Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Home Organization/Structure
Task

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….


Equipment
 Multimeter.
 Dual Power supply.
 Dual Oscilloscope.
 IC Op-Amp LM 741.
 Resisters 10K (2) 100K (4) 1M.
 Potentiometer 10K and 100K.
 Connecting wire.
Procedure
1. To determine the Input offset Voltage
Connect the circuit as showing in the fig.
Apply the dual power supply VCC = ± 12 DC voltages for the basing of Op- Amp.
Measure the output Voltage with a Multimeter.

VOUT = V

Calculate the close Loop Gain Av (CL) using the given formula.
AV (Close Loop) = (R1+R2) / R1 = V

Calculate the offset voltages using given formula.


V (Offset) = Vout / AV (CL) = V

2. Adjust the input Null-Offset Voltage


Connect the circuit of fig 1.2 then disconnecting the pins 1 and 5 of IC Op- Amp
to the pot.
Record Vout when IC Op-Amp is biased of ±12 DC voltages
Vout = V

Connect the pot 10K at the input offset Null point 1 and 5 then adjust pot to the center position
and connecting the center pin with -12V adjust the pot.

To obtain Vout closely to 0V.


Vout (adjusted) = V

3. Measure the input bias current


Apply the dual power supply V CC = ± 12 DC voltages for the basing of Op- Amp. Measure V A
and VB by volt meter and compare with GND.

VA = Voltage is drop across R1 = V

VB = voltage is drop across R3 = V

Calculate the input bias input current of IB1 and IB2 using formula.
IB1 = VA / R1 = A

IB2 = VB / R3 A
Determine the average input bias current from (IB1 +IB2) / 2 ;

IB (Avg) = A

4. Measurement of Input impedance


Connect the circuit as showing in the fig 1.4.

Apply the bias voltages of VCC = ± 12 DC and correctly measure the Positive and negative
values by a Multimeter. With a voltmeter, measure the voltage at point 1 and 2 of pot. By
adjusting pot. To the value of 0.1 volt. In the positive which the voltage at point 1 and 2 of pot is
equal to 0.1 volt and measure by a voltmeter at point 2 and 3 of IC Op- Amp , voltage

V2-3 = V

Do not adjust pot, then disconnect and measure the resistance at point 1 and 2 of pot.
R1-2 pot. 100KΩ = Ω

Use the voltage divider method to calculate the resistance at pins 2-3 of IC Op-Amp which is
also called “Input Impedance”
The Input impedance = Ω
5. Measure the Output Impedance.
Connect the circuit as showing is fig 1.5.
Apply the power supply bias VCC = ± 12 DC and correctly measure the Positive and negative
values by a Multimeter.
Remove R of 1KΩ, using a voltmeter measure the voltages Vout at point 6 and GND.
Vout = V

Connect R of 1KΩ, to the pin 6 comparing with GND. Measure again the V out voltages at pin 6
and GND using a voltmeter.
Vout = V

The reminder of the 2 different voltages is


Vout= V

Its mean that when R is connected, the Voltage is drop across the output of IC Op-Amp is
V.
That time when voltage drop across the IC Op-Amp, calculate the output resistance of Op-Amp.
Output Impedance of OP-Amp = Ω
Input waveform:

Output waveform:

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 11: To design and test non-Inverting op-amp amplifiers


OBJECTIVES:

You will learn following.

 To observe the open or close loop operation of an op amp


 To design and test non-inverting op amplifiers

Name: ……………………………

Rubrics

Home Task Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Home Organization/Structure
Task

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Theory:
Another way to classify amplifiers is by the phase relationship of the input signal to the output
signal. An 'inverting' amplifier produces an output 180 degrees out of phase with the input signal
(that is, a polarity inversion or mirror image of the input as seen on an oscilloscope). A 'non-
inverting' amplifier maintains the phase of the input signal waveforms. An emitter is a type of
non-inverting amplifier, indicating that the signal at the emitter of a transistor is following (that
is, matching with unity gain but perhaps an offset) the input signal. Voltage follower is also non
inverting type of amplifier having unity gain. This description can apply to a single stage of an
amplifier, or to a complete amplifier system.
Apparatus

 Op Amp
 Power Supply
 Oscilloscope
 Capacitors
 Resistors
 Bread Board
 Connecting Wires

Procedure

1. Using LM741 opamp, connect the circuit shown in figure.1. Apply a supply voltage of
±15V to the opamp. See the datasheet for the pin configuration of LM741. Note the 0.1
uF supply bypass capacitors. These capacitors are used to filter the high frequency supply
noise. Actually we should have connected these capacitors in earlier experiments as well.
Anyway from now on always connect supply bypass capacitors between supply and
ground. “Make it a habit”. Try to connect these capacitors as close as possible to the
supply terminal/pin of the circuit.
2.

Now we will plPlot the input-output characteristics of the opamp using the XY mode of the
oscilloscope. In XY mode, oscilloscope plots the signal applied at channel Y versus the
signal applied at channel X. Apply a 1V pk-pk 1 KHz sine wave, with 0 V DC offset, at
Vin . Connect channel X of the oscilloscope to Vin and channel Y to Vout. Press the XY
button. First switch both the channels to gnd. A dot will appear on the screen. Using
positions knobs, place that dot in the centre of the screen. Now this is the origin of the
plot. Now switch both the channels to DC. Draw the Vout vs Vin plot shown on the
screen on the graph below. Show the ±ve and -ve saturation voltages on the graph.

3.
4. Using LM741 connect a non-Inverting amplifier having R1 = 1K and R2 = 10K (the
feedback resistor). Apply a supply voltage of ±15V to the opamp. Don’t forget to connect
the supply bypass capacitors.
5. Apply a 0.5 V pk-pk 1 KHz sine wave with zero DC offset at the input. Observe the
output and input simultaneously on the oscilloscope using the CHOP mode. Note down
gain and the phase difference between input and output. Keeping the output channel on
DC, measure the DC level in the output:
Gain:
Phase difference:
DC level in the output:

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 12: To design and test Inverting op-amp amplifiers


OBJECTIVES:

You will learn following.

 To observe the open or close loop operation of an op amp


 To design and test inverting amplifiers

Name: ……………………………

Rubrics

Home Task Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
15 10
Methodology Organization/Structure

Implementation 15 Results, Discussion and 10


and Completion Data Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

1. Using LM741 connect an Inverting amplifier having R1 = 1K and R2 = 10K (the


feedback resistor). Apply a supply voltage of ±15V to the opamp. Don’t forget to connect
the supply bypass capacitors.
2. Apply a 0.5 Vpk-pk 1 KHz sine wave with zero DC offset at the input. Keeping both the
channels on DC, observe the input and output simultaneously on the oscilloscope, using
the CHOP mode. Note down Vout pk-pk gain and phase difference between input and
output. Keeping the Vout channel on DC, measure the DC level in the output:
3. Gain:

4. Phase difference: DC level in the output:


5. Draw Vin and Vout on the following graph, showing the peak voltages and DC offset in
Vout.

6. Now increase the input to 5 Vpk-pk. You will observe clipped output. At what output
voltage levels it gets clipped.
7. Max +ve swing: max –ve swing:

8. Apply a 0.5 V pk-pk 1 KHz sine wave with 0.3 DC offset at the input. Measure the DC
level in the output keeping the output channel on DC. By how much amount the DC
offset of the input signal has been amplified?
9. DC level in the output / DC level in the input.
10. Connect a 0.1 uF capacitor between Vin and R1. Measure the DC level in the output
keeping the output channel on DC. What happens to the output DC level? Why?

Procedure:
Circuit diagram:

Circuit diagram:

Results:

Conclusion:

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 13: To design the Active low pass filters using Op-Amp.
OBJECTIVES:

You will learn following.

 To design and test op amp based first order low pass filters.

Name: ……………………………

Rubrics

Home Task Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
Ability to 15 10
conduct Home Organization/Structure
Task

Data Analysis & 15 Calculations and Data 10


Interpretation Presentation
Total Marks obtained

Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………


Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Theory:
Low-pass filter is a filter that passes signals with a frequency lower than a
certain cutoff frequency and attenuates signals with frequencies higher than the cutoff frequency.
The amount of attenuation for each frequency depends on the filter design. The filter is
sometimes called a high-cut filter, or treble cut filter in audio applications. A low-pass filter is
the opposite of a high-pass filter. A band-pass filter is a combination of a low-pass and a high-
pass filter.Low-pass filters exist in many different forms, including electronic circuits (such as
a hiss filter used in audio), anti-aliasing filters for conditioning signals prior to analog-to-digital
conversion, digital filters for smoothing sets of data, acoustic barriers, blurring of images, and so
on.

The moving average operation used in fields such as finance is a particular kind of low-pass


filter, and can be analyzed with the same signal processing techniques as are used for other low-
pass filters. Low-pass filters provide a smoother form of a signal, removing the short-term
fluctuations, and leaving the longer-term trend.
Figure 1

The gain-magnitude frequency response of a first-order (one-pole) low-pass filter. Power gain is


shown in decibels (i.e., a 3 dB decline reflects an additional half-power attenuation).Angular
frequency is shown on a logarithmic scale in units of radians per second.

Procedure:

1. Using LM741 opamp, connect the circuit of the low pass filter as shown below. Apply a
1 V pk-pk sine wave at the input. Don’t forget to connect the 0.1uF supply bypass
capacitors.
Figure .2

2. Observe both input and the output simultaneously on the oscilloscope using the CHOP
mode. Keeping both channels on AC measure the gain (Vout/Vin) and the phase
difference between input and output at various frequencies give in the following table.
The phase difference between input and output can be calculated from the following
formula.

∆t
∅= X 360 0
T

Where T is the time period of Vin or Vout and ∆ t = t2-t1 as shown in figure 1 below.

Figure.3

Observation Table:
Frequency Gain = Vou/Vin Phase difference (∅)
100 HZ
500 HZ
1 KHZ
5 KHZ
10 KHZ
50 KHZ
100 KHZ
500 KHZ
1 MHZ

Table.1

3. Plot the magnitude response (gain Vs frequency) and phase response (phase difference Vs
frequency) on the bode graph paper attached with the handout. Use separate graph paper
for magnitude and phase plots. Using the magnitude response plot, find the cut off
frequency of this low pass filter:

Cutoff frequency = cutoff frequency (meas. From magnitude plot) =

4. Using LM356 opamp, connect the circuit of a high pass filter. Use R = 1k, R2 =
(feedback resistor) = 3.3k and C = 0.1uF. calculate the cutoff of this high pass filter:

Cutoff frequency =

5. Apply a 1 Vpk-pk sine wave at the input. Don’t forget to connect the 0.1uF supply
bypass capacitors.
6. Observe both input and the output simultaneously on the oscilloscope using the CHOP
mode. Keeping both channel on AC measure the gain and the phase difference between
input and output at various frequencies given in the following table:

Frequency Gain = Vou/Vin Phase difference (∅)


100 HZ
500 HZ
1 KHZ
5 KHZ
10 KHZ
50 KHZ
100 KHZ
Table.2

7. Plot the magnitude response (gain Vs frequency) and phase response (phase difference Vs
frequency) on the bode graph paper attached with the handout. Use separate graph paper
for magnitude and phase plots. Using the magnitude response plot, find the cut off
frequency of this high pass filter:
Cutoff frequency (cale) = cutoff frequency (meas. From magnitude plot) =

Conclusion:
Department of Electrical Engineering & Technology
Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Experiment 14: To design the Active high pass filters using Op-Amp.
OBJECTIVES:

You will learn following.

 To observe the open loop operation of an op amp


 To design and test active high pass by using op amplifiers

Name: ……………………………

Rubrics

Home Task Lab Report

Description Total Marks Description Total Marks


Marks Obtained Marks Obtained
15 10
Methodology Organization/Structure

Implementation 15 Results, Discussion and 10


and Completion Data Presentation
Total Marks obtained
Remarks (if any): ………………………………….

Name & Signature of faculty: …………………………………

Department of Electrical Engineering & Technology


Faculty of Engineering & Applied Sciences
Riphah International University Faisalabad Campus, Pakistan

Program: B.Sc. Electrical Engineering Semester: IV

Subject: EEL-213 Electronics devices and circuits Date: …………….

Procedure:
Circuit diagram:

Results:

Conclusion:

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