Introduction of Allen Bradley

Owned by Rockwell Automation, United States-Based Company, Allen Bradley is the brand-
name of a line of Factory Automation Equipment manufactured by Rockwell Automation.

PRODUCTS
 Control Systems
 Industrial Control Components
 Industrial Control Panels
 Information Software
 Motor Control Devices
 Sensing Devices
 Network Technology
 Safety
 Security
 Visualization & HMI.
 TYPES OF PLC

1) Modular: - Input can be as per selection of input modules.

2) Compact: - Input number fixed, input modules are fitted on CPU.

PLC Programming software will be pick based on the PLC series.

 PICO Controller- PicoSoft Software
 Micrologix and SLC 500 - RS logix 500
 Logix platform – RS Logix 5000

Communication Software
RS Linx: - It is the list of software drives.
 Central Processing Unit (CPU)
Memory:-
1) Basic Type:-
a. Volatile:- Power Off/ Erase memory.
b. Non-Volatile:- Power off/ Non- erase memory.

2) Sub Type:-
a. RAM – Random access Memory.
b. ROM- Read only Memory.
c. EPROM- Erasable PROM.
d. PROM- Programmable ROM.
e. EAROM- Electrically alterable read-only memory.
f. EEPROM- Electrically erasable PROM.

CPU Memory Organization

CPU memory divided in two parts

 System 0 (Not Assigned to User)

User or Program  System 1 (Not Assigned to User)
Memory  LAD 2 (Main program file)
 LAD 3 to LAD255( Subroutine, sub program file)

 O0 - OUTPUT
 I1 - INPUT
 S2 - STATUS
Data  B3 - BINARY
Memory  T4 - TIMER
 C5 - COUNTER
 R6 - CONTROL
 N7 - INTEGER
 F8 - FLOAT
 Addressing Format

O0: Output - This file stores the state of output terminals for the controller.
I1: Input - This file stores the state of input terminals for the controller.
S2: Status - This file stores controller operation information useful for troubleshooting controller
and program operation.
B3: Bit - This file stores internal relay logic.
T4: Timer - This file stores the timer accumulator and preset values and status bits.
C5: Counter - This file stores the counter accumulator and preset values and status bits.
R6: Control - This file stores the length, pointer position, and status bits for control instructions
such as shift registers and sequencers.
N7: Integer - This file is used to store bit information or numeric values with a range of -32767
to 32768.
F8: Floating Point - This file stores a # with a range of 1.1754944e-38 to 3.40282347e+38.

The default Addressing Format:

[type]:[word]/[bit]
Type: A type is representation of Data file
Word: A word is 16 bits. A word sometimes is
called an integer or a register. The point is, it is a
value that represents 16 items that can be 1 or
0…in other words 16 bits.
Bit: A bit is Slot/Bit.

Example:
I1:1/0 or I:1.0/0 means Physical input, Slot
1 in the rack and first input on the card.
 Programming Software

There 3 software’s in single pack of RS Logix 500,

Programming Steps:
To Communication between PLC to PC:
1. Open RS-LinxClassic
2. Click on dropdown menu Select the corresponding driver. (for simulation, Select SLC-
500 Emulator driver)
3. Add new OK Select Station to run OK Close.
4. Minimize the RSLinx classic window.

For Simulation:
1. Open RS Emulate 500 and minimize it.

For Writing a Program:

1. Open RSLogix 500 English.
2. File  New  Select Processor  OK.
3. Use the functions to do program.

To download the program to Emulator:

1. Go to OFFLINE  Download  OK.
2. Again go to PROGRAM RUN  ONLINE OK.
3. Right click and toggle the inputs.
To go back to editing mode:
1. Go OFFLINE.

RSLogix500 Controller Organizer

The RSLogix 500 Controller Organizer is a tree presentation of the entire project. It presents all
the information about the programs, data and I/O configuration of the current project in a tree like
interface.
 Controller
o Controller Tags
o Controller Fault Handler
o Power-Up Handler
 Tasks
o Continuous
 Program
 Program Tags
 Routine
o Periodic
 Program
 Program Tags
 Routine
o Unscheduled Programs
 Program
 Program Tags
 Routine
 Motion Groups
 Trends
 Data Types
o User-Defined
o Strings
o Predefined
 I/O Configuration

RSLogix Programs
 Could have many subroutines and at least one main routine.
 Could have a fault routine
 Optional Fault routine for each program that will be executed if an error occurs during the
execution of the program.
 There could be 32 programs in every task.
 Programs can only appear once in the controller organizer and cannot be shared by multiple
tasks.
 Ladder Logic Diagram
Programming Instructions

Basic Instruction:
1. XIC-Examine If Closed,
Examine If Closed - also called "examine on" or "normally opened“.

If the corresponding input bit is a "1" (on), this instruction will allow rung continuity.

2. XIO-Examine If Open,
Examine If Open - also called "examine off" or "normally closed“

If the corresponding input bit is a "1" (on), this instruction will not allow rung continuity.
If the corresponding input bit is a “0" (off), this instruction will allow rung continuity

3. OTE-Output Energize,

The output will energized when the rungs goes true. OTE is always connected end of the
ladder line or Rung. Based on the NO and NC operation your OTE will operate
4. ONS - One Shot,

The function of one shot instead of continuous pulse it will give only one pulse.
The OSR is a conditional input instruction that triggers an event to occur one time. Use the
OSR when an event must start based on the change of state of the rung from false to true,
as triggered by a pushbutton.
When the rung conditions preceding the OSR instruction go from false-to-true, the OSR
instruction is true for one scan. After one scan is complete, the OSR instruction becomes
false, even if the rung conditions preceding it remain true. The OSR instruction becomes
true again if the rung conditions preceding it transition from false-to-true.

5. OSR – One-Shot Rising,

The function of one shot rising is when the input rung of the coil will goes 0 to 1 state
that time it will give one pulse to output.

6. OSF – One-Shot Falling,

The function of one shot falling is when the input rung of the coil will goes 1 to 0 state
that time it will give one pulse to output.
 7. OTL – Latch,
Latch is used to turn on the output coil even after the input goes off.
This instruction functions much the same as the OTE with the exception that once a bit is
set with an OTL, it is "latched" on. Once an OTL bit has been set "on" (1 in the memory)
it will remain "on" even if the rung condition goes false. The bit must be reset with an OTU
instruction.

8. OTU – Unlatch,
Unlatch is used to turn off or unlatch the latched output coil.
Use this output instruction to unlatch (reset) a latched (set) bit which was set by an OTL
instruction. The OTU address must be identical to the OTL address which originally set
the bit.

Latch and unlatch instructions must be assigned the same address in your logic program.
Output addresses are specified to the bit level.
.

LATCHING AND UNLATCHING

The latching is used where the output must be activated even after the input condition goes false.
Unlatching is used to turn off the latched output.

INTERLOCKING
The interlocking is used control the output state in field by activating another input or output.
 Input Interlocking – Input address will be used to prevent the output action.
 Output Interlocking - Output address will be used to prevent the output action.
 TIMER

In RSlogix there are 3 types of Timers,

1. TON - Timer ON Delay
2. TOF - Timer OFF Delay
3. RTO - Retentive ON Delay Timer

Addressing Format:
There are several parameters associated with Timer instructions. They are as follows:

Terms:

1. Accumulated Value (ACC)

For a timer, this is the number of time base intervals the instruction has counted.

2. Preset Value (PRE)

The preset value is the set point in the timer or counter instruction. When the accumulated
value becomes equal to or greater than the pre-set value, the done status bit is set. This bit
can used to control an output device.
This specifies the value which the timer must reach before the controller sets the done bit.
When the accumulated value becomes equal to or greater than the preset value, the done
(DN) bit is set. You can use this bit to control an output device. Preset and accumulated
values for timers range from 0 to +32,767. If a timer preset or accumulated value is a
negative number, a runtime error occurs.

3. Timebase
The timebase determines the duration of each timebase interval. For Fixed and SLC series
PLC’s time base is set at 0.01, 0.1 and 1 second.

4. Timer Accuracy
This refers to the length of time between the moment a timer instruction is enabled and the
moment the timed interval is complete. Inaccuracy caused by the program scan can be
greater than the timer timebase.

In the following file element structures, Word 0 is also called the Control Word.

Timer Data File Element

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word 0 EN TT DN Internal Use
Word 1 Preset Value

Word 2 Accumulated Value

TON - Timer ON Delay:

The TON instruction to turn an output on or off after the timer has been on for a preset time
interval. This output instruction begins timing (at either one second or one hundredth of a
second intervals) when its rung goes "true." It waits the specified amount of time (as set in
the PRESET), keeps track of the accumulated intervals which have occurred (ACCUM),
and sets the DN (done) bit when the ACCUM (accumulated) time equals the PRESET time.

As long as rung conditions remain true, the timer adjusts its accumulated value (ACC) each
evaluation until it reaches the preset value (PRE). The accumulated value is reset when
rung conditions go false, regardless of whether the timer has timed out.

If the rung goes "false" (loses logical continuity) during the timing process, the
accumulated value is reset, and the DN, EN, and TT bits all reset whether or not the timer
has reached the PRESET value.

Addressing Format:
Enter a TIMER address, TIME BASE, PRESET value, and ACCUM (accumulated) value.
Timer files use three words per element, one for instruction bits (the control word), one for
the preset, and one for the accumulator.
T4:1 represents timer file number 4, element number 1
TOF - Timer OFF Delay:

The TOF instruction to turn an output on or off after its rung has been off for a preset time
interval. The TOF instruction begins to count time base intervals when the rung makes a
true-to-false transition. As long as rung conditions remain false, the timer increments its
accumulated value (ACC) based on the time base for each scan until it reaches the preset
value (PRE). The Accumulated value is reset when rung conditions go true regardless of
whether the timer has timed out.

Status bits:
13 = DN (done bit) Set when rung conditions are true; remain so until rung conditions go
false and the accumulated value is greater than or equal to the preset value.

14 = TT (timer timing bit) Set when rung conditions are false and the accumulated value
is less than the preset value; remain so until rung conditions go true or when the done bit
is reset.

15 = EN (enable bit) Set when rung conditions are true; remain so until rung conditions go
false.

Note:
When processor operation changes from REM Run or REM Test mode to REM Program
mode or if user power is lost while a TIMER is timing but has not reached its preset value,
the EN, TT, and DN bits remain set, and the accumulated value (ACCUM) remains the
same.
.
RTO - Retentive ON Delay Timer:

An RTO function the same as a TON with the exception that once it has begun timing, it
holds its count of time even if the rung goes false, a fault occurs, the mode changes from
REM Run or REM Test to REM Program, or power is lost. When rung continuity returns
(rung goes true again), the RTO begins timing from the accumulated time which was held
when rung continuity was lost. By retaining its accumulated value, retentive timers
measure the cumulative period during which rung conditions are true.

Instruction bits: 13 = DN (done)

14 = TT (timer timing bit)
15 = EN (enable bit)

If the Preset or Accumulated value are negative when the instruction is executed, a major
fault results.

Reset (RES)

Use a RES instruction to reset timer or counter. When the RES instruction is enabled,
It resets the TON, RTO, CTU, or CTD instruction having the same address as the RES
instruction.
 COUNTER

Counter is used to increment or decrement the integer value, in RSLogix there are 2 counters,
1. CTU - Count Up - It is used to count up the integer value and store in the accumulator to
turn on the output when accumulator reaches the preset value.
2. CTD - Down counter - It will count down when the count value goes less than the pre-set
value then the output will go OFF.
3. RES – Reset

Terms:

1. Accumulated Value (ACC)

For a counter, this is the number of false-to-true transitions that have occurred.

2. Preset Value (PRE)

The preset value is the set point in the timer or counter instruction. When the accumulated
value becomes equal to or greater than the pre-set value, the done status bit is set. This bit
can used to control an output device.

In the following file element structures, Word 0 is also called the Control Word.

Counter Data File Element

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word 0 CU CD DN OV UN Not used
Word 1 Preset Value

Word 2 Accumulated Value

CTU - Count Up:

This output instruction counts up for each false-to-true transition of conditions preceding
it in the rung and produces an output when the accumulated value reaches the preset
value. Rung transitions might be triggered by a limit switch or by parts traveling past a
detector.

The ability of the counter to detect false-to-true transitions depends on the speed
(frequency) of the incoming signal. The on and off duration of an incoming signal must
not be faster than the scan time.

Each count is retained when the rung conditions again become false, permitting counting
to continue beyond the preset value. This way you can base an output on the preset but
continue counting to keep track of inventory/parts, etc.

Counter files use three words per element.

Instruction Bits: 12 = OV (count up overflow) bit
13 = DN (done) bit
15 = CU (count up enable) bit

The CU bits are always set prior to entering the REM Run or REM Test modes.
CTD - Down counter:

This output instruction counts down for each false-to-true transition of conditions
preceding it in the rung and produces an output when the accumulated value reaches the
preset value. Rung transitions might be triggered by a limit switch or by parts traveling
past a detector.

Each count is retained when the rung conditions again become false. The count is
retained until a RES (reset) instruction with the same address as the counter is enabled, or
if another instruction in your program overwrites the value.

The accumulated value is retained after the CTU or CTD instruction goes false, and when
power is removed from and then restored to the processor. Also, the on or off status of
counter done, overflow, and underflow bits is retentive. The accumulated value and
control bits are reset when a RES is enabled.

Counter files use three words per element.

Instruction Bits: 11 = UN (count down underflow) bit
13 = DN (done) bit
14 = CD (count down enable) bit

The CD bits are always set prior to entering the REM Run or REM Test modes.

Entering Parameters:
Enter a COUNTER address, PRESET value and ACCUM value. The preset value is the
point which must be reached to set the DN (done) bit. The accumulated value represents
the current count status.
C5:1 represents counter file number 5, element number 1.
Reset (RES)

The RES instruction is used to reset timers and counters. When conditions preceding it in
the rung are true, the RES resets the accumulated value and control bits of the timer or
counter. Make sure that the timer or counter being controlled by the reset instruction has
the same address as the reset instruction.

When resetting a counter, if the RES instruction is enabled and the counter rung is
enabled, the CU or CD bit is reset.

If the counter preset value is negative, the RES instruction sets the accumulated value to
zero. This causes the done bit to be set by a count down or count up instruction.
 COMPARISON INSTRUCTIONS

Comparison instructions are used to test pairs of values to condition the logical continuity of a
rung. The output of the comparison is either ON or OFF depending on the two operand values.

EQU – Equal

This output instruction is true when Source A = Source B.

The EQU instruction compares two user specified values. If the values are equal, it allows rung
continuity. The rung goes true and the output is energized (provided no other forces affect the
rung's status).

NEQ - Not Equal

Use the NEQ instruction to test whether two values are not equal. If Source A and Source B are
not equal, the instruction is logically true. If the two values are equal, the instruction is logically
false.
Entering Parameters:
Source A must be a word address.
Source B can be a word address or program constant.
LES - Less Than

This conditional input instruction tests whether one value (Source A) is less than another (Source
B). If the value at Source A is less than the value at Source B, the instruction is logically true. If
the value at Source A is greater than or equal to the value at Source B, the instruction is logically
false
Entering Parameters:
Enter a word address for Source A. Enter a constant or a word address for Source B.
Signed integers are stored in two’s complement form.

LEQ - Less Than or Equal

This conditional input instruction tests whether one value (source A) is less than or equal to
another (source B). If the value at source A is less than or equal to the value at source B, the
instruction is logically true. If the value at source A is greater than the value at source B, the
instruction is logically false.
Entering Parameters:
Enter a word address for source A. Enter a constant or a word address for source B.
Signed integers are stored in two’s complement form.
GRT - Greater Than

This input instruction compares two user specified values. If the value stored in Source A
is greater than the value stored in Source B, it allows rung continuity. The rung will go
"true" and the output will be energized (provided no other instructions affect the rung's
status). If the value at Source A is less than or equal to the value at Source B, the instruction
is logically false.

Entering Parameters:
You must enter a word address for Source A. You can enter a program constant or a word
address for Source B. Signed integers are stored in two’s complementary form.

GEQ - Greater or Equal

This input instruction compares two user specified values. If the value stored in Source A
is greater than or equal to the value stored in Source B, it allows rung continuity. The rung
will go true and the output will be energized (provided no other instructions affect the
rung's status). If the value at Source A is less than the value at Source B, the instruction is
logically false.

Entering Parameters:
You must enter a word address for Source A. You can enter a program constant or a word
address for Source B. Signed integers are stored in two’s complementary form.
MEQ - Masked Comparison for Equal

This conditional instruction compares 16-bit data of a source address to 16-bit data at a
reference address through a mask. If the values match, the instruction is true. This
instruction allows portions of the data to be masked by a separate word.

Entering Parameters:
Source is the address of the value you want to compare.

Mask is the address of the mask through which the instruction moves data. The mask can
also be a hexadecimal value. You can enter the value in binary, decimal, or hexadecimal.
RSLogix 500 will make any necessary conversion and display the hexadecimal value. Click
the link for an example showing how to enter the Mask value using hexadecimal, binary,
or decimal values.

Compare is an integer value or the address of the reference.

If the 16 bits of data at the source address are equal to the 16 bits of data at the compare
address (less masked bits), the instruction is true. The instruction becomes false as soon as
it detects a mismatch. Bits in the mask word mask data when reset; they pass data when
set.
 Arithmetic Instructions

The majority of the instructions takes two input values, perform specified arithmetic function,
and output the result the assigned destination.
Arithmetic Ladder Logic instructions go beyond the simple true or false operation to give the
ability to more complex operations. It retrieves one or more value, perform an operation and
store the result in memory. While arithmetic operation some status bit will be affected.

Status File
Control status file is the data file "S2 - Status".
1. S:0/0 Carry (C) Sets if carry is generated; otherwise it is cleared.
2. S:0/1 Overflow (V) Indicates that the actual result of a math instruction does not fit in the
designated destination
3. S:0/2 Zero (Z) Indicates a 0 value after a math, move or a logic instruction
4. S:0/3 Sign (S) Indicates a negative value after a math, move or logic instruction.
5. S:5/0 Minor Error Minor error bit is set upon detection of a mathematical overflow, or
division by zero. This error can cause a CPU fault, which could be avoided if the bit is
unlatched before the END, TND, or REF statement.
6. S:13S:14 Math register S:13 -Contains the least significant word of the 32 bit values of
MUL, DDV, FRD, and TODS:14 -Contains the Most significant word of the 32 bit
values of MUL, DDV, FRD and TOD
ADD – Adding

When rung conditions are true, this output instruction adds Source A to Source B and
stores the result at the destination address. Source A and Source B can either be values or
addresses that contain values.

SUB – Subtract

When rung conditions are true, this output instruction subtracts Source A from Source B
and stores the result at the destination address. Source A and Source B can either be
values or addresses that contain values.

MUL – Multiply
 When rung conditions are true, this output instruction multiplies Source A and Source B
and stores the result at the destination address. Source A and Source B can either be
values or addresses that contain values.

DIV – Division

When rung conditions are true, this output instruction divides Source A by Source B and
stores the result at the destination address. Source A and Source B can either be values or
addresses that contain values.

When rung conditions are true, this output instruction divides Source A by Source B and
stores the result in the destination and the math register. The value stored in the destination
is rounded. The value stored in the math register consists of the unrounded quotient (placed
in the most significant word) and the remainder (placed in the least significant word).

Source A and Source B can either be constant values or addresses that contain values,
however Source A and Source B cannot both be constants.

DDV - Double Divide

When rung conditions are true, this output instruction divides the contents of the math
register (S:13 and S:14), containing 32 bits of data, by the source (16 bits of data) and
stores the result in the destination and the math register. The value stored in the destination
is rounded. The value stored in the math register consists of the unrounded quotient (placed
in the most significant word) and the remainder (placed in the least significant word).
LIMIT TEST

Use the LIM instruction to test for values within or outside a specified range, depending
on how you set the limits.

Use the LIM instruction to test for values within or outside a specified range, depending
on how you set the limits.

True/False Status of the Instruction:

If the Low Limit has a value equal to or less than the High Limit, the instruction is true
when the Test value is between the limits or is equal to either limit. If the Test value is
outside the limits, the instruction is false.

If the Low Limit has a value greater than the High Limit, the instruction is false when the
Test value is between the limits. If the Test value is equal to either limit or outside the
limits, the instruction is true.

Entering Parameters:
Depending on how you define the Test parameter, the Low and High Limit parameters can
be a word address or program constant. See below.

Test Low Limit High Limit

Constant Word Address Word Address

Word Address Constant or Word Constant or Word

Address Address
MOVE INSTRUCTIONS:

Move instruction is used to transfer the data from one address to another address.

When rung conditions preceding this instruction are true, the MOV instruction moves a
copy of the source to the destination each scan. The original value remains intact and
unchanged in its source location.
Source is the address of the data you want to move. The source can be a constant.
Destination is the address that identifies where the data is to be moved.

Scale with parameters instruction – SCP

SCP is used to measure the analog value like pressure values, temperature values, and level
transmitter values. The output form of the analog values are like 4-20mp, 0-10v, so that the plc
cannot read the voltage and current values, for that we are using the SCP instruction to convert
voltage and current values in the form of raw value like 2^16=32767. The SCP will convert the
4-20mp into 0-32767.
Program control instruction
These instructions are used to change the order in which the processor scans a ladder program.
Typically these instructions are used to minimize scan time, create a more efficient program, and
to troubleshoot a ladder program.

Instruction

JMP, LBL Jump forward/backward to a corresponding label instruction

JSR, SBR, RET Jump to a designated subroutine and return

MCR Enable or inhibit a master control zone in your ladder program

TND Truncate program scan

SUS Debug or diagnose your user program

Conditions:
 Jump instruction cannot be used in an MCR zone. Instructions that are programmed
within the MCR zone starting at the LBL instruction and ending at the END MCR
instruction will always be evaluated as though the MCR zone is true, without
consideration to the state of the START MCR instruction.
 Outputs controlled within a subroutine remain in their last state until the subroutine is
executed again.
 MCR controlled areas must contain only two MCR instructions - one to define the start
and one to define the end. Any additional MCR instructions, or a JMP instruction
programmed to jump to an MCR zone could produce unexpected and damaging program
and machine operation results

Program Control Jump Instruction

Use these instructions to control the sequence in which your program is executed. Control
instructions allow you to change the order in which the processor scans a ladder program.
Typically, these instructions are used to minimize the scan time, create a more efficient program,
and troubleshoot a ladder program.
Jump to Label (JMP) and Label (LBL)
These instructions are used to skip portions of the ladder program. Jumping forward to a label
saves program scan time by omitting a program segment until needed.

Using JMP
When the rung condition for this output instruction is true, the processor jumps forward or
backward to the corresponding label instruction (LBL) and resumes program execution at the
label.

Using LBL
This input instruction is the target of the JMP instruction having the same label number. You
must program this instruction as the first instruction of a rung. This instruction has no control
bits. It is always evaluated as true or logic 1.

For Example:
The jump instruction address is Q2:0 is connected with one physical address like I:0.0/8. In the
next rung we have to connect one input and output with physical address. To show the difference
between jump controlled rung and normal rung we used same input with different output like
O:0.0/9 is in normal rung and O:0.0/8 is connected with jump control rung , but for both output
we are using same input like I:0.0/7. When the jump condition is in not active. The output
O:0.0/8 will work independently with the help of input address I:0.0/7. But if the jump is in
active you cant access the O:0.0/8 but you can access output O:0.0/9,because the jump limit
instruction LABEL we connect before the O:0.0/9. With some example programs.

You can program multiple jumps to the same label by assigning the same label number to
multiple JMP instructions, but assigning the same label number to two or more labels causes a
compile time error.
Program Control Subroutine Instruction
The JSR, SBR, and RET instructions are used to direct the controller to execute a separate
subroutine file within the ladder program and return to the instruction following the JSR
instruction.
Use a subroutine to store recurring sections of program logic that must be executed from several
points within your application program. A subroutine saves memory because you program it only
once.

Using JSR
When rung conditions are true for this output instruction, it causes the processor to jump to the
targeted subroutine file. You can only jump to the first instruction in subroutine. Each subroutine
must have a unique file number (decimal, 3-255).
Using SBR
The target subroutine is identified by the file number that you entered in the JSR instruction.
This instruction serves as a label or identifier for a program file as a regular subroutine file. This
instruction must be programmed as the first instruction of the first rung of a subroutine.

Using RET
This output instruction marks the end of subroutine execution or the end of the subroutine file. It
causes the controller to resume execution at the instruction following the JSR instruction. The
rung containing RET instruction may be conditional if this rung precedes the end of the
subroutine. In this way, controller omits the balance of a subroutine only if its rung condition is
true.

For Example:
Let’s Consider two program in two different ladder page like LAD 2 for main program and
creating another ladder page LDA 3 for sub program. The instruction name is JSR- JUMP SUB
ROUTINE with address of U:3. This instruction is connected with one physical input address
I:0.0/1. Then in the sub program page we have start with instruction SBR- SUBROUTINE
LABEL in the first rung. In the next rung we have to connect one physical input output address
or with any instruction here we are connecting with timer instruction. After the sub routine
instruction turn on then only the timer which is connected in the sub ladder page will start.

Jump to Label [JMP, LBL]

When the rung condition for this output instruction is true, the processor jumps forward or
backward to the corresponding label instruction (LBL) and resumes program execution at the label.
More than one JMP instruction can jump to the same label. Jumping forward to a label saves
program scan time by omitting a program segment until needed. Jumping backward lets the
controller execute program segments repeatedly.
The label LBL instruction is the target of the JMP instruction having the same label number. The
program must use this instruction as the first instruction of a rung. This instruction has no control
bits. It is always evaluated as true or logic 1.
The program can have multiple jumps to the same label by assigning the same label number to
multiple JMP instructions, but assigning the same label number to two or more labels causes a
compile time error.
Entering Parameters:
Enter a decimal label number from 0-999.
 Up to 256 labels for SLC controllers in each subroutine file (not to exceed 256 labels in
entire project).
 Up to 1,000 labels for MicroLogix controllers in each subroutine file (not to exceed 1,000
labels in entire project).

Jump to Subroutine [JSR, SBR, RET]

When rung conditions are true for this output instruction, it causes the processor to jump to the
targeted subroutine file. You can only jump to the first instruction in a subroutine. Each subroutine
must have a unique file number (decimal, 3-255).
Use a subroutine to store recurring sections of program logic that must be executed from several
points within your application program. A subroutine saves memory because you program it only
once.
Update critical I/O within subroutines using immediate input and/or output instructions (IIM,
IOM) especially if your application calls for nested or relatively long subroutines. Otherwise the
controller does not update I/O until it reaches the end of the main program (after executing all
subroutines.)
Placed as the first instruction in a subroutine file, the SBR instruction identifies the file. This is the
file number that is used in the JSR instruction to identify the target to which the program should
jump.
This instruction has no control bits. It is always evaluated as true. The instruction must be
programmed as the first instruction of the first rung of a subroutine. Use of this instruction is
optional, but recommended.
The RET output instruction marks the end of subroutine execution or the end of the subroutine
file. It causes the processor to resume execution in the main program file at the instruction
following the JSR instruction where it exited the program. If a sequence of nested subroutines is
involved, the instruction causes the processor to return program execution to the previous
subroutine.
The rung containing the RET instruction may be conditional if this rung precedes the end of the
subroutine. In this way, the processor omits the balance of a subroutine only if its rung condition
is true.
Without a RET instruction, the END statement (always present in the subroutine) automatically
returns program execution to the JSR instruction in your calling ladder program.

Master Control Reset [MCR]

This output instruction (sometimes known as "Zone Control") is used to set up areas or "zones" of
your ladder program where all non-retentive outputs may be disabled at the same time for the same
length of time. It is used in pairs, one MCR to define the start of the ladder area to be affected and
one MCR to define the end of the area.
An input instruction is programmed on the rung of the first MCR to control rung logic continuity.
When the rung goes "false" all non-retentive outputs within the controlled zone are disabled. When
the rung goes "true" all rungs are scanned according to their normal rung conditions (disregarding
the zone control instruction).
Note: Do not use conditional logic before an ending MCR instruction. The ending MCR instruction
must be the only instruction on the rung.

Temporary End [TND]

Use this instruction to progressively debug a program, or conditionally omit the balance of your
current program file or subroutines.
When the logic preceding this output instruction is true, TND stops the processor from scanning
the rest of the program file, updates the I/O, and resumes scanning at rung 0 of the main program
(File 2).
If this instruction’s rung is false, the processor continues the scan until the next TND instruction
or the END statement.

Suspend [SUS]

Use this instruction when you want to debug or diagnose your user program.
When true, this instruction places the controller in the Suspend Idle mode. The suspend ID is
placed in word 7 (S:7) of the status file. The suspend file (program or subroutine number
identifying where the executed SUS instruction resides) is placed in word 8 (S:8) of the status file.
All outputs are de-energized.
Entering Parameters:
Enter a suspend ID number from -32768 to +32767 when you program the instruction.
When the SUS instruction is executed, the programmed ID as well as the program file ID from
which the SUS instruction.