‫جامعة عين شمس‬

‫كليـة الهندسة‬
Computer & Systems Engineering Department ‫قسم هندسة الحاسبات والنظم‬

CSE 111: Digital Logic Design

SHEET 2

1. Simplify the following Boolean expressions to a minimum number of literals:

i. xyz + x’y + xyz’
ii. (A + B)’ (A’ + B’)’
iii. (a + b + c’)(a’ b’ + c)
iv. a'bc + abc’ + abc + a’bc’
v. xy + xy’
vi. (x + y) (x + y’)

2. Simplify the following Boolean expressions to a minimum number of literals:

i. (x + y)’ (x’ + y)
ii. xy + x(wz + wz’)
iii. (BC’ + A’D) (AB’ + CD’)
iv. (a’ + c’) (a + b’ + c’)
v. ABC + A’B + ABC’
vi. x’ yz + xz

3. Find the complement of F = wx + yz; then show that FF’ = 0 and F + F’ = 1.

4. Find the complement of the following expressions:

i. xy’ + x’y
ii. (a + c) (a + b’) (a’ + b + c’)
iii. z + z’(v'w + xy)

5. Demonstrate the validity of the following identities by means of truth tables:

i. DeMorgan’s theorem for three variables: (x + y + z)_ = x’y’z’ and (xyz)’ = x’ + y’ + z’
ii. The distributive law: x + yz = ( x + y )( x + z )
iii. The distributive law: x(y + z) = xy + xz
iv. The associative law: x + (y + z) = (x + y) + z
v. The associative law: x(yz) = (xy)z

We find that they are the same.

Model Answer:5.i

x Y z x’ y’ z’ x+y+z (x+y+z)’ x’y’z’

0 0 0 1 1 1 0 1 1
0 0 1 1 1 0 1 0 0
0 1 0 1 0 1 1 0 0
0 1 1 1 0 0 1 0 0
1 0 0 0 1 1 1 0 0
1 0 1 0 1 0 1 0 0
1 1 0 0 0 1 1 0 0
1 1 1 0 0 0 1 0 0
 ‫جامعة عين شمس‬
‫كليـة الهندسة‬
Computer & Systems Engineering Department ‫قسم هندسة الحاسبات والنظم‬

6. Draw logic diagrams of the circuits that implement the following Boolean functions.
i. xy + xy’
ii. (x + y) (x + y’)
iii. xyz + x’y + xyz’
iv. (a + b)’ (a’ + b’)’
v. (a + b + c’)(a’b’ + c)
vi. a’bc + abc’ + abc + a’bc’

7. Simplify the functions of problem 2, then draw the logic diagrams that implement the simplified
functions. Compare the number of gates, and wires used in each case.

8. List the truth table of the function:

i. F = xy + xy’ + y’z
ii. F = bc + a’c’

9. Simplify the following Boolean functions T1 and T2 to a minimum number of literals:

A B C T1 T2
0 0 0 1 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 0 1
1 0 1 0 1
1 1 0 0 1
1 1 1 0 1

10. For the Boolean function

F = xy’z + x’y’z + w’xy + wx’y + wxy
i. Obtain the truth table of F.
ii. Draw the logic diagram, using the original Boolean expression.
iii. Use Boolean algebra to simplify the function to a minimum number of literals.
iv. Obtain the truth table of the function from the simplified expression and show that it is the
same as the one in part (i).
v. Draw the logic diagram from the simplified expression, and compare the total number of
gates with the diagram of part (ii).

11. Write the Boolean equations and draw the logic diagram of the circuit whose outputs are
defined by the following truth table:

f1 f2 a b c
1 1 0 0 0
0 1 0 0 1
1 0 0 1 0
1 1 0 1 1
1 0 1 0 0
0 1 1 0 1
1 0 1 1 1
 ‫جامعة عين شمس‬
‫كليـة الهندسة‬
Computer & Systems Engineering Department ‫قسم هندسة الحاسبات والنظم‬

12. Write Boolean expressions and construct the truth tables describing the outputs of the circuits
described by the logic diagrams shown below:

13. Determine whether the following Boolean equation is true or false.

x'y’ + x’z + x’z’ = x’z’ + y’z’ + x’z
 ‫جامعة عين شمس‬
‫كليـة الهندسة‬
Computer & Systems Engineering Department ‫قسم هندسة الحاسبات والنظم‬

CSE 111: Digital Logic Design

ASSIGNMENT 2

1. Visit the following site: https://download.cnet.com/Logic-Friday/3000-20415_4-75848245.html

2. Download the Logic Friday tool (file: lf114_setup.exe (859 KB))

3. Get acquainted with the tool.

4. From the file menu, select a new

project and enter any function in the
form of an equation, truth table, or
logic diagram.

5. After you enter the function press on

the minimize icon, to minimize your
design.

6. Review all solution of sheet 2, using

this tool to make sure that your work is
correct.