Wide Frequency Range Voltage Controlled Ring Oscillators
based on Transmission Gates
Meng-Lieh Sheu, Ta-Wei Lin, Wei-Hung Hsu
Department of Electrical Engineering, National Chi Nan University, Puli, TAIWAN,
sheu@ncnu.edu.tw; s1323536@ncnu.edu.tw ; s3323902@ncnu.edu.tw
ABSTRACT
In this paper, a voltage-controlled ring oscillator
(VCO) with wide linear tuning frequency range
capability based on transmission gates is described. It
also features the rapid voltage swing and the 50% duty
cycle independent of the control voltage. Fabricated in
TSMC 0.35µm 1P4M, 3.3V CMOS process, the VCO
achieves an operating frequency range of 4.8Hz to
256MHz. The measured peak-to-peak and rms jitter are
41 and 5.8 p-sec as operating at 200 MHz.
Keywords: voltage-controlled oscillator (VCO),
transmission gate, wide frequency range.
1. INTRODUCTION
With the development of CMOS technology, millions
or even billions of transistors can be integrated in a
single chip and so it makes the system-on-chip (SOC)
design possible. The microprocessor may need to
provide different data rates in kinds of serial links.
Besides, various wireless transmission standards have
their own carrier frequencies. Moreover, like portable
computers or mobile phones, frequency scaling is
becoming important for low-power operation manner [1].
Therefore, there is no doubt that we need ring oscillators
operating over a broad frequency range to meet those
ends.
It is distinct to design a voltage-controlled ring
oscillator (VCO) with wide frequency range through
enlarging the driving capability, the loading capacitor, or
the number of delay cells [2]-[7]. But the drawback of
enlarging the driving capability is definitely to produce
much power consumption. Enlarging the loading
capacitor will also occupy large die area and not to
mention, this way is easily drifted with the process,
voltage and temperature (PVT) variation. Also, it will
encounter both problems of the large power consumption
and chip area by changing the number of the delay stages
to broaden the frequency rage.
Another approach to achieving wide frequency range
of the voltage-controlled ring oscillator is controlling the
resistance. Compared to these methods above, it create
the better chance to design a low power and wide tuning
frequency range ring oscillator through the voltage-
controlled resistor because it occupies small area and
consumes no excess power consumption.
0-7803-8834-8/05/$20.00 ©2005 IEEE.
The VCO we proposed is suitable for wireless
biotelemetry because of the low power and compact area.
Biotelemetry is typically a technique for the remote
recovery of physiologically based signals from both
humans and animals. Often the aim is to gather
information with minimum disturbance to the subject,
over distances which can range from a few centimeters
to thousands of kilometers. To avoid the defect of hard
wire connection, radio transmitter and receiver units can
form the heart of the biotelemetry system. So the
concern of low power becomes the key point of the
requirement of the system. Therefore, the low power
VCO holds a responsible position within the wireless
biotelemetry.
In this paper, we proposed the voltage-controlled ring
oscillators based on the transmission gates. Wide linear
tuning frequency range capability can be obtained by
adjusting resistances of transmission gates [8]. In section
2, characteristics of transmission gates are described and
three kinds of voltage-controlled ring oscillators based
on transmission gates will be analyzed. Operation of
proposed VCO is described in section 3. Simulation and
measurement results are given in section 4. Finally, the
conclusions are addressed in section 5.
2. CHARACTERISTICS OF
TRANSMISSION GATES
The transmission gate shown in Fig 1 is designed to
act as a voltage-controlled switch. When VG is high, both
Mn and Mp are biased into conduction region and the
switch is closed; at this time, the resistance of the
transmission gate is very small. If VG is low, then both
MOSFETs are in cutoff region and the switch is
performed like open circuit; In such case, we can
consider the resistance of the transmission gate is ideally
infinite. From above discussions, we can speculate that
the resistance must vary greatly depending on the gate
voltage.
Figure 1. Transmission gate circuit and its equivalent
small-signal RC model
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 From [8], the effective resistance RTG is given as With the additional feedback loops, like Figure 4.,
following, where the α-power law is applied. the single-ended transmission-gate VCO can be
converted into the differential self-regulating VCO.

R TG = k
( )
 1 − e −1 ⋅ VDD 
− 0 .3 
They both not only have the wide and linear tuning
capability but also have advantages below: no need of
 VG − VTH 
  current biasing or a V-I converter (i.e. a purely true
VTH < VG < (1 − e −1 ) ⋅ VDD + VTH ….………..(2a) VCO), rail-to-rail voltage swing, suitable for operation
  under low voltage, and power-efficient due to reduction
  of short-circuit current.
1
R TG = k ⋅ ln 

−1 VDD
 1 − 0.5 ⋅ (1 − e ) ⋅ 
 VG − VTH 
VG > (1 − e −1 ) ⋅ VDD + VTH …………………(2b)

Figure 2 is the comparison results of the equation (2a, b)

and HSPICE simulation. We can observe that the
transconductance of the transmission gate has the wide
and linear tuning capability [9].
(a)

(b)
Figure 2. Gate voltage (Vctrl) versus transconductance
(Gtg) Figure 4. Self-regulating VCO (a) delay cell (b) three-
stage ring oscillator
Most power consumption of a transmission gate
comes from the charging and discharging current However, both the transmission gate VCO and self
through the input signal to the output loading. It isn’t regulating VCO have the disadvantage, the variation of
driven by any power rails, so little power is consumed the duty cycle dependent on the control voltage. The
[9]. 50% duty cycle is important in clock generation
applications such as DDR-SDRAM’s and A/D
3. WIDE FREQUENCY RANGE converters because both positive and negative transitions
VOLTAGE CONTROLLED RING of a clock signal are needed [10]. It is usual to get 50%
duty cycle by controlling a VCO oscillating the double
OSCILLATORS BASED ON frequency and then dividing it by two. But it wastes the
TRANSMISSION GATES additional power and limits the higher output frequency.
Another way to achieve 50% duty cycle is to comprise
A. TRANSMISSION GATE VCO & SELF the duty cycle correction (DCC) circuit. But, there are
REGULATING VCO additional power consumption and noise sources.
Figure 3 is a three-stage transmission gate VCO
[8].Each delay cell is composed of two transistors and B. FAST VOLTAGE SWING VCO
one transmission gate, which achieves wide frequency
tuning range. Back to consider the circuit in Figure3 and Figure4,
we can observe that the asymmetric charging/discharging
paths cause the variation of duty cycle. For instance,
when the control voltage in Figure 5 decreases, the
resistance of the transmission gate becomes large. Then
the time constant increases and changes the balance
period.

Figure 3. Three stage transmission-gate VCO

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 equation of (4). Afterwards the minimum frequency can
be determined by (5). For different KVCO, we can choose
various sizes of transmission gates.

Figure 5. Transient response for charging or discharging

path

If we can produce symmetric charging and Figure 7. Simple RC model

discharging paths, the duty cycle will be independent of
the control voltage. In Figure 6, we move the 4. SIMULATION AND EXPERIMENTAL
transmission gate to the loading node. Thus, the charging RESULTS
and discharging path are symmetric so that the difference
of the charging and discharging time is independent of We select the fast voltage swing VCO to implement
the transmission gate. Just designing the inverter for wireless biotelemetry application, which frequency
properly, we can make the 50% duty cycle waveform. ranges from 174MHz to 216MHz [12]. It was fabricated
in TSMC 0.35µm 1P4M, 3.3V technology. Table 1
summarizes the comparisons of simulation and
measurement results. Figure 8 is the output waveform
oscillating at 200MHz when the power supply is 3.3V.
The power is simulated about 1.76mW.Figure 9 shows
the jitter histogram. The peak-to-peak and rms jitter are
41ps and 5.8ps. Figure 10 plots the output frequency
versus the control voltage.
Figure 6. Three stage fast voltage swing VCO
5. CONCLUSIONS
Besides, the VCO has the shorter rise and fall time,
namely the fast voltage swing [11]. Before designing the A voltage controlled ring oscillator based on
fast voltage swing VCO, we first analyze the simple RC transmission gates with wide frequency tuning range and
model. In Figure 7, the frequency can be found as 50% duty cycle independent of the control voltage is
1 described. The frequency of the implemented VCO
fosc = ranges from 256MHz to 4.8Hz. The measured peak-to-
2⋅N⋅τ
1 GM …… peak and rms jitter are 41 and 5.8 ps when operating at
= =
 1  2 ⋅ N ⋅ Cg ⋅ (1 + G M ⋅ R TG ) 200MHz.
2 ⋅ N ⋅  + R TG  ⋅ Cg
 GM 
……………………………………………………(3) REFERENCES
,where GM is transconductance of a single stage inverter.
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Assuming the RTG is very small, i.e. ON state, the wide-range phase-locked loop”, IEEE J. Solid-
frequency can be approximated as State Circuits, vol. 37, pp. 51-62, Jan. 2002
fosc =
G M …………………………………..(4) [2] Hyuk-Jun Sung, Kwang Sub Yoon, “A 3.3 V high
2 ⋅ N ⋅ Cg speed CMOS PLL with 3-250 MHz input locking
range” Circuits and Systems, 1999. ISCAS '99.
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fosc =
GM Symposium on, Vol. 2, pp. 553-556, 30 May-2
2 ⋅ N ⋅ Cg ⋅ R TG June 1999.
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=
( )
 1 − e −1 ⋅ VDD
2 ⋅ N ⋅ Cg ⋅ k ⋅ 

− 0.3 
Noda, K. Imai, T. Horiuchi, H. Yamaguchi, T.
 V −V  Sato, K. Nakamura, M. Yamashina, “A 0.10 µm
 G TH 
CMOS, 1.2 V, 2 GHz phase-locked loop with gain
…………………………………………………………(5) compensation VCO” in Custom Integrated
To guarantee a design of a oscillator which includes
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fL)/2. Then, we let the maximum frequency satisfy the 6-9 May 2001.

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simulation(tt)
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100
TABLE 1 SUMMARY 50
Simulation Measurement 0
1V

2V

3V
V
V
V
V

V
V
V
V

V
V
V
V

Technology TSMC 0.35µm CMOS 1P4M

0.2
0.4
0.6
0.8

1.2
1.4
1.6
1.8

2.2
2.4
2.6
2.8

3.3

Control Voltage
Power supply 3.3V
Max.
260MHz@Vc=3.3V 256MHz@Vc=3.3V
frequency
Figure 10. VCO oscillating frequency versus control
Min.
17.1Hz@Vc=0V 4.79Hz@Vc=0.2V voltage
frequency
105.27MHz/V 111.16MHz/V
KVCO (25.2MHz@Vc=1.1V~ (89.7MHz@Vc=1.8V~
256.8MHz@Vc=3.3V) 256.8MHz@Vc=3.3V)

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