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Sheet # Content Sheet # Content

01. Table of Content 36. JTAG/Testpoint/Sheild/(H Brd)


02. Revision History 37. SDR660: MSS
03. Block Diagram 38. SDR660: PWR
04. GPIO Map 49. SDR660: DA/PRX/DRX/FBRX
05. SDM670 Control 40. RF_ANT_TXM_PA
06. SDM670 EBI0/1 41. RF_Primary TRX
07. SDM670 reserved 42. RF_DRX
08. SDM670 MIPI 43. QFE4101
09. SDM670 WLAN/QLINK 44. WCN3990
10. SDM670 GPIO 45. WLAN_FEM
11. SDM670 Power(Core)-DP 46. GPS
12. SDM670 Power(Other)
13. SDM670 Ground
14. SDM670 Reserved
15. PM670 CLKs/Control_GND
16. PM670 Buck Converter-DP
17. PM670 LDO Circuits-DP
18. PM670 Charger_FG
19. PM670A Control and Bob_Flash
20. PM670A Buck and LDO
21. PM670A CODEC
22. PM670A Display(OLED)
23. SMB1355
24. Wipower-NA
25. eMCP: LPDDR4x/eMMC
26. Audio Disc. Parts(H Board)
27. Codec:CS47L35
28. Audio PA:CS35L41
29. AMOLED DISPLAY
30. Front camera and LDOs
31. Rear Camera/Flash
32. Sensors(H Board)
33. SIM/TF card Reserved
34. Keypad and indicator
35. Bat/B2B Connector(H-Shape)

Title
Table of Content

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 01 of 46
5 4 3 2 1

Revision History

REV DESCRIPTION
D D

Board Change History C

SCHEMATIC MCN HW VERSION REVISION DESCRIPTION OF CHANGE

B B

A A

Title
Revision History

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 02 of 46

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Block Diagram
Title
Block Diagram

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 03 of 46

5 4 3 2 1
1

SDM670 GPIO Configuration (need update) SSC_0 SSC_I2C_1_SDA SSC_16

SSC_1 SSC_I2C_1_SCL SSC_17 EXT_CODEC_WAKE


GPIO_0 QUP_SPI_MISO_0 GPIO_42 BOARD_ID1 GPIO_84 QUP_SPI_CS_N_15 GPIO_127 GRFC_3
SSC_2 SSC_SPI1_MISO SSC_18 LPI_AUD_SB_CLK
GPIO_1 QUP_SPI_MOSI_0 GPIO_43 BOARD_ID2 GPIO_85 GPIO_128
SSC_3 SSC_SPI1_MOSI SSC_19 WCD_SDM_MCLK
GPIO_2 QUP_SPI_SCLK_0 GPIO_44 BOARD_ID3 GPIO_86 GPIO_129
SSC_4 SC_SPI1_SCLK SSC_20 LPI_AUD_SB_DATA0
GPIO_3 QUP_SPI_CS_N_0 GPIO_45 QUP_UART_CTS_N_6 GPIO_87 GPIO_130 QLINK_REQUEST
SSC_5 SSC_SPI1_CS0_N SSC_21
GPIO_4 RCM_MARKER2 GPIO_46 GPIO_88 GPIO_131 QLINK_ENABLE SSC_6
QUP_UART_RFR_N_6 SSC_22

GPIO_5 CAM_AVDD0_2P8_EN GPIO_47 GPIO_89 FCAM_ID GPIO_132 GRFC_2 SSC_7 SSC_23


QUP_UART_TX_6
GPIO_133 SSC_8 SSC_SPI2_MISO SSC_24
GPIO_6 QUP_I2C_SDA_9 GPIO_48 QUP_UART_RX_6 GPIO_90 RCM_MARKER1 FAST_BOOT_SEL_2
SSC_9 SSC_25 LPI_AUD_CDC_INT1
GPIO_IR_VT_SW_EN FP_ID GPIO_134 SSC_SPI2_MOSI
GPIO_7 QUP_I2C_SCL_9 GPIO_49 GPIO_91
SSC_10 SSC_SPI2_SCLK SSC_26 LPI_AUD_CDC_INT2
GPIO_8 QUP_SPI_CS1_N_0 GPIO_50 GPIO_IR_VT_SW_SEL GPIO_92 FP_RST GPIO_135 GRFC_0
SSC_27
SSC_11 SSC_SPI2_CS_N TP1000
GPIO_9 CAM2_RST_N GPIO_51 GPIO_93 TS_IN GPIO_136 GRFC1
QUP_UART_TX_12 SSC_28
SSC_12 SSC_UART1_TX
GPIO_10 MDP_VSYNC_P GPIO_52 GPIO_94 GPIO_137 RFFE3_DATA SSC_29 LPI_AUD_CDC_RSTN
QUP_UART_RX_12 SSC_13 SSC_UART1_RX
LPI_QCA_SB_DATA
GPIO_11 GPIO_53 GPIO_95 SSC_PWR_EN GPIO_138 RFFE3_CLK SSC_14 SSC_UART2_TX SSC_30
WMSS_RESET
SSC_31 LPI_QCA_SB_CLK
SSC_15 SSC_UART2_RX
GPIO_12 GPIO_54 GPIO_96 GPIO_139 RFFE4_DATA
SMB_STAT SD_CARD_DET_N

GPIO_13 CAM_MCLK0 GPIO_55 GPIO_97 RFFE6_CLK GPIO_140 RFFE4_CLK


QUP_I2C_SDA_10

GPIO_14 CAM_MCLK1 GPIO_56 GPIO_98 RFFE6_DATA GPIO_141 RFFE5_DATA


QUP_I2C_SCL_10

GPIO_15 CAM_MCLK2 GPIO_57 GPIO_99 TS_RESET_N GPIO_142 RFFE5_CLK


FORCED_USB_BOOT

GPIO_16 MCAM_ID GPIO_58 GPIO_100 CAM_AVDD1_2P8_EN GPIO_143

GPIO_17 CCI_I2C_SDA0 GPIO_59 GPIO_101 WDOG_DISABLE GPIO_144 MSS_LTE_COXM_TXD

GPIO_18 CCI_I2C_SCL0 GPIO_60 GPIO_102 GPIO_145 MSS_LTE_COXM_RXD PM670


GPIO_146 RFFE2_DATA GPIO_1 LP4X_REG_SRC_EN GPIO_8 SLB
GPIO_19 CCI_I2C_SDA1 GPIO_61 GPIO_103
A A

GPIO_147 RFFE2_CLK GPIO_2 GPIO_9 uUSB_TYPEC


GPIO_20 CCI_I2C_SCL1 GPIO_62 GPIO_104
UIM2_DATA GPIO_148 RFFE1_DATA GPIO_3 DIV_CLK1 GPIO_10 WCSS_VCTRL
GPIO_21 GPIO_63 GPIO_105
UIM2_CLK GPIO_149 RFFE1_CLK GPIO_4 GPIO_11 EUD
GPIO_22 FL_STROBE_TRIG GPIO_64 GPIO_106
GPIO_5 WLAN_SW_CTRL GPIO_12
GPIO_23 CAM3_RST_N GPIO_65 CDC_SWR_CLK GPIO_107 UIM2_RESET
GPIO_6 SLP_CLK GPIO_13
GPIO_24 WSA_L_EN GPIO_66 CDC_SWR_DATA GPIO_108 UIM2_PRESENT
GPIO_7 UIM_BATT_ALARM
GPIO_25 LCD_ID1 GPIO_67 WSA_SPKR_SD_N_1 GPIO_109 UIM1_DATA

GPIO_26 GPIO_68 GPIO_110 UIM1_CLK

GPIO_27 CAM_VCM0_2P8_EN GPIO_69 GPIO_111 UIM1_RESET

GPIO_28 CAM1_RST_N GPIO_70 GPIO_112 UIM1_PRESENT PM670A


GPIO_29 CAM_DOVDD0_1P8_EN GPIO_71 GPIO_113 UIM_BATT_ALARM GPIO_1 LV_LDO_VSEL GPIO_7 KEY_VOL_UP_N

GPIO_30 CAM0_RST_N GPIO_72 GPIO_115 GRFC_9 GPIO_2 SSC_PWR_EN GPIO_8 EUD

GPIO_3 CAM_DVDD0_1P2_EN GPIO_9 WCSS_VCTRL


GPIO_31 GPIO_73 GPIO_116

GPIO_32 GPIO_74 GPIO_117 ACCL_GYRO_DRDY_INT GPIO_4 CAM_DVDD1_1P2_EN GPIO_10 SLB

GPIO_5 FP_VDD_EN GPIO_11 LV_LDO_EN


GPIO_33 GPIO_75 LCD0_RESET_N GPIO_118 ACCL_GYRO_EVENT_INT

GPIO_6 IR_CAM_DVDD_EN GPIO_12 LP4X_REG_MODE


GPIO_34 GPIO_76 CAM_AVDD_IR_2P8_EN GPIO_119 MAG_INT_N

GPIO_35 GPIO_77 CAM_AVDD_Front_2P8_EN GPIO_120 ALSP_INT_N

GPIO_36 GPIO_78 SCAM_ID GPIO_121 FP_INT_N1

GPIO_37 GPIO_79 WSA_SPKR_INT GPIO_122 HOMEKEY_FP_INT

GPIO_38 USB_PHY_PS GPIO_80 WSA_SPKR_L_INT GPIO_123

GPIO_39 PWM_CNTRL GPIO_81 QUP_SPI_MISO_15 GPIO_124 HALL_INT_N GPIO MAP


GPIO_40 GPIO_82 QUP_SPI_MOSI_15 GPIO_125 TS_INT_N Title
GPIO MAP

Size Document Number Rev


GPIO_41 BOARD_ID0 GPIO_83 QUP_SPI_SCLK_15 GPIO_126 ICAM_ID D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 04 of 46
1
5 4 3 2 1

E E

U100A

SDM710

SDM670
LNBBCLK1 [15] [25] SDC1_RCLK
AM36 C21
CXO SDC1_RCLK
CONTROL B22 MSM_SDC1_CLK R500 33 [25] SDC1_CLK
SDC1_CLK
SLEEP_CLK [15,44,46] AU31 B20 [25] SDC1_CMD
SLEEP_CLK SDC1_CMD
D26 [25] SDC1_DATA_0
SDC1_DATA_0
R501 0
PON_RESET_N [15] MSM_RESIN_N AR31 D20 [25] SDC1_DATA_1
RESIN_N SDC1_DATA_1
RESOUT_N [25,36] A21 D24 [25] SDC1_DATA_2
RESOUT_N SDC1_DATA_2
F26 [25] SDC1_DATA_3
C500 SDC1_DATA_3
DNP AU35 D22 [25] SDC1_DATA_4
MODE_0 SDC1_DATA_4
AT36 C23 [25] SDC1_DATA_5
MODE_1 SDC1_DATA_5
D18 [25] SDC1_DATA_6
SDC1_DATA_6
PS_HOLD [15] R502 0 AT30 F18 [25] SDC1_DATA_7
PS_HOLD SDC1_DATA_7

JTAG_SRST_N [36] G43


SRST_N
D JTAG_TCK [36] E41 AU9 MSM_SDC2_CLK R503 33 [33] SDC2_CLK D
TCK SDC2_CLK
JTAG_TDI [36] C43 AT8 [33] SDC2_CMD
TDI SDC2_CMD
JTAG_TDO [36] D42 AT10 [33] SDC2_DATA_0
TDO SDC2_DATA_0
JTAG_TMS[36] F42 AU11 [33] SDC2_DATA_1
TMS SDC2_DATA_1
JTAG_TRST_N [36] F40 AV6 [33] SDC2_DATA_2
TRST_N SDC2_DATA_2
AU7 [33] SDC2_DATA_3
SDC2_DATA_3

E19
UFS_RESET
E23 AV38 [35,36] USB1_HS_DM
UFS_REF_CLK USB_HS_DN
AU37 [35,36] USB1_HS_DP
USB_HS_DP

MODE Operation
E25
00 NATIVE UFS_L0_RXN
F24 AY36
01 TIC UFS_L0_RXP USB_SS_RX0_N
F20 AW35
10 ATEST UFS_L0_TXN USB_SS_RX0_P
E21 AW37
11 TEST UFS_L0_TXP USB_SS_TX0_N
AV36
USB_SS_TX0_P
R504 DNP UFS1_TPA N19
DNC_9
Refdes Track3 SDM670
AV40
USB_SS_RX1_N
R0513 100 DNI
AU25 AW41
DNC_5 USB_SS_RX1_P
R0514 4.02K DNI
AW39
USB_SS_TX1_N
R0515 100 DNI REFGEN_ATB0
C R505 DNP AY42 AY40 C
DNC_7 USB_SS_TX1_P
R0516 0 DNI R506 DNP REFGEN_ATB1 AL3
DNC_2
R0502 1.4K 100 100 REFGEN_REXT0
R507 AR43
REFGEN_REXT0
R0503 1.4K 100 100 REFGEN_REXT1
R508 AK2 AY38
REFGEN_REXT1 DNC_6
R1025 10K DNI

R1026 10K DNI R510 DNP R509 DNP


LNBBCLK1_EN [15,19] AA3 H32 [06,12,20,25] DDR_VDDQ
DNC_1 DNC_8
R1027 0 DNI

R1022 DNI 10K


AR37 AR33 [15,19] SPMI_CLK
DNC_3 SPMI_CLK
R1014 DNI 10K
AR35 AT34 [15,19] SPMI_DATA
DNC_4 SPMI_DATA
R1013 DNI 10K

C501 C502

Note: Track3 is internal chip, and OEM DNP DNP

don't need to care about it from page5~page14

B B
[10] VREG_L13A_BOOT

R511 DNP [10,40] WDOG_DISABLE

R512 0 R513 DNP [10,36] FORCED_USB_BOOT


VREG_L13A [10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46]

A A

SDM710 CONTROL
Title
SDM710 CONTROL

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 05 of 46

5 4 3 2 1
5 4 3 2 1

D D

U100C

SDM710
U100B

SDM710
SDM670
SDM670 EBI0_CA0_CAL R600 240
EBI1_CA0_CS_0 [25] F34 C1 [05,12,20,25] DDR_VDDQ
EBI1_CS_0 EBI1 EBI_CAL
EBI1_CA0_CS_1 [25] D32
EBI0_CA0_CS_0 [25] F10
EBI0_CS_0 EBI0 EBI1_CS_1
EBI0_CA0_CS_1 [25] D12
EBI0_CS_1
EBI1_CA0_CK_C [25] E29 C41 [25] DDR_RESET_N
EBI1_CK_C DDR_RESET_N
EBI1_CA0_CK_T [25] F28
EBI0_CA0_CK_C [25] E15 EBI1_CK_T
C EBI0_CK_C C

EBI0_CA0_CK_T [25] F16


EBI0_CK_T
EBI1_CA0_CKE_0 [25] F36
EBI1_CKE_0
EBI1_CA0_CKE_1 [25] E31
EBI0_CA0_CKE_0 [25] F8 EBI1_CKE_1
EBI0_CKE_0
A41 [25] EBI1_DQ_0
EBI0_CA0_CKE_1 [25] E13 B2 [25] EBI0_DQ_0
EBI1_DQ_0
EBI0_CKE_1 EBI0_DQ_0
EBI1_DMI_0 [25] A35 B40 [25] EBI1_DQ_1
A3 [25] EBI0_DQ_1
EBI1_DM_0 EBI1_DQ_1
EBI0_DQ_1
EBI1_DMI_1 [25] A29 B38 [25] EBI1_DQ_2
EBI0_DMI_0 [25] B8 A5 [25] EBI0_DQ_2 EBI1_DM_1 EBI1_DQ_2
EBI0_DM_0 EBI0_DQ_2
B36 [25] EBI1_DQ_3
EBI0_DMI_1 [25] B14 A7 [25] EBI0_DQ_3
EBI1_DQ_3
EBI0_DM_1 EBI0_DQ_3
EBI1_DQS_C_0 [25] E35 A39 [25] EBI1_DQ_4
B4 [25] EBI0_DQ_4 EBI1_DQS_0_C EBI1_DQ_4
EBI0_DQ_4
EBI1_DQS_T_0 [25] D36 A37 [25] EBI1_DQ_5
EBI0_DQS_C_0 [25] E9 B6 [25] EBI0_DQ_5 EBI1_DQS_0_T EBI1_DQ_5
EBI0_DQS_0_C EBI0_DQ_5
B34 [25] EBI1_DQ_6
EBI0_DQS_T_0 [25] D8 A9 [25] EBI0_DQ_6
EBI1_DQ_6
EBI0_DQS_0_T EBI0_DQ_6
EBI1_DQS_C_1 [25] D28 A33 [25] EBI1_DQ_7
B10 [25] EBI0_DQ_7 EBI1_DQS_1_C EBI1_DQ_7
EBI0_DQ_7
EBI1_DQS_T_1 [25] E27 B26 [25] EBI1_DQ_8
EBI0_DQS_C_1 [25] D16 A17 [25] EBI0_DQ_8 EBI1_DQS_1_T EBI1_DQ_8
EBI0_DQS_1_C EBI0_DQ_8
B24 [25] EBI1_DQ_9
EBI0_DQS_T_1 [25] E17 A19 [25] EBI0_DQ_9 EBI1_DQ_9
EBI0_DQS_1_T EBI0_DQ_9
EBI1_CA0_CA_0 [25] D30 A25 [25] EBI1_DQ_10
B18 [25] EBI0_DQ_10
EBI1_CA_0 EBI1_DQ_10
EBI0_DQ_10
EBI1_CA0_CA_1 [25] F32 A27 [25] EBI1_DQ_11
EBI0_CA0_CA_0 [25] D14 B16 [25] EBI0_DQ_11
EBI1_CA_1 EBI1_DQ_11
EBI0_CA_0 EBI0_DQ_11
EBI1_CA0_CA_2 [25] E37 B28 [25] EBI1_DQ_12
EBI0_CA0_CA_1 [25] F12 A15 [25] EBI0_DQ_12
EBI1_CA_2 EBI1_DQ_12
EBI0_CA_1 EBI0_DQ_12
EBI1_CA0_CA_3 [25] D34 A31 [25] EBI1_DQ_13
EBI0_CA0_CA_2 [25] E7 B12 [25] EBI0_DQ_13
EBI1_CA_3 EBI1_DQ_13
EBI0_CA_2 EBI0_DQ_13
EBI1_CA0_CA_4 [25] E33 B30 [25] EBI1_DQ_14
EBI0_CA0_CA_3 [25] D10 A13 [25] EBI0_DQ_14
EBI1_CA_4 EBI1_DQ_14
EBI0_CA_3 EBI0_DQ_14
EBI1_CA0_CA_5 [25] D38 B32 [25] EBI1_DQ_15
EBI0_CA0_CA_4 [25] E11 A11 [25] EBI0_DQ_15 EBI1_CA_5 EBI1_DQ_15
EBI0_CA_4 EBI0_DQ_15
EBI0_CA0_CA_5 [25] D6
EBI0_CA_5

B B

A A

SDM710 EBI0/1
Title
SDM710 EBI0/1

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 06 of 46
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

SDM710 RESERVED
Title
SDM710 RESERVED

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 07 of 46

5 4 3 2 1
5 4 3 2 1

D D

U100D

SDM710

SDM670
MIPI_CSI0_CLK_P [31] AF6
MIPI_CSI0_DCLK_P
MIPI_CSI0_CLK_N [31] AE5 MIPI
MIPI_CSI0_DCLK_N
MIPI_CSI0_DATA0_P [31] AE7
MIPI_CSI0_DLN0_P
MIPI_CSI0_DATA0_N [31] AD6
MIPI_CSI0_DLN0_N
MIPI_CSI0_DATA1_P [31] AC5 M40 [29] MIPI_DSI0_CLK_N
MIPI_CSI0_DLN1_P MIPI_DSI0_CLK_N
RFC Cam0 MIPI_CSI0_DATA1_N [31] AB4
MIPI_CSI0_DLN1_N MIPI_DSI0_CLK_P
N39 [29] MIPI_DSI0_CLK_P

MIPI_CSI0_DATA2_P [31] AB6 R39 [29] MIPI_DSI0_LANE0_N


C MIPI_CSI0_DLN2_P MIPI_DSI0_LN0_N C
MIPI_CSI0_DATA2_N [31] AA5 T38 [29] MIPI_DSI0_LANE0_P
MIPI_CSI0_DLN2_N MIPI_DSI0_LN0_P
MIPI_CSI0_DATA3_P [31] AA7 P38 [29] MIPI_DSI0_LANE1_N
MIPI_CSI0_DLN3_P MIPI_DSI0_LN1_N
MIPI_CSI0_DATA3_N [31] Y6 R37 [29] MIPI_DSI0_LANE1_P
MIPI_CSI0_DLN3_N MIPI_DSI0_LN1_P
MIPI_CSI1_CLK_P [31] AN5 L39 [29] MIPI_DSI0_LANE2_N
MIPI_CSI1_DCLK_P MIPI_DSI0_LN2_N
MIPI_CSI1_CLK_N [31] AM4 M38 [29] MIPI_DSI0_LANE2_P
MIPI_CSI1_DCLK_N MIPI_DSI0_LN2_P
MIPI_CSI1_DATA0_P [31] AM6 K38 [29] MIPI_DSI0_LANE3_N
MIPI_CSI1_DLN0_P MIPI_DSI0_LN3_N
MIPI_CSI1_DATA0_N [31] AL5 L37 [29] MIPI_DSI0_LANE3_P
MIPI_CSI1_DLN0_N MIPI_DSI0_LN3_P
RFC Cam1 MIPI_CSI1_DATA1_P [31] AK4
MIPI_CSI1_DLN1_P
MIPI_CSI1_DATA1_N [31] AJ3 R43
MIPI_CSI1_DLN1_N MIPI_DSI1_CLK_N
MIPI_CSI1_DATA2_P [31] AJ5 T42
MIPI_CSI1_DLN2_P MIPI_DSI1_CLK_P
MIPI_CSI1_DATA2_N [31] AH4 V42
MIPI_CSI1_DLN2_N MIPI_DSI1_LN0_N
MIPI_CSI1_DATA3_P [31] AH6 W41
MIPI_CSI1_DLN3_P MIPI_DSI1_LN0_P
MIPI_CSI1_DATA3_N [31] AG5 U41
MIPI_CSI1_DLN3_N MIPI_DSI1_LN1_N
MIPI_CSI2_CLK_P [30] AB2 V40
MIPI_CSI2_DCLK_P MIPI_DSI1_LN1_P
MIPI_CSI2_CLK_N [30] AC3 P42
MIPI_CSI2_DCLK_N MIPI_DSI1_LN2_N
MIPI_CSI2_DATA0_P [30] AC1 R41
MIPI_CSI2_DLN0_P MIPI_DSI1_LN2_P
MIPI_CSI2_DATA0_N [30] AD2 N41
MIPI_CSI2_DLN0_N MIPI_DSI1_LN3_N
MIPI_CSI2_DATA1_P [30] AE3 P40
MIPI_CSI2_DLN1_P MIPI_DSI1_LN3_P
FFC Cam2 MIPI_CSI2_DATA1_N [30] AF4
MIPI_CSI2_DLN1_N
MIPI_CSI2_DATA2_P [30] AF2
MIPI_CSI2_DLN2_P
MIPI_CSI2_DATA2_N [30] AG3
MIPI_CSI2_DLN2_N
MIPI_CSI2_DATA3_P [30] AG1 AV42
MIPI_CSI2_DLN3_P DP_AUX_N
MIPI_CSI2_DATA3_N [30] AH2 AU41
MIPI_CSI2_DLN3_N DP_AUX_P

B B

A A

SDM710 MIPI
Title
SDM710 MIPI

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 08 of 46
5 4 3 2 1
5 4 3 2 1

D D

U100E

SDM710

SDM670

WLAN_BT_COEX_CLK [44] R5 V6 [44] WLAN_5G_CLK_OUT


WCSS_CXM_CLK WLAN_QLINK RF_XO_CLK
WLAN_BT_COEX_DATA [44] P6
WCSS_CXM_DATA

QREFS_CXO_REXT R900 3.01K


WLAN_CH0_CMD_CLK [44] U5 AT42
WCSS1_BBD_CLK QREFS_CXO_REXT
WLAN_CH0_CMD_DATA [44] U7
WCSS1_BBD_DATA

WLAN_CH1_CMD_CLK [44] R7
WCSS2_BBD_CLK
WLAN_CH1_CMD_DATA [44] T6
WCSS2_BBD_DATA

WCSS_VCTRL [15,19] L3
WLAN_PWR_EN
BA23 [37] QLINK_CLK_M
QLINK_CLK_N
R901 6.04K WLAN1_DAC_RSET
C
L1 AY22 [37] QLINK_CLK_P C
WLAN1_DAC_RST QLINK_CLK_P
WLAN_CH0_I_M [44] J7
WLAN1_ADC_IN
WLAN_CH0_I_P [44] H6
WLAN1_ADC_IP
WLAN_CH0_Q_M [44] K6 AW21 [37] QLINK_RX0_M
WLAN1_ADC_QN QLINK_RXLANE1_N
WLAN_CH0_Q_P [44] J5 AV20 [37] QLINK_RX0_P
WLAN1_ADC_QP QLINK_RXLANE1_P
AY20 [37] QLINK_RX1_M
QLINK_RXLANE2_N
R902 6.04K WLAN2_DAC_RSET K2 AW19 [37] QLINK_RX1_P
WLAN2_DAC_RST QLINK_RXLANE2_P
WLAN_CH1_I_M [44] F2 AY18 [37] QLINK_RX2_M
WLAN2_ADC_IN QLINK_RXLANE3_N
WLAN_CH1_I_P [44] G3 BA19 [37] QLINK_RX2_P
WLAN2_ADC_IP QLINK_RXLANE3_P
WLAN_CH1_Q_M [44] H2 AW23 [37] QLINK_TX_M
WLAN2_ADC_QN QLINK_TXLANE1_N
WLAN_CH1_Q_P [44] G1 AY24 [37] QLINK_TX_P
WLAN2_ADC_QP QLINK_TXLANE1_P

B B

A A

SDM710 WLAN/QLINK
Title
SDM710 WLAN/QLINK

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 09 of 46

5 4 3 2 1
5 4 3 2 1

U100F

SDM710

SDM670
GPS_LDO1P8_EN [46] W3 AB40
GPIO_0 GPIO GPIO_80 U100G
GPS_LNA_EN [46] W1 G37 [32] QUP_SPI_MISO_15 SDM710
GPIO_1 GPIO_81
BOARD_ID0 [10] Y4 G39 [32] QUP_SPI_MOSI_15
GPIO_2 GPIO_82
BOARD_ID1 [10] Y2 H38 [32] QUP_SPI_SCLK_15
GPIO_3 GPIO_83 SDM670
SSC_I2C_1_SDA [10,32] AH42
RCM_MARKER2 [36] V38 J37 [32] QUP_SPI_CS_N_15 LPI_GPIO_0
GPIO_4 GPIO_84
D SSC_I2C_1_SCL [10,32] AG41 D
W37
GPIO_5 GPIO_89
BA3 [30] CAM3_RST_N LPI_GPIO_1 SSC
SSC_SPI1_MISO [32] AK40
QUP_I2C_SDA_9 [10,29] W39 AP10 [32] FP_VDD_EN LPI_GPIO_2
GPIO_6 GPIO_90
SSC_SPI1_MOSI [32] AH40
QUP_I2C_SCL_9 [10,29] Y38 AY8 [28] WSA_SPKR_SD_N_1 LPI_GPIO_3
GPIO_7 GPIO_91
SSC_SPI1_SCLK [32] AJ41
GPS_RST [46] AR7 AV8 [29] LCD0_RESET_N LPI_GPIO_4
GPIO_8 GPIO_92
[29] LCD_ID1 [05,10] VREG_L13A_BOOT SSC_SPI1_CS0_N [32] AK42
CAM2_RST_N [30] AT6 BA7 LPI_GPIO_5
GPIO_9 GPIO_93
[29] LCD_ID2 AL43
MDP_VSYNC_P [29] U39 AW7 LPI_GPIO_6
GPIO_10 GPIO_94
CAM_AVDD_Rear_M_2P8_EN [31] AG43
U37 AY6 [29] TS_RESET_N LPI_GPIO_7
GPIO_11 GPIO_95 R1001
DNP AD40
R1 AW5 [19,33] SD_CARD_DET_N LPI_GPIO_8
GPIO_12 GPIO_96
R1002 0 AE41
CAM_MCLK0 [31] AU3 AT14 [42] RFFE6_CLK LPI_GPIO_9
GPIO_13 GPIO_97
R1003 0 [42] RFFE6_DATA AF42
CAM_MCLK1 [31] AU5 AU13 BOOT_CONFIG[7]: APPS_PBL_BOOT_SPEED[0] Refdes Track3 SDM670 LPI_GPIO_10
GPIO_14 GPIO_98
R1004 0 R1000 DNP AF40
CAM_MCLK2 [30] AT2 J39 [19] SSC_PWR_EN BOOT_CONFIG[1]: FAST_BOOT_SEL_0 R0513 100 DNI LPI_GPIO_11
GPIO_15 GPIO_99
R1006 0 [31] CAM_AVDD_Rear_S_2P8_EN SSC_UART1_TX [44] AC41
CAM_MCLK3 [30] AY2 AP6 BOOT_CONFIG[2]: FAST_BOOT_SEL_1
R0514 4.02K DNI LPI_GPIO_12
GPIO_16 GPIO_100
CCI_I2C_SDA0 [10,31] SSC_UART1_RX [44] AD42
AR1 AT18 [05,40] WDOG_DISABLE BOOT_CONFIG[0]: WDOG_DISABLE
R0515 100 DNI LPI_GPIO_13
GPIO_17 GPIO_101
[33] UIM2_DATA [05,40] GRFC_4 AB38
CCI_I2C_SCL0 [10,31] AT4 AW27 R0516 0 DNI LPI_GPIO_14
GPIO_18 GPIO_105
C1003 C1000 C1001 C1002 CCI_I2C_SDA1 [10,30,31] AA39
AP2 AV28 [33] UIM2_CLK R0502 1.4K 100 LPI_GPIO_15
GPIO_19 GPIO_106
AC39
22pF 22pF 22pF 22pF CCI_I2C_SCL1 [10,30,31] AR3 AY28 [33] UIM2_RESET R0503 1.4K 100 LPI_GPIO_16
GPIO_20 GPIO_107
AC37
IR_CAM_DVDD_EN [30] AW1 AW29 [33] UIM2_PRESENT R1025 10K DNI APPS_BOOT_FROM_ROM for Track3 LPI_GPIO_17
GPIO_21 GPIO_108
[33] UIM1_DATA CDC_PDM_CLK [21] AP42
FL_STROBE_TRIG [19] AY4 BA29 R1026 10K DNI MODEM_BOOT_FROM_ROM for Track3 LPI_GPIO_18
GPIO_22 GPIO_109
CDC_PDM_SYNC [21] AR41
CAM1_RST_N [31] AR5 AV30 [33] UIM1_CLK R1027 0 DNI LPI_GPIO_19
GPIO_23 GPIO_110
GPIO_IR_VT_SW_EN [30] [05,10] VREG_L13A_BOOT CDC_PDM_TX [21] AN41
AV2 AY30 [33] UIM1_RESET R1022 DNI 10K eMMC boot-- 0000 for track3 and 0100 for 670 LPI_GPIO_20
GPIO_24 GPIO_111
GPIO_IR_VT_SW_SEL [30] CDC_PDM_RX0 [21] AP40
AV4 AW31 [33] UIM1_PRESENT R1014 DNI 10K APPS_BOOT_FROM_ROM for 670 LPI_GPIO_21
GPIO_25 GPIO_112
R1005 CDC_PDM_RX0_COMP [21] AM42
CAM_VCM0_2P8_EN [31] AW3 AV32 [15] UIM_BATT_ALARM R1013 DNI 10K MODEM_BOOT_FROM_ROM for 670 LPI_GPIO_22
GPIO_26 GPIO_113 DNP
QUP_I2C_SDA_2 [10,28] CDC_PDM_RX1 [21] AL41
AL1 AY10 [40] GRFC_8 LPI_GPIO_23
GPIO_27 GPIO_114
VREG_L13A_BOOT [05,10] CDC_PDM_RX1_COMP [21] AM40
QUP_I2C_SCL_2 [10,28] AP4 AY16 [40] GRFC_9 LPI_GPIO_24
GPIO_28 GPIO_115
CDC_PDM_RX2 [21] AT40
CAM_DOVDD_1P8_EN [30] AM2 T4 LPI_GPIO_25
R1007 GPIO_29 GPIO_116
C WDOG_DISABLE and Force_USB_Boot share the same pin for track3 and 670 AG39 C
CAM0_PWDN_N [31] AN3 G41 [32] ACCL_GYRO_DRDY_INT LPI_GPIO_26
GPIO_30 GPIO_117
DNP [32] ACCL_GYRO_EVENT_INT TP1000 AK38
USB_PHY_PS [18] AT32 H42 Fastboo_sel should be 0000 for Track3 eMMC boot LPI_GPIO_27
GPIO_38 GPIO_118
BOOT_CONFIG[5]: APPS_BOOT_FROM_ROM AJ39
BOOT_CONFIG[4]: FAST_BOOT_SEL_3 PWM_CNTRL [15] AL39 J41 [32] MAG_INT_N Fastboo_sel should be 0100 for 670 eMMC boot LPI_GPIO_28
GPIO_39 GPIO_119
AH38
GPS_PRTRG [46] AY32 K42 [32] ALSP_INT_N LPI_GPIO_29
GPIO_40 GPIO_120
LPI_QCA_SB_DATA [44] AP38
TP4428 T2 H40 [32] FP_INT_N1 LPI_GPIO_30
GPIO_41 GPIO_121
LPI_QCA_SB_CLK [44] AN39
TP4429 U3 K40 LPI_GPIO_31
GPIO_42 GPIO_122
[05,10] VREG_L13A_BOOT
UART3_TXD [46] V4 L43 [32] ALS_INT_N_V2000
GPIO_43 GPIO_123
UART3_RXD [46] V2 L41
GPIO_44 GPIO_124
QUP_UART_CTS_N_6 [44] M4 M42 [29] TS_INT_N R1008
GPIO_45 GPIO_125
DNP
QUP_UART_RFR_N_6 [44] M2 F38
GPIO_46 GPIO_126
QUP_UART_TX_6 [44] N3 BA11 BOOT_CONFIG[6]: MODEM_BOOT_FROM_ROM [35] GRFC_3
GPIO_47 GPIO_127
QUP_UART_RX_6 [44] P4 AV12 [37] QLINK_REQUEST
GPIO_48 GPIO_130
BOARD_ID2 [10] AY34 AV16 [37] QLINK_ENABLE R1009 10K
GPIO_49 GPIO_131 [05,10] VREG_L13A_BOOT
BOARD_ID3 [10] AV34 BA15 [35] GRFC_2
GPIO_50 GPIO_132
QUP_UART_TX_12 [36] BA33 AA37 BOOT_CONFIG[3]: FAST_BOOT_SEL_2 [36] FAST_BOOT_SEL_2
GPIO_51 GPIO_133
QUP_UART_RX_12 [36] AW33 D40 [32] FP_RST
GPIO_52 GPIO_134
WMSS_RESET [37] AV26 AW11 [35] GRFC_0
GPIO_53 GPIO_135
AU29 AR17 [35] GRFC_1
GPIO_54 GPIO_136
QUP_I2C_SDA_10 [10,17,25] AT28 AT16 BOOT_CONFIG[8]: APPS_PBL_BOOT_SPEED[1]
GPIO_55 GPIO_137
QUP_I2C_SCL_10 [10,17,25] AU27 AU17
GPIO_56 GPIO_138
FORCED_USB_BOOT FORCED_USB_BOOT [05,36] AC43 AU15
GPIO_57 GPIO_139
MI2S_1_SCK [28] AF38 AR15
GPIO_65 GPIO_140
R1010 DNP [05,10] VREG_L13A_BOOT
MI2S_1_WS [28] AE39 AW13
GPIO_66 GPIO_141
MI2S_1_D0 [28] AE37 AV14
GPIO_67 GPIO_142
MI2S_1_D1 [28] AD38 AY12 [40] GRFC_5
GPIO_68 GPIO_143
B B
FP_ID [32] AA41 P2 [44] MSS_LTE_COXM_TXD
GPIO_75 GPIO_144
CAM_AVDD_IR_2P8_EN [30] Y40 R3 [44] MSS_LTE_COXM_RXD
GPIO_76 GPIO_145
CAM_AVDD_Front_2P8_EN [30] Y42 AV10 [40,43] RFFE2_DATA
GPIO_77 GPIO_146
W43 AW9 [40,43] RFFE2_CLK
GPIO_78 GPIO_147
WSA_SPKR_INT [28] AB42 AW15 [37] RFFE1_DATA
GPIO_79 GPIO_148
AY14 [37] RFFE1_CLK
GPIO_149

VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46]

R1025 R1026 R1027 R1028


I2C Pull-ups: Place anywhere in the path of I2C
DNP DNP DNP DNP
VREG_CAM_DOVDD_1P8 [10,30,31] VREG_L11A [17,29]
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46]

[10] BOARD_ID0 R1012 R1016


Rear Camera R1011
2.2K 2.2K R8600 R8599
Legacy Touch
R1015
2.2K 2.2K
QRD670 use eMMC as boot by 0100 2.2K 2.2K
[10] BOARD_ID1
CCI_I2C_SDA0 [10,31] QUP_I2C_SDA_9 [10,29]
BOOT CONFIG GPIOs FUNCTIONALITY QUP_I2C_SDA_2 [10,28]
[10] BOARD_ID2 BOOT_CONFIG
FASTBOOT_SEL[3:0]
CCI_I2C_SCL0 [10,31] QUP_I2C_SCL_9 [10,29]
[10] BOARD_ID3 GPIO_57 FORCED_USB_BOOT QUP_I2C_SCL_2 [10,28]

0b0000 UFS HS G1 -> SD -> USB3.0 -> EDL (eDL path- USB only)

R1029 R1030 R1031 R1032


BOOT_CONFIG[0]: GPIO_101 WDOG_DISABLE VREG_CAM_DOVDD_1P8 [10,30,31] VREG_L14A [17,32,46] VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46]
0b0001 SD -> UFS HS G1-> eDL (eDL path USB only)

R1017 R1018 R1019 R1020 R1022


10K 10K 10K 10K BOOT_CONFIG[1]: GPIO_99 FASTBOOT_SEL[0] SD -> eDL (eDL path- USB only) Front Camera 2.2K 2.2K Sensor 2.2K 2.2K SMB/Redriver/BuckR1021
2.2K 2.2K
0b0010
CCI_I2C_SDA1 [10,30,31] SSC_I2C_1_SDA [10,32] QUP_I2C_SDA_10 [10,17,25]
BOOT_CONFIG[2]: GPIO_100 FASTBOOT_SEL[1] 0b0011 USB -> eDL (eDL path- SD then USB)
CCI_I2C_SCL1 [10,30,31] SSC_I2C_1_SCL [10,32] QUP_I2C_SCL_10 [10,17,25]
A 0b0100 eMMC-> SD -> USB3.0 -> eDL (eDL path- USB only) A
BOOT_CONFIG[3]: GPIO_133 FASTBOOT_SEL[2]

0b0101 SD -> eMMC -> USB3.0 -> (eDL path- USB only)

BOOT_CONFIG[4]: GPIO_39 FASTBOOT_SEL[3]


0b0110 BOOT_RSVD_1_OPTION

BOOT_CONFIG[5]: SSC_27 APPS_BOOT_FROM_ROM BOOT_RSVD_2_OPTION


0b0111

0b1000 UFS 1-LANE PWM G4 -> SD -> USB3.0 -> EDL (eDL path- USB only)

SDM710 GPIO
BOOT_CONFIG[6]: GPIO_127 MODEM_BOOT_FROM_ROM

BOOT_CONFIG[7]: GPIO_98 APPS_PBL_BOOT_SPEED[0]

BOOT_CONFIG[8]: GPIO_137 APPS_PBL_BOOT_SPEED[1]


Title
SDM710 GPIO

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 10 of 46

5 4 3 2 1
5 4 3 2 1

SG1100
VREG_S1A [11,16] [16] VSNS_S1A_P

C1100 C1101 SG1101


[16] VSNS_S1A_M
22uF 22uF

U100H

D SDM710 D

APC0 VREG_S1A [11,16]


VREG_S5A [11,16] AH24
VDD_MODEM_0
SDM670
VDD_QFPROM
AE21 [12,17] VREG_L10A

AJ25
VDD_MODEM_1 PWR1
C1102 C1103 C1104 C1105 C1106 C1107 C1108 C1171 C1172
AK24 AR9 [11,12,15] VREF_MSM
VDD_MODEM_2 VREF_SDC
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 2200nF
AK26 AR29
VDD_MODEM_3 VREF_UIM
AK28
VDD_MODEM_4
AK30 AJ13 [11,16] VREG_S2A_S3A
VDD_MODEM_5 VDD_APC1_0
SG1102 AK32 AJ19
VDD_MODEM_6 VDD_APC1_1
VREG_S2A_S3A [11,16] [16] VSNS_S2A_S3A_P
AL23 AK12
VDD_MODEM_7 VDD_APC1_2
AL31 AK14
C1109 C1110 C1111 C1112 VDD_MODEM_8 VDD_APC1_3
AL33 AK16
22uF 22uF 22uF 22uF VDD_MODEM_9 VDD_APC1_4
SG1103 AM24 AK18
[16] VSNS_S2A_S3A_M VDD_MODEM_10 VDD_APC1_5
AM26 AK20
VDD_MODEM_11 VDD_APC1_6
AM28 AL11

APC1 VREG_S2A_S3A [11,16]


AN25
VDD_MODEM_12

VDD_MODEM_13
VDD_APC1_7

VDD_APC1_8
AL21

AN29 AM12
VDD_MODEM_14 VDD_APC1_9
C1113 C1114 C1115 C1116 C1117 C1118 C1119 C1120 C1121 C1122 C1175 C1174
AM14
VDD_APC1_10
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 2200nF
VREG_S1B [11,12,20] U11 AM16
VDDMX_1_27 VDD_APC1_11
U13 AM18
VDDMX_1_28 VDD_APC1_12
U19 AM20
VDDMX_1_29 VDD_APC1_13
U21 AN11
VDDMX_1_30 VDD_APC1_14
SG1104
VREG_S5A [11,16] [16] VSNS_S5A V10 AN15
VDDMX_1_31 VDD_APC1_15
V12 AN19
VDDMX_1_32 VDD_APC1_16
C C1123 C1124 V14 AN21 C
VDDMX_1_33 VDD_APC1_17
22uF 22uF V16
VDDMX_1_34
V18 AC15 [11,16] VREG_S1A
VDDMX_1_35 VDD_APC0_0
V20 AC17
MODEM W15
VDDMX_1_36

VDDMX_1_37
VDD_APC0_1

VDD_APC0_2
AD10
VREG_S5A [11,16]
W17 AD12
VDDMX_1_38 VDD_APC0_3
W21 AD14
VDDMX_1_39 VDD_APC0_4
C1125 C1126 C1127 C1128 C1129
Y20 AD16
VDDMX_1_40 VDD_APC0_5
1uF 1uF 1uF 1uF 1uF
AA19 AE9
VDDMX_1_0 VDD_APC0_6
AB20 AF16
VDDMX_1_1 VDD_APC0_7
AB22 AF8
VDDMX_1_2 VDD_APC0_8
SG1105 AC19 AG19
VREG_S1B [11,12,20] [20] VSNS_S1B_P VDDMX_1_3 VDD_APC0_9
AC21 AH8
VDDMX_1_4 VDD_APC0_10
C1131 SG1106 AC23 AK8
C1130 VDDMX_1_5 VDD_APC0_11
[20] VSNS_S1B_M
22uF 22uF AC25 AL7
VDDMX_1_6 VDD_APC0_12
AC27 AM8
MX AC29
VDDMX_1_7

VDDMX_1_8
VDD_APC0_13

VREG_S1B [11,12,20] AC31


VDDMX_1_9
AD18
VDDMX_1_10
C1132 C1133 C1134 C1135 C1136 AD20
VDDMX_1_11
1uF 1uF 1uF 1uF 1uF AD22
VDDMX_1_12
AD24
VDDMX_1_13
AD26
VDDMX_1_14
AD28
VDDMX_1_15
AD30
VDDMX_1_16
B
AD32 B
VDDMX_1_17
AE25
VDDMX_1_18
AE27
VDDMX_1_19
AF18
VDDMX_1_20

LPI_MX AF26

AF28
VDDMX_1_21

VDDMX_1_22
VREG_L10B [11,20]
AG17
VDDMX_1_23
AG25
VDDMX_1_24
C1137 AG27
VDDMX_1_25
1uF AG29
VDDMX_1_26

VREG_L10B [11,20] AH32


VDD_LPI_MEM

VREF_MSM [11,12,15]

VREF_MSM C1138 C1139

1uF 1uF

A A

SDM710 Power
(Core) - DP
Title
SDM710 Power (Core) - DP

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 11 of 46
5 4 3 2 1
5 4 3 2 1

VREG_L1B [12,20]

SG1200
VREG_S2B [12,20] [20] VSNS_S2B_P

0.9V C1202

1uF
C1203

1uF
C1204

1uF
C1205

1uF
C1249

1uF VREG_L6A [12,17,44] VREG_L5A [12,17]


VREG_S2C [12,25] SG1201
C1200 C1201 [20] VSNS_S2B_M

WCSS_ADC_DAC C1206 WCSS C1257 C1207 PX_1 C1208


VREG_S1B [11,12,20]
22uF 22uF

VREG_L1A [12,17]
1uF 1uF 1uF
1uF VDDA_EBI C1209 C1210
1uF 1uF
GFX VREG_S2B [12,20]

1.2V C1211

1uF
C1212

1uF
C1213

1uF C1216 C1217 C1218 C1219 C1270


C1214 C1215
VREG_L2B [12,20,33] VREG_L15A [12,17,33] VREG_L17A [12,17,33]
SG1202 4.7uF 4.7uF 1uF 1uF 1uF 1uF 1uF
VREG_S5B [05,06,20,25] [20] VSNS_S5B_P
D D

SDC2 C1224
UIM1 C1220 UIM2 C1221
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] 1uF
1uF 1uF VDDIO_EBI C1222

22uF
C1223

22uF
VREG_S3B_S4B [12,20]
SG1204
[20] VSNS_S3B_S4B_P

SG1203

1.8V C1225
1uF
C1226
1uF
C1227
1uF
C1228
1uF
C1229
1uF
VDDIO_EBI [05,06,12,20,25]
[20] VSNS_S5B_M C1230
22uF
C1231
22uF
C1232
22uF
C1233
22uF
SG1205
[20] VSNS_S3B_S4B_M

C1234 C1235 C1236 C1237

VREG_L10A [11,12,17] 1uF 1uF 1uF 1uF

CX VREG_S3B_S4B [12,20]

1.8V C1238 C1239


LPI_CX C1240 C1243 C1244 C1245 C1246 C1241
VREG_L9B [12,20]
2200nF 1uF 1uF 1uF 1uF 1uF 1uF 1uF

C1247 C1248

1uF 1uF
VREG_L7B [12,15,20]

3.1V C1242

1uF

U100J

SDM710

SDM670
U100I

VREG_S3B_S4B [12,20] M24 PWR2 G21 [12,25] VREG_S2C SDM710


VDD_CORE_3 VDD_P1
C M26 C
VDD_CORE_4
N13
VDD_CORE_5 VREG_S1B [11,12,20] AE19 SDM670
VDD_APC0_PLL
N15 AP8 [12,20,33] VREG_L2B AF20
VDD_CORE_6 VDD_P2 VDD_APC1_PLL PWR3
N17
VDD_CORE_7
P14 VREG_L10A [11,12,17] AH22 AR25
VDD_CORE_8 VDD_APC_CS_1P8 VDD_QLINK_CK VREG_L1B [12,20]
P16 H36 [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A
VDD_CORE_9 VDD_P3_6
P18 K36 H10 AR23
VDD_CORE_10 VDD_P3_7 VDD_EBI_PHY_1 VDD_QLINK
P20 W7 H12
VDD_CORE_11 VDD_P3_8 VDD_EBI_PHY_2
P22 AF36 H16 H28
VDD_CORE_12 VDD_P3_0 VDD_EBI_PHY_3 VDD_UFS_CORE
P24 AG37 K10
VDD_CORE_13 VDD_P3_1 VDD_EBI_PHY_4
P26 AR11 K12 H24
VDD_CORE_14 VDD_P3_2 VDD_EBI_PHY_5 VDD_UFS_1P2
R13 AR27 K14
VDD_CORE_15 VDD_P3_3 VDD_EBI_PHY_6
R17 AT12 K16 AH34
VDD_CORE_16 VDD_P3_4 VDD_EBI_PHY_7 VDD_USB_SS_1P2
R21 AT26
VDD_CORE_17 VDD_P3_5
R23 G17 AK34
VDD_CORE_18 VDD_EBI_CC VDD_USB_SS_CORE
T24 VREG_L1A [12,17] L23
VDD_CORE_19 VDD_EBI_PHY_HV
T26 VREG_L1B [12,20] H26 AK36
VDD_CORE_20 VDD_EBI_PLL VDD_USB_HS_CORE
U23
VDD_CORE_21
V24 AM38 [11,12,17] VREG_L10A
VDD_CORE_22 VDD_USB_HS_1P8
V26 AP36 UIM1 [12,17,33] VREG_L15A VREG_S1B [11,12,20] AE31
VDD_CORE_23 VDD_P5 VDD_LPA_PLL
Y24 AH36 [12,15,20] VREG_L7B
VDD_CORE_24 VDD_USB_HS_3P1
Y26 VREG_L1B [12,20] AA11
VDD_CORE_25 VDD_MIPI_CSI0_0P9
Y28 AP34 UIM2 [12,17,33] VREG_L17A AB10
VDD_CORE_26 VDD_P6 VDD_MIPI_CSI1_0P9
Y30 AD8
VDD_CORE_27 VDD_MIPI_CSI2_0P9 M8 [12,17,44] VREG_L6A
Y32 VDD_WCSS_ADCDAC_1
VDD_CORE_28
B
K8 B
AA23 H30 eMMC [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A VREG_L1A [12,17] AA9 VDD_WCSS_ADCDAC_2
VDD_CORE_0 VDD_P7 VDD_MIPI_CSI0_1P2 N9 [12,17] VREG_L5A
AA29 AB8 VDD_WCSS_PLL
VDD_CORE_1 VDD_MIPI_CSI1_1P2
AA33 AC7
VDD_CORE_2 VDD_MIPI_CSI2_1P2
K24 UFS
VDD_P10
H18 [05,06,12,20,25] VDDIO_EBI
VREG_L9B [12,20] AD34 T36 VDD_EBI_IO_1
VDD_LPI_CORE_0 VDD_MIPI_DSI0_0P9 H22
AF34 T34 VDD_EBI_IO_2
VDD_LPI_CORE_1 VDD_MIPI_DSI1_0P9
AL37 CXO [11,12,17] VREG_L10A
VDD_P11
Y36
VDD_MIPI_DSI0_1P2
VREG_L5A [12,17] L9 Y34
VDD_WCSS_0 VDD_MIPI_DSI1_1P2 H20
M10 VDD_EBI_IO_3
VDD_WCSS_2
J19
N11 R35 VDD_EBI_IO_4
VDD_WCSS_1 VDD_MIPI_DSI0_PLL J21
U35 VDD_EBI_IO_5
VDD_MIPI_DSI1_PLL K18
VDD_EBI_IO_6
K20
VREG_S2B [12,20] L33 AT24 VDD_EBI_IO_7
VDD_GFX_0 VDD_QREFS_0P9 K22
M28

M30
VDD_GFX_1 Note: If don't use UFS, VREG_L10A [11,12,17] AF22
VDD_QREFS_1P8
VDD_EBI_IO_8

VREF_MSM [11,15] AG23


M32
VDD_GFX_2

VDD_GFX_3
pls set the pins as below VDD_QREFS_1P25

M34
VDD_GFX_4
N27

N29
VDD_GFX_5
Pin Name Unused State
VDD_GFX_6
N31
VDD_GFX_7 VDD_UFS_1P2 float
N33
VDD_GFX_8
N35
VDD_GFX_9
VDD_UFS_CORE float
U29
VDD_GFX_10
U31
VDD_GFX_11
VDD_P10 GND
A V28 A
VDD_GFX_12
V30
VDD_GFX_13
V32
VDD_GFX_14

SDM710 Power(other)
Title
SDM710 Power(other)

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 12 of 46

5 4 3 2 1
5 4 3 2 1

U100K

SDM710
U100L

SDM710
D SDM670 D

AA13 AP12
GND_6 GND_56
AA35
GND_7 GND2 GND_57
AP14
A23 SDM670 K26
GND_198 GND_129
AA43 AP16
GND_8 GND_58 A1 K28
GND_197 GND1 GND_130
AB12 AP18
GND_9 GND_59 A43 K30
GND_199 GND_131
AB14 AP20
GND_10 GND_60 B42 K32
GND_201 GND_132
AB16 AP22
GND_11 GND_61 C3 K34
GND_192 GND_133
AB18 AP24
GND_12 GND_62 C5 L5
GND_182 GND_135
AB24 AP26
GND_13 GND_63 C7 M6
GND_181 GND_143
AB26 AP28
GND_14 GND_64 C9 M12
GND_180 GND_136
AB28 AP30
GND_15 GND_65 C11 M14
GND_184 GND_137
AB30 AP32
GND_16 GND_66 C13 M16
GND_185 GND_138
AB32 AR13
GND_17 GND_67 C15 M18
GND_186 GND_139
AB34 AR19
GND_18 GND_68 C17 M20
GND_187 GND_140
AB36 AR21
GND_19 GND_69 C19 M22
GND_188 GND_141
AD4 AR39
GND_21 GND_70 C25 M36
GND_189 GND_142
AD36 AT20
GND_20 GND_71 C27 N1
GND_190 GND_144
AE1 AT22
GND_22 GND_72 C29 N37
GND_191 GND_145
AE43 AT38
GND_23 GND_73 C31 N43
GND_193 GND_146
AF10 AU1
GND_24 GND_74 C33 P12
GND_194 GND_147
AF12 AU19
GND_25 GND_75 C35 P28
GND_195 GND_148
AF14 AU21
GND_26 GND_76 C37 P30
GND_196 GND_149
AF24 AU23
GND_27 GND_77 C39 P32
GND_183 GND_150
AF32 AU33
GND_28 GND_78 D2 P34
GND_179 GND_151
AG7 AU39
GND_29 GND_79 E1 P36
GND_102 GND_152
AH10 AU43
C GND_30 GND_80 E3 R33 C
GND_103 GND_153
AH12 AV18
GND_31 GND_81 E5 T8
GND_106 GND_165
AH14 AV22
GND_32 GND_82 E39 T10
GND_104 GND_154
AH16 AV24
GND_33 GND_83 E43 T12
GND_105 GND_155
AH18 AW17
GND_34 GND_84 F4 T14
GND_110 GND_156
AH26 AW25
GND_35 GND_85 F6 T16
GND_111 GND_157
AH28 AW43
GND_36 GND_86 F14 T18
GND_107 GND_158
AH30 AY26
GND_37 GND_87 F22 T20
GND_108 GND_159
AJ1 BA1
GND_38 GND_88 F30 T22
GND_109 GND_160
AJ7 BA5
GND_42 GND_100 G5 T28
GND_120 GND_161
AJ21 BA9
GND_39 GND_101 G7 T30
GND_121 GND_162
AJ37 BA13
GND_40 GND_89 G9 T32
GND_122 GND_163
AJ43 BA17
GND_41 GND_90 G11 T40
GND_112 GND_164
AK6 BA21
GND_45 GND_91 G13 U1
GND_113 GND_166
AK10 BA25
GND_43 GND_92 G15 U43
GND_114 GND_167
AK22 BA27
GND_44 GND_93 G19 V22
GND_115 GND_168
AM10 BA31
GND_46 GND_94 G29 V34
GND_116 GND_169
AM22 BA35
GND_47 GND_95 G31 V36
GND_117 GND_170
AM30 BA37
GND_48 GND_96 G33 W35
GND_118 GND_171
AM32 BA39
GND_49 GND_97 G35 Y8
GND_119 GND_178
AM34 BA41
GND_50 GND_98 H4 Y10
GND_124 GND_172
AN1 BA43
GND_51 GND_99 H8 Y12
GND_125 GND_173
AN7
GND_55 H34 Y14
GND_123 GND_174
AN23
GND_52 J1 Y16
GND_126 GND_175
AN37
GND_53 J3 Y18
GND_127 GND_176
AN43 P10
B GND_54 GND_5 J43 Y22 B
GND_128 GND_177
L7
GND_3 K4 AA1
GND_134 GND_200
N5
GND_4
AG21
GND_0
AH20
GND_1

AF30
GND_2

A A

SDM710 GROUND
Title
SDM710 GROUND

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 13 of 46
5 4 3 2 1
5 4 3 2 1

U200D

PM670

C1500
HK

G S
1uF Single_GND_0625
SH1500
104 173 PM670_AVDD
GND_WLP_TST AVDD_BYP

149
TEST_EN_VPP
PM_XO_IN [15] 210 130 [15,16,17,18,19,20,21,22,25,28,40,43,46] VPH_PWR
D XTAL_IN VPH_PWR_1 D
PM_XO_OUT[15] 198 139 [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A
XTAL_OUT VDD_MSM_IO

64 VCOIN
TP1500 VCOIN

KYPDPWR_N [34]
71 140 [17,19,20,30,31,32] VREG_BOB C1501
KPD_PWR_N VREG_BOB DNP
PON_1 [19] 152
PON_OUT
PON_RESET_N [05] 195 151 [11,12] VREF_MSM
PON_RESET_N VREF_MSM
PS_HOLD [05] 206
PS_HOLD
RESIN_N [34] [15] PM_XO_IN
R1500 0
184 128 [05,44,46] SLEEP_CLK
RESIN_N SLEEP_CLK
TP1501 TP1502 [15] PM_XO_THERM
218
CBL_PWR_N

1
4

1
FAULT_N [19] 38.4MHz S
217
FAULT_N C1503
Y1500 G 2
Reserved for test MSM 1nF
C1505

3 3
C1504 211 VREG_XO
VREG_XO [15] XOADC_GND
199
GND_XO_1 [15] PM_XO_OUT
DNP DNP C1506
SPMI_CLK [05,19]
108 209
SPMI_CLK GND_XO_2 1uF
SPMI_DATA [05,19] 118 SH1501
SPMI_DATA
S G

Single_GND_0625
VREG_S4A [16,17,21,30] 189 200 VREG_RF
VDD_XO_RFCLK VREG_RF_CLK

212
GND_RF

RF_CLK1 [15,44] WCN 146 C1507


RF_CLK1 SH1502 4700nF SH1503 [15] QUIET_THERM [15] MSM_THERM [15] EMMC_THERM
RF_CLK2 [37] WTR 168 188
RF_CLK2 GND_XO_ISO S G
S G
Single_GND_0625
C Single_GND_0625 R1504 R1501 R1502 C
R1503 0 PM_BBCLK PM670_REF_BYP
LNBBCLK1 [05] BBCLK 148 180
BB_CLK1 REF_BYP

t
100K 100K 100K
LNBBCLK1_EN [05,19] 158 169
BB_CLK1_EN GND_REF
C1508
WCD 136 100nFSH1504
BB_CLK2 REF_GND: Dedicated to man gnd plane right under PMIC pin
or as close to the pin as possible.
C1509 NFC 137 S G
BB_CLK3
DNP
161 [15] MSM_THERM Single_GND_0625
AMUX_1

172 [15] EMMC_THERM


AMUX_2

PM_XO_THERM[15] 182 160 [40] PA_THERM0


XO_THERM AMUX_3

XOADC_GND [15] 193 171 [35] TSKIN


GND_XOADC AMUX_4

150 [15] QUIET_THERM


AMUX_5
G S

Single_GND_0625
SH1505
183 [19] PM670L_DIE_TEMP
ANA_IN
RF_CLK1 [15,44] [44] WCN_CLK

72 [12,20] VREG_L7B
VDD_PDPHY

115
GND_PD_PHY
C1510

1uF

U200C
B B
PM670

HAPTICS

PWM_CNTRL [10] R1505 100K


50
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] HAP_PWM_IN
U200E
U200B
18 [35] VSW_HAP_P
R1506 VSW_HAP_P
PM670 1M
PM670 C1511
R1507 22nF
DNP
R1508 0
LP4X_REG_SRC_EN [25] UI
GND
OPTION1_LPDDR4x_EN [15]
Reserved. May delete later.
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 6 40 [35] VSW_HAP_M
VDD_HAP VSW_HAP_M
OPTION1_LPDDR4x_EN [15] 8 170
R1509 GPIO_1 NC_2 83 58
DNP GND_1 GND_CHG_1
Wipower 32K 51 129
GPIO_2 NC_1 93 69
GND_2 GND_CHG_2
EXTERNAL CODEC CLOCK 63 C1512
GPIO_3 94 70 10uF
GND_3 GND_CHG_3
147
GPIO_4 105 82 28
GND_4 GND_CHG_4 PGND_HAP
WLAN_SW_CTRL [19,44] 7
GPIO_5 106

G S
GND_5 Single_GND_0625
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] SLP_CLK [15] 159 SH1506
GPIO_6 114
GND_6
R1510 0
UIM_BATT_ALARM [10] 19
GPIO_7 116
R1511 GND_7
SLB [19] 30
GPIO_8 125 84
DNP GND_8 GND_HAP
SLP_CLK [15]
uUSB_TYPEC [15] 29
GPIO_9 126
GND_9
WCSS_VCTRL [09,19] 41
GPIO_10 127
GND_10
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46]
EUD [19] 52
GPIO_11 135
GND_11
Wipower mode 62
GPIO_12 138
A R1512 GND_12 A
DNP 117
GPIO_13

uUSB_TYPEC [15]

R1513
DNP PM670
CLK/CONTROL_GND
Title
PM670 CLK/CONTROL_GND

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 15 of 46
5 4 3 2 1
5 4 3 2 1

U200F

PM670

VREG1

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 65 96 [11] VSNS_S1A_P


VDD_S1_1 VREG_S1

66
VDD_S1_2 feedback from remote 22uF

D L1600 D
0.47uH APC_0
C1600 GROOT_VSW_S1
75 [11] VREG_S1A
1uF VSW_S1_1 0P752
76
VSW_S1_2

86 77
GND_S1_1 VSW_S1_3

87
GND_S1_2

G S
Single_GND_0625 107 [11] VSNS_S1A_M
SH1600 VREF_NEG_S1

feedback from remote 22uF


VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46]

33 95
VDD_S2_1 VREG_S2

55
C1601 C1602 C1603 VDD_S2_2
10uF DNP 10uF
L1601
0.47uH APC_1
C1604 GROOT_VSW_S2 [11] VREG_S2A_S3A
11
1uF VSW_S2_1 0P752
22
VSW_S2_2

10 44
GND_S2_1 VSW_S2_3

32 54
GND_S2_2 VSW_S2_4

G S
Single_GND_0625
SH1601
85 [11] VSNS_S2A_S3A_M
VREF_NEG_S2
feedback from remote 22uF

C C

20 74 [11] VSNS_S2A_S3A_P
VDD_S3_1 VREG_S3
feedback from remote 22uF
42
VDD_S3_3

L1602
0.47uH
C1605 GROOT_VSW_S3
9
1uF VSW_S3_1

31
VSW_S3_2

21 53
VDD_S3_2 VSW_S3_3

43
VDD_S3_4
G S

Single_GND_0625 73
SH1602 VREF_NEG_S3

175 174
VDD_S4_1 VREG_S4

186
VDD_S4_2

208
VDD_S4_3 L1603
1uH
185 GROOT_VSW_S4 [15,17,21,30] VREG_S4A
VSW_S4_1 2P04
C1608
197
1uF VSW_S4_2 C1606 C1607
219 22uF 22uF
VSW_S4_3

196
GND_S4_1

207
GND_S4_2

G S
B Single_GND_0625 B
SH1604
G S

Single_GND_0625
SH1603

131 162 [11] VSNS_S5A


VDD_S5_1 VREG_S5

141 feedback from remote 22uF


VDD_S5_2

L1604
1uH
C1609 GROOT_VSW_S5 VDD_MODEM
142 [11] VREG_S5A
1uF VSW_S5_1 0P752
153
VSW_S5_2

163
GND_S5_1

164
GND_S5_2
G S

Single_GND_0625
SH1605

120 119
VDD_S6 VREG_S6

C1610
1uF L1605
1uH
98 GROOT_VSW_S6 [17,30,31] VREG_S6A
VSW_S6_1 1P35
97 109
GND_S6 VSW_S6_2
C1611 C1612
A A
22uF 22uF
G S

Single_GND_0625
SH1606

PM670 Buck

G S
Single_GND_0625
SH1607

Converter-DP
Title
PM670 Buck Converter - DP

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 16 of 46

5 4 3 2 1
5 4 3 2 1

D D

U200G P-type are psuedo-capless, cap can be at load.


Regulators used internal to PMIC need cap at PMIC.
PM670 N-type > N300 need cap at PMIC
VREG_S1C [17,20]
VREG2 VERG_L1A,L2A,L3A,L5A,L6A and L7A are either N1200 or N600 which needs to be local;
VREG_L10A and VERG_L13A are also used for PMIC internal regulators, need 0.1uF local though pseudo-capless;
C1700
165 205 [12] VREG_L1A
1uF VDD_L2_3 VREG_L1 1P2
L2_L3
187 [38] VREG_L2A
VREG_L2 1P0
176 [38] VREG_L3A
VREG_L3 1P0
L1_L6_L7
VREG_S6A [16,30,31] 194 203 [12] VREG_L5A
VDD_L1_6_7_1 VREG_L5 0P8
204 215 [12,44] VREG_L6A
VDD_L1_6_7_2 VREG_L6 1P3
VREG_S1C [17,20]
216 [38] VREG_L7A
VREG_L7 1P2
202 [25] VREG_L8A
VREG_L8 1P8
C1701
214 192 [44] VREG_L9A
1uF VDD_L5 VREG_L9 1P8
L5
190 [11,12] VREG_L10A
VREG_L10 1P8
178 [10,29] VREG_L11A
C VREG_L11 1P8 C

VREG_S4A [15,16,21,30] 191 201 [38,46] VREG_L12A


VDD_L8_9_10_11_12_13_14_1 VREG_L12 1P8
213 179 [05,10,12,15,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A
VDD_L8_9_10_11_12_13_14_2 VREG_L13 1P8
L8_L9_L10_L11_L12_L13_L14
181 [10,32,46] VREG_L14A
VREG_L14 1P8Sensor
110 [12,33] VREG_L15A
VREG_L15 SIM1
VREG_BOB [15,19,20,30,31,32] 132 143 [35,40,41,42] VREG_L16A
VDD_L15_16_17_18_19 VREG_L16 2P8
L15_L16_L17_L18_L19
154 [12,33] VREG_L17A
VREG_L17 SIM2
C1702 111 VREG_L18A
VREG_L18 2P7
1uF 121 [44] VREG_L19A
VREG_L19 3P3

C1703 C1705 C1706 C1707 C1708 C1709 C1714 C1715 C1716 C1717 C1718 C1719 C1720
C1704 C1710 C1711 C1712 C1713

2200nF 4700nF 2200nF 2200nF 4700nF 4700nF 1uF 1uF 1uF 1uF 100nF 1uF 1uF 1uF 1uF DNP 4700nF
2200nF

B B
U500
PM3003A-04

[15,16,18,19,20,21,22,25,28,40,43,46] VPH_PWR

TP1700

LV_LDO_EN [19] D2 A1 C1721


EN PVIN1
10uF
QUP_I2C_SDA_10 [10,25] D3 B1
SDA PVIN2
QUP_I2C_SCL_10 [10,25] E2 C1 [17] DBU1_PGND
SCL PVIN3
LV_LDO_VSEL [19] D1
VSEL
TP1701 E3 [17,20] VREG_S1C
VOUT

A2 C3
SW1 PGND3
B2 E1
SW2 AGND
A3
PGND1
B3 [17] DBU1_PGND
PGND2
C2
MODE

SH1700 SH1701 SH1702


G S

G S

C2 is PGND for FAN53526 and Mode for PM3003A;


G S

C3 is AGND for FAN53526 and PGND for PM3003A;


PGND dedicated VIA to GND, AGND dedicated VIA to GND.
Single_GND_0625
Single_GND_0625
Single_GND_0625
I2C Address: 0x61(7-bit)

0xC2(W),0xC3(R)

A L1700 A
0.47uH
[17,20] VREG_S1C
1P225

C1722

22uF
C1723

22uF PM670 LDO


Circuits-DP
G S

Single_GND_0625 Title
SH1703 PM670 LDO Circuits - DP

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 17 of 46

5 4 3 2 1
5 4 3 2 1

U200A

PM670

CHARGE_FG
D D

USB_VBUS [18,35,36] 78 56 PM670_USB_IN_MID


USB_IN_1 USB_IN_MID_1

79 57
USB_IN_2 USB_IN_MID_2
C1801 C1802 C1803
88 67
USB_IN_3 USB_IN_MID_3
4700nF DNP 4700nF
89 68
USB_IN_4 USB_IN_MID_4 [18] CHG_GND

CHG_GND [18] SH1800

G S
Single_GND_0625
VCONN [18] 17 36
VCONN_IN BOOT_CAP

61
VCONN_EN
C1804

4700nF USB_CC1 [35,36] 5 34 C1805


CC1_ID VSW_CHG_1 VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 2 1 [18] VCONN
27nF
USB_CC2 [35] 27 35
CC2 VSW_CHG_2
D1800
USB_PHY_PS [10] 39 45
CC_OUT VSW_CHG_3
L1800 1uH
46 [15,16,17,18,19,20,21,22,25,28,40,43,46] VPH_PWR
VSW_CHG_4

90
STAT_CHG
C1806 C1807 C1808
220pF 220pF 22uF
R8651 12
DNP PGND_CHG_1

92 13
WIPWR_RECHG PGND_CHG_2

G S
Single_GND_0625
R1800 0 SH1801
91 23
Wipower not supported WIPWR_CHG_OK PGND_CHG_3

103 24 [18] CHG_GND


QI_PMA_ON PGND_CHG_4
C C

1 3
LDO_CTRL_1 VPH_PWR1

2 15
LDO_CTRL_2 VPH_PWR2

25
VPH_PWR3

37
VPH_PWR4

99 47
DC_EN VPH_PWR5
R1805 0
80
DC_SNS

100
USB_EN

USB_VBUS [18,35,36] 101 4 [35] VBATT


USB_SNS VBATT_PWR_1

16
VBATT_PWR_2

USB1_HS_DET_DP [35] 49 26 C1809


USB_DP VBATT_PWR_3
10uF
USB1_HS_DET_DM [35] 60 38
USB_DM VBATT_PWR_4

48
VBATT_PWR_5
VBATT_SNS_M[35] 81
VBATT_SNS_M
VBATT_SNS_P [35] 102
VBATT_SNS_P

156 [18] BATT_THERM_BIAS


BATT_THERM_BIAS
IBATT_SNS_M [35] 133
IBATT_SNS_M
IBATT_SNS_P [35] 122 145 [18] AUX_THERM_BIAS
IBATT_SNS_P AUX_THERM_BIAS

R1808 DNP
B B
ISNS_SMB_M C1810 100nF
155 112
ISNS_SMB_M VARB

ISNS_SMB_P 144
ISNS_SMB_P
R1809 DNP
123 C1811 1uF [18] REF_GND_FG
VREG_FG
BATT_ID [35,36] 113
BATT_ID
R1810 100K
BATT_THERM_BIAS [18] 14 BOOT_PWR
BOOT_PWR
BATT_THERM[35,36] 166
BATT_THERM

R1811 33K 59
AUX_THERM_BIAS [18] REF_GND_CHG
AUX_THERM 177
AUX_THERM C1812 4.7uF
VREG_L13A [05,10,12,15,17,19,21,22,25,28,29,33,36,38,40,42,43,44,46]
G S

R1812 DNP Single_GND_0625


SH1802
BA_N [19] 157
BA_N
G S

Single_GND_0625
SH1803
R1813
68K
134
GND_FG
t

REF_GND_FG [18] 167


REF_GND_FG

124
GND_PSUB_FG
Dedicated VIA to main GND

SH1805
G S

Single_GND_0625

A A

PM670 Charger_FG
Title
PM670 Charger_FG

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 18 of 46
5 4 3 2 1
5 4 3 2 1

U300C

PM670L

U300D
CONTROL
PM670L

VREG_L13A [05,10,12,15,17,18,21,22,25,28,29,33,36,38,40,42,43,44,46]
94 102 [17] LV_LDO_VSEL
TEST_EN_VPP GPIO_01 R1900 DNP GND
SSC_PWR_EN [10,19] [10,33] SD_CARD_DET_N
D 107 145 [10,19] SSC_PWR_EN D
GND_WLP_TST GPIO_02 82
C1900 GND_1
DNP 146
GPIO_03 84
GND_2
113 134 [31] CAM_DVDD1_1P2_EN
VDD_MSM_IO GPIO_04 85
GND_3
179
GPIO_05 95
GND_4
PON_1 [15] 28 83
PON_1 GPIO_06 96
GND_5
BA_N [18] 6 97 [34] KEY_VOL_UP_N
BA_N GPIO_07 104
GND_6
[15,19] EUD R1901 0
167 EUD [15,19] [05,15] LNBBCLK1_EN
GPIO_08 105
GND_7
189 [09,15] WCSS_VCTRL
GPIO_09 106
GND_8
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 58 63 [15] SLB
VPH_PWR_1 GPIO_10 116
GND_9
74 157 [17] LV_LDO_EN
VPH_PWR_2 GPIO_11 117
GND_10
133 [25] LP4X_REG_MODE
GPIO_12 118
GND_11
FAULT_N [15] 80
FAULT_N 125
GND_12

SPMI_CLK [05,15] 64 49 [15] PM670L_DIE_TEMP


SPMI_CLK DIE_TEMP

SPMI_DATA [05,15] 75
SPMI_DATA

88 60 PM670L_REF_BYP
NC1 REF_BYP

99
NC2
C1901
87
NC3
100nF
92 REF_GND: Dedicated to man gnd plane right under PMIC pin
NC4 or as close to the pin as possible.

C 128 71 C
NC5 REF_GND

G S
Single_GND_0625
SH1900

48 PM670L_AVDD
AVDD_BYP

C1902
1uF

G S
Single_GND_0625
SH1901

U300A

PM670L

BUCK-BOOST_FLASH

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 17 7
VDD_BOB_1 VSW_BCK_BOB_1 L1900
0.47uH
39 18 VSW_BCK_BOB
VDD_BOB_2 VSW_BCK_BOB_2
C1903
1uF 29
VSW_BCK_BOB_3

B B

PGND_BOB [19] 8
PGND_BOB_1

30 9
PGND_BOB_2 VSW_BST_BOB_1

19 VSW_BST_BOB
VSW_BST_BOB_2
G S

Single_GND_0625
SH1902 31
VSW_BST_BOB_3

53
GND_PSUB_BOB

WLAN_SW_CTRL [15,44] 40 20
EXT_CTRL_BOB VREG_BOB_1

42 [15,17,19,20,30,31,32] VREG_BOB
VREG_BOB_2

C1904 C1905

22uF 22uF
41
VREG_BOB_SNS

[19] PGND_BOB

Bead [10] FL_STROBE_TRIG


VREG_BOB [15,17,19,20,30,31,32] 4 16
VDD_FLASH_1 FLASH_STROBE

26
VDD_FLASH_2

5 [31] FLASH_LED1
C1906 FLASH_LED1

2200nF

27 15 [31] FLASH_LED2
GND_FLASH_1 FLASH_LED2

A
38 A
GND_FLASH_2

37
FLASH_LED3

VREG_BOB [15,17,19,20,30,31,32] 73

PM670L Control and Bob_Flash


VDD_RGB

72 [32] RGB_BLU
RGB_BLU

50 [32] RGB_GRN
RGB_GRN

61 [32] RGB_RED
RGB_RED Title
PM670L Control and Bob_Flash

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 19 of 46
5 4 3 2 1
5 4 3 2 1

U300E

PM670L

VREG1

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 156 135 [11] VSNS_S1B_P


VDD_S1_1 VREG_S1

178
VDD_S1_2

L2000
D
0.47uH D
144 [11,12] VREG_S1B
C2000 VSW_S1_1 0P752
1uF
166
VSW_S1_2

155 188
GND_S1_1 VSW_S1_3

177
GND_S1_2

P-type are psuedo-capless, cap can be at load.


G S

Single_GND_0625 115 [11] VSNS_S1B_M


SH2000 VREF_NEG_S1 Regulators used internal to PMIC need cap at PMIC.
N-type > N300 need cap at PMIC

VERG_L9B is N600 which needs to be local;


VREG_L7B is also used for PMIC internal regulators, need 0.1uF local though pseudo-capless;
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 2 70 [12] VSNS_S2B_P
VDD_S2_1 VREG_S2 U300F

24 PM670L
VDD_S2_2

L2001
0.47uH VREG2
C2001
1 [12] VREG_S2B
1uF VSW_S2_1 0P752 3P3 VREG_BOB [15,17,19,30,31,32] 25
VDD_L2 VREG_L1
14 [12] VREG_L1B
0P88
12
VSW_S2_2 36 [12,33] VREG_L2B
VREG_L2 SDC2
23 34
GND_S2_1 VSW_S2_3 123 [32] VREG_L3B
VREG_L3 3P0
45
GND_S2_2 112 51 [25] VREG_L4B
VDD_L3_5_7_8_1 VREG_L4 2P95
142 131 [33] VREG_L5B
VDD_L3_5_7_8_2 VREG_L5 2P95
G S

Single_GND_0625 59 [12] VSNS_S2B_M


SH2001 VREF_NEG_S2 52 For AMOLED_3P3 VREG_L6B
VREG_L6 3P3
143 [12,15] VREG_L7B
VREG_L7 3P125
62 122 [44] VREG_L8B
[12] VSNS_S3B_S4B_P
VDD_L4_6 VREG_L8 3P3
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 67 93
VDD_S3_1 VREG_S3 35 [12] VREG_L9B
C VREG_L9 0P8 C
68
VDD_S3_2 13 [11] VREG_L10B
VREG_L10 0P8
L2002
VREG_S1C [17] 3
0.47uH VDD_L1_9_10
C2002
56 [12] VREG_S3B_S4B
1uF VSW_S3_1 0P752
57
VSW_S3_2

46 69
GND_S3_1 VSW_S3_3 C2003
47 1uF
GND_S3_2
C2004 C2005 C2006 C2007 C2008 C2009 C2010 C2011 C2012 C2013
81
G S

Single_GND_0625 VREF_NEG_S3
SH2002 1uF 1uF 4700nF 4700nF 4700nF 1uF 1uF 4700nF 2.2uF 1uF

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 100 114


VDD_S4_1 VREG_S4

101
VDD_S4_2

111
VDD_S4_3 L2003
0.47uH
89
VSW_S4_1
C2014
90
1uF VSW_S4_2

91
VSW_S4_3

78
GND_S4_1

79 103 [12] VSNS_S3B_S4B_M


GND_S4_2 VREF_NEG_S4
G S

Single_GND_0625
SH2003

B B

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 176 124 [12] VSNS_S5B_P


VDD_S5_1 VREG_S5

186
VDD_S5_2

187
VDD_S5_3 L2004
C2015 0.47uH
164 [05,06,12,25] VREG_S5B
1uF VSW_S5_1 0P6
165
VSW_S5_2

175
VSW_S5_3

153
GND_S5_1

154
GND_S5_2
G S

Single_GND_0625 132 [12] VSNS_S5B_M


SH2004 VREF_NEG_S5

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46]

C2016 C2017 C2018

10uF 10uF 10uF


A A

PM670L Buck and LDO


Title
PM670L Buck and LDO

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 20 of 46
5 4 3 2 1
5 4 3 2 1

D D

U300B
[05,10,12,15,17,18,19,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A
PM670L

C9889
CDC
C9743 100nF

1uF
193 149
SPKR_DRV_P VDD_AUDIO_IO

G S
Single_GND_0625
CDC_MIC_IN1_P [35] SH3832
183

G S
For main Mic SPKR_DRV_M Single_GND_0625
CDC_MIC_IN1_M [35] SH3833
169
VDD_HPH

C9881 C9882
100pF 100pF 137 185 [15,16,17,30] VREG_S4A
MIC_IN1_P VDD_CP

126
MIC_IN1_M

For Headphone Mic CDC_MIC_IN2_P [35] 160 182 C9744


MIC_IN2 VDD_SPKR_PA_1
2.2uF
For AANC Mic CDC_MIC_IN3_P [26] 138 192
MIC_IN3 VDD_SPKR_PA_2 GND_CP [21]

G S
Single_GND_0625
MIC_BIAS1 [26,35] 158 SH3834
MIC_BIAS1_1

MIC_BIAS2 [35] 147 152


MIC_BIAS2_2 VREG_BOOST
[15,16,17,18,19,20,22,25,28,40,43,46] VPH_PWR
NOTE: While NOT using SPEAKER functionality, connect
C20 pins 182, 192, 152, 174, 162 to VPH_PWR
C C
CDC_EAR_P [26] 181
C9885 C9883 C9897 EARO_P
DNP 100nF 100pF 100pF
CDC_EAR_M [26] 159 C9891
EARO_M
1uF
174
VSW_BOOST
GND_BOOST [21]
CDC_PDM_CLK [10] 140 162
CDC_PDM_CLK BOOST_SNS

G S
Single_GND_0625
CDC_PDM_SYNC [10] 161 SH3835
CDC_PDM_SYNC

R290 0
CDC_PDM_TX [10] 151 168 [35] CDC_HPH_REF
CDC_PDM_TX HPH_REF

R8558 0
190 [35] CDC_HPH_L
HPH_L
R8559 0
CDC_PDM_RX0 [10] 127 191 [35] CDC_HPH_R
CDC_PDM_RX0 HPH_R

CDC_PDM_RX1 [10] 139


CDC_PDM_RX1

CDC_PDM_RX2 [10] 141 148 [35] CDC_HSDET_L


CDC_PDM_RX2 HS_DET

C9896 C9895 C9894


DNP DNP DNP

CDC_PDM_RX0_COMP [10] 150 195 GND_CP [21]


CDC_PDM_RX0_DRE GND_CP

CDC_PDM_RX1_COMP [10] 119


CDC_PDM_RX1_DRE
R8560 0
136 [26,35] PM_MIC_GND
GND_CFILT

173
CP_C1_P

184 171
C9886 CP_C1_N GND_SPKR_PA_1

G S
Single_GND_0625
4.7uF SH3837
172
GND_SPKR_PA_2
B B

194 163
CP_VNEG GND_BOOST_1

196 GND_BOOST [21]


GND_BOOST_2

L6304
180 170
VNEG_HPH NC
120ohm@100MHz

C9888
C9887
2200nF 1uF
G S

G S

Single_GND_0625 Single_GND_0625
SH3830 SH3831

A A

PM670L CODEC
Title
PM670L CODEC

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 21 of 46
5 4 3 2 1
5 4 3 2 1

D D

U300G

PM670L

WLED_BOOST_NCP

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46] 108 121 VSW_WLED L2201 4.7uH [15,16,17,18,19,20,21,22,25,28,40,43,46] VPH_PWR


VDD_WLED VSW_WLED

2
C2200
WSB5543W-2/TR
D2200
C2207
1uF

1
130 [29] VREG_WLED
VREG_WLED 10uF

PGND_WLED [22] 110


PGND_WLED C2204 C2211 C2213

G S
Single_GND_0625
SH2200
4700nF 4700nF DNP

98 129 [29] WLED_SINK1 [22] PGND_WLED


GNDP_WLED_SINK WLED_SINK1

Single_GND_0625 109 [29] WLED_SINK2

G S
WLED_SINK2 Single_GND_0625

G S
SH2201
C 120 [29] WLED_SINK3 C
SH2202 WLED_SINK3

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46]
86 [29] CABC
CABC

VREG_L13A [05,10,12,15,17,18,19,21,25,28,29,33,36,38,40,42,43,44,46]
C2201

VSW_DISP_P L2202 4.7uH


11 55 [15,16,17,18,19,20,21,22,25,28,40,43,46] VPH_PWR
1uF VDD_DISP_1 VSW_DISP

R2200 21
VDD_DISP_2
Single_GND_0625

G S
C2208
DNP
SH2203 77 65
DISP_HW_EN VDISP_FB 10uF

DISP_HW_EN

VDISP_MID 44 22 [29] VDISP_P_OUT


VDISP_MID VDISP_P_OUT_1

G S
Single_GND_0625
C2203 C2202 33 SH2204
VDISP_P_OUT_2
C2209 C2205
10uF 10uF
10uF 10uF
66
PGND_DISP SH2206
R2201
76 S G
GND_VDISP_P
Single_GND_0625
100K
G S

Single_GND_0625
SH2205
10 [29] VDISP_M_OUT
VDISP_M_OUT

C2210 C2206

10uF 10uF
54
GND_DISP_M

B B

43 VDISP_CAP1

G S
VDISP_CAP1 Single_GND_0625
SH2207
32
VDISP_CAP2
C2277

10uF
25V
VDISP_CAP2

A A

PM670L Display (LCD)


Title
PM670L Display (LCD)

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 22 of 46
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

SMB1355
Title
SMB1355

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 23 of 46
5 4 3 2 1
5 4 3 2 1

D D

C C

ANT4816

ANT4833

B B

ANT4911
1
2
818010048

A A

Title
Wipower-NA

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 24 of 46
5 4 3 2 1
5 4 3 2 1

U2500 Note: 44-3


H9HP52ACPMMDAR-KMM

EBI0_CA0_CA_0 [06] G14 M17 [20] VREG_L4B


EBI0_CA0_CA_1 [06] F13 CA0_A VCCm_1 N17
EBI0_CA0_CA_2 [06] C13 CA1_A VCCm_2 P17
EBI0_CA0_CA_3 [06] D13 CA2_A VCCm_3 C2500 C2501 C2502
EBI0_CA0_CA_4 [06] E13 CA3_A J15
D EBI0_CA0_CA_5 [06] C15 CA4_A VCCQm_1 J16 D
0.1uF 0.1uF
CA5_A eMMC VCCQm_2 J17
4.7uF
EBI0_CA0_CS_0 [06]
EBI0_CA0_CS_1 [06]
E15
F15 CS0_A Power VCCQm_3
VCCQm_4
K15
R13
H14 CS1_A VCCQm_5 R14
CS2_A VCCQm_6 T15 [17] VREG_L8A
EBI0_CA0_CKE_0 [06] E16 VCCQm_7 T16
EBI0_CA0_CKE_1 [06] F16 CKE0_A VCCQm_8
J14 CKE1_A A4
CKE2_A VDD1_1 A9 C2503 C2504 C2505
EBI0_CA0_CK_T [06] H16 VDD1_2 A15
EBI0_CA0_CK_C [06] CLK_t_A VDD1_3 0.1uF 0.1uF 2.2uF
G16 A16
CLK_c_A VDD1_4 B15
VDD1_5 AC15
EBI0_DQ_0 [06] A3 VDD1_6 AD4
EBI0_DQ_1 [06] B3 DQ0_A VDD1_7 AD9
EBI0_DQ_2 [06] C3 DQ1_A VDD1_8 AD15 eMCP_VDD1 [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A
EBI0_DQ_3 [06] D3 DQ2_A VDD1_9 AD16
EBI0_DQ_4 [06] B7 DQ3_A VDD1_10
EBI0_DQ_5 [06] C6 DQ4_A A5
EBI0_DQ_6 [06] D7 DQ5_A VDD2_1 A8 C2506 C2507 C2508 C2509
EBI0_DQ_7 [06] C8 DQ6_A VDD2_2 B9
DQ7_A VDD2_3 1uF 1uF 2.2uF 2.2uF
B13
EBI0_DMI_0 [06] D5 VDD2_4 B14
DMI0_A VDD2_5 G7
Note: 44-4
EBI0_DQS_T_0 [06] C9 VDD2_6 G8
EBI0_DQS_C_0 [06] D9 DQS0_t_A VDD2_7 G9
DQS0_c_A VDD2_8 L7 [12,25] VREG_S2C
EBI0_DQ_8 [06] K5 VDD2_9 L8
EBI0_DQ_9 [06] K6 DQ8_A VDD2_10 L9
EBI0_DQ_10 [06] K3 DQ9_A VDD2_11 P7
EBI0_DQ_11 [06] J3 DQ10_A VDD2_12 P8
EBI0_DQ_12 [06] J7 DQ11_A VDD2_13 P9
EBI0_DQ_13 [06] G3 DQ12_A VDD2_14 V7
EBI0_DQ_14 [06] H6 DQ13_A VDD2_15 V8 C2510 C2511 C2512 C2513 C2514 C2515 C2516 C2517 C2518

LPDDR4X
EBI0_DQ_15 [06] H8 DQ14_A VDD2_16 V9
DQ15_A VDD2_17 AC9 1uF 1uF 1uF 1uF 1uF 4.7uF 4.7uF 22uF 22uF
EBI0_DMI_1 [06] H3 VDD2_18 AC13

Power
DMI1_A VDD2_19 AC14
EBI0_DQS_T_1 [06] K9 VDD2_20 AD5
EBI0_DQS_C_1 [06] J9 DQS1_t_A VDD2_21 AD8
DQS1_c_A VDD2_22 K2
VDD2_23 R2
VDD2_24
EBI1_CA0_CA_0 [06] V14 A6
EBI1_CA0_CA_1 [06] W13 CA0_B VDDQ_1 A7
EBI1_CA0_CA_2 [06] AB13 CA1_B VDDQ_2 A13 [05,06,12,20] VREG_S5B
EBI1_CA0_CA_3 [06] AA13 CA2_B VDDQ_3 A14
EBI1_CA0_CA_4 [06] Y13 CA3_B VDDQ_4 B5
EBI1_CA0_CA_5 [06] AB15 CA4_B VDDQ_5 H5
C CA5_B VDDQ_6 H9 C
EBI1_CA0_CS_0 [06] Y15 VDDQ_7 J4 [05,06,12,20,25] DDR_VDDQ
EBI1_CA0_CS_1 [06] W15 CS0_B VDDQ_8 J5
U14 CS1_B VDDQ_9 J8 C2519 C2520 C2521 C2522
CS2_B VDDQ_10 T4
EBI1_CA0_CKE_0 [06] Y16 VDDQ_11 T5
CKE0_B VDDQ_12 1uF 1uF 2.2uF 2.2uF
EBI1_CA0_CKE_1 [06] W16 T8
T14 CKE1_B VDDQ_13 U5
CKE2_B VDDQ_14 U9
EBI1_CA0_CK_T [06] U16 VDDQ_15 AC5
EBI1_CA0_CK_C [06] V16 CLK_t_B VDDQ_16 AD6
CLK_c_B VDDQ_17 AD7
EBI1_DQ_0 [06] AD3 VDDQ_18 AD13
EBI1_DQ_1 [06] AC3 DQ0_B VDDQ_19 AD14
EBI1_DQ_2 [06] AB3 DQ1_B VDDQ_20
EBI1_DQ_3 [06] AA3 DQ2_B
EBI1_DQ_4 [06] AC7 DQ3_B L17 eMMC_VDDi
EBI1_DQ_5 [06] AB6 DQ4_B VDDi Note: 44-3
EBI1_DQ_6 [06] DQ5_B TP2500
AA7 P12 [05] SDC1_CLK
EBI1_DQ_7 [06] AB8 DQ6_B CLKm [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A
DQ7_B P16 [05] SDC1_DATA_0
EBI1_DMI_0 [06] AA5 DAT0m M15 [05] SDC1_DATA_1
DMI0_B DAT1m N13 [05] SDC1_DATA_2 R2502
DAT2m C2523 C2524
EBI1_DQS_T_0 [06] AB9 P15 [05] SDC1_DATA_3
EBI1_DQS_C_0 [06] AA9 DQS0_t_B DAT3m M16 [05] SDC1_DATA_4
10K 0.1uF 1uF
DQS0_c_B DAT4m N14 [05] SDC1_DATA_5
EBI1_DQ_8 [06] R5 eMMC DAT5m L14 [05] SDC1_DATA_6
EBI1_DQ_9 [06] R6 DQ8_B DAT6m L13 [05] SDC1_DATA_7
EBI1_DQ_10 [06] R3 DQ9_B DAT7m M12 [05] SDC1_RCLK Close to Memory
EBI1_DQ_11 [06] T3 DQ10_B DSm
EBI1_DQ_12 [06] T7 DQ11_B K17
EBI1_DQ_13 [06] V3 DQ12_B NC4 T17
EBI1_DQ_14 [06] U6 DQ13_B NC5 M9 [05] SDC1_CMD
Note: 44-2
EBI1_DQ_15 [06] U8 DQ14_B CMDm N9 [05,36] RESOUT_N
DQ15_B RSTm
EBI1_DMI_1 [06] U3 B16 ZQ0_A R2503 240 [05,06,12,20,25] DDR_VDDQ
DMI1_B ZQ0_A C16
EBI1_DQS_T_1 [06] ZQ1_A U400
R9 D16
EBI1_DQS_C_1 [06] T9 DQS1_t_B ZQ2_A ZQ1_A R2504 240 PM3003A-03
DQS1_c_B
M3
VSF1 ZQ2_A [15,16,17,18,19,20,21,22,28,40,43,46] VPH_PWR
VREG_S2C [12,25] J13 N3 R2505 DNP
T13 ODT_A VSF2 M4 TP2501
DDR_RESET_N [06] ODT_B VSF3
AA16
RESET_n VSF4
N4
M5 Reserved for DRAM with
B4
B6 VSS1
VSF5
VSF6
N5
M6
3-die integrated. LP4X_REG_SRC_EN [15] D2
EN PVIN1
A1 C2525
B8 VSS2 VSF7 N6 10uF
VSS3 VSF8 QUP_I2C_SDA_10 [10,17] D3 B1
C4 M7 SDA PVIN2
C5 VSS4 VSF9
VSS5 QUP_I2C_SCL_10 [10,17] E2 C1 [25] LPDDR4X_PGND
B C7 K13 SCL PVIN3 B
C14 VSS6 VSSm1 K14
D4
D6
VSS7
VSS8
VSSm2
VSSm3
K16
L12
Schematic design notice of "44_Memory_eMMC_LPDDR4X" LP4X_REG_MODE [19] D1
VSEL
VSS9 VSSm4 TP2502 E3 [12,25] VREG_S2C
D8 L15 VOUT
D14 VSS10 VSSm5 L16
D15 VSS11
VSS12
LPDDR4X VSSm6
VSSm7
M8 Note 44-1: Please refer to power supply related page select VDRAM 2 / VDRAM1
E14 M13
F14 VSS13
VSS14
VSSm8
VSSm9
M14 output voltage properly for LPDDR4X A2
SW1 PGND3
C3
G4 N8
VSS15 VSSm10 B2 E1
G5 N12 SW2 AGND
G6 VSS16 VSSm11 N15
G13 VSS17
VSS18
VSSm12
VSSm13
N16 Note 44-2: DRAM ZQx resistor = 240ohm (1%) that must be connected to VDDQ, PGND1
A3
G15 P13
VSS19 VSSm14 B3 [25] LPDDR4X_PGND
H4 P14 PGND2
H7 VSS20 VSSm15 R15
VSS21 VSSm16 C2
H13 R16 MODE
H15 VSS22
VSS23
VSSm17
VSSm18
R17 Note 44-3: Please refer to eMCP vendor's datasheet or MTK common design notice to get the
J6
K4 VSS24
VSS25 VSS54
AC8 recommendation bypass cap. value for VCC/VCCQ/VDDI power domains of eMMC. SH2500 SH2501 SH2502

G S

G S
K7 AC6

G S
C2 is PGND for FAN53526 and Mode for PM3003A;
K8 VSS26 VSS53 AC4 C3 is AGND for FAN53526 and PGND for PM3003A;
R8 VSS27 VSS52 AB14
PGND dedicated VIA to GND, AGND dedicated VIA to GND.
R4 VSS28
VSS29
VSS51
VSS50
AB7 Note 44-4: VDD2 VDDQ decoupling cap: closed to DRAM ball. Single_GND_0625 Single_GND_0625 Single_GND_0625
R7
T6 VSS30 VSS49
AB5
AB4 For other cap for PMIC [>10uF, at PMIC page]: I2C Address: 0x60(7-bit)
U4 VSS31 VSS48 AA15
U7 VSS32 VSS47 AA14 please also refer to MMD and layout guide for placement.
U13 VSS33
VSS34
VSS46
VSS45
AA8 0xC0(W),0xC1(R)
U15 AA6
V4 VSS35 VSS44 AA4
VSS36 VSS43 Y14
VSS42 W14
VSS41 V15
VSS40 V13
DNU10
DNU11
DNU12

VSS39
DNU1
DNU2
DNU3
DNU4
DNU5
DNU6
DNU7
DNU8
DNU9

V6
L2500
NC1
NC2
NC3

VSS38 V5
VSS37 0.47uH
[12,25] VREG_S2C
1P225
AD18
AD17
AD2
AD1
AC18
AC1
B18
B1
A18
A17
A2
A1

AC16
AB16
N7

C2526 C2527

22uF 22uF

G S
Single_GND_0625
A A
SH2503

eMCP:LPDDR4X
Title
eMCP:LPDDR4X

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 25 of 46
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

TOP MIC
L2600
[21,35] MIC_BIAS1
1000ohm@100MHz
GM2600

L2601
2 1 [21] CDC_MIC_IN3_P
3 GND1 OUTPUT
GND2 1000ohm@100MHz
4 ANC Mic
6 GND3 5
GND4 POWER
C2601
C2600
SPU0410LR5H-QB
33pF
68pF

L2602
[21,35] PM_MIC_GND
1000ohm@100MHz

RECEIVER
1

CR2601
1

R2600 CR2600 C2611 C2602 C2603 C2604

ESD5431N-2/TR ESD5431N-2/TR
2

68pF 100nF 68pF 68pF


2

EARP2600 CDC_EAR_P [21]


C2605
EARM2600 DNP CDC_EAR_M [21]

A A

CR2603 C2606 C2607


CR2602
1

100pF 100pF
ESD54031Z ESD54031Z

Audio Disc.
2

Note
parts(H Board)
Route MIC_IN3_P and PM_MIC_GND as differential traces.

Title
Audio Disc. parts(H Board)

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 26 of 46

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Codec:CS47L35
Title
Codec:CS47L35

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 27 of 46
5 4 3 2 1
5 4 3 2 1

D D

TP8 TP7 TP6 TP5

R8649 DNP R8650 DNP


U2800
BLM18KG101TN1D L5
C [10] QUP_I2C_SDA_2 A5 E6 WSA_SPKR_OUT_M [35] C
SDA OUTN
A4 E4 BLM18KG101TN1D L6 WSA_SPKR_OUT_P [35]
[10] QUP_I2C_SCL_2 SCL OUTP
R28 4.7K
C6 WSA_SPKR_VSNS_P [35]
VSP
R29 4.7K
[10] MI2S_1_D0 B2 C3 WSA_SPKR_VSNS_M [35]
DATAI VSN
[10] MI2S_1_WS A2
FS
A1 F4
[10] MI2S_1_SCK BCK VDDP1
B1 F5
[10] MI2S_1_D1 DATAO VDDP2
F6 C44 C45 C10056
TP4 VDDP3
22uF 22uF 100nF
C1 F1 R8644 0
[10] WSA_SPKR_SD_N_1 RST VBST1
B5 F2 S G
[10] WSA_SPKR_INT INT VBST2 SH1
TP3 F3 Single_GND_0625
VBST3
[05,10,12,15,17,18,19,21,22,25,29,33,36,38,40,42,43,44,46] VREG_L13A A3
VDDD C5
TEST1
C4
B6 TEST2
[15,16,17,18,19,20,21,22,25,40,43,46] VPH_PWR VBAT
C46 A6
TRSTN
1uF L7 1uH B4
C47 E1 ADS1
INB1 B3
1uF

C49

C50
C48
E2 ADS2
INB2 C2
E3 GNDD1
INB3 D4

10uF

10uF
DNP
GNDD2

GNDB1

GNDB2

GNDB3

GNDP1

GNDP2
D6
GNDD3

D1

D2

D3

D5

E5
SH2 TFA9871UK/N1

G S
Single_GND_0625

B B

A A

Audio PA :TFA9871
Title
Audio PA :CS35L41

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 28 of 46
5 4 3 2 1
5 4 3 2 1

D D

LCM Connector

2
D3106
DNP

1
CN4806
W7B-S040VA10
LCD0_RESET_N [10] 1K R8570
LCD_RST_N 20 21 LCD_TE
20 21 MDP_VSYNC_P [10]
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46]
L3102 DNP
LCD_IO_1V8 19 22 LCD_CABC
19 22 CABC [22]
VREG_L11A [10,17] R8568 0 18 23 GND
18 23 1 4
600ohm@100MHz MIPI_DSI0_LANE2_P [08]
VDISP_P_OUT [22] L3103 LCD_+5V 17 24 LANE2_P
17 24 U5027 MCF08062G900-T
VDISP_M_OUT [22] L3104 600ohm@100MHz LCD_-5V 16 25 2 3
LANE2_M MIPI_DSI0_LANE2_N [08]
16 25
C3120
15 26 GND
15 26 1 4 MIPI_DSI0_LANE1_P [08]
WLED_SINK3 [22] R8622 0 1uF 14 27 LANE1_P
C 14 27 C
U5026 MCF08062G900-T
LED_A 13 28 LANE1_M 2 3 MIPI_DSI0_LANE1_N [08]
13 28
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] R8567
VREG_WLED [22] 0 LED_A 12 29 GND
12 29 1 4
R8566 MIPI_DSI0_CLK_P [08]
WLED_SINK1 [22] 0 LED_K1 11 30 CLK_P
11 30 U5025 MCF08062G900-T
R8569 WLED_SINK2 [22] R8565 0 LED_K2 10 31 CLK_M 2 3
10 31 MIPI_DSI0_CLK_N [08]
DNP 9 32 GND
9 32
TS_INT_N [10] TP_INT_N 8 33 LANE0_P 1 4
8 33 MIPI_DSI0_LANE0_P [08]
QUP_I2C_SCL_9 [10] TP_SCL 7 34 LANE0_M U5024 MCF08062G900-T
7 34 2 3 MIPI_DSI0_LANE0_N [08]
QUP_I2C_SDA_9 [10] TP_SDA 6 35
6 35
C9901 C9904 TS_RESET_N [10] R8564 0.3mm TP_RST_N 5 36 LANE3_P 1 4
5 36 MIPI_DSI0_LANE3_P [08]
C10046 C9903 C9902 C9898 C3119 4 37 U5023 MCF08062G900-T

1
33pF 1uF 4 37 LANE3_M

1
D4821 D4822 DNP 2 3
GND MIPI_DSI0_LANE3_N [08]
100pF 100pF 100pF 3 38
1

DNP DNP

1
100nF 100nF D3101 3 38

2
D3100 D3104 D3105

2
C9900 C9899 2 39
2 39 LCD_ID1 LCD_ID1 [10]
DNP DNP DNP
2

2
1 40 LCD_ID2
1 40 LCD_ID2 [10]
44 41
G3 G1
43 42
G4 G2

B B

A A

LCD DISPLAY
Title
LCD DISPLAY

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 29 of 46

5 4 3 2 1
5 4 3 2 1

Front Cofront Camera 16MP

I2C address:0xA0(W),0xA1(R)

AXQ1241HF1 R3013 DNP

CAM Rear_M/Rear_S/Rear_F DOVDD 1P8

27
28
4 1 [30] MIPI_CSI2_DATA3_N_F
VREG_CAM_AVDD_Front_2P8

27
28
DOVDD 1 24 U3006
[10,30,31] VREG_CAM_DOVDD_1P8 1 24 3 2 [30] MIPI_CSI2_DATA3_P_F
DVDD 1.05V 2 23
[31] VREG_CAM_R_S_F_DVDD_1P05 2 23 R3014
D DNP D
AGND 3 22 R3011 DNP
3 22 U5017
R3003 0 U3007
AVDD 2.8V 4 21
[30] VREG_CAM_AVDD_Front_2P8 4 21 4 1 [30] MIPI_CSI2_DATA2_N_F [30] VREG_CAM_AVDD_Front_2P8
VREG_BOB [15,17,19,20,30,31,32] 4 1 VREG_S4A [15,16,17,21] 4 1 [10,30,31] VREG_CAM_DOVDD_1P8
5 20 VIN VOUT VIN VOUT
5 20 U3005
2 2
6 19 3 2 [30] MIPI_CSI2_DATA2_P_F 5 GND 3 [10] CAM_AVDD_Front_2P8_EN GND
[10,30,31] CCI_I2C_SCL1 6 19 SGND EN 5 3 [10] CAM_DOVDD_1P8_EN
SGND EN
R3012 DNP
[10,30,31] CCI_I2C_SDA1 7 18
7 18 R3005 DNP RT9078-28GQZ RT9078-18GQZ
8 17
[10] CAM2_RST_N 8 17 4 1 [30] MIPI_CSI2_DATA1_N_F C6594 C6595 C3011 C3012
R3006 18n 9 16
[10] CAM_MCLK3 9 16 U3001
R3008 DNP 1uF 1uF
10 15 3 2 [30] MIPI_CSI2_DATA1_P_F 1uF 1uF
10 15
[30] MIPI_CSI2_CLK_N_F 3 2 11 14 R3007 DNP
11 14 R3002 DNP
U3004 12 13
[30] MIPI_CSI2_CLK_P_F 4 1 12 13
4 1 [30] MIPI_CSI2_DATA0_N_F

25
26
R3010 DNP U3000

25
26
3 2 [30] MIPI_CSI2_DATA0_P_F
CN3000
R3004 DNP

C3009 C3010 SH3840

G S
100nF 4700nF Single_GND_0625

C3004 C3005 C3007 C3008

33pF 2200nF 2200nF


SH3201

G S
12pF
Single_GND_0625

C C

CAD note: Ensure the DGND to main-GND directly and robustly

CAM1/2 AVDD 2P8 U3014


Rear Camera 5MP, U5018
VREG_S6A [16,17,31] 6
IN OUT
1
R6532
[30,31] DVDD_IRCAM_1P2

VREG_BOB [15,17,19,20,30,31,32] 4 1 [30] VREG_CAM_AVDD_IR_2P8


VIN VOUT VREG_BOB [15,17,19,20,30,31,32] 4 2
I2C address:0x5A(W),0x5B(R) 2
GND
BIAS ADJ 18K
5 3 [10] CAM_AVDD_IR_2P8_EN
SGND EN IR_CAM_DVDD_EN [10] 3 5
EN GND 7
SGND R6533
RT9078-28GQZ C3027
C3024 C3025 RT9081AGQZA
GB35R-24S-H08 C6596 C6597 2200nF
36K
27
28

1uF 1uF
1uF 1uF
27
28

[10,30,31] VREG_CAM_DOVDD_1P8 DOVDD 1.8 1 24


1 24
[30,31] DVDD_IRCAM_1P2 DVDD 1.2V 2 23
2 23
Single_GND_0625 SH3001
AGND 3 22VSYNC_OUT 0 R8640
G S 3 22 SYNC_OUT_5M [31]
0 R8572 AVDD 2.8V 4 21
[30] VREG_CAM_AVDD_IR_2P8 4 21
VSYNC_IN 5 20
[31] VSYNC_OUT_16M 5 20
SCL 6 19 GND R3016 DNP
[10,30,31] CCI_I2C_SCL1 6 19
SDA 7 18 MDN1 4 1 [30] MIPI_CSI2_DATA1_N_R
[10,30,31] CCI_I2C_SDA1 7 18
RESET 8 17 MDP1 U5028
[10] CAM3_RST_N 8 17 3 2 [30] MIPI_CSI2_DATA1_P_R
R8641 18n MCLK 9 16 GND
[10] CAM_MCLK2 9 16
B R3017 DNP B
R3018 DNP GND 10 15 MDN0
10 15 R8573 DNP
MIPI_CSI2_CLK_N_R [30] 3 2 MCN 11 14 MDP0
11 14 4 1 [30] MIPI_CSI2_DATA0_N_R
U3009 MCP 12 13 GND
MIPI_CSI2_CLK_P_R [30] 4 1 12 13 U5029
25
26

3 2 [30] MIPI_CSI2_DATA0_P_R
R3019 DNP U5030
25
26

R3015 DNP

C3006 C9908 C9906 C9907 C9905 C9909 F3 [30] MIPI_CSI2_CLK_N_F


MIPI_CSI2_CLK_N [08] F5 BCLKN F4 [30] MIPI_CSI2_CLK_P_F
MIPI_CSI2_CLK_P [08] F6 ACLKN BCLKP
33pF 2200nF 2200nF 100nF 4700nF 12pF ACLKP E3 [30] MIPI_CSI2_DATA0_N_F
MIPI_CSI2_DATA0_N [08] E5 BLN0N E4 [30] MIPI_CSI2_DATA0_P_F
CN3001
MIPI_CSI2_DATA0_P [08] E6 ALN0N BLN0P
ALN0P D3 [30] MIPI_CSI2_DATA1_N_F
SH3003
MIPI_CSI2_DATA1_N [08] D5 BLN1N D4 [30] MIPI_CSI2_DATA1_P_F
Single_GND_0625 ALN1N BLN1P
MIPI_CSI2_DATA1_P [08] D6
ALN1P
G S

B3 [30] MIPI_CSI2_DATA2_N_F
MIPI_CSI2_DATA2_N [08] C5 BLN2N B4 [30] MIPI_CSI2_DATA2_P_F
MIPI_CSI2_DATA2_P [08] C6 ALN2N BLN2P
ALN2P A3 [30] MIPI_CSI2_DATA3_N_F
MIPI_CSI2_DATA3_N [08] B5 BLN3N A4 [30] MIPI_CSI2_DATA3_P_F
MIPI_CSI2_DATA3_P [08] B6 ALN3N BLN3P
ALN3P

A5 F1 [30] MIPI_CSI2_CLK_N_R
[10] GPIO_IR_VT_SW_EN /OE CCLKN F2 [30] MIPI_CSI2_CLK_P_R
A6 CCLKP
[10] GPIO_IR_VT_SW_SEL SEL E1 [30] MIPI_CSI2_DATA0_N_R
CLN0N E2 [30] MIPI_CSI2_DATA0_P_R
CLN0P
VREG_CAM_DOVDD_1P8 [10,30,31] A1 D1 [30] MIPI_CSI2_DATA1_N_R
VCC CLN1N D2 [30] MIPI_CSI2_DATA1_P_R
CLN1P
A2 C1
GND CLN2N C2
CLN2P
R3030 R3031 C3 B1
C4 NC2 CLN3N B2
C3026 NC1 CLN3P

100nF
DNP WAS4646C-36/TR
DNP

A A

FRONT CAMERA and LDOs


Title
FRONT CAMERA and LDOs

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 30 of 46

5 4 3 2 1
1

Slave Camera 8M
Main Camera 16M
I2C address:0x18(W),0x19(R)
I2C address:0xA0(W),0xA1(R)

GB35R-30S-H08

31

32
R3100 DNP

P1

P2
GB35R-30S-H08

31

32
4 1 MIPI_CSI1_CLK_P [08]
GND 1 30 MCP
1 30 R3101 DNP
R3107 18n

P1

P2
U3100 MCF08062G900-T
CAM_MCLK2 2 29 MCN 3 2 4 1
[10] CAM_MCLK1 2 29 MIPI_CSI1_CLK_N [08] GND 1 30 MCP MIPI_CSI0_CLK_P [08]
1 30
GND 3 28 GND R3108 18n U3101 MCF08062G900-T
R8643 DNP 3 28 R3103 DNP 2 29
CAM_MCLK0 MCN 3 2
[30,31] SYNC_OUT_5M NC [10] CAM_MCLK0 2 29 MIPI_CSI0_CLK_N [08]
4 27 MDP3 R3105 DNP
4 27 GND 3 28 GND
3 28 R3106 DNP
R8642 0 VSYNC_IN 5 26 MDN3 4 1 R3109 DNP
[30,31] VSYNC_OUT_16M 5 26 MIPI_CSI1_DATA3_P [08]
VSYNC_IN 4 27 MDP3
[30,31] SYNC_OUT_5M 4 27
DVDD_1V2 6 25 GND U3102 MCF08062G900-T 4 1
[30,31] DVDD_IRCAM_1P2 6 25 R3115 0 5 26 MIPI_CSI0_DATA3_P [08]
3 2 [30,31] VSYNC_OUT_16M VSYNC_OUT MDN3
R6560 0 MIPI_CSI1_DATA3_N [08] 5 26
[10] CAM1_RST_N SHUTDOW N 7 24 MDP2 U3103 MCF08062G900-T
7 24 R3110 DNP DVDD_1V2 6 25 GND 3 2
[30,31] DVDD_IRCAM_1P2 6 25 MIPI_CSI0_DATA3_N [08]
I2C_SCL 8 23 MDN2 R3111 DNP
[10,30] CCI_I2C_SCL1 8 23 R6547 0 PW DN 7 24 MDP2 R3112 DNP
I2C_SDA 9 [10] CAM0_PWDN_N 7 24
22 GND 4 1 MIPI_CSI1_DATA2_P [08] R3113 DNP
[10,30] CCI_I2C_SDA1 9 22 8 23
I2C_SCL0 MDN2
U3104 MCF08062G900-T [10] CCI_I2C_SCL0 8 23
DOVDD_1V8 10 21 MDP1 4 1
[10,30,31] VREG_CAM_DOVDD_1P8 10 21 9 22 MIPI_CSI0_DATA2_P [08]
3 2 [10] CCI_I2C_SDA0 I2C_SDA0 GND
R3102 0 MIPI_CSI1_DATA2_N [08] 9 22
AVDD_2V8 11 20 MDN1 U3105 MCF08062G900-T
[31] VREG_CAM_AVDD_Rear_S_2P8 11 20 R3116 DNP DOVDD_1V8 10 21 MDP1 3 2
[10,30,31] VREG_CAM_DOVDD_1P8 10 21 MIPI_CSI0_DATA2_N [08]
SH3100 Single_GND_0625 AGND 12 19 GND R3118 DNP
G S 12 19 R3104 0 AVDD_2V8 11 20 MDN1 R3119 DNP
[31] VREG_CAM_AVDD_Rear_M_2P8 11 20
[31] VREG_CAM_REAR_VCM_2P8 VCM_2V8 13 18 MDP0 4 1 MIPI_CSI1_DATA1_P [08] R3120 DNP
13 18 SH3101 AGND 12 19 GND
SH3612 14 17 MDN0 G S 12 19 4 1
AF_GND U3106 MCF08062G900-T Single_GND_0625
G S 14 17 3 2 VCM_2V8 13 18 MIPI_CSI0_DATA1_P [08]
[31] VREG_CAM_REAR_VCM_2P8 13 18 MDP0
Single_GND_0625 15 16 GND MIPI_CSI1_DATA1_N [08]
GND U3107 MCF08062G900-T
15 16 R3121 DNP SH3613 AF_GND 14 17 MDN0 3 2
G S 14 17 MIPI_CSI0_DATA1_N [08]
C3100 C3101 C3102 C3103 C3106 R3122 DNP

G1

G2
Single_GND_0625 GND 15 16 GND R3123 DNP
4 1 15 16
DNP DNP 2200nF 2200nF 33 MIPI_CSI1_DATA0_P [08] R3124 DNP

34
12pF C3104 C3105 C3107 C3108 CN3100

G1

G2
U3108 MCF08062G900-T C3109 C3110 C3111 C3112 C3113 C3114 4 1
2200nF100nF MIPI_CSI0_DATA0_P [08]
100nF 4700nF 3 2 CN3101

33

34
MIPI_CSI1_DATA0_N [08]
DNP DNP 12pF 2200nF 2200nF 2200nF
C3115 C3116
U3109 MCF08062G900-T
R3125 DNP 3 2
MIPI_CSI0_DATA0_N [08]
100nF 4700nF R3126 DNP
SH3102
G S

Single_GND_0625 SH3103

G S
Single_GND_0625

CAD note: Ensure the DGND to main-GND directly and robustly CAD note: Ensure the DGND to main-GND directly and robustly
A A

ANT4907 ANT4908

VREG_CAM_AVDD_Rear_M_2P8
VREG_CAM_AVDD_Rear_S_2P8 CAM Rear_M/Rear_S VCM 2P8
FLASH_LED1 [19] FLASH_LED2 [19]
U3002
U3008 U3003
VREG_BOB [15,17,19,20,30,31,32] 4 1 [31] VREG_CAM_AVDD_Rear_M_2P8
VIN VOUT [31] VREG_CAM_AVDD_Rear_S_2P8 VREG_BOB [15,17,19,20,30,31,32] 4 1 [31] VREG_CAM_REAR_VCM_2P8
VREG_BOB [15,17,19,20,30,31,32] 4 1 VIN VOUT
VIN VOUT
2
5 GND 3 [10] CAM_AVDD_Rear_M_2P8_EN 2 2
SGND EN GND 5 GND 3 [10] CAM_VCM0_2P8_EN
5 3 [10] CAM_AVDD_Rear_S_2P8_EN
SGND EN SGND EN
RT9078-28GQZ
RT9078-28GQZ RT9078-28GQZ
C3130 C3131

2
C3134 C3135

2
C3132 C3133
LED3100 LED3101
1uF 1uF

1
1
1uF 1uF CR3403 CR3404
1uF 1uF
C3117
C3118

2
2
56pF
ANT4910

1
56pF

1
ANT4909

CAM Rear_M DVDD 1P1


CAM Rear_S/Front DVDD 1P05
U5022
VREG_S6A [16,17,30] 6 1 [30] VREG_CAM_R_S_F_DVDD_1P05
IN OUT
R3132

VREG_BOB [15,17,19,20,30,31,32] 4 2 20K


BIAS ADJ
C3141
CAM_DVDD1_1P2_EN [19] 3 5
EN GND 7 2200nF
SGND R3133
RT9081AGQZA
C3139 C3140 63.4K

1uF 1uF

REAR CAMERA/FLASH
Title
REAR CAMERA/FLASH

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 31 of 46

1
5 4 3 2 1

ACCELEROMETER+GYRO
BMI120 and ICM-20600 addresses are the same
SDO to GND,the I2C address is 0x68 (0b1101000)
ALS/PROXIMITY SENSOR
SDO to VDDIO,the I2C address is 0x69 (0b1101000)
LTR_I2C slave address: 0X53
ALS V2000 0xA6(W),0xA7(R)
TP4419 TP4418 TP4417 TP4416
V2000_I2C slave address: 0X57 STK_I2C slave address: 0X48
0xAE(W),0xAF(R) 0x90(W),0x91(R)
D D
SSC_SPI1_CS0_N [10]
SSC_SPI1_SCLK [10]
SSC_SPI1_MOSI [10] [10,17,32,46] VREG_L14A

SSC_SPI1_MISO [10]

14

13

12
U3200

SDX

SCX

CSB
R8633
R3200
1 11
SD0 GND3 C10055
C3216 DNP
2 10
ASDX GND2
[10] ACCL_GYRO_EVENT_INT
DNP
3 9 CN4808

15
ASCX INT2 56pF 56pF
ACCL_GYRO_DRDY_INT [10] 4 8 [20,32] VREG_L3B

15
INT1 VDD 13

GNDIO
VDDIO
13

GND1
12
[19] RGB_BLU 12
[19] RGB_RED 11
10 11
[19] RGB_GRN 10
BMI120 [10] ALSP_INT_N 9

7
8 9
[10,32] SSC_I2C_1_SCL 8
C3205 C3206 7
[10,32] SSC_I2C_1_SDA R8629 0 7
100nF 100nF [20,32] VREG_L3B 6
5 6
[20,32] VREG_L3B R3202 22 4 5
[20,32] VREG_L3B R8623 22 3 4
[10,17,32,46] VREG_L14A 3
[10] ALS_INT_N_V2000 2
1 2
1

14
C3207

14
1
100nF D4829 FH26W-13S-0.3SHW(60)
C3203
C3204

2
D3202
C10079C10078 C10077D4827 C10053

2
1

1
D3201 C3201C3202
D3200 C3200DNP

1
1uF
33pF 33pF 33pF DNP 1uF DNP

2
DNP 1uF 56pF 56pF

2
C C

Magnetic Sensor
CAD to GND,the I2C address is 0x0C (0b0001100)
CAD to VDDIO,the I2C address is 0x0D (0b0001101)
U3303

VREG_BOB [15,17,19,20,30,31] 4 1
VIN VOUT FP_1P8 [32]
U3203
2
A2 A1 [20,32] VREG_L3B 5 GND 3
CAD VDD SGND EN FP_VDD_EN [10]
A3 C1 [10,17,32,46] VREG_L14A
TST VID RT9078-18GQZ
MAG_INT_N [10] C2 B1
RSTN VSS C3310
SSC_I2C_1_SDA [10,32] C3
SDA C3209 C3210 C3311
1uF
SSC_I2C_1_SCL [10,32] B3 100nF 100nF 4700nF
SCL

AK09911C

B B

CN3300

13
14
13
14
5 6
5 6 FP_RST [10]
4 7
4 7 QUP_SPI_MOSI_15 [10]

[10] FP_INT_N1 3 8
3 8 QUP_SPI_MISO_15 [10]
2 9 QUP_SPI_SCLK_15 [10]
[32] FP_1P8 2 9
1 10 QUP_SPI_CS_N_15 [10]
[10] FP_ID 1 10

11
12

DNP
DNP

DNP

DNP

DNP

DNP

DNP

DNP
1uF

11
12

1
1

1
GB35R-10S-H08

D3300
D4830

D3305

D3303

D3308

D3307

D3301

D3306
2
C3314
2

2
A A

SENSOR
Title
SENSOR

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 32 of 46
5 4 3 2 1
5 4 3 2 1

D D

[20] VREG_L5B [12,20] VREG_L2B

SIM R8563 R8561 R8562 R3403 R3404 R3405

[12,17,33] VREG_L15A
CARD&TF DNP/51K DNP/51K DNP/51K DNP/51K DNP/51K DNP/51K

2
DNP/33pF 100nF
D3400 D3401 D3403
R3406 D3402 CN3400
15K ESD5431N-2/TR
DNP DNP DNP

1
C3400 C3401
C C
T7 R3412 22 [05] SDC2_DATA_0
UIM1_CLK [10] R3407 47 C3 SD_DAT0
SIM1_CLK T8 R3408 22 [05] SDC2_DATA_1
R3409 100 C7 SD_DAT1
UIM1_DATA [10]
SIM1_I/O T1 R3413 22 [05] SDC2_DATA_2
UIM1_RESET [10] R3410 100 C2 SD_DAT2
SIM1_RST T2 R3414 22 [05] SDC2_DATA_3
VREG_L15A [12,17,33] R3411 2.2 C1 SD_DAT3
SIM1_VCC T3 R3415 22 [05] SDC2_CMD
C6 SD_CMD
SIM1_VPP T5 R3416 22 [05] SDC2_CLK
C5 SD_CLK
SIM1_GND T4
SD_VDD R3417
[05,10,12,15,17,18,19,21,22,25,28,29,36,38,40,42,43,44,46] VREG_L13A
T6 100K
R3418 47 S3 SD_VSS R3419 0.3mm
[10] UIM2_CLK SIM2_CLK SD_CARD_DET_N [10,19]
R3420 100 S7 SW1 R3421 100
[10] UIM2_DATA SIM2_I/O SWITCH_DC UIM2_PRESENT [10]
SG1
R3422 100 S2 SWITCH_GND R3423 0.3mm
[10] UIM2_RESET SIM2_RST UIM1_PRESENT [10]
VREG_L17A [12,17,33] R3424 2.2 S1 G1
SIM2_VCC GND1 G2
S6 GND2 G3
SIM2_VPP GND3 G4
R3425 GND4
ESD5431N-2/TR
DNP DNP DNP S5 G5

1
15K C3402 C3403 SIM2_GND GND5
D3404 D3405 D3406 D3407 G6
GND6 G7
DNP/33pF 100nF GND7
DR1 G8

2
NPTH1 GND8 G9
GND9 DNP DNP DNP DNP DNP DNP DNP

1
DR2 G10
NPTH2 GND10 D3408 D4831 D3410 D3411 D3412 D3413 D3414 D3415

2
[12,17,33] VREG_L17A

S166-0B22A13F

B B

A A

SIM/TF CARD Reserved


Title
SIM/TF CARD Reserved

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 33 of 46

5 4 3 2 1
5 4 3 2 1

D D

Signal Description
KEY_VOL_UP Volume Up
KEY_VOL_DN Volume Down
KYPD_PWR_N1 PWER_ON
KEY_FOCUS_N OTHER

DEBUG_PMIC_PKD_N [36]
Power On
KYPDPWR_N [15] R3400 1K ANT4826
DEBUG_KEY_VOL_UP_N [36]
Volume Up KEY_VOL_UP_N [19] R3401 1K VOL_UP_S
C ANT4828 C

DEBUG_KEY_VOL_DOWN_N [36] VOL_DN_S

Volume Down RESIN_N [15] R3402 1K ANT4827

ANT4829

1
CR3400

1
2
ESD5431N-2/TR CR3401

1
CR3402

2
ESD5431N-2/TR

2
ESD5431N-2/TR

B B

A A

KEYPAD AND INDICATOR


Title
KEYPAD AND INDICATOR

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 34 of 46

5 4 3 2 1
5 4 3 2 1

D D

Factory Test Point for Battery

SH3500
VBATT_SNS_P [18]

R3500 0.01 [18] VBATT

SH3501
IBATT_SNS_M [18]
SH3502
IBATT_SNS_P [18]

[36] VBATT_CONN

1
D3502 D3503 C3504
LI-ION
C3502 C3503 C3505

1
Battery WP10-SX02VA10
12
CN3500
2
22uF 1uF 100nF 2200pF

1
Connector 12 2 C3508

2
WSA_SPKR_OUT_P [28,35]
11 3
11 3
DNP
BATT_THERM 10 BATT_ID WSA_SPKR_OUT_M [28,35]
4
[18,36] BATT_THERM 10 4 BATT_ID [18,36]

SH3503 C3509 C3510


9 5
9 5 VBATT_SNS_M[18]
C3507 R3503 100pF 100pF

1
1

ESD5431N-2/TR 8 6 D3504 C3506


8 6

7
C C
DNP
D3505 DNP

2
2

DNP
ESD5431N-2/TR

43 42 [18,36] USB_VBUS
P2 G2
44 41
P1 G1
1 40
1 40 C3511
2 39 100pF
[28] WSA_SPKR_VSNS_M 2 39 WSA_SPKR_OUT_P [28,35]
3 38
[28] WSA_SPKR_VSNS_P 3 38
4 37
4 37
C3512
[21] CDC_MIC_IN1_P R3506 0 5 36
5 36 WSA_SPKR_OUT_M [28,35]
For main Mic
R3507 0 6 35
[21] CDC_MIC_IN1_M 6 35
MIC_BIAS1 [21,26] DNP 7 34
7 34
8 33 [21] CDC_HSDET_L
8 33
C3521 C3513 VREG_L16A [17,40,41,42] 9 32
C3514 9 32 USB_CC1 [18,36]

100nF [10] GRFC_0 10 31


DNP DNP 10 31 USB_CC2 [18]

[10] GRFC_1 11 30
11 30 VSW_HAP_P [15]

[10] GRFC_2 12 29 VSW_HAP_M [15]


12 29
[10] GRFC_3 13 28
13 28
14 27 [21] MIC_BIAS2
14 27
USB1_HS_DP [05,36] 15 26 [21] CDC_MIC_IN2_P
15 26 C3616 C3617
USB1_HS_DM [05,36] 16 25 [21,26] PM_MIC_GND
16 25
DNP DNP
17 24
17 24
CDC_HPH_R [21] 18 23
18 23 TSKIN [15]

B CDC_HPH_REF [21] 19 22 B
USB1_HS_DET_DP [18] R3508 300 19 22
CDC_HPH_L [21] 20 21 [44] FM_ANT
USB1_HS_DET_DM [18] R3509 300 20 21

505066-4020
CN3501

A A

BAT/B2B CONNECTOR
Title
BAT/B2B CONNECTOR

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 35 of 46

5 4 3 2 1
5 4 3 2 1

D D

TP3604 TP3605 TP3606


TP3600 TP3601 TP3602 TP3603

DEBUG_KEY_VOL_UP_N [34]
USB1_HS_DM [05,35]

USB1_HS_DP [05,35] DEBUG_KEY_VOL_DOWN_N [34]

USB_VBUS [18,35]
DEBUG_PMIC_PKD_N [34]
USB_CC1 [18,35]

1
1

1
D3602 D3603
D3600 D3601

2
2

2
Debug Port CONNECTOR TP3607 TP3608

TP3610 TP3611 TP3612 TP3613


R3603 R3600

2.2K 10K
C C

FORCED_USB_BOOT [05,10]
VBATT_CONN [35]

VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,38,40,42,43,44,46]

BATT_THERM[18,35]
[05] JTAG_SRST_N
TP3614
ESD5431N-2/TR
[05] JTAG_TCK ESD5431N-2/TR

1
TP3615 BATT_ID [18,35]
[05] JTAG_TDI D3604
TP3617 D3605

2
[05] JTAG_TDO
TP3619
RESOUT_N [05,25]
TP3620 TP3621
[05] JTAG_TMS PCBA AUTOMATIC TEST point
[05] JTAG_TRST_N
TP3622

C3602

DNP

R3601 1K [10] QUP_UART_TX_12


TP3627
R3602 1K [10] QUP_UART_RX_12
TP3629

FAST_BOOT_SEL_2 [10] [10] RCM_MARKER2


TP3631 TP3632

fastboot_0/1/2
S6 S2
kunlun_shielding_rf kunlun_shielding_cpu
B B
17 18 17 18
16 17 18 19 16 17 18 19 S7 S3
S8 15 16 19 20 15 16 19 20 S4 kunlun_shielding_gps kunlun_shielding_wcn
kunlun_shielding_cap 14 15 20 21 14 15 20 21 kunlun_shielding_charger
ESD5431N-2/TR
1

S1 13 14 21 22 13 14 21 22 15 15
D3606 13 22 13 22 15 15
kunlun_shielding_pmu1 14 12 23 12 23 14 14 14
13 14 15 11 12 23 24 11 12 23 24 13 14 13 14 13 14 S9
2

12 13 12 13 15 16 10 11 24 25 10 11 24 25 12 13 12 13 12 13 kunlun_shielding_rf_pa
11 12 13 14 11 12 16 17 9 10 25 26 9 10 25 26 11 12 11 12 11 12
10 11 14 15 10 11 17 18 8 9 26 27 8 9 26 27 10 11 10 11 10 11 10
9 10 15 16 9 10 18 19 7 8 27 28 7 8 27 28 9 10 9 10 9 10 9 10 S5
8 9 16 17 8 9 19 20 6 7 28 29 6 7 28 29 8 9 8 9 8 9 8 9 kunlun_shielding_lna
7 8 17 18 7 8 20 21 5 6 29 30 5 6 29 30 7 8 7 8 7 8 7 8
6 7 18 19 6 7 21 22 4 5 30 31 4 5 30 31 6 7 6 7 6 7 6 7 6
5 6 19 20 5 6 22 23 3 4 31 32 3 4 31 32 5 6 5 6 5 6 5 6 5 6
4 5 20 21 4 5 23 24 2 3 32 33 2 3 32 33 4 5 4 5 4 5 4 5 4 5
3 4 21 22 3 4 24 25 1 2 33 1 2 33 34 3 4 3 4 3 4 3 4 3 4
2 3 22 23 2 3 25 26 1 1 34 2 3 2 3 2 3 2 3 2 3
1 2 23 1 2 26 27 1 2 1 2 1 2 1 2 1 2
1 1 27 1 1 1 1 1

FID1 FID2 FID3 FID4

A A

JTAG/TestPoint/Shield (H Brd)
Title
JTAG/TestPoint/Shield (H Brd)

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 36 of 46

5 4 3 2 1
5 4 3 2 1

U3700A
D D
SDR660

CONTROL

166 R3700 0 [10] RFFE1_CLK


RFFE1_CLK

RF_CLK2 [15] L3700 0 114 149 R3701 0 [10] RFFE1_DATA


XO_IN RFFE1_DATA

C3701
DNP 120 173
W_GRFC_6 DNC_3
GRFC7_WTR [42] 157
W_GRFC_7

136
W_GRFC_5

165 83 [10] WMSS_RESET


DNC_2 WMSS_RESETN

QLINK_ENABLE [10] 143


QLINK_EN

QLINK_REQUEST [10] 73
QLINK_REQ

GNSS_ELNA_CTRL [46] 150


GNSS_ELNA_CTRL
connect to eLNA
57 [41,42] GRFC0_WTR
W_GRFC_0

66 65 [41,42] GRFC1_WTR
DNC_1 W_GRFC_1

74 [40,42] GRFC2_WTR
C W_GRFC_2 C

U3700D

SDR660

QLINK_ETDAC_TEST

1 81 [09] QLINK_CLK_M
GND_1 QLINK_CLK_M

9 96 [09] QLINK_CLK_P
GND_4 QLINK_CLK_P

87 [09] QLINK_TX_M
QLINK_UL0_M

72 [09] QLINK_TX_P
QLINK_UL0_P

88 [09] QLINK_RX0_M
QLINK_DL0_M

103 [09] QLINK_RX0_P


QLINK_DL0_P

115 111 [09] QLINK_RX1_M


GND_50 QLINK_DL1_M

124 127 [09] QLINK_RX1_P


GND_52 QLINK_DL1_P
B B
106
GND_48

91 135 [09] QLINK_RX2_M


GND_38 QLINK_DL2_M

119 [09] QLINK_RX2_P


QLINK_DL2_P

Each QPHY pair shall be routed in a channel together


47
ETDAC_CH0_M

39
isolated from other QPHY pairs with surrounding gnd
ETDAC_CH0_P

113
ETDAC_CH1_M

104
ETDAC_CH1_P

QPHY_ETDAC_TEST

A A

SDR660: MSS
Title
SDR660: MSS

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 37 of 46

5 4 3 2 1
5 4 3 2 1

U3700B

SDR660

GND

41
GND_19

99 21
D GND_44 GND_9 D

22
GND_10

36
GND_17
U3700C
49
SDR660 GND_24
C3800
100nF 58 42
GND_29 GND_20

PWR

108 [17] VREG_L7A


VDDA_1P2_RX1 67 56
VDD_ANALOG_1P2 GND_32 GND_28
70
VDDA_1P2_RX2 84 97
GND_36 GND_42
VREG_L2A [17] 77 75 C3801
VDDA_1P0_RX1 VDDA_1P2_ANA0_1 C3802 128
100nF GND_54
VDD_ANALOG_1P0 4700nF
37 90
VDDA_1P0_RX2_2 VDDA_1P2_ANA0_2 98 134
GND_43 GND_57
C3803
C3804 107 85
4700nF VDDA_1P0_XO VDDA_1P2_FBRX
100nF
Pin 43,37,107within one group 89
GND_37
43 C3805
VDDA_1P0_RX2_3 158
100nF GND_66
95
VDDA_1P0_RX

C3806 53
VDDA_1P0_RX2_1 138
100nF GND_58
29
VDDA_1P2_TX0 116
GND_51
144
VDDA_1P0_TX1 131
GND_56
C3807
61
100nF GND_30
C3808
C 100nF C
154
VDDA_1P0_RX0 139
GND_59
146 130
VDDA_1P0_GNSS VDDA_1P2_RX0_2 34
GND_16
C3809 132 137
VDDA_1P0_RX0_1 VDDA_1P2_RX0_3 40 92
100nF GND_18 GND_39
13
VDDA_1P0_TX0_1 129 30
GND_55 GND_14

105
GND_47
C3810
79
100nF GND_35
3 123
VDDA_1P0_TX0 VDDA_1P2_RX0_1 109 62
C3811 GND_49 GND_31
100nF
125 45
GND_53 GND_22
C3812
140 31
100nF GND_60 GND_15

155 24
GND_65 GND_12

163
GND_69

Pin 152,121,122within one group 17


GND_6
152
VDDA_1P8_TX1 172
GND_70
121 118 R3800 0 [17] VREG_L3A
VDDA_1P8_ANA2_1 VDDD_1P0_QLINK 23
GND_11
VDD_DIG_1P0
C3813
12
100nF GND_5
C3814
C3815 145
100nF GND_61
4700nF
19
GND_7
64
VDDD_1P0_1 48 151
GND_23 GND_63
11 82
VDDA_1P8_TX0 VDDD_1P0_2 28
GND_13
35 142 C3816
VDDA_1P8_ANA1 VDDD_1P0_3 51
B 100nF GND_25 B
C3817
20 76
100nF GND_8 GND_33
112 R3801[05,10,12,15,17,18,19,21,22,25,28,29,33,36,40,42,43,44,46]
0 VREG_L13A
VDDD_1P8
VDD_DIG_1P8
52
GND_26
VREG_L12A [17,46] 122 C3818
VDDA_1P8_ANA2_2 C3819 175
VDD_ANALOG_1P8 100nF GND_72
4700nF
69
VDDA_1P8_RX2 160
GND_67
C3820 50
C3821 VDDA_1P8_FBRX_1 147
4700nF GND_62
100nF
59
VDDA_1P8_FBRX_2 162
GND_68

153 78
GND_64 GND_34

93
GND_40

100 44
GND_45 GND_21

4
GND_2

174
GND_71

55 94
GND_27 GND_41

180 102
GND_73 GND_46

8
GND_3

A A

SDR660: PWR
Title
SDR660: PWR

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 38 of 46
5 4 3 2 1
5 4 3 2 1

D D

U3700E

SDR660

RF

C4055 2pF
C4056 2pF
22pF C9956 L4056 L4055 C9950
22pF C9957 L4001 141 46 22pF WTR_PRX_HB1_B41_38_40 [40] L6343 22pF C4008
[42] WTR_DRX_HB1_B41_38_40 DRX_HB1 PRX_HB1
2.7n 2.7n
C9965 33pF 1.4n L6341 L6344 1.4n 33pF C9970
0.6n 133 54
[42] WTR_DRX_HB2_B7 DRX_HB2 PRX_HB2 WTR_PRX_HB2_B7 [41]
0.6n
22pF C9962 L4013 2n 126 63 2n L6363 C10016 22pF
DRX_HB3 PRX_HB3
C9963 33pF L4016 1.8n L6364 33pF C10017
117 71 1.8n
[42] WTR_DRX_HB4_B1 DRX_HB4 PRX_HB4 WTR_PRX_HB4_B1 [41]

L6358 110 80 L6338 22pF C9960


C10010 22pF DRX_UHB PRX_UHB
2n L6339 2n 33pF C9961
C10011 33pF L6359
[42] WTR_DRX_MB1_B3 WTR_PRX_MB1_B3 [41]
1.8n 1.8n
L4022 22pF C9951
C4005 22pF L6340 171 16
DRX_MB1 PRX_MB1 2.2n
L4024 33pF C9971
C4006 33pF 2.2n L4023
L6342 164 25 WTR_PRX_MB2_B34 [41] L4026 C9952
22pF C9955 [42] WTR_DRX_MB2_B34 1.2n 22pF
DRX_MB2 PRX_MB2
1.2n
2.2n 1.5n 1.5n 2.2n
C9966 33pF L4025 156 32 L4028
[42] WTR_DRX_MB3_B2 DRX_MB3 PRX_MB3 WTR_PRX_MB3_B2 [41]
C L4029 1.8n C9954 22pF 33pF C9973 C
22pF C9953 L4027
148 38
1.8n DRX_MB4 PRX_MB4 0.8n
C9964 33pF L4030 WTR_PRX_MB4_B39 [41]
[42] WTR_DRX_MB4_B39 L4031 33pF C9972
0.8n

179 7 DNP C10036


DRX_LB1 PRX_LB1
C9959 3.3pF 170 15 L6373 C10037 C4042 3.3pF
DNP
DRX_LB2 PRX_LB2 WTR_PRX_LB1_B28a [41]
L4033 18n DNP L4038
C9967 33pF 33pF C4043
178 6
[42] WTR_DRX_LB2_B20_28 DRX_LB3 PRX_LB3 WTR_PRX_LB2_B20_28b [41]
18n
C10012 2.2pF 2.2pF C10014
169 14
L6360 DRX_LB4 PRX_LB4
33pF L6361 C9958 3pF
C9969 3pF C10013 33pF C10015
[42] WTR_DRX_LB4_B8 177 5 WTR_PRX_LB4_B8 [41]
15n 15n
DRX_LB5 PRX_LB5 L4035
C9968 33pF L4034 33pF C9974
WTR_PRX_LB5_B5 [41]
[42] WTR_DRX_LB5_B5 101 86 15n
15n DRX_LTEU_UHB PRX_LTEU_UHB

51
R8601 68 26 Tx_B7/B38/B40/B41_DA [40]
TX_FBRX_M TX_CH0_HB1

[40] WTR0_HDET 60
TX_FBRX_P
L4036 2.3n C6648 12pF 33
TX_CH0_MB1 Tx_B1/B2/B3/B4/B34/B39_DA [40]
C4041 33pF L4037
[46] WTR_GPS 161 10 GSM_HB_DA [40]
GNSS_IN TX_CH0_MB2
3n
18
TX_CH0_LMB

2 GSM_LB_DA [40]
TX_CH0_LB1

27 Tx_B5/B8/B20_DA [40]
TX_CH0_LB2

168
TX_CH1_UHB
B B

167
TX_CH1_HB

159
TX_CH1_MB

176
TX_CH1_LTEU

A A

SDR660: DA/PRX/DRX/FBRX
Title
SDR660: DA/PRX/DRX/FBRX

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 39 of 46
5 4 3 2 1
5 4 3 2 1

Low/High End,B41 Locates on TRX10/B34B39 Locates on TRX6


Discrete High End,B41 locates on TRX6/B34B39 locates on TRX10

TXM SKY77912 PIN30 IL IS BEST FOR


HB
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46]

DPDT C10038
C9986

100pF
C4140

100nF
C9985

2200nF
R4120
0

C9989
D VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] D
U4101 100pF
MXD8546C
2200nF
9 10 VREG_L16A [17,35,40,41,42] U6233
[10] GRFC_5 CTRL VDD
FI 168L1681G6-T C9981
1nF
2 4 33pF L6348 1 3 33pF L6347
RFOUT1 RFIN1 ANT1 [42] [40] ANT0 I/O1 I/O2
R8635
8 6 GND
RFOUT2 RFIN2 ANT0 [40]
L6351

2
0 L6349 R8603 100K
C10039 DNP
100pF 1
GND1
LPF DNP C9983
DNP
3
670~2690MHz

10
GND2

8
5
7 GND3

VIO

VCC

VRAMP
VBATT
GND4
R8634
0 22 36
ANT TRX1 SW_B41_38_TRX [41]

R8625 35
TRX2 SW_B40_TRX [41]
DNP 34
TRX3 SW_B34_39_TX[41]
R8638 U4102
33
TRX4 SW_B7_TRX [41]
DPDT_NA [42] 1
LB_SWOUT 32
R8620 20 TRX5 SW_B2_TRX [41]
[39] GSM_LB_DA 2
DNP TX_LB_IN
51 31
R8637 R8609 TRX6 SW_B34_39_PRX_B28b [41]
[39] GSM_HB_DA 3
TX_HB_IN 30
DNP TRX7 SW_B1_3_TRX [41]
R8610 4
HB_SWOUT 29
R8611 R8618 R8619 TRX8 SW_B20_TRX [41]
SKY77912-61
120 28
120 TRX9 SW_B8_TRX [41]
270 270 [10,40,43] RFFE2_CLK 5
SCLK 27
TRX10 SW_B5_TRX [41]
6

Input shuaijian need? [10,40,43] RFFE2_DATA SDATA

24
NC2 25
17 NC3 26
CPL NC4 37
NC5

GND11
GND12
GND13
GND14
GND15
GND16
GND18
GND19
GND20
GND21
GND23
GND38
GND39
C C
R8606 20

11
12
13
14
15
16
18
19
20
21
23
38
39
[39] WTR0_HDET

R8607

PRX
R8608

270 270

ANT 3dB Attenuation


J4101
J4100 1180110044

4
GND3 OUT IN
3 1 2 1 33pF L6365
GND2 S
GND1
GND2

2
GND1

RFR40-060A010 L6376
3
4

DNP

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43,46]

3/4G PA
C9993 C9996
100nF 100pF

VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46]
[43] VPA_APT_CH0

C9992
330pF C4121 C4122 C9995 C10000

B7_B38_B40_B41_TX
DRX J4102 [39] Tx_B7/B38/B40/B41_DA
C9998 C9994 33pF 100pF 100nF 2200nF

ANT
1180110044
12pF 12pF
L6353
B 2.4n B
ANT4100 R8602 OUT IN
0 C9976 33pF 2 1 33pF L6374
GND1
GND2

L6375
DNP PA_SW_B28a_TX[41]
B1_B2_B3_B34_B39_TX
3
4

C9975
R8615 20
C4116 [39] Tx_B1/B2/B3/B4/B34/B39_DA
DNP DNP
C4058 C4061
R8616
U4104

29

30
28
R8617

8
270 33pF U4001 DNP 33pF

VCC1

VCC2_1
VCC2_2
VIO

VBATT
270
19 C4057 33pF C4059 DNP 5 3
3 LB1 18 ANT RF1
RFIN_H LB2 PA_B5_26_TX[41] C4060 DNP
20 L4057 1
LB3 PA_B8_TX[41] C4065 RF2 PA_B20_TX[41]
[17,35,40,41,42] VREG_L16A
12 DNP 4
RFIN_M VDD
B5_8_TX 21
DNP
2 6
R8613 51 MB1 PA_B2_TX[41] C4062 GND V1 GRFC_4 [05,10]
[39] Tx_B5/B8/B20_DA 13 23 PA_B34_39_TX[41]
RFIN_L MB2 25
MB3 PA_B3_TX[41] C4063
26 PA_B1_TX[41] DNP
MB4
R8612 R8614
5 DNP
U4106 SDATA
ANT4101 0 120 120
R4108 0 R4109 6 33
10 1 SCLK HB1 PA_B41_38_TRX[41]
RFC RF1 35
HB2 PA_B40_TRX[41]
L6345 DNP 37 PA_B7_TX[41]
2 HB3
VREG_L16A [17,35,40,41,42] RF2
4 L4111
VDD DNP C10040 C10041

DRX ANT
9 L/M/H PA U4105
R4110 5 RF3
[10] GRFC_8 VCTL1 4 41 L6352 4.7n
DNP 6 8 9 NC4 HBRX1 42 C10018 12pF 5 3
[10] GRFC_9

GND
VCTL2 RF4 L6346 0.75pF DNP DNP NC3 HBRX2 RF-IN RF-OUT WTR_PRX_HB1_B41_38_40 [39]
10
11 NC2
3 GND1
7 GND2

[10,40,43] RFFE2_DATA NC1 C4131 6 2

GND14
GND15
GND16
GND17
GND22
GND24
GND27
GND31
GND32
GND34
GND36
GND38
GND39
GND40
GND43
[37,42] GRFC2_WTR ENABLE VCC VREG_L16A [17,35,40,41,42]

GND1
GND2
[10,40,43] RFFE2_CLK SKY77645-11
C4136 C4137 C4138 RF1694
DNP C4134 4 1
GNDRF GND
C4135

1
2
14
15
16
17
22
24
27
31
32
34
36
38
39
40
43
100pF 100pF 100pF
1nF
100pF BGU8H1
Close to PA
PA_THERM0 [15]
A A

R4011
100K C4039
t

DNP

Optimize Port Assignment base on PA APP notes !

Title
RF_ANT_TXM_PA

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 40 of 46

5 4 3 2 1
5 4 3 2 1

U6241
MB LNA
L6367
C10022 22pF 5 3 WTR_PRX_HB4_B1 [39]
RF-IN RF-OUT
6.2n
L4133
[37,42] GRFC0_WTR 6 2 VREG_L16A [17,35,40,41,42]
ENABLE VCC
DNP
4 1
GNDRF GND
C10020 C10021
100pF 1nF
BGU8M1

B20_28b DPX FL4110


D

U4100
MB LNA [40] SW_B20_TRX
C4129 15pF 6
ANT
TX
3 L4135 2.7n
PA_B20_TX[40]
D

C4130
L4100
C10019 22pF 5 3 WTR_PRX_MB1_B3 [39] 1
RF-IN RF-OUT L4134 GND RX WTR_PRX_LB2_B20_28b [39]
6.2n DNP

8
7
5
4
2
L4101 5.1n
6 2 SAYEY806MBA0F0A L4137
DNP [37,42] GRFC1_WTR VREG_L16A [17,35,40,41,42]

8
7
5
4
2
ENABLE VCC
DNP
4 1
GNDRF GND
C4103 C4104
100pF 1nF
BGU8M1

B1_3 QPX 4
5 B1_RX
B3_RX
FL4101
K6QZ2G140Q3ZA
B1_TX
B3_TX
1
2
C4106 22pF
PA_B1_TX[40]
B34_39 TX LPF FL4102
BF1608-L1R9NDB
R4100
L4105 C4109
3 6 [40] SW_B34_39_TX C4108 22pF 1 3 PA_B34_39_TX[40]
[40] SW_B1_3_TRX ANT GND L4106 IN/OUT1 IN/OUT2
2.7n
DNP 2 4
DNP GND1 GND2
22pF

C4107 L4107
DNP DNP C4112 22pF C4110 L4108 C4111
PA_B3_TX[40] DNP 0.5pF DNP

L4109 L4110
DNP DNP Put this L network close to PA

B40 TRX SAW


FL4100

C C4101 2.2pF 1 4 C4102 22pF C


[40] SW_B40_TRX IN OUT PA_B40_TRX[40]

GND

2
3
5
L4103 L4104

B2 DPX
L4102 2.4n 2.7n

2
3
5
DNP F6HH2G350EH71 C4105
0.5pF

FL4106

3 L4118 3.6n PA_B2_TX[40]


C4119 22pF 6
TX
Put this L network close to PA
[40] SW_B2_TRX ANT
1 L4119
RX WTR_PRX_MB3_B2 [39] C4117
GND DNP
DNP
8
7
5
4
2
L4123
C4120 3.6n L4124

B41_TRX SAW
8
7
5
4
2

DNP SAYEY1G88BA0B0A
DNP

FL4107

[40] SW_B41_38_TRX C4124 22pF 4 1 C4125 22pF


OUT IN PA_B41_38_TRX[40]

GND

5
3
2
L4138 L4128 SFDG26AA402 L4129 L4139

5
3
2
B5 DPX FL4103 DNP
DNP DNP
DNP

TX
3 R4102 2.7n
PA_B5_26_TX[40] Put this L network close to PA
R4103 15pF 6
[40] SW_B5_TRX ANT L4113 C4114
1
GND RX WTR_PRX_LB5_B5 [39] 22n
L4114 DNP
8
7
5
4
2

5.1n L4117
8
7
5
4
2

SAYEY836MBA0F0A

B
DNP

B34_39 PRX FL4105


WTR_PRX_MB4_B39 [39]

B
9
C10031 22pF C4118 22pF 1 LCH
[40] SW_B34_39_PRX_B28b L/H 6
HCH
GND

10
2
3
4
5
7
8
C10035 L4122
L4121

2
3
4
5
7
8
10
DNP DNP SAWFD1G90KE0F0A

B7 DPX
DNP

FL4104 跳线 WTR_PRX_MB2_B34 [39]


R4101
3
TX PA_B7_TX[40]
R4104 0 1.0n
6
[40] SW_B7_TRX ANT L4112
DNP
1 C4113
GND RX WTR_PRX_HB2_B7 [39]
DNP
8
7
5
4
2

L4115 L4116
8
7
5
4
2

C4115 DNP SAYEY2G53BC0F0A DNP


DNP

FL6243

B28a DPX DNP


DNP
L6371 DNP
C10034 3
TX PA_SW_B28a_TX[40]
6
ANT
C10030
1 WTR_PRX_LB1_B28a [39]
DNP L6369 GND RX

8
7
5
4
2
DNP
L1518 L1519

B8 DPX
DNP
FL4108

8
7
5
4
2
DNP

DNP
3 C4123 5.6n
TX PA_B8_TX[40]
R4105
6
[40] SW_B8_TRX ANT L4126
0.6n L4127
1 WTR_PRX_LB4_B8 [39]
GND RX
L4131 39n
8
7
5
4
2

A
2.2pF A
6.2n L4132
8
7
5
4
2

SAYEY897MBG0F0A
DNP

Title
RF_Primary_TRX

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 41 of 46
5 4 3 2 1
5 4 3 2 1

FL4306 SAWFD1G90KE0F0A
C4310

B34_39 DRX DIP SAW


9 WTR_DRX_MB4_B39 [39]
1 LCH
L/H 6
HCH WTR_DRX_MB2_B34 [39]

33pF GND

10
2
3
4
5
7
8
L4308 L4309
L4307 DNP DNP

2
3
4
5
7
8
10
DNP

FL4307 SFHG60CA002

D
C4327

1.2n
1
IN

GND
OUT
4 WTR_DRX_MB3_B2 [39]
B2 DRX SAW D

2
3
5
C4328 C4329
DNP DNP

2
3
5
B41_DRX_SAW FL4302 SFHG96AA402 HB LNA
C6646
C4306 U4330
22pF 1 4 U4304
IN OUT
L4306 4.7n
3 5 C10026 22pF 5 3
22pF RF1 ANT RF-IN RF-OUT WTR_DRX_HB1_B41_38_40 [39]
C4307 GND

2
3
5
L4305 1
RF2 6 2
DNP [37,40] GRFC2_WTR VREG_L16A [17,35,40,41,42]

2
3
5
DNP 4 ENABLE VCC
VDD
C4313
6 2 4 1
[37] GRFC7_WTR V1 GND GNDRF GND
VREG_L16A [17,35,40,41,42] C4314
100pF 1nF
C4333 MXD8621C BGU8H1
FL4305 C4334 22pF C4332
C4324 100pF
1.2n
1 4 100pF
IN OUT

GND

2 2

5 3
5
[40] DPDT_NA SAFFB2G35AA0F0A

3
B40 DRX SAW C4325
DNP
C4326
DNP

R8639
C4361
DNP
DNP U4302
C C
C4360 33pF
[40] ANT1 9 15
ANT RF1
14
RF2
[10] RFFE6_DATA 19 13
20 SDATA RF3 FL4301
[10] RFFE6_CLK SCLK 12
RF4

B7_DRX_SAW
C4304 1.8n
[17,35,40,41,42] VREG_L16A 17 11 1 4 WTR_DRX_HB2_B7 [39]
VDD RF5 IN OUT
18 6
VIO RF6
C4315 GND
5 C10027

2 2
3
5 5
RF7 C4305
7 DNP
DNP

3
100nF 8 GND1 4 SAFFB2G65AB0F0A
10 GND2 RF8
16 GND3 3
21 GND4 RF9
GND5 2
1 RF10
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,43,44,46] NC
C4317 FL4303
C4312 27pF

33nF
MXD86A0S
1
IN

GND
OUT
4

L4311
WTR_DRX_LB5_B5 [39]
B5 DRX SAW

2 2
3
5 5
C4319 SAFFB881MAN0F0A DNP

3
DNP

C4322 FL4304

B
27pF
1
IN OUT
4 WTR_DRX_LB4_B8 [39]
B8 DRX SAW B
GND

2 2
3
5 5
L4312
C4323 SAFFB942MAN0F0A

3
DNP
DNP

FL4308

B20_28 DRX SAW


C4330 47pF 1 4
IN OUT WTR_DRX_LB2_B20_28 [39]

L4313 GND L4314

2 2
3
5 5
DNP SAFFB806MAA0F0A DNP

3
MB LNA
FL4300 U6237
L6357 7.5n
9 C10024 22pF 5 3
C10006 22pF LCH RF-IN RF-OUT WTR_DRX_MB1_B3 [39]
1
L/H 6
HCH
6 2
GND [37,41] GRFC1_WTR ENABLE VCC VREG_L16A [17,35,40,41,42]
L4301
10
2
3
4
5
7
8

C10023 4 1
2
3
4
5
7
8
10

SAWFD1G84AA0F0A GNDRF GND


4.3n C10008
L4302 L4303 1nF
100pF BGU8M1
15n 15n

A
B1_3_DRX_DIP_SAW A

MB LNA
U4200
L4200
C10025 22pF 5 3
RF-IN RF-OUT WTR_DRX_HB4_B1 [39]
9.1n

[37,41] GRFC0_WTR 6 2
ENABLE VCC VREG_L16A [17,35,40,41,42]

C4203 4 1
GNDRF GND 1nF
C4202
BGU8M1 Title
100pF RF_DRX

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 42 of 46

5 4 3 2 1
5 4 3 2 1

QET4101 CH0

D D

IF DO NOT NEED TO SUPPORT B39+B41 UPLINK CA, QET4101 CAN BE SAVED

U4300

QET4101

QFE4101

VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,46] 1 10
VDD_BATT DNC1

9
DNC2
C4300

1uF

4700nF
C4301

L4300
1uH
11 [40] VPA_APT_CH0
VSW

C 5 C
VOUT_LDO

12
VBAT_SW

C4302
10uF

8
GND_SW

VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,44,46] 4
VDD_1P8

C4303

1uF
6
USID

RFFE2_DATA [10,40] 2
SDATA
RFFE2_CLK [10,40] 3
SCLK

7
GND

B B

A A

QFE4101
Title
QFE4101

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 43 of 46
5 4 3 2 1
5 4 3 2 1

U4400B
U4400A TP4400 TP4401
WCN3990
WCN3990

TP4402 TP4403
WCN3990
WCN3990
IO
CONTROL
[09] WLAN_BT_COEX_CLK
[09] WLAN_CH0_CMD_CLK 88
53 COEX_CLK
R4400 WL_CMD_CLK_CH0
[09] WLAN_BT_COEX_DATA
[09] WLAN_CH0_CMD_DATA 75
2 68 COEX_DATA U4400C
BT_RFIO_CH2 WL_CMD_DATA_CH0
[10] MSS_LTE_COXM_TXD
D [09] WLAN_CH1_CMD_CLK 89 SDM GPIO144 WCN3990 D
51 110 COEX_RXD
WL_CMD_CLK_CH1
[10] MSS_LTE_COXM_RXD
[09] WLAN_CH1_CMD_DATA 78 82 SDM GPIO145
[45] WL_RF_PDET_IN_CH0 55 95 GPIO_A COEX_TXD
WL_RF_PDET_IN_CH0 WL_CMD_DATA_CH1 WCN3990
54
[45] WL_BT_RFIO_2G_CH0 15 GPIO_B
WL_BT_RFIO_2G_CH0 PWR_GND
[09] WLAN_CH0_Q_P 44
[45] WL_RF_PDET_IN_CH1 64 77 SENS_CTS
WL_RF_PDET_IN_CH1 WL_BB_QP_CH0 SDM GPIO46 116
QUP_UART_RFR_N_6 [10] GND_SEALRING1
[09] WLAN_CH0_Q_M 104 38
[45] WL_BT_RFIO_2G_CH1 73 62 CTS SENS_RTS
WL_BT_RFIO_2G_CH1 WL_BB_QN_CH0 109
QUP_UART_CTS_N_6 [10] SDM GPIO45 [10] SSC_UART1_TX 1.1V GND_SEALRING2
[09] WLAN_CH0_I_M 111 45 SDM SSC_12
63 RTS SENS_RXD
WL_BB_IN_CH0 80 37
QUP_UART_TX_6 [10] SDM GPIO47 [10] SSC_UART1_RX VDD11D_PM GND_SEALRING3
[09] WLAN_CH0_I_P 96 39 SDM SSC_13
[10] LPI_QCA_SB_CLK 74 70 RXD SENS_TXD
SB_CLK WL_BB_IP_CH0 4
QUP_UART_RX_6 [10] SDM GPIO48 GND_SEALRING4
[09] WLAN_CH1_Q_M 103 C4400
[10] LPI_QCA_SB_DATA 102 105 TXD
SB_DATA WL_BB_QN_CH1 2.2uF 112
GND_SEALRING5
[09] WLAN_CH1_I_M 3
106 WL_BT_FEM_0
WL_BB_IN_CH1 99
[15,19] WLAN_SW_CTRL GND_ESD_1
[09] WLAN_CH1_Q_P 51 20 [45] LNA_EN_5G_CH0
59 113 SW_CTRL WL_BT_FEM_1
[05,15,46] SLEEP_CLK LF_CLK_IN WL_BB_QP_CH1 VDD13_WL_SYNTH_CH1 [12,17,44] 90 41
VDD13_WL_SYNTH_CH1 GND_ESD_0
[09] WLAN_CH1_I_P 5
114 WL_BT_FEM_2
WL_BB_IP_CH1 VDD13_WL_CH1 [12,17,44] 84
VDD13_WL_CH1
[45] WL_RFO_5G_CH0 13
50 43 WL_BT_FEM_3
[45] WL_RFI_5G_CH0 WL_RFI_5G_CH0 WL_RFO_5G_CH0 VDD13_PM [12,17,44] 66 115
VDD13_PM GND_WL_5G_RXFE_CH1
[45] WL_RFO_5G_CH1 32 48
108 101 WP_IF WL_BT_FEM_4
[45] WL_RFI_5G_CH1 WL_RFI_5G_CH1 WL_RFO_5G_CH1 VDD13_WL_SYNTH_CH0 [12,17,44] 33 107
Note: If WIPOWER is not used, connect VDD13_WL_SYNTH_CH0 GND_WL_5G_DRV_CH1
PIN32 to ground with 51k Ohm resistor 34 [45] PA_EN_5G_CH0
C4401 WL_BT_FEM_5 VDD13_WL_CH0 [12,17,44] 27 100
R4401 VDD13_WL_CH0 GND_WL_5G_PA_CH1
71
52 81 WLAN_5G_CLK_OUT [09] WL_BT_FEM_6
C4402 XTALO CLK_OUT R4402 VDD13_BT_SYNTH [12,17,44] 12 79
51K VDD13_BT_SYNTH GND_WL_2G_DRV_CH1
46 [45] LNA_EN_5G_CH1
[15] WCN_CLK 60 22 33 WL_BT_FEM_7
XTALI FM_RX_HEADSET 22pF VDD13_BT_FM_BBPLL [12,17,44] 18 98
VDD13_BT_FM_BBPLL GND_WL_BB_CH1
97 [45] PA_EN_5G_CH1
100pF WL_BT_FEM_8 VDD13_BT [12,17,44] 11 93
C4403 VDD13_BT_BB GND_WL_BALUN_CH1
56pF
VDD13_FM [12,17,44] 8 85
VDD13_FM GND_WL_2G_PA_CH1

VDD13_BT_CH2 [12,17,44] 1 83
VDD13_BT_CH2 GND_WL_SYNTH_CH1
R4403
L4400
69
FM_ANT [35] GND_WL_BB_CH0
C 68n C
57
0 GND_WL_5G_RXFE_CH0

C4406 49
GND_WL_5G_DRV_CH0

DNP 94
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] 47
VDD18_IO GND_WL_SYNTH_CH0

VREG_L9A [17,44] 40 42
VDD18_XTAL GND_WL_5G_PA_CH0

VREG_L9A [17,44] 91 36
1.3V RFA VDD18_VCO_CH1 GND_WL_BALUN_CH0

28
VREG_L6A [12,17] [12,17,44] VDD13_WL_CH0 GND_WL_2G_PA_CH0
Pin 27 21
GND_WL_BT_DRV_CH0

7
C4408 GND_WL_BT_RXFE_CH0
[12,17,44] VDD13_WL_CH1
10nF
67
Pin 84 GND_DIG

C4409 76
GND_ISO
10nF
87
GND_IO
[12,17,44] VDD13_WL_SYNTH_CH0
VREG_L19A [17,44] 35 31
Pin VDD33_WL_5G_DRV_CH0 GND_PM
33
3.3V CH1 VREG_L19A [17,44] 30
VDD33_PM_DLDO GND_XTAL
61
VDD33_WL_CH1 C4410
[20,44] VREG_L8B
VREG_L8B [20,44] 100pF VREG_L19A [17,44] 29 58
Pin 86 VDD33_WL_CH0 GND_ISO_WL

VREG_L19A [17,44] 6 14
VDD33_WL_BT_DRV_CH0 GND_DPD_CH0
C4412 C4413
[12,17,44] VDD13_WL_SYNTH_CH1
4700nF 10nF
1.8V IO VDD18_IO
Pin 90
VREG_L8B [20,44] 92 26
VDD33_WL_5GPA_DRV_CH1 VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46]
[05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44,46] VREG_L13A VDD33_WL_DRV_CH1 GND_BT_SYNTH
Pin 94 C4414
[20,44] VREG_L8B
Pin 92 100pF VREG_L8B [20,44] 86 19
VDD33_WL_CH1 GND_BT_BB
C6691 C4417
VREG_L19A [17,44] 9 10
4700nF 470nF [12,17,44] VDD13_BT_SYNTH VDD33_BT_PA_CH2 GND_BT_CH2
C4415
10nF Pin 12 24
GND_BT_FM_BBPLL_A
B B
VREG_L19A [17,44] 23 25
C4418 VDD33_FEM GND_BT_FM_BBPLL_B
10nF
3.3V CH0 VDD33_WL_CH0 1.8V XO GND_WL_2G_RXFE_CH1
65
[17,44] VREG_L19A VDD18_XTAL
VREG_L19A [17,44]
Pin 29 VREG_L9A [17,44] [17,44] VREG_L9A
Pin 40
[12,17,44] VDD13_PM 16
C4420 C4421 GND_FM_RXFE
C6692 C4422 Pin 66
4700nF 10nF 17
2200nF 470nF GND_FM_VCO
C4424 C4425
VDD33_WL_5GPA_DRV_CH0 72
0.22uF 10nF GND_WL_PDET_FE
[17,44] VREG_L19A
Pin 35 56
GND_WL_PDET_BE
[12,17,44] VDD13_FM
VDD18_VCO_CH1 Pin 8
C4426 [17,44] VREG_L9A
10nF
Pin 91
C4428
C4427 10nF
VDD33_WL_BT_DRV_CH0 470nF
[17,44] VREG_L19A Pin 6

[12,17,44] VDD13_BT_FM_BBPLL
C4429
10nF

[12,17,44] VDD13_BT
C4430
10nF
VDD33_BT_PA_CH2 Pin 11, 18
[17,44] VREG_L19A Pin 9

[12,17,44] VDD13_BT_CH2
Pin 1
[17,44] VREG_L19A VDD33_PM_DLDO
A C5331 IS ONLY TO BE STUFFED IF USING DEDICATED CHAIN 2 BT A

C4432
DNP

WCN3990
[17,44] VREG_L19A VDD33_FEM

C4433
10nF Pin 23, 30

Title
WCN3990

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 44 of 46
5 4 3 2 1
5 4 3 2 1

R4500
J4507
1180110044

R4501
Chain 1
ANT4500 OUT IN U6230
J4508
2 1 WL_5G_CH0 [45] 1180110044
1 4

GND1
GND2
0 GND HIGH_BAND WL_5G_CH1 [45]
0 R8654
R6483 C6583 OUT IN
ANT4708
C4500
DNP
C6708
DNP
L4500
0.2pF
L5001 0.2pF 3mm to U6252 Edge 2 1 2
COM LOW_BAND
3 2G_AS_CH1 [45]

3
4

GND1
GND2
0 0

Chain 0
0 DPX105950DT-6112A2
L6237 C10072 C10073
C6581
DNP DNP DNP

3
4
0.5pF
D D

R6552
ANT4825
ANT4904

2.4G_CH1_CPLD
U6231

FL4500 RFDIP1608060TM7T62 1 4
TERMINATE OUTPUT 2G_AS_CH1 [45]
R4503 C4502
ANT4501
5 3 R4512
COM 1.57GHz GNSS_IN_1.5G [46] 51 2 3
COUPLING INPUT 2G_AS_CH1_IN [45]
0 0
R6577
L4501 2 [45] 2.4G_PDET_CH1
C4504 GND1 TFCPL0605030LAT
DNP 4 1 2G_AS_CH0 [45]
0.5pF 6 GND2 2.4/5GHz
GND3
0
C6709 L6251
DNP 0.2pF

R6485 FL6002 R6643


ANT4710
C4535 C4536
[45] 2G_AS_CH1_IN 4 1
ANT TRX WL_BT_RFIO_2G_CH1 [44]
2.2n 2.2n
0
GND L6330 33pF
L4506 R4517 L4508

5
3 3
2 2
SAFEA2G45MB0F0A DNP

5
DNP DNP DNP

C C

2.4G_CH0_CPLD
U5080

1 4 2G_AS_CH0 [45]
TERMINATE OUTPUT
R6629 R6639
51 2 3 2G_AS_CH0_IN [45]
COUPLING INPUT [45] 2.4G_PDET_CH1
R6637 R6642
[45] 2.4G_PDET_CH0 22
TFCPL0605030LAT DNP DNP

R4518

[45] 5G_PDET_CH1 WL_RF_PDET_IN_CH1 [44]


FL6001 C4518
C4540 R6640
1.2n C6020 C6021 C9932 22
[45] 2G_AS_CH0_IN 4 1
ANT TRX WL_BT_RFIO_2G_CH0 [44] DNP DNP
2.2n 2.2n

GND L4502 33pF


C6022 L6003 L5006
5 5
3 3
2 2

SAFEA2G45MB0F0A DNP
DNP DNP DNP 6.8pF C4531 6.8pF R6622
WL_RFO_5G_CH1 [44]
[44] LNA_EN_5G_CH1
C6922
WLAN_5G_CH1_SPDT
C4527 U4703 C4534
DNP DNP
DNP
6 1
V1 RF1

C4728
R6558 5 2
[45] WL_5G_CH1_TRX ANT GND
0
[45] 2.4G_PDET_CH0 6.8pF R4514 6.8pF R6620
[44] PA_EN_5G_CH1 4 3 WL_RFI_5G_CH1 [44]
R6549 R6631 V2 RF2
22
C4727 C4730
DNP DNP MXD8721E
B DNP DNP B
C4508 C10071 C4528
DNP DNP DNP
WLAN_5G_CH1_CPLD
R4509
U5067
[45] 5G_PDET_CH0 WL_RF_PDET_IN_CH0 [44]
C4522 R6561 1 4 WL_5G_CH1 [45]
22 TERMINATE OUTPUT
DNP DNP R8583
51 2 3 WL_5G_CH1_TRX [45]
COUPLING INPUT

TFCPL0605030LAT

[45] 5G_PDET_CH1

5G_CH0_CPLD
U5081

1 4 WL_5G_CH0 [45]
TERMINATE OUTPUT
R6630
51 2 3 WL_5G_CH0_TRX [45]
COUPLING INPUT

[45] 5G_PDET_CH0
TFCPL0605030LAT
6.8pF C4510 6.8pF R4507
WL_RFO_5G_CH0 [44]
[44] LNA_EN_5G_CH0

WLAN_5G_CH0_SPDT C4506

C4507 U4702 C4512


DNP DNP
DNP
6 1
V1 RF1

C4515
5 2
[45] WL_5G_CH0_TRX ANT GND
0
6.8pF C9935 6.8pF C10028
[44] PA_EN_5G_CH0 4 3 WL_RFI_5G_CH0 [44]
V2 RF2
A C4516 C4514 A
DNP DNP MXD8721E
C4513 C4505 C9937
DNP DNP DNP

Title
WLAN_FEM

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 45 of 46
5 4 3 2 1
5 4 3 2 1

1.2G GNSS ANT


R8585 U6242
ANT4905 R8581 0
VPH_PWR [15,16,17,18,19,20,21,22,25,28,40,43]
GNSS_IN_1.2G [46] 4 1
VIN VOUT GPS_1P8 [46]
0
2
C10042 5 GND 3
C9938 L6313 GPS_LDO1P8_EN [10]
SGND EN
DNP DNP
1uF
RT9078-18GQZ C10043

D 1uF D

R8586
ANT4906

TP4426 TP4427

C9920 PRRSTX[46]
PRTRG [46] Y1501
R8653 DNP
VREG_L14A [10,17,32] 1 4 [46] VTCXO
VDD_1P35 [46] 100nF R8652 0 GND1 VCC
VREG_L13A [05,10,12,15,17,18,19,21,22,25,28,29,33,36,38,40,42,43,44] C9923 100pF
R8577 100pF 2 3 TCXO_IN [46]
SLEEP_CLK [05,15,44] GND2 OUT

KT2016K26000ZAW18TAS C9922
C10068
L6305 C9921C9910 DNP
100nF
[46] GPS_RF
4.7n
100nF1uF U5032

41

40

39

38

37

36

35

34

33

32

31
R8645 0 HD8040
[10] GPS_RST PRRSTX[46] L6306

VOUT_RF_1P1

VDD_RF_1P35

VOUT_BAK_0P9

VDD_BAK_3P3
GND

PRTRG

PRGPIO

RXO
PRRSTX

RXI

USBDN
C9914
R8646 0 4.7n
[10] GPS_PRTRG PRTRG [46] 2pF

C
R8647 0 C
[10] UART3_RXD GPS_UART_TXD [46]
R8648 0 1 30
[10] UART3_TXD GPS_UART_RXD [46] RF_IN USBDP
2 29
VOUT_ANT VDD_USB_3P3
GPS_1P8 [46] 3 28
VDD_RF_3P3 XO
4 27 TCXO_IN [46]
C10066 C10067 GPIO0 XI
DNP DNP [46] VTCXO
5 26
GPIO1 VOUT_TCXO
GPS_1P8 [46] 6 25 [46] VDD_1P1
VDD_MAIN_3P3 VDD_MAIN_1P1
7 24
GPIO2 GPIO15
TP4424
8 23
GPIO3 GPIO14
C9913 C9912
9 22
GPIO4 GPIO13

VOUT_MAIN_1P1
100nF 100nF TP4425

DD_MAIN_1P35
10 21 [46] GPS_1P8
GPIO5 VDD_DCDC_3P3

LX_DCDC
GPIO10

GPIO11

GPIO12
GPIO6

GPIO7

GPIO8

GPIO9
C9919 C9918

HD8040
100nF
10uF

11

12

13

14

15

16

17

18

19

20
L6307
2.2uH

[46] VDD_1P35
[46] GPS_UART_RXD
[46] VDD_1P1
[46] GPS_UART_TXD

C9917 C10065
C9916
1uF 4700nF 100nF

B B

LNA,Place near GPS ANT


共焊盘
C10061 WTR_GPS [39]
FL5002 DNP R8590
SAFFB1G56KB0F0A U4600
DNP
C9925 100pF L6310 100pF 100pF
1 4 3 6 C10057 C10059
[45] GNSS_IN_1.5G IN OUT RF-IN RF-OUT
10n
GPS_1P8 [46]
GND 0 R8578 5 4 R4601 0
ENABLE VCC
2 2

5 3
5

R8591 R8592 U6243


3

C4604
1
GND1 GND2
2
DNP 共焊盘
[10,46] GPS_LNA_EN
C4605 C10069 100pF 9 GPS L5 1
DNP ANT GPS_RF [46]
MXDLN16G GNS
100pF C10070 100pF 6
VREG_L12A [17,38] GPS L1
[37] GNSS_ELNA_CTRL 共焊盘 100nF
GND

10
8
7
5
4
3
2
C10074
C10075

10
8
7
5
4
3
2
DNP MXDFD14A1
DNP

U5031 U5035
C9924 100pF L6311 100pF 100pF
1 4 5 3 C10058 C10060
[46] GNSS_IN_1.2G IN OUT RF-IN RF-OUT
10n
A A
GPS_1P8 [46]
GND 0 R8579 6 2 R8580 0
ENABLE VDD
2 2
3
5 5

SAFFB1G18AA0F0A C10062
3

DNP 4 1
GNDRF GND
[10,46] GPS_LNA_EN C9929
100pF MXDLN14TP C9928
100nF

GPS
Title
GPS

Size Document Number Rev


D <Doc>
<RevCode>
Date: Friday, January 04, 2019 Sheet 46 of 46

5 4 3 2 1

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