Professional Documents
Culture Documents
2nd Year 1st Sem2
2nd Year 1st Sem2
COMPUTER ORGANISATION
memory. 10+10
2. a) Design an ALU with three control lines CO, C1 and C2 and
one carry input line and two 8-bit binary inputs A and B
[ TURN OVER ]
( 2 ) ( 5 )
to perform the following operations (show the first three i) Calculate the no. of bits in each of the TAG, SET and
stages only) WORD fields of the main memory address format.
C2 C1 Co Operations ii) Assume that the cache is initially empty. Suppose that
the CPU fetches 4352 words from locations 0,1,2,...4351
O O O A AND B
in order. It then repeats this fetch sequence nine more
O O 1 A OR B
times.
O 1 O A XOR B
If the cache is 10 times faster than the main memory,
O 1 1 Complement A
estimate the improvement factor resulting from the use
1 O O A - 1
of the cache (assume that LRU algorithm is used for
1 O 1 A + 1
block replacement).
1 1 O A – B
1 1 1 A + B
b) Write program to evaluate the statement
————×————
.
(A )
+ B ∗ A
A=
A ∗ B
using i) 3- address instruction
ii) 2-address instruction
iii) 1- address instruction
iv) 0-address instruction
3. a) Consider the following page reference sequence in a
virtual memory system.
1, 2, 3, 4 ,1, 5 , 2, 3, 6, 5 ,4 ,1 6, 2, 5, 4
Find the optimal proposal from the followings :
i) Change from FIFO to LRU
ii) Increase the main memory capacity from 4 to 8
( 4 ) ( 3 )
mantissa. The scale factor of the base is 4 and the iii) Both or any thing else.
exponents are represented in excess-64 format. b) Write short notes on ( any two).
Find the value of A + B where i) Virtual memory
A= 12.35 and B = 5 1 ii) Carry Save addition
3
i) Represent A and B both in the above format and iii) Nano programming
iv) Rounding Techniques
also the result A + B
4. A control unit has two inputs X, Y and eight states. The
ii) Find A - B also in the above format, normalise and
control state diagram is as follows.
rounded.
iii) What is the error introduced due to floating point
representation.
b) Consider the following reservation table :
1 2 3 4 5 6
S1
* *
S2 * a) Design the control using eight D flipflops
*
S3 * b) Design the address sequencing part of microprogram.
S4 5. a) Draw the combinational circuit for paper pencil method
*
S5 of multiplication for two signed numbers -25 and + 18
*
* vector.
i) Find the collision
ii) Draw the state transition diagram. Find also the total deley of multiplication.
iii) List all simple cycles and greedy cycles b) Describe non-restoring type binary division algorithm
iv) Determine the optimal constant latency cycle and the and the corresponding sequential circuit for
minimal average latency. 10+10 implementing it. Next verify step by step with the
7. A computer has 1 Mbyte main memory and 4K bytes of example of 19 divided by 5. 10+10
cache organised in the block-set associative manner 6. a) Consider a 20-bit floating point number in a format
with 4 pages per set and 64 bytes per page. with 7-bit exponent and a 12-bit normalised fractional
[ TURN OVER ]
( 6 ) Ex/CSE/T/21C/15/2008
7. a) Consider a 20-bit floating-point number in a format with INTER COMPUTER SC. & ENGG. EXAMINATION, 2008
7-bit exponent and 12-bit normalised fractional mantissa. (1st Semester)
The base of the scale factor is 4 and the exponent is
COMPUTER ORGANIZATION
represented in excess – 64 format.
Find the values of (A + B) and (A – B) where Time : Three hours Full Marks : 100
A = 0 1000010 11111111 0 0 11
Answer any five questions.
and B = 0 0 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 11
1. Consider the five stage pipelined processor specified by the
which are expressed in above format. Give the answers
following reservation table :
in normalised form. You are advised to use rounding
method for truncation. 1 2 3 4 5 6
S3
S4
—————×—————
S5
[ TURN OVER ]
( 2 ) ( 5 )
d) Identify the greedy cycles among the simple cycles. Design a hardwired controller using D flop flops and also
e) What is minimum average latency ? microprogram controller that will implement the above
algorithm. 10+10=20
f) What is minimum allowed constant cycle in using this
pipeline.
6. a) Design an ALU with three control lines C0, C1 and C2
g) What will be the maximum throughput of this pipeline ?
and one carry input line, two 8-bit binary input A and B
h) Is the MAL obtained in (e) is the lower bound ? If not are to perform the following operations (Show the first
how do modify the reservation table to achieve lowest three stages and the last stage of ALU only):
MAL ? 20
C2 C1 C0 Operations
1 1 1 Complement A
3. a) Draw the CSA organisation to add 8 signed numbers of
5 bit each have CLA at the last stage. b) Write program to evaluate the statement
X = (A+ B * C) / D * E – H
Count the minimum no. of full adder and CLC required
for the circuit. Using :
(i) 3-address instruction (ii) 2-address instruction
Calculate the minimum gate delay in the addition
(iii) 1-address instruction (iv) 0-address instruction.
process.
12+8=20
[ TURN OVER ]
( 4 ) ( 3 )
I6 C3 C4 C8
b) In a certain computer system with cache memory
I7 C1 C2 C9
750 µsec is the main memory access time for cache
miss and 50 µsec is the access time for a cache hit.
(i) Propose an optimal hybrid micro instruction format
Find the percentage decrease in the effective access
with minimal no. of bits.
time if the hit ratio is increased from 80% to 90%.
(ii) Propose nanoprogram for the above. 10+10
15+5=20
4. a) Main memory size is 64 k bytes.
5. Consider the following algorithm :
Cache memory size is 1 k byte
Declare registers A(8), B(8), C(8) :
Start : B ← data Block size is 64 bytes
A ← 00 Block-set-associative mapping with 4-blocks per set is
Loop : A ← A + B used.
B ← B – I
(i) How many bits are there in each of TAG, SET and
If B ≠ 0 then goto Loop.
OFFSET fields?
C ←A
Halt : Goto Halt (ii) Find successfull hit ratio for the following program
structure where LRU replacement is used.
[ TURN OVER ]
Ex/CSE/T/213/14/09
COMPUTER ORGANISATION
e) What is MAL ?
[ TURN OVER ]
( 2 ) ( 5 )
f) What is the minimum allowed constant cycle ? Following three organizations are proposed
X, Y and Z are three arguments, C1 is the carry–in from 7. a) Describe Booth’s bit pair algorithm for binary
the preceeding stage, C2, is the carry–in from prion to multiplication and illustrate the algorithm with the example
proceeding stage. The output S designates the sum, Co1 of multiplication of – 25 and + 39.
is the carry–out for the succeeding stage and Co2 is the
carry–out for next - to the succeeding stage. Derive the b) Describe the nonrestoring type binary division algorithm
minimized boolean functions for each of the three and the corresponding sequential circuit for
outputs S, Co1 and Co2. Also show the corresponding implementing it. Next verify your circuit with the example
truth table. of 18 divided by 5. 10+10
Which of the page replacement policies FIFO, LRU and 3. Consider the following algorithm :
LIFO is most suitable with cache memory capacity 4
Declare registers A (8), B (8), C (8)
paper ?
Start : B ← data
b) Design an ALU with three control lines Co, C1 and C2
and one carry input line and two 8-bit binary inputs A A ← 00
and B to perform the following operations. (Show the Loop : A ← A + B
first three stages only)
B← B – 1
C2 C1 C o Operations
if B ≠ 0 then goto Loop
0 0 0 A +B
C← A
0 0 1 A– B
Halt : Goto Halt
0 1 0 A +1
Design a hard wired controller using D flip flops and also
0 1 1 A –1 microprogram controller that will implement the above
1 0 0 A AND B algorithm. 10+10
6. a) What are the advantages of using normalized mantissa b) How associative memory differ from conventional
and biased exponents in the floating point memory ? Explain the organisation of associative
representation of a binary number ? What are the IEEE memory with a neat diagram and describe the match
standards for floating point representations ? logic used in such memory. 10+10
Represent + 1.25 in single precision format.
5. a) The page reference pattern of a program is as follows :
b) 16 K byte of main memory in implemented using 8 nos
of 2 K byte module used in interleaved fashion. 1, 2, 3, 4, 1, 5, 2, 3, 6, 5, 4, 1, 6, 2, 5, 4
[ TURN OVER ]
(4) EX\MTCT\208\179\07
(b) Can you think of a situation where it would be advantageous M. TECH (COMP. TECH) EXAMINATION 2007
to define a virtual memory that is smaller than available (2nd Semester)
physical memory? 15+5
COMPUTER ORGANISATION
7. (a) For the following expression to evaluate on a stack Time : Three hours Full Marks : 100
organised m/c write the m/c language program.
Answer any five questions.
A * B + A * { B * D + (C * /(A * F ))}
(b) The memory stack in a 16 bit computer contains 5A14H. 1. Consider the five stage pipelined processor specified by the
following reservation table. 20
The stack pointer contains 3A56H. A two word call
subroutine instruction is located at memory address 013EH
1 2 3 4 5 6
followed by the branch address of 67AEH at memory
address 013FH. What are the contents of PC, SP and the S1 X X
memory stack? S2 X X
(i) Before the CALL instruction is executed.
(ii) After the CALL instruction is executed. S3 X
(iii) After the RETURN from subroutine.
S4 X
(iv) After the second RETURN from subroutine just following
the previous one. 8+12 S5 X X
2. (a) Design a combinational circuit for a BCD adder showing 5. (a) Design an ALU with three control lines C0, C1 and C2 and
properly the carry-in and carry-out terminals. 10 one carry input line and two 4 bit binary inputs A and B to
perform the following operations.
(b) Explain Booth’s Algorithm for multiplication of signed binary
C2 C1 C0 Operations
numbers with the help of an example.
A = 0100110 0 0 0 A+B
0 0 1 A-B
B = 1011011
0 1 0 A+1
Also explain bit-pair speed-up technique applicable to 0 1 1 A-1
Booth’s algorithm. 10 1 0 0 A AND B
1 0 1 A OR B
3. (a) A control unit has two inputs x and y and eight states. The 1 1 0 A XOR B
control state diagram is as follows. 1 1 1 Complement A
(b) In a certain computer system with cache memory 750 µ
sec is the memory access time for cache miss and 50
sec is the memory access time for cache hit. Find the
percentage decrease in the effective access time if the hit
µ ratio is increased from 80% tom 90% 15+5
COMPUTER ORGANISATION
[ Turn Over ]
( 2 )
–––––––––x––––––––
( 4 )
(b) The interface for a static memory costs Rs. 10/- Ex/CSE/T/213/12/2007(S)
compared to Rs. 50/- for a dynamic memory and if static
INTER ENGG. (COMPUTER SCIENCE ENGG.) EXAMINATION, 2007
memory costs Rs. 0.0002 per bit and dynamic memory
1st Semester (Supplementary)
costs Rs. 0.0001 per bit, determine how many bits must
be in a memory module to make dynamic memory less COMPUTER ORGANISATION
expensive. Time : Three hours Full Marks : 100
(c) The memory stack in a 16-bit computer contains 5A14H. Answer any five questions.
The stock pointer contains 3A56H. A two word call Different parts of a question are to be answered together.
subroutine instruction is located at memory address 013EH.
followed by the branch address of 67AEH at memory 1. (a) In a virtual memory environment using FIFO for page
address 013FH. What are the contents of PC, SP and the replacement, it is found that the successful hit ratio is
memory stack? unacceptably low. Comment on each of the following
(i) Before the CALL instruction is executed. proposals made for increasing the hit ratio :
(ii) After the CALL instruction is executed. (i) Decrease the page size
7. (a) Describe Booth’s modified algorithm and show that just (b) The page reference pattern of a program is as follows :
N 1, 2, 3, 4, 1, 5, 2, 3, 6, 5, 4, 1, 6, 2, 5, 4
partial products are required to multiply two N bit
2
which of the page replacement policies FIFO, LRU and
binary numbers. Illustrate the algorithm with the example
LIFO is most suitable with memory capacity 4 pages?
of multiplication of +29 and –35.
(c) In a two level virtual memory t A1 = 10 –3 sec and
(b) Draw the schematic diagram for daisy chain polling
tA2 = 10–2 sec what must be the hit ratio H in order the
arrangement in the case of non-vectored interrupt for
access efficiency to be within 80% of its maximum
three devices. 10+10
possible value? 8+6+6
––––––
[ Turn over
( 2 ) ( 3 )
2. (a) What is the difference between a subroutine and an (b) Draw the CSA organisation to add 9 signed numbers of
interrupt service routine ? 4-bit each having ripple carry adder at the last stage.
Also calculate the number of gate delays in your addition
(b) Design an ALU with three control lines C0, C1, and C2
process. 10+10
and one carry input line and two n-bit binary inputs A
and B to perform the following operations (show the first 4. A control unit has two inputs X and Y and eight-states. The
two stages). control state diagram is as follows :
C2 C1 C0 Operations
0 0 0 A+B
T3 T4
0 0 1 A–B x=0
y=1
0 1 0 A+1 x=1
T0 T1 T2 T7
0 1 1 A–1 y=0
1 0 0 A and B T5 T6
1 0 1 A or B
1 1 0 A XOR B
1 1 1 Complement A
5+15 (a) Design the control using eight D flip flops.
3. (a) Consider a 20-bit floating point number in a format with (b) Design the address sequencing part of microprogram
7-bit exponent and a 12-bit normalised fractional control. 10+10
mantissa. The base of the scale factor in 4 and the
5. Write short note on any two of the following : 10×2
exponents is represented in excess-64 format
(a) Non-restoring algorithm for binary division.
Find the values of (A+B) and (A–B) where
(b) Direct memory access.
A=0 1000010 111111110011
(c) Techniques of truncation used for floating point
B=0 0111110 101010101011
arithmetic.
which are represented in the above format and give the
6. (a) What are the differences between asynchronous and
answers in normalised form. Use rounding method for
synchronous mode of data transfer.
truncation.
[ Turn over
( 4 )
(b) The interface for a static memory costs Rs. 10/- Ex/CSE/T/213/12/2007(S)
compared to Rs. 50/- for a dynamic memory and if static
INTER ENGG. (COMPUTER SCIENCE ENGG.) EXAMINATION, 2007
memory costs Rs. 0.0002 per bit and dynamic memory
1st Semester (Supplementary)
costs Rs. 0.0001 per bit, determine how many bits must
be in a memory module to make dynamic memory less COMPUTER ORGANISATION
expensive. Time : Three hours Full Marks : 100
(c) The memory stack in a 16-bit computer contains 5A14H. Answer any five questions.
The stock pointer contains 3A56H. A two word call Different parts of a question are to be answered together.
subroutine instruction is located at memory address 013EH.
followed by the branch address of 67AEH at memory 1. (a) In a virtual memory environment using FIFO for page
address 013FH. What are the contents of PC, SP and the replacement, it is found that the successful hit ratio is
memory stack? unacceptably low. Comment on each of the following
(i) Before the CALL instruction is executed. proposals made for increasing the hit ratio :
(ii) After the CALL instruction is executed. (i) Decrease the page size
7. (a) Describe Booth’s modified algorithm and show that just (b) The page reference pattern of a program is as follows :
N 1, 2, 3, 4, 1, 5, 2, 3, 6, 5, 4, 1, 6, 2, 5, 4
partial products are required to multiply two N bit
2
which of the page replacement policies FIFO, LRU and
binary numbers. Illustrate the algorithm with the example
LIFO is most suitable with memory capacity 4 pages?
of multiplication of +29 and –35.
(c) In a two level virtual memory t A1 = 10 –3 sec and
(b) Draw the schematic diagram for daisy chain polling
tA2 = 10–2 sec what must be the hit ratio H in order the
arrangement in the case of non-vectored interrupt for
access efficiency to be within 80% of its maximum
three devices. 10+10
possible value? 8+6+6
––––––
[ Turn over
( 2 ) ( 3 )
2. (a) What is the difference between a subroutine and an (b) Draw the CSA organisation to add 9 signed numbers of
interrupt service routine ? 4-bit each having ripple carry adder at the last stage.
Also calculate the number of gate delays in your addition
(b) Design an ALU with three control lines C0, C1, and C2
process. 10+10
and one carry input line and two n-bit binary inputs A
and B to perform the following operations (show the first 4. A control unit has two inputs X and Y and eight-states. The
two stages). control state diagram is as follows :
C2 C1 C0 Operations
0 0 0 A+B
T3 T4
0 0 1 A–B x=0
y=1
0 1 0 A+1 x=1
T0 T1 T2 T7
0 1 1 A–1 y=0
1 0 0 A and B T5 T6
1 0 1 A or B
1 1 0 A XOR B
1 1 1 Complement A
5+15 (a) Design the control using eight D flip flops.
3. (a) Consider a 20-bit floating point number in a format with (b) Design the address sequencing part of microprogram
7-bit exponent and a 12-bit normalised fractional control. 10+10
mantissa. The base of the scale factor in 4 and the
5. Write short note on any two of the following : 10×2
exponents is represented in excess-64 format
(a) Non-restoring algorithm for binary division.
Find the values of (A+B) and (A–B) where
(b) Direct memory access.
A=0 1000010 111111110011
(c) Techniques of truncation used for floating point
B=0 0111110 101010101011
arithmetic.
which are represented in the above format and give the
6. (a) What are the differences between asynchronous and
answers in normalised form. Use rounding method for
synchronous mode of data transfer.
truncation.
[ Turn over
ExMCA/121/46/2006
MCA FIRST YEAR EXAMINATION, 2006
(2nd Semester )
DATA STRUCTURE
Time:Therr hours Full Marks:100
Answer any five questions
1 a) i) Define ‘Dala Structure’ and ‘Algorithm’.
ii) Define ‘Stack’ as an ADT. 2+2+6
b) i) Define ‘Time.: Complexity’ of an Algorithm.
ii) Assume that Module A takes t units of time.for its execution.where t is a constant and that n is the
size of die input data.and p is a positive integer greater than 1 Find the complexities of the
following algorithms
Algorithm 1 :
1 repeat for i = 1 to n
2 repeat for j =1 to n
3 repeat for k = 1- to n
4 Module A
(end of step 3 loop)
( end of step 2 loop)
( end of step 1 loop)
5 exit
Algorithm 2 :
1. set j= l
2. repeat steps 3 and 4 whilej = n
3. Module A
4. set j = p x j
(end of step 2 loop)
5. exit
2+4+4
2. The Tower of Hanoi problem may bo stated in.a general way as follows :
“ A tower of ‘n’ disks is initially stacked in order of decreasing diameter tin one of three
available pegs ( say, peg’ a, peg b, and pegc ). The task is transfer the entire tower of disks
from one peg ( say, peg a )to another peg. say,peg c ) using the lie remaining available peg (
say, peg b ) so that only one disk can be transferred at one time and a larger disk can never
be placed or. top of a smaller disk ,duing this process of transfer.”
[ Turn, Over ]
(2)
i) Obtain a recursive definition of the problem in terms of a disk movement function say,
move(n, x, y, z ) that causes moving of’ ‘n’ disks from peg to peg y using the available peg
peg z
ii) Write a ‘C’ function for ‘move’.
iii) Estimate the time compleity of this ‘move’ function.you have just written. 5+5+10
3. a) Discuss whether a Slack or Queue is the appropriate structure for determining the order in which
dements are processed in each of the following cases:
(i) Batch computer programs arc submitted to the computer center.
(ii) Program P calls subprogram S which calls subprogram T. and so on. 3+3
b) The daily flights of an airline company is as shown below. Here. ‘City’ lists the cities, and Org[i]
and Dst[i] denotes the origin and destination, respectively of the flight Number[i]. Drawthe
corresponding directed graph of data.
City
Number. Org Dst
1 kolkata
1 501 2 3
2 Mumbai 2 502 3 2
3 Chennai 3 505 5 3
4 Delhi 4 508 3 4
5 Hyderrab 5 511 2 5
ad 6 512 5 2
7 513 5 1
8 515 1 4
9 517 5 4
10 518 4 5 6
c) Discuss the different way of representing the above data so as to decrease the time of execution
for the following cases:
(i) Find the origin and destination of a flight. given the flight number
(ii) Given City X and City Y , find whether there is a flight from X to Y , and if there is find the
flight number. 4+4
[ Turn Over ]
(3)
4. (a) What are the means/mechanisms required for linked representation?
(b) Propose a space and time efficient node structure in C for linked list representation of a Sparse
Matrix.
(c) Write the rules for transforming a recursive function to a non-recursive function.
(d) Give the best and tho worst binary tree representation of the following sorted array :
5.a) What is a binary tree? What are the differences between a tree and a binary tree?
b)If a complete binary tree with n nodes is represented sequentially then for any node with
index i 1 = i = n,show that
“leftchild(i) is at 2i if 2i = n. If n = 2i. then i has no left child “.
c)Develop algorithms for building a binary tree for an expression and retrieving the infix.from
from this tree 2+2+6+5+5
6 i) Define Symbol Table’. State the operat ions thai may be required on Symbol Table.
What is a Dynamic Symbol Table? 2+4+2
ii) Consider that the following data are supplied in the sequence. Slate the rules for balancing
a tree and show now the binary seareh tree generated in sequence with these data gets
unbalanced and subsequently balaneei,
Data : Mar. May. Nov, Aug. Apr, Jan, Dec. July. Feb. June. Oct. Sep 4+8
7. a) Explain, with an example, how data are represented for Fibonacci Search. State the advantage of
Fibonacci Search over Binary Search. 8+2
b) Define ‘Heap’ Explain, with an example. how heap sort works. 2+8
1. (a) Find the new heap created by removing the first item from the following heap:
650 88 55 68 1 3 11. 2
(b) Draw a hash table with open addressing and a size of 11. Use the “modulo 11” hash function to
insert the following keys in the given order into your table:
7, 24, 0, 29, 22, 9, 33. 3
(d) Explain with examples, in which cases a recursive function will not terminate. 4
(f) Show how the following expression can be converted to postfix notation:
x + y * 5/(2 + z ) – 3 *( x - z ) – p $ ,
where $ is the sentinel. Hence evaluate the postfix expression with the following values of the
variables: x=20, y=4, z=2, p=l. 5
(g) What do you mean by a Transitive C’osure Matrix? Explain with an example. 4
2. Define the ADT Queue. Implement the Queue Data Structure using pointers in C.
20
3. What are the uses of the stack data structure? Explain how recursive subroutines can be implemented
using stack.
State and explain with a simple example how you can use a stack for converting an infix expression to
the postfix notation. 10+10
4. What are the problems of Binary Search Tree? Explain the improvement of performance by the use of
Height Balanced Tree.
Explain how a height–balanced tree can be formed by inserting the following elements in
the
given order:
1 , 2 , 3 , 4 , 5 , 6 , 8 , 9 , 10,7,11.
Show how the root element can be deleted from the above tree. 6 + 10 + 4
contd.
(2)
5. Explain the rationale of Quicksort. Why does the algorithm perform so fast? What are the cases when
the Quicksort algorithm behaves like a slow sort? What is the effect of the choice of pivots on the
performance of Quicksort algorithm?
Describe the algorithm of Quicksort and explain its working with the help of the following input
array:
23,4,55,6,66,7,77,8,88,90.
10+ 10
7. What are the problems of Binary Search Tree? Explain the improvement of performance by the use of
Height Balanced Tree.
Explain how a height – balanced tree can be formed by inserting the following elements in the given
order:
4, 5, 7, 2, 1, 3, 6, 15, 10.
Show how the root element can be deleted from the above tree.
20
———X———
CP 21 A/12/2006
4. What is a Binary Search Tree (BST)? What are the operations on BST? Explain how a given data can
be deleted from a BST. What are the average time complexities for different operations on BST?
Explain the problem of inefficiency cropping up by inserting the following elements in the given order
in a BST:
1,2,3,4,5,6,8,9,10,7,11.
How can the problem be solved? 12 + 8
contd.
( 2 )
5. Explain the rationale of Heapsort. What are the different approaches to develop the algorithm for
Heapsort. Explain with an informal analysis, the time complexity of Heapsort.
Describe one algorithm of Heapsort and explain its working with the help of the following input array:
23, 33, 13, 83, 43, 93, 53, 73, 100.
12 + 8
7. What do you mean by Hashing? What is the complexity of insertion, deletion and search in a hash
table? Explain how you can delete an element from a hash table. Explain with an example, how
coalesced chaining works.
What are the advantages and disadvantages of Quadratic Probing and Double Hashing? Explain with
their definitions.
12 + 8
––––––––X––––––––
Ex/CP 42B/ 25/2005
(2nd Semester)
1. (a) Discuss the different ways of measuring work done by an algorithm. Which one is
most commonly used and why?
(b) What do you mean by optimality? Write the Binary Search algorithm and prove its
optimality.
(4+2) + (2+4+8) = 20
2. (a) Discuss what you mean by best case, worst case and average case analysis of an
algorithm.
(b) What is the difference between average case analysis and amortized analysis? Briefly
describe the three common techniques used in amortized analysis.
(c) Find the amortized cost of incrementing a binary counter using potential method.
4 + (2+6) + 8 = 20
3. (a) What do you mean by the statement: The running time of algorithm A is T(n) = Θ
(n2)? Use diagram to explain your
answer.
(b) What is the difference between O - notation and o- notation?
(c) What is a recurrence? Solve the following recurrence relation using iteration method.
T (n) =3T(n/4) + n.
(d) Give recursion tree for the recurrence relation: T(n) = 2 T(n/2) + n2 .Apply Master
Theorem to solve the recurrence.
6 + 2 + (2 + 4) + (2 + 4) = 20
4. (a) Compare Divide and Conquer technique of algorithm design with Dynamic
Programming. What are the two key ingredients that an optimization problem must
have for dynamic programming to be applicable?
(b) Discuss the different submodels of PRAM.
(c) Write a PRAM-based sorting algorithm.
(d) Discuss the Bulk Synchronous Parallel Computer (BSP) model.
(e) Compare BSP with PRAM model.
6 + 4 + 4 + 3 + 3 = 20
-2-
5. (a) Give an algorithm which sorts in linear time. Explain the functioning of the
algorithm with examples. How does it differ from the algorithms like Merge Sort and
Heapsort?
(b) What is a heap? What is the partial order tree property of heap?
(c) Give an exact analysis of the cost of building a heap. comment on the running
time of Heapsort.
(d) What is a recursion tree?
(3 + 3 + 2) + 4 + (4 + 2) + 2 = 20
7. (a) Define the classes P and NP. Discuss what you mean by Polynomial Reductions.
(b) What are the different steps taken by Nondeterministic algorithms? Give a
nondeterministic Graph-coloring algorithm.
(c) Prove that Hamiltonian cycle problem in NP-complete.
(3+3) + (2+4) + 8 = 20
8. (a) Write a greedy algorithm for generating Huffman code. Comment on the running
time of the algorithm.
(b) Prove the correctness of Huffman's algorithm.
(4+2)+14 = 20
Ex/CSE/T/214/17/2010
DIGITAL CIRCUITS
f) EA PROM’s;
6. a) Explain the operation of a buffered weighted register
type DAC. 8 g) Bipolar Switches for DAC’S;
DIGITAL CIRCUITS
[ Turn over
(2)
DIGITAL CIRCUITS
Time : Three hours Full Marks : 100
Answer any five questions.
[ Turn Over ]
(2)
4. a) Design a clock generator working at 20 KHz having a
duty cycle of 30% with a 555 IC timer chip, (use
C = 0.01 µf). Deduce the expressions used. 4+6
b) With the help of a block diagram explain the operation
of a single chip PLL. 6+4
How can an input frequency be multiplied by 2π ?
5. a) Explain the operation of a 3 tr/cell RAM.
How is the information retained by the same.
b) What happens during Read-out operation of a 1 tr/cell
RAM ? 6+8+6
6. a) Explain the operation of a Buffered weighted resistor
type DAC.
b) How can a two digit BCD number be converted by
using 4 bit DAC’s ? 12+8
7. Explain the operation of a 3 bit successive Approximation
type ADC.
What are its relative merits and demerits ? 16+4
8. Write notes on any four of the following : 4x5
a) l2L e) EPROM
b) RTL f) Non volatile RAM
c) ECL g) Switches for DAC’s
d) MOS inverter h) S/H gate
( 2 )
5. (a) With the help of a circuit diagram explain the operation of Ex/CP 220/110/2007 (Old)
3 Tr/cell Memory. 8 INTER COMPUTER SCIENCE & ENGG. EXAMINATION, 2007
(b) How can the stored information be maintained in such a ( 2nd Semester )
Memory ? 8 (Old Syllabus)
(c) How does it differ from a 1 Tr/cell Memory ? 4 DIGITAL CIRCUITS
Time : Three hours Full Marks : 100
6. (a) Explain the operation of weighted resistor DAC. 12 Answer any five questions.
(b) Design a two digit BCD D/A converter. 8
1. (a) With the help of a circuit diagram explain the operation of an
Integrated Version of DTL gate. 12
7. (a) Explain the operation of a Ramp type ADC. 12
(b) Estimate the reverse recovery current. 4
(b) Why is it also called staircase type ADC ? 2
(c) What happens if the outputs of more than one gates are
(c) What are its relative merits and demerits ? 6
shorted? 4
8. Write short notes any four of the following : 4×5 2. Draw the Transfer characteristics of a standard TTL gate. Justify
(a) RTL ; the diagram. 4+16
(b) CMOS ;
(c) PLL ; 3. (a) Explain the operation of an MOS inverter. 8
(d) ROM/PROM/EPROM’S ; (b) What are the demerits of the same ? 2
(e) ECL ; Justify your answer with necessary deduction. 8
(f) Bipolar switch for DAC ; (c) How can they be resolved ? 2
(g) Sample/Hold circuit ;
(h) Delta Modulation. 4. (a) Draw the block diagram of the 555 IC Timer and explain its
operation. 8
–––––– (b) How can you connect the same to generate a Time delay ? 2
Deduce the expression for the same. 6
(c) Design a circuit to produce a time delay of 80 ms.
[use C=.01 µf] 4
[ Turn over
Ex/CSE/T/21D/15/2008
( 1st Semester )
DIGITAL CIRCUITS
[ Turn over
[2] [3]
5. a) With the help of a circuit diagram explain the operation of f) Bipolar suitables for DAC’s ;
a 3 Tr/Cell Memory. 10 g) Sample/Hold circuits ;
b) How can the stored information be maintained is such a h) Delta-modulation.
memory ? 6
a) RTL’s ;
b) Tristate gates ;
c) ECL gates ;
d) CMOS gates ;
Ex/CSE/ET/T/216/18/2010
ELECTRONICS – II
and also find out the condition for sustaining the c) With a neat circuit explain the operation of a schmitt
oscillation. 5+3+2 trigger. 5
c) Write down the advantage and disadvantages of a 7. a) Mention the role of a regulation in a power supply.
crystal oscillator. 4 Define the terms load regulation and line regulation.
4. a) Draw the basic building block of an op-amp and explain Draw the circuit of a shunt voltage regulator and explain
the function of each block. 2+4 its operation. Mention its advantage over a shunt
b) Define the following terms related to an op-amp. regulator. (2+2) + (8+2)
i) Slew Rate (ii) Common Mode Rejection Ratio, b) Draw the circuit of a regulated power supply that can
(iii) Offset voltage and (iv) Virtual ground. 8 give an output of ± 15V 6
c) How an op-amp can be used as an integrator? 6 8. Wirte short notes on any two of the following :
5. a) Design a first order Butter worth band pass filter having 10x2 = 20
lower and higher cut off frequencies of 1 KHz and 10 a) Bistable Multivibrator.
KHz respectively with a pass band gain of 4. Also b) Switching Mode Power Supply (SMPS)
determine whether it is a wide band pass or narrow c) Transformer coupled amplifier.
band pass filter. 10+2 d) Crystal oscillator.
b) What do you mean by order of a filter? How a fourth
order high pass filter can be realized? 2+4
c) Write down some advantage of active filter over a ————×————
passive filter. 2
6. a) Draw the functional block diagram of a 555 timer and
explain how this circuit can be modified to design an
astable multivibrator. 4+6
b) In a astable multivibrator time resistors are 4K Ω and
6K Ω respectively and the timing capacitor is 0.1/ µ F.
Calculate the duty cycle and frequency of the generated
waveform. 5
Ex/CSE/ET/T/21F/16/2008(S)
ELECTRONICS–II
[ TURN OVER ]
( 2 ) ( 3 )
c) How an op-amp can use to add three voltages Va , Vb 7. a) Define the following terms recontrol to an op-amp.
and Vc. 8
(i) CMRR ; (ii) Show Rate ; (iii) Offset voltage (iv) Virtual
ground. 2×4=8
4. a) Design a 1st order low pass Butterworth Filter with a
b) How an op-amp can be used as an integrator. 6
cut-off frequency of 1 kHz and having a pass band gain
of 3. 8 c) How an op-amp can be used as a voltage follower. 6
c) Mention uses of a filter. How filter circuit can be b) Fixed Voltage Regulator
classified ? 2+2 c) Astable Multivibrator
5. a) Draw the functional block diagrams of a 555 timer and d) Wien Bridge Oscillator
explain its operation. 6
ELECTRONICS II
Time : Three hours Full Marks : 100
PART - I
80
[2] [3]
4. a) Write down the characteristics of an ideal op-amp. 3 8. Write short notes on any two of the following : 2510=20
b) Define the following terms related to an-op amp. a) Schmitt trigger circuit.
(a) Stew Rate : (b) Offset voltage, (iii) virtual ground. and b) 1st order law pass Butterworth fieter.
(iv) Common Mode Rejection Ratio (CMER) 452=8 c) Design of a variable power supply with IC-723.
c) Find out an expression for feedback gain of an op-amp. used d) R-C phase shift oscillator and its analysis.
act inverting mode. 6
ELECTRONICS–II
[ TURN OVER ]
( 2 ) ( 3 )
b) Mention the drawback of L.C. or R-C oscillators and how 7. a) Draw the circuit of a shunt voltage regulator and explain
it can overcome in a crystal oscillator. Explain the its operation. Mention its advantage over a series
operation of a crystal oscillator. 8 regulator. 8+2
b) Find out an expression for feedback gain of an op-amp 8. Write short notes on any two of the following : 2×10=20
when used in inverting mode. 6
a) Bistable multivibrator
c) How an op-amp. can be used as a voltage follower ?
b) Schmitt trigger
Mention its use. 6+2
c) Fixed voltage Regulator
5. a) Design a 1st order Butterworth bandpass filter with lower d) Switching Mode Power Supply (SMPS)
and upper cut-off frequencies are 1 KHz and 4 KHz and
having a passband gain of 4.
Also, show the necessary change in the component
values to convert the upper cut-off frequency from 4 KHz —————×—————
to 6 KHz. 8+4
ELECTRONICS - II
Time : Three hours Full Marks : 100
d) Astabe multivibrator.
e) Schmitt trigger.
Ex/CSE/Math/T/211/17/2010
MATHEMATICS-VD
Time : Three hours Full Marks : 100
(50 marks for each part)
PART-I
d2y 2
(i) +n y = sec nx
dx 2
FG d y IJ − 2 x FG dy IJ +2y = x+x
2
(i) x2
H dx K H dx K
2
2
logx+x3
[ Turn over
( 2 ) ( 5 )
4. Solve the Legendre differential equation 13. Use the method of contour integration to evaluate
z
2π
d2y dy dθ
2
(1–x ) − 2x + n(n+1)y = 0, (a) ,
dx 2
dx 5 + 4 sin θ
0
z
∝
5. (i) Show that x2
(b) dx. 5+5=10
−∝
( x 2 + 1) ( x 2 + 4)
∝
| x| ≤ 1
(1–2xz+z ) 2 –½
= ∑
n=0
z n Pn ( x),
| z| < 1
––––––––––
Pn(x) is Legendre polynomials.
5+5
x 3 x5 x 7
tan–1x = x– + − + L, − 1 ≤ x ≤ 1.
3 5 7
∑ (a +b )
n =1
2
n
2
n
converges. 5+5
( 4 ) ( 3 )
z
If their partial derivatives satisfy CR-equations at (x, y), prove
1
(b) Show that dz = 0, C : | z | = 1. 6+4=10 that f is differentiable at z = x+iy.
C
z + 2z + 2
2
(a) z
C
e
z +4
2
z
dz, C : | z–i | = 2. (b) Prove that f (z) = z3 is differentiable at every point and
f'(z) = 3z2.
z
(c) Find the analytic function f(z) = u+iv, where
ezt
(b) dz, t > 0, C : | z | = 3. 5+5=10
C
( z 2
+ 1) 2 u–v = ex (cosy–sin y). 3+2+5=10
(a) z
C
z +1
z 2 + 2z + 4
dz , C : | z+1+i | = 2.
functions.
u = 2x–x3+3xy2
(b) z
C
3z 2 + z − 1
( z 2 − 1) ( z − 3)
dz, C : | z | = 2. 5+5=10 is harmonic. Find the harmonic conjugate of u.
[ Turn over
( 4 ) Ex/CSE/MATH/T/21A/15/2008(S)
7. Evaluate the following real integrals by the method of INTER ENGG. COMP. Sc. EXAMINATION, 2008
contour integration : (1st Semester, Supplementary)
∞ x2 dx MATHEMATICS–V D
(i) I , α > 0 , β > 0 , α ≠β
–∞
(x2 + α2 )(x2 + β2 )
Time : Three hours Full Marks : 100
f(x) = x2, – π ≤ x ≤ π
1 1 1 π2
(ii) 1 + + + + .... =
22 32 42 6
f(x) = ex, – π ≤ x ≤ π
d2y
(i) + a2y = sec ax
dx2
d2y dy
(ii) (x + 10)2 – 4(x + 10) + 6y = x
2 dx
dx
[ TURN OVER ]
( 2 ) ( 3 )
b) Show that
d2y
(iii) + y = 3x + 5tan x 0 , if m ≠ n
dx2 1
I Pm(x) Pn(x)dx = 2
–1 , if m = n
2n + 1
d3y d2y dy
4 3 2
(iv) x + 2x – x + xy = 1
dx2 dx2 dx
5. a) Derive Cauchy-Riemann equations in polar form.
3. a) Using the method of variation of parameters solve the
following differential equation b) If f(z) is analytic within and on a closed contour C and
if a is any point within C then prove that
d2y
+ y = tan x
dx2 1
f(a) =
2πi
I f(z)dz .
C
z – a
b) Show that the power series solution of the differential
equation c) Find all harmonic function of the type
d2y
– a2y = 0 , a2 > 0 u = θ ( x2 + y 2 ) that are not constants. 5+10+5
2
dx
PART -I
Answer any three questions.
Two marks reserved for neatness.
1 1 π2
1+ + + ⋅⋅⋅ =
32 52 8
8+8
∑1 6
∞
π2 n cos nx
x2 = +4 −1 , −π< x<π
3 n=1 n2
[ Turn over
( 2 ) ( 5 )
3.
(c) State Dirichlet’s conditions.
(a) Find the general and singular solution of
8+4+4 (c) Evaluate
C
I
sin πz 2 + cosπz 2
(z − 1)2 z − 2
dz where C : z = 3.
1 6
10. Evaluate any two of the following integrals by the method of
y = px + a p + b .
2 2 2 contour integration :
I3
(b) If y=u(x) and y = v(x) be two linearly independent ∞
x 2dx
solution of the equation (i)
−∞ x2 + 1 x2 + 4 83 8
d2y dy
+ a1 ( x ) + a2 ( x ) y = 0 ,
I
a0 ( x ) 2 2π
dx dx cos2θdθ
(ii)
0
1 − 2r cosθ + r 2
Find the general solution of
I
∞
4. (a) If y = ex be a solution of the equation sinx
(iv) 2
dx .
−∞
x + 4x + 5
d2y
x 2 − 2x − 1
dx
1
dy
dx
6
+ x − 1 y = 0, 1 6 _______
d2y
2
+ a2 y = sec ax .
dx
8+8
( 4 ) ( 3 )
(c) If f(z) is an analytic function of z, prove that 5. (a) Prove that the series solution of the equation
∂ ∂2
∂x d2y
2
+ log f (z ) = 0 . − a2 y = 0
2
∂y 2 dx 2
7. (a) If f(z) is analytic within and on a closed curve and if a is any can be put in the form
point within C, then prove that
y= c1eax +c2e–ax,
f (a) =
1
If (z )dz
2π i C z − a
. where c1 and c2 are two arbitrary constants.
(b) If Pn denotes the Legendre polynomial of degree n,
(b) Evaluate the integrals prove that
(i)
I1 sin 2 z
z − π6 6 3
dz where C: z = 1
I
1
Pn ( x )Pm ( x ) =
%K 0 if m ≠ n
&K 2 if m = n .
' 2n + 1
C
−1
(ii)
I3
C
2
z +π
ez
2
8 2
dz where C: z = 4. 8+8
I
PART -II
8. (a) If f(z) is continuous in a region D and f ( z )dz = 0 around Answer any three questions. 16×3
C
every simple closed curve C in D, then prove that f(z) is All questions carry equal marks.
analytic in D. Two marks reserved for neatness.
z
3z − 183z + 48
2 2
6. (a) Show that the polar form of Cauchy-Riemann equations are
(b) Find the Laurent’s expression of for
MATHEMATICS–V D
PART–I
[ TURN OVER ]
( 2 ) ( 5 )
d2y
(ii) + 4y = Sin 3x + ex + x2
dx2
∞ x Sinx
(iii) I dx, β > 0.
d y 2
2 0 x2 + β2
(iii) + a y = Sec ax
dx2
d2y dy
(ii) + 3 + 2y = e2x Sin x
dx 2 dx
d3y d2y dy
(iii) x4 3
+ 2x3 – x2 + xy = 1
dx dx 2 dx
d2y
+ y = Sin x
dx2
d2y dy
(x2 – 1) + 3x + xy = 0
dx 2 dx
[ TURN OVER ]
EX\CP21E\13\06
MATHEMATICS-V A
PART-I
in the direction of 2i + 2j + k.
xy3z2 = 4 at (–1, – 1, 2)
[ Turn Over ]
( 2 )
PART-II
(z) 2
f(z) = , z≠0
z
= 0 , z=0
( 3 )
∂2 ∂2 ∂2
b) Show that + =4 where z = x + iy
∂ x2 ∂ y2 ∂ z2 ∂ z
c) Show that
, n = 0, 1, 2 …
5+6+5
[Turn Over]
( 4 )
z 2 + 16
c) The function f(z) = has singularities at z = i
(z − i) 2 (z + 3)
and z = – 3. Find the residue at there singularities.
4+6+6
––––––––x––––––––
( 4 ) Ex/CSE/T/215/18/2010
6. a) Consider a class SCORE with roll and marks as data BACHELOR OF COMPUTER SC. ENGG. EXAMINATION, 2010
members. Design a RESULT class which writes roll and (2nd Year, 1st Semester)
marks of all students in RESULT. DAT file. It will provide
support to find (i) the marks for a roll given by user, (ii) OBJECT ORIENTED PROGRAMMING WITH CTT & JAVA
the maximum marks and corresponding roll and (iii) to
update the marks for a roll given by user. Write down Time : Three hours Full Marks : 100
C++ code to achieve (i) Operations. (ii) and (iii) in
SCORE are also to be shown. 12
Attempt any five questions.
b) In C++, when will you use friend function? 2
1. a) What is VML? 4
c) What is the utility of function template in C++? 3
d) What happens when an object is created using class b) What are interface, package, component and node? 8
template? 3 c) Draw the use call diagram for the banking system
7. a) In Java, explain the two ways of creating thread? 6 described below.
Customer withdraws/ deposit’s money by submitting
b) Design the necessary classes in Java, so that , multiple
threads will execute the function process () on same necessary information related to the account number
data. It is to be ensured that only one thread at a time and his details. System verifies the customer and
can run process (). Skeleton code is to be given. 6 account. For withdradal, balance of account is also
cheched. Finally the transaction is noted is a registor
c) What is the utility of package and interface in Java? 6
and balance at the account is updated. A customer also
d) What is the difference between protected and default can enquire about the balance of his account. Manager
access specifier in Java? 2 may ask for customer details, account details and may
8. Write short notes on the following : open or close an account. 8
a) Applet in Java. 8
2. a) What is the significance of component diagram,
b) Exception Handling. 6
deployment diagram and activity diagram? 9
c) Basic type to object conversion and vice versa in C++. b) What is the difference between a class and a
6 component? 3
————×————
[ TURN OVER ]
( 2 ) ( 3 )
c) Draw the class diagram for the following system. subject has subject-id (unique), name. A student takes
Examination control department maintains the admission into a course. student has regd-no (unique),
information regarding the subjects, students, paper name and address. Following requirements are to be
setters, examiners and reviewers. For a subject, Paper met :
setter and examiner may be same but reviewer and
i) One must be able to find course details
examiner are different.One may be paper setter/
examiner /reviewer for various subjects. Questionpaper ii) Subjects covered by a course
and marks of the students for the subjects are to be iii) Which students belongs to which course
stored.Person-Interface an interface for managing A brief description on how the requirements are
personal information of persons (students, examiner etc) supported by the design is to be provided. 10
has also to be considred and relevant classes should
b) Consider X is an array of Strings in Java. How can you
implement it. 8
find out the number of strings in the array and site of
3. a) Consider the statement : X P ; Where , X is a class. the ith string. 4
What does it signify in i) c++ and ii) Java? 3
c) In Java, what is the difference between In and Integer?
b) What is the utility of static data member? How they are 3
initialized in C++ and Java? 5
d) Compare macro and inline function in C++. 3
c) How does the role of a destructor in C++ is
5. a) Consider a class X with public member function void
accomplished in Java? 4
F(int). Y has been derived from X containery the
d) What will you do to achieve runtime polymorphism in additional function void f (void). Consider the Statement
C++ and Java? 6 a.f (10). What will happen for the following cases: (i) In
e) In Java, what is the significance of declarig a method c++, a is an object of Y and (ii) In Java, a is reference
and a class as final? 2 to an Y object. 6
4. a) Design the classes for the following system. b) Why do we need an abstract class? How will you specify
a class as an abstract class in c++ and Java? 6
In an institute, various courses are offered. Each course
has course-id (unique), name. duration and fees. c) In C++, why do we need a virtual destructor? 4
Number of subjects are taught in a course. Each d) In C++, why do we need a virtual base class? 4
[ TURN OVER ]
[7] Ex/CP 31B/95/2008 (Old)
g) You something ;
[ Turn over
80
[2] [3]
ii) Choose the correct option :- 1510 d) The following examples show that the class C is derived
a) Which of the following apply to a static member from classes A and B. Which of them is legal ?
A. It is initialized to zero when the first object of its class B. class C : public A, B
is created.
C. class C : private A, public B
B. A separate copy of the variable is created for each
D. class C :: public A, public B
object.
e) The major goal of inheritance in C++ is
C. It retains the value till one object is deleted.
A. To facilitate the conversion of data types
D. It is visible to all the classes in the program.
B. To help modular programming
b) Supposing m to be a declared integer variable, which of
the following are legal declaration of a reference ? C. To facilitate the reusability of code
g) The function show ( ) is a member of the class A and adj is b) The qualifier inline is used to refer to member
a object of A and ptr is a pointer to A . functions.
Which of the following is a valid access statements ? c) Nested classes are allowed in Java.
A. ptr->show(); B. abj->show(); d) Member functions of a class can call each other directly.
h) The friend functions is used in situations where f) Data members in a class must be declared private.
A. We want to exchange data between classes g) The precedence of an operator can be changed by
C. Dynamic binding is required h) A function declared static cant access non-static class
members.
D. We want to create versatile overloaded operators
i) An abstract class is never used as a base class.
i) Which of the following is legal when x is a data member of
a class ? j) Template classes can work with different data types.
Group A
Answer all questions.
vi) Write a single statement that compares the string in s1 to the string in s2 for equality
of contents.__________________________________.
vii) Casting a superclass object to a subclass object is called______________.
viii) ______________involves using a superclass variable to invoke methods on superclass
and subclass objects.
ix) In a(n)__________________relationship, an object of a subclass also can be treated as
an object of its superclass.
x) Subclass constructors can call superclass constructors via the___________keyword.
(b) Determine whether each of the following is true ox false. If false, explain why.
1X7=7
i) Inheritance encourages the reuse of proven high-quality software,
ii) When a subclass redefines a superclass method by using the same signature, the subclass
iii) is said to overload that superclass method,
iv) An array index should normally be of type float.
v) A “has-a” relationship is implemented via inheritance.
vi) If a superclass declares an abstract method, a subclass must implement that method
vii) to become a concrete class.
viii) Inner classes are not allowed to access the members of the enclosing class,
ix) Method getSize returns the size of the current font in centimetres.
2. Create a class IntegerSet. Each IntegerSet object can hold integers in the range 0-
100. The set is represented by an array of booleans. Array element a [ i ] is true if
integer i is in the set. Array element a[ j] is false if integery is not in the set. The no-
argument constructor initialises the Java array to the “empty set” i.e., a set whose array
representation contains all false values.
[ Turn over
( 2 )
Provide the following methods: Method union creates a third set that is the set-theoretic
union of two existing sets (i.e., an element of the third set’s array is set to true if that
element is true in either or both of the existing sets; otherwise, the element of the third set
is set to false). Method intersection creates a third set which is the set-theoretic
intersection of two existing sets. Method insertElement inserts a new integer k into a
set by setting a[k] to true. Method deleteElement deletes integer m by setting a[m] to
false. Method toSetString returns a string containing a set as a list of numbers
separated by spaces. Include only those elements that are present in the set. Use --- to
represent an empty set. Method isEqualTo determines whether two sets are equal.
Write a program to test class IntegerSet.
25
Group B
Answer any three.
3. Define a method hypotenuse that calculates the length of the hypotenuse of a right
triangle when the lengths of the other two sides are given. The method should take two
arguments of type double and return the hypotenuse as a double. Incorporate this
method into an applet that reads values for sidel and side2 from JTextField
objects and performs the calculation with the hypotenuse method. The user should
interact with the program by typing numbers in both JTextFields, but pressing Enter
only in the second JTextField.
16
4. Write a program that plays “guess the number” as follows: Your program chooses the number
to be guessed by selecting an integer at random in the range 1-1000. The program then
displays the following in a label:
I have a number between 1 and 1000. Can you guess my number? Please enter your first guess.
A JTextField should be used to input the guess. As each guess is input, the background
colour should change to either red or blue. Red indicates that the user is getting “warmer”
and blue indicates that the user is getting “colder”. A JLabel should display either “Too
High” or “Too Low” to help the user zero in on the correct answer. When the user gets
the correct answer, “Correct!” should be displayed and the JTextField used for
input should be changed to be uneditable. A JButton should be provided to allow the user
to play the game again. When the JButton is clicked, a new random number should be
generated and the input JTextField changed to be editable.
16
5. Write a program that bounces a blue ball inside an applet. The ball should begin moving with
a mousePressed event. When the ball hits the edge of the applet, the ball should bounce
off the edge and continue in the opposite direction.
Extend the program to add a new ball each time the user clicks the mouse. Provide for a
minimum of 20 balls and randomly choose the colour for each new ball.
16
( 3 )
6. Find the error in each of the following program segments. Explain how to correct the error.
16
a) int g ( ) {
System.out.println (“Inside method g”);
int h ( ) {
System.out.println (nInside method h”);
}
}
d) void f (float a) ; {
float a;
System.out.println ( a ) ;
}
e) void product () {
int a = 6, b = 5, c = 4, result;
result = a * b * c;
System.out.println (“Result is “ + result);
return result;
}
7. Describe the five steps required to establish and complete a Client-Server communication.
What supports are available in Java to develop a Client-Server system? How do they relieve
the programmer of the drudgery of complicated and lengthy program writing? What is meant
by a “stateless” server?
16