An 8-Bit QVGA AMOLED Driver IC With A Polynomial Interpolation DAC

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An 8-bit QVGA AMOLED Driver IC with a

Polynomial Interpolation DAC


Xinyu Yin, Hongge Li, Member, IEEE
School of Electronics and Information Engineering
Beihang University
Beijing, China
Email: yinxy555@ee.buaa.edu.cn, honggeli@buaa.edu.cn

Abstract—The paper proposes an 8-bit AMOLED driver IC 8 RGB Data


with a polynomial interpolation DAC. This architecture main-
tains high-accuracy AMOLED panels with 8-bit compensated
Registers/Latches/Level Shifters T-CON
gamma correction and supporting low-complex configuration
which results in additional occupied die area. The proposed
driver consists of a 6-bit gamma correction resistor-string DAC Global Resistor Ladders
RGB
and a 2-bit polynomial interpolation current-modulation sub- 66 R 66 G 66 B OLED
DAC. The two-stage DAC leads to a compact die size compared
RGB MUX Selectors Panel
with conventional 8-bit resister-string DAC, and the polynomial
interpolation method provides high accurate grey level voltages Gamma Correction
than linear one. The AMOLED driver was realized in 0.35-µm 66 66 ... ...
CMOS process with DNL and INL of 0.43 LSB and 0.43 LSB.
V/I Converter
Selectors

Output
I. I NTRODUCTION
64 to 1

Buffer
Among the various display technologies attempting to 6
Interpolation Cell
present high quality images, the one that has attracted much ...
Channel
Channel 1 2
attention in recent years is Active-Matrix Organic LED
2 Source Driver
(AMOLED). Its superior characteristics such as fast response
time, wide viewing angle, and self-emissive nature made itself
Fig. 1. Structure of proposed AMOLED driver.
irresistible [1].
Within the several driving schemes for AMOLED, the
voltage-driving method, which is commonly used and similar
while imposing a restriction on the complication of circuit
to AMLCD driver, makes possible the reduction in power
construction. The driver circuits were implemented in 0.35-
consumption and a fast write time. Recently, several driving
µm CMOS process.
methods have been presented for high-color-depth AMOLED
and AMLCD application to obtain better uniformity between
different channels and smaller occupied die area. Generally the II. S TRUCTURE OF P OLYNOMIAL I NTERPOLATION D RIVER
architectures of past studies fall into three groups: resister-
string DAC [2], [3], switched-capacitor DAC [4], [5], and The AMOLED driver is a converting system, with the RGB
current-modulation DAC [6]–[9]. These architectures all em- graphic data as its input and the corresponding grey level
ployed two-stage DAC, one or two adjacent reference voltages voltages as the output. The proposed AMOLED driver consists
were chosen from the first stage DAC and the second stage of a timing controller, a shift register, a sampling latch, a
DAC generated the rest voltages by distributing the difference holding latch, level shifters, a gamma correction circuit and
between reference voltages linearly. source driver circuits. Fig. 1 shows the structure of the whole
Since the characteristic of transmittance-voltage transfer circuit. Register, latches and level shifters processed the 8-
curve of AMOLED panel is nonlinear, the expanding demands bit RGB data with the signals from timing controller, and
for high quality display are subjecting the panel drivers to sent them to source driver circuits. Gamma correction circuit
increasing requirement for high accurate grey level voltages. was used to generate the 66 reference grey level voltages of
Approaching the drivers from this view, stringent demands on RGB independently and transferred them to source drivers
expression of nonlinear gamma correction curve is in excess with time division multiplexing. The source driver circuits,
of the capacity of linear interpolation method in sub-DAC. working as the sub-DAC, took the 8-bit RGB data from digital
As a result, more attention is attracted by precision-enhanced circuits as the controller of 64 to 1 selectors, V/I converters
interpolation method. and interpolation cells, and then interpolated the remaining
We proposed an 8-bit nonlinear interpolation AMOLED grey level voltages. Eventually, AMOLED panel received the
driver which improved the accuracy of gamma correction DAC gamma corrected grey level voltages as its driving signals.

978-1-4799-3432-4/14/$31.00 ©2014 IEEE 2321


III. T HE I MPLEMENTATION OF P ROPOSED D RIVER
Ideal gamma compensated voltage
4.0 Linear interpolation
The implementation of gamma curve adjustment plays a Proposed interpolation
0.48

Data Voltages(V)
3.5

Proposed/Linear
crucial role in the determination of AMOLED panel’s display 3.0
0.40

0.32
quality, for the accuracy of DAC has a direct connectivity 2.5

2.0 0.24
to the panel’s performance. Considering the characteristic of 1.5
0.16
gamma curve, the presence of nonlinearity is influential. 1.0
0.08
As the die area is an indispensable factor for circuits design, 0.5

0.00

single stage resistor-string based DACs with high resolution 0 50 100 150 200 250 0 50 100 150 200 250

Input 8-bit data Input 8-bit data


(more than 8 bits) are unacceptable for their exponential
(a) (b)
increase of die area occupied. Therefore, we employed the
DAC structure made up by a global 6-bit resistor-string DAC Fig. 2. (a) Data voltage of ideal and interpolation curves, (b) Ratio between
data voltage deviation of proposed interpolation and that of linear linear
and a 2-bit polynomial interpolation current-modulation sub- interpolation.
DAC.
A. Gamma Adjustment Circuit and Area-Efficient Multiple- involves as more as possible reference grey level voltages as
Output Voltage Selector its sampling points, the number of which could be so great
Two-stage ladder resistors were adopted by the proposed that they are difficult to pick up, for each of them need a 6-bit
gamma correction circuit to generate the 66 grey level volt- selector. Considering the tradeoff between the complexity of
ages. The top and bottom side of the first stage ladder resistors driver circuit and the correction accuracy, we provided a 2-bit
were connected to the high reference voltage VREFH and the nonlinear sub-DAC employed cubic polynomial interpolation
low reference voltage VREFL , respectively. Given the fact that method [10]. The expressions of interpolated points are shown
the best visual effect depends not only on the panel’s bright- below, which is
ness but also on how well it contrasts with the background
21 7 3

against which it must be seen, it is necessary to provide users 
 VH + VM − VL if b1 b0 = 11,

 32 16 32
several optional V0 and V260 generated by the resistor string 

3 3 1
to achieve the feature of RGB-independent gamma amplitude Vout = VH + VM − VL if b1 b0 = 10, (1)
 8 4 8
correction. 
 5 VH + 15 VM − 3 VL if b1 b0 = 01.



Adjusted V0 and V260 were transferred into the second
32 16 32
stage ladder resistors as their reference voltages. Intentional
modulation on the resistance of ladder resistors gave rise to where Vout are the interpolation, b1 , b0 are the two least
the phenomena that the remaining grey level voltages fall into significant bits of graphic data and VH , VM , VL represent the
the gamma correction curve. adjacent reference voltages.
The implement of nonlinear interpolation requires three In the interpolation process, we chose three adjacent refer-
adjacent reference voltages. In order to address the die area ence voltages from the gamma adjustment circuit to establish
of each source driver, the proposed driver used the area- a parabola through all of the reference points, and located
efficient multiple-output selector which was presented in [9]. the interpolation. Fig. 2. (a) shows the relationship between
This structure made full use of the first stage switches in 6-bit the ideal gamma correction curve and linear, proposed inter-
selectors thus reducing the number of switches needed from polation, and Fig. 2. (b) presents the ratio between proposed
378 to 254. interpolation deviation and linear one.

B. Concept of Polynomial Interpolation C. Polynomial Interpolation Current-Modulation Sub-DAC


Assessing the accuracy of DAC in AMOLED driver’s gam- Fig. 3 shows the concept of proposed nonlinear sub-DAC
ma adjustment starts from the realization that the grey level circuits. The DAC applied hybrid architecture which consists
data voltage curve is nonlinear. The conventional AMOLED of a voltage-current converter, an interpolation cell and a
voltage-mode drivers employed a nonlinear global resistor current summing circuit with an output buffer to generate the
string DAC with linear resistor-string, switch-capacitor or interpolated voltages. The V/I converter senses the differences
current-modulation interpolation sub-DACs. These structures between VH , VM , and VOUT respectively, and then transforms
could certainly accomplish their job which is adjusting the them into currents. A data-dependent controller is cascaded
reference grey level voltages to the gamma correction curve, the V/I converter to calibrate its output current by modulating
but inevitable distortions would be generated between the the proportion of each input. The relation between the input
smooth curve of gamma correction and the straight line on and output current is displayed below,
which the interpolated points lay, especially in the higher Ivi = xgm (VH −VOUT ) + (1 − x)gm (VM −VOUT ), (2)
brightness area.
Given the fact that the sub-DACs were allocated in each where x is the graphic data based coefficient obtained by
channel of the driver, a limitation of circuit complication the data dependent controller to modulate the proportion of
was presented. An extremely precise interpolation system also reference-voltages-based currents, gm is the transconductance

2322
Ivi
Data Dependent Output VOUT VB1
I0 I3

Controller Buffer D C

Iic b0

Current
b0

Control
Switch
DAC
3-bit
b1 b1
VB2
+ +
I1 I2
VB3
VH VM

Interpolation
b1 b0 PM1 PM2 PM3 PM4 PM5 PM6

gm gm VM VH VM
B
VL

cell
- -
A
VOUT
C
D VB4
VL
NM1 NM2 NM3 NM4 NM5 NM6

I1 I2 VB5

Control
Switch
Current
b1

DAC
b1

3-bit
b1 b0 b0 b0
B A

VB6
I0 I3
Fig. 3. Simplified schematic of proposed sub-DAC.
Interpolation Current Summing
V/I Converter
Cell with Output Buffer

of input transistors. The interpolation cell contributes addition-


Fig. 4. Schematic of proposed polynomial interpolation current-modulation
al current Iic , which is related to the reference voltage VM and sub-DAC.
VL ,
Iic = ygm (VM −VL ), (3) TABLE I
LUT OF C OEFFICIENTS , G RAPHIC DATA AND DATA VOLTAGES
where y is another graphic data based coefficient obtained
by interpolation cell to modulate the proportion of reference- b1 b0 x y VOUT
voltages-based currents. Ivi and Iic are transferred to the 0 0 0 0 VM
5 3 5 15 3
current summing circuit and then converted by output buffer 0 1 32 32 V
32 H + 16 VM − 32 VL
3 1 3 3 1
to voltage. The relation between the several inputs and output 1 0 8 8 V
8 H + 4 MV − 8 VL
21 3 21 7 3
could be expressed as follow, 1 1 32 32 V
32 H + V
16 M − 32 VL

VOUT = xVH + (1 − x)VM + y(VM −VL ), (4)


where α is a higher order term deviation which is expressed
According to the equation above, we could acquire the in-
below, that is
terpolated grey level voltages showed in (1) by altering the
coefficient x and y. (1 − x)(VOUT −VM − y(VM −VL ))(VH −VM )
α∼
=
The schematic of 2-bit polynomial interpolation current- (2nkT /q +VH +VOUT − y(VM −VL ))
modulation sub-DAC is shown in Fig. 4. The V/I converter y(VM −VL )(x(VM −VH ) +VL −VOUT )
+ . (7)
circuit employed the Variable-Current Control (VCC) method (2nkT /q + xVH + (1 − x)VM +VOUT
in [6]. There are two input differential transistors pairs whose The look up table (LUT) which describes the relationship
gates are connected to the reference voltages VH , VM and the between coefficient x, y, output voltage and lower bits of RGB
output voltage VOUT , respectively. A 3-bit current DAC is graphic data is displayed on Tab. 1.
cascaded to a constant current source (I0 ) to divide I0 into I1 Proposed sub-DAC senses three adjacent reference voltages
and I2 . The interpolation cell also has a constant current source from the global resistor string in main DAC, and generates
(I3 ), a control switch and a differential pair. It provides the three interpolated grey level with the polynomial interpolation
additional current properly. In order to construct a close loop method. The circuit implements its functions without compli-
with negative feedback, output voltage VOUT is transferred to cated structure while providing a close approximation of the
the gates of input differential pairs in V/I converter. As all gamma correction curve, which is urgently needed especially
the input transistors which have identical size are biased in in the higher brightness area where the nonlinearity is more
the sub-threshold region, we concluded the relation between conspicuous.
input and output voltages, that is
IV. SIMULATION RESULTS
V −V V −V V −V
( H S) ( M S) ( M S)
xID0 e nkT /q + (1 − x)ID0 e nkT /q + yID0 e nkT /q The following simulation results are based on the 0.35-µm
V
( OUT
−VS
)
V
( OUT
−VS
)
VL −VS
( nkT ) 2P4M process, and the layout of the sub-DAC occupies an area
= xID0 e nkT /q + (1 − x)ID0 e nkT /q + yID0 e /q , (5) of 65µm×95µm. Applying the 8-bit RGB graphic data to the
where ID0 is the zero bias current, VS is the source voltage AMOLED driver circuit, we obtained the DSL and INL shown
of input transistors, kT /q = VT H , and n is a factor which in Fig. 5 and Fig. 6, respectively. The maximal DNL and
depends on biasing voltages and the process. We also deduced INL were measured as 0.43 LSB and 0.43 LSB. Although the
the output voltage as polynomial interpolation is not a perfect method for AMOLED
drivers to adjust their grey level voltages to gamma correction
VOUT = xVH + (1 − x)VM + y(VM −VL ) + α, (6) curve, the nonlinear sub-DAC which followed its rule still

2323
0.4
for the scanning time of which is about 16.5µs. The static
current consumption of source driver circuit in each channel
0.2 is 1.4µA.
V. C ONCLUSION
DNL (LSB)

0.0
This paper presents a two-stage 8-bit voltage-mode
AMOLED driver with a gamma correction first stage DAC
-0.2 and a nonlinear interpolation sub-DAC. Considering the char-
acteristics of AMOLED panels, this design improved the
accuracy of grey level voltages by employing the polynomial
-0.4
interpolation method instead of the linear one. The V/I con-
0 50 100 150 200 250
verter and interpolation cell achieved the implementation of
Input 8-bit data nonlinear interpolation without complicated construction. The
driver circuits were designed in 0.35-µm CMOS technology,
Fig. 5. DNL for the 8-bit proposed AMOLED driver. a die area of 65µm×95µm was occupied for each sub-DAC.
Fig. 5, 6, 7 displays DNL and INL of 0.43 LSB and 0.43
LSB with settling time of 6.8µs within 0.2% tolerance of
0.2 final voltage, respectively. The simulation results show that
the 8-bit gamma correction driver with nonlinear interpolation
is suitable for AMOLED panels.
0.0
INL (LSB)

ACKNOWLEDGMENT
This work was supported by Beijing Science Schedule
-0.2
Projection (Z121100006512003) and 5150 projection of JiNan,
and was supported in part by the National Natural Science
-0.4
Foundation of China (61272049).
R EFERENCES
0 50 100 150 200 250
Input 8-bit data
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Time(s)

Fig. 7. Output waveform as the digital data changed from ‘00H ’ to ‘FFH ’.

2324

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