This Study Resource Was: Lab Report:08

LAB REPORT:08
Electronics 1
m
er as
co
eH w
Muhammad Rohan
o.
Name:
rs e
ou urc
o
FA18-BEE-072.
aC s
Registration
v i y re
Number:
ed d
ar stu
Class: BEE-3B.
sh is
Th
Mam Riffat Shaista

Instructor's
Name:
Page | 1
This study source was downloaded by 100000811909576 from CourseHero.com on 11-20-2021 13:53:20 GMT -06:00
https://www.coursehero.com/file/85752495/Lab-report-electronics-8Fa18bee-072docx/
Lab # 8 Common Emitter Amplifier
OBJECTIVES
The objectives of this experiment are to
 Demonstrate the operation and characteristics of the small signal common emitter
amplifier and
 Investigate what influences the voltage gain
Introduction:
m
er as
A common-emitter amplifier is one of three basic single-stage bipolar-junction-transistor (BJT)
co
amplifier topologies, typically used as a voltage amplifier. In common emitter amplifier circuit
eH w
the base terminal of the transistor serves as the input, the collector is the output, and the emitter
is common to both (for example, it may be tied to ground reference or a power supply rail),
o.
hence its name.
rs e
ou urc
The common emitter amplifier is characterized by the application of the amplifier input
signal to the base lead while its output is taken from the collector, which always gives the
o
phase shift.
aC s
Av=-(RC||RL)/RE1
v i y re
Where minus sign shows phase shift.

ed d
In this experiment you will be testing a single stage common emitter amplifier. You will be
measuring voltage gain, amplifier phase shift and observing the amplifier response to the
ar stu
loading.
In troubleshooting section you will insert amplifier faults and observe failed amplifier AC &
sh is
DC circuit values.
Th
EQUIPMENT AND MATERIALS
 DC power supply
 Digital Multimeter
 Dual-trace oscilloscope
 Function Generator
 Circuit protoboard
Page | 2
 Transistor: Q2N3904
 Resistors: 150 Ω, 2.7 kΩ, two 3.9 kΩ, 4.7 kΩ, 10 kΩ
 Capacitors: Two 2.2 µF, 10 µF
Experimental procedure:
 Wire the circuit as shown in fig 1, omitting the signal generator and power supply.
 After you have checked all the connections, apply the 15-V supply voltage to the bread
board. With DMM, individually measure the transistor dc base, emitter, and collector
voltages with respect to ground, recording your results in Table 1. Based on the actual
resistor values, determine the expected values of these voltages, assuming a base - emitter
voltage drop of 0.7 V, and compare them with the measured values in Table 1.
 Connect Channel 1 of oscilloscope to point I ( ) and Channel 2 to point O ( ).
m
er as
Then connect the signal generator to the circuit and adjust the sine wave output level of the
generator at 0.2 V peak-to-peak at a frequency of 5 kHz.
co
eH w
Using measured value for the dc collector voltage obtained in Step 2, calculate the dc collector
o.
current .
rs e
ou urc
 Calculate the expected voltage gain from base to collector and record in Table 3.
o
Now measure the actual voltage gain by dividing the peak-to-peak output voltage by the peak-
aC s
to-peak input voltage .

v i y re
 Now remove . You should observe that the output voltage level increases. It does
so because the load resistance affects the voltage gain of the amplifier stage.
ed d
 Reconnect the 3.9 kΩ load resistor as in the original circuit. Remove the 10µF bypass
ar stu
capacitor from the circuit. You should observe that the output voltage decreases tremendously. It
does so because the total ac emitter resistance is now + , in addition to the transistor’s
sh is
internal ac resistance, .
Th
SIMULATIONS:-
Page | 3
m
TABLE 1:-
er as
co
Parameter Simulated Value % Error
eH w
o.
VB 0.9
rs e 0
ou urc
VE 6.1 0.3%
VC 8 0.5%
o
aC s
v i y re
ed d
ar stu
sh is
Th
Page | 4
m
er as
co
eH w
o.
rs e
ou urc
o
aC s
v i y re
ed d
ar stu
Table 2:-
sh is
Parameter Value
Th
IE 2.0mA
IC 1.78mA
R
Gm
Page | 5
m
er as
co
TABLE 3:-
eH w
o.
Condition VIN rs e VOUT Measured Expected % Error
Gain(AvL) Gain(AvL)
ou urc
Normal 50mv 500mv 58.27us 60 0.2%
Circuit
( Step 6)
o
No Load 50mv 200mv 59us 60 0.2%

aC s
( Step 7)
v i y re
No bypass 50mv 500mv 59us 60 0.2%

capacitor
( Step 8)
ed d
ar stu
TROUBLESHOOTING:-
Capacitors have three failure modes: They can open, short, or leak. You will now explore what happens
to the Vout when the Emitter bypass capacitor opens
sh is
Th
Page | 6
m
With emitter bypass capacitor:
er as
Vout=
co
Av =
eH w
o.
Without emitter bypass capacitor: rs e
Vout=
ou urc
Av =
Fault 2: Transistor shorted:-

o
aC s
v i y re
ed d
ar stu
sh is
Th
Vout = VE =
VC = VRC =
Page | 7
Critical Analysis:
In this lab we verified the two major characteristics of a common-emitter amplifier. One of the
characteristics was phase shift and other was voltage amplification. For observation of phase shift it
was noted that the signals were to be displayed at the same time and then would stop the signal on
the oscilloscope or the wave would not be seen. While performing this experiment, we need to be
on our toes so that the waveform does not disappears otherwise we will not see the phase shift.
Secondly, we should also be careful while making the circuit on the breadboard so that no fault
comes in the way.
m
er as
co
eH w
o.
rs e
ou urc
o
aC s
v i y re
ed d
ar stu
sh is
Th
Page | 8
Powered by TCPDF (www.tcpdf.org)

This Study Resource Was: Lab Report:08

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

This Study Resource Was: Lab Report:08

Uploaded by

Copyright:

Available Formats

LAB REPORT:08

Mam Riffat Shaista

 Investigate what influences the voltage gain

Where minus sign shows phase shift.

EQUIPMENT AND MATERIALS

to-peak input voltage .

No Load 50mv 200mv 59us 60 0.2%

No bypass 50mv 500mv 59us 60 0.2%

Fault 2: Transistor shorted:-

You might also like