LECTURE 10

LOGIC CIRCUITS
• Logic Families indicate the type of logic circuit used in the IC. The main types of logic families
are:

TTL(Transistor Transistor Logic)

CMOS (Complementary Metal Oxide Semiconductor)
ECL (Emitter Coupled Logic)
• Over the years, improvements in TTL logic circuits have been made, which has led to
subfamilies of transistor-transistor logic ICs.

• The following six TTL subfamilies are currently available from National Semiconductor
Corporation:
• 1. Standard TTL logic -Typical IC marking: 7404
• 2. Low-power TTL logic : 74L04
• 3. Low-power Schottky TTL logic : 74LS04
• 4. Schottky TTL logic- 74S04
• 5. Advanced Schottky TTL logic -74AS04
• 6. Advanced low-power Schottky TTL logic- 74ALS04
• The code letters L, LS, S, ALS, and AS are used in the middle of the 7400 series number to
designate the subfamily.
• The subfamilies with the code letter S contain a Schottky barrier diode to increase switching
speed.
• Several companies also use the code letter F (as in 74F04) for a fast advanced Schottky TTL IC.

• The main characteristics of Logic families include:

Speed
Fan-in
Fan-out
Noise Immunity
Power Dissipation
Speed: Speed of a logic circuit is determined by the time between the application of input and
change in the output of the circuit.

Fan-in: It determines the number of inputs the logic gate can handle.

Fan-out: Determines the number of circuits that a gate can drive.

Noise Immunity: Maximum noise that a circuit can withstand without affecting the output.

Power: When a circuit switches from one state to the other, power dissipates.

• Advantages of TTL logic families include high switching speed (125 MHz), less noise and
more current (3 mA) driving capability.
CMOS logic

• CMOS (Complementary Metal Oxide Semiconductor) has complementary and symmetrical

NMOS and PMOS transistors

• Because of high noise immunity and low static power dissipation, CMOS logic families is most
preferred in large scale integrated circuits.

• Hence, it is prevalently used in devices demanding low power dissipation, such as digital
wristwatches and other battery powered devices, or in devices operated in noisy environments,
such as industrial plants.
CMOS Inverter circuit
• Unlike TTL logic, CMOS logic requires two supply voltages, 𝑽𝑫𝑫 and 𝑽𝑺𝑺 .
• In typical logical designs, 𝑽𝑫𝑫 ranges from +3 V to +16 V. The other supply, 𝑽𝑺𝑺 , is normally
grounded.
• Also, the physical representation of the binary states in CMOS logic is not entirely compatible
with TTL logic.
• As a consequence of CMOS's extremely high input impedance, the logic levels in CMOS
systems are essentially 𝑽𝑫𝑫 and ground.
• If, for example, a 5 volt power supply is used, LOW typically ranges from 0 to 0.01 V and
HIGH from 4.99 to 5.0 V for CMOS outputs.
• Input voltages ranging from 3.5 to 5 V are recognized as HIGH and voltages from 0 to 1.5 V as
LOW.
FOR MORE INFORMATION ON CMOS LOGIC REFER TO:
LOGIC DESIGN PRINCIPLES: WITH EMPHASIS ON TESTABLE SEMICUSTOM
CIRCUITS
Prentice-Hall International Editions
EDWARD J.McCLUSKEY
Page: 117-124
• Interfacing is the method of connecting two electronic devices such as logic gates.
• Manufacturers guarantee that, within a family of logic circuits, one gate will drive another e.g
the two TTL gates shown in the diagram below are simply connected together with no extra
parts required and no problems.
• A second example of two CMOS gates interfaced is illustrated in the second diagram. In both
examples the manufacturer has taken great care to make sure the devices would interface easily
and properly.
• CMOS and TTL logic levels (voltages) are defined differently.
• Because of the differences in voltage levels, CMOS and TTL ICs usually cannot simply be
connected directly together as within a family.
• Current requirements for CMOS and TTL ICs also are different.
• Therefore, TTL and CMOS ICs usually cannot be connected directly. Special simple interface
techniques will be used.
• Figure below shows examples of TTL-to-CMOS interfacing.
• In the TTL-to-CMOS interface, current compatibility is always there. The voltage level
compatibility in the two states is a problem.
• 𝑉𝐼𝑁 (min.) of TTL devices is too low as regards the 𝑉𝐼𝑁 (min.) requirement of CMOS devices.
• When the two devices are operating on the same power supply voltage, that is, 5 V, a pull-up
resistor achieves compatibility as shown in figure of previous slide.
• The pull-up resistor causes the TTL output to rise to about 5V when HIGH.
• When the two are operating on different power supplies, one of the simplest interface techniques
is to use a transistor (as a switch) in-between the two, as shown below.
• Figure shows the use of a 2.2-kΩ pull-up resistor for interfacing low-power TTL ICs with
CMOS ICs.
• CMOS-to-TTL interfacing is even easier easy if both devices operate on a common +5-V
power supply.
• Figure (c) shows both CMOS and low-power TTL ICs sharing the same +5-V power supply.
• A direct connection between a CMOS output and any one low-power TTL input can be made.
• Note that the CMOS gate can drive only one low-power TTL input. The exception would be
74HC00 series CMOS, which can drive up to 10 low-power TTL inputs.
• QUESTION
Show the interfacing of a CMOS NAND gate driving a low-power Schottky TTL OR gate.
Use a +5V power supply.