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A B C D E

1 LCFC Confidential 1

Skids/Mudflap
2
E14/R14/E15/R15 2

NM-C421 Rev1.0 Schematic


Intel Comet Processor with DDR4 + PCH
3 AMD R19M-P25 50/70 3

AMD R19M-M25-50
2019-07-05 Rev1.0

4 4

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 COVER PAGE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 1 of 128


A B C D E

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A B C D E

DDR4
GPU 2400 Mhz
VRAM DDR5 AMD PCIE x 4 DDR4 400MHz SODIMM A
GDDR5 (PCIE Lane 5~8) NON interleave
(R19M-P25-70) Page 33~34
Page 45 (R18M-M2-60)
Page 37~44
DIS only (SWG)
1 1

15" LCD FHD eDP x 2


(PORT 6)
Touch Panel (Optional) Left-Front
Page 51 eDP coxail Y cable(40 Pin) USB 2.0 x 1 (PORT 4)
USB 2.0 x 1 JUSB2
USB 3.0 x 1 (PORT 4) USB 2.0 Port 1
(PORT 8) Camera(Digital MIC) USB 3.0 Port 2 Page 69
LED signal
LENOVO LED Logo
Page 51 USB 2.0 x 1 (PORT 3) Left-Back
JUSB3(AOU)
USB 3.0 x 1 (PORT 3) USB 2.0 Port 1
USB2.0 (PORT 2) USB 3.0 Port 2 Page 69

Intel CPU HDD FFC cable

Type-C PD Comet Lake U SATA x 1 (PCIE Lane 11) HDD CONN HDD 2.5"
CONTROLLER USB3.0 Page 96
USB (PORT 2) 15W (UM A& DIS)
JUSB3(Type-C)
Page 63 DDI1 Comet Lake PCH-LP
RTS5455 Type M CONN
10 USB 2.0/1.1 Ports PCIE x 4(PCIELane13~16) M2 Slot for 2280 PCIE SSD
2
6 USB 3.0 Ports SATA x 1(TBD) (Type M CONN) 2

3 SATA Ports Page 64 Type M CONN


SATA SSD
Page 59 16 PCIE Ports
HD Audio
LPC I/F PCIE x 1 (PCIE Lane 10)
ACPI 3.0 USB 2.0 x 1 (PORT 5) NGFF Card WLAN
HDMI Conn. DDI2 CNVi(TBD) (Type E)
SMBus Page 54 Page 66

LPC BUS
eSPI BUS (RESERVED)

HDA Codec (2CH 4W/4ohm)


HDA 2CH Speaker
Thermal Sensor Page 82
SMBus
Fintek Embedded Controller Synaptics
F75303M Page 92 CX11880-11Z
ITE
IT8227E-256 MIC IN/GND

Track Point Click Pad PS2 HP R/L Univeral Jack


Page 89 Page 89 Page 85
Page 79
3 3
Page 78
Int. K/B Matrix SPI BUS
I2C
Mirror function

40 PIN WTB Cable


G-sensor FAN Int. KB Flash ROM
Fintek SPI BUS
LIS3DSHTR
16+8M
Page 91 Page 90 Page 88 Page 21

MB_40 Pin conn IO_40 Pin conn


TPM 2.0
M:ST ST33HTPH2E32AHC0
Page 73
IO_Board
S:Nuvoton NPCT750LABYX
Page 98

TOUCH FPR
power botton&Finger Print USB 2.0 x 1 (PORT 9)
JYT
JYAA139A

Giga LAN PCIe x 1


RJ45 Conn. MDI
Page ?? Realtek (PCIE Lane 9)
R8111GUS
4 4

JUSB4 (USB2.0) USB 2.0 x 1


Page ??
(PORT 5)

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLOCK DIAGRAM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 2 of 128


A B C D E

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5 4 3 2 1

TABLE : Functional Strap

GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD (DDP1 I2C / TBT LSX #0 PINS VCCIO CONFIGURATION)


DP port Enable Disable
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD (DDP2 I2C / TBT LSX #1 PINS VCCIO CONFIGURATION)
DDPB_CTRLDATA Pull up to 3.3 V with 2.2-k ohm ± 5% resistor no connect
GPP_D10/DDP3_CTRLDATA/TBT_LSX2_RXD (DDP3 I2C / TBT LSX #2 PINS VCCIO CONFIGURATION)
DDPC_CTRLDATA Pull up to 3.3 V with 2.2-k ohm ± 5% resistor no connect
D D
GPP_D12/DDP4_CTRLDATA/TBT_LSX3_RXD (DDP4 I2C / TBT LSX #3 PINS VCCIO CONFIGURATION)

HIGH 3.3V

LOW 1.8V

UCPU1A

DDIP1_0N AL5 AG4 EDP_TXN0


59 DDIP1_0N DDIP1_0P DDI1_TXN_0 EDP_TXN_0 EDP_TXP0 EDP_TXN0 51
AL6 AG3
59 DDIP1_0P DDIP1_1N DDI1_TXP_0 EDP_TXP_0 EDP_TXN1 EDP_TXP0 51
AJ5 AG2
59 DDIP1_1N DDIP1_1P DDI1_TXN_1 EDP_TXN_1 EDP_TXP1 EDP_TXN1 51
AJ6 AG1
TYPE-C 59
59
DDIP1_1P
DDIP1_2N
DDIP1_2N AF6 DDI1_TXP_1
DDI1_TXN_2
EDP_TXP_1
EDP_TXN_2
AJ4
EDP_TXP1 51
DDIP1_2P AF5 AJ3
59 DDIP1_2P DDIP1_3N DDI1_TXP_2 EDP_TXP_2
AE5 AJ2
59 DDIP1_3N DDIP1_3P DDI1_TXN_3 EDP_TXN_3
AE6 AJ1
59 DDIP1_3P DDI1_TXP_3 EDP_TXP_3
DDIP2_2N AC4
54 DDIP2_2N DDIP2_2P DDI2_TXN_0 EDP_AUXN
AC3 AH4
54 DDIP2_2P DDIP2_1N DDI2_TXP_0 EDP_AUX_N EDP_AUXP EDP_AUXN 51
C AC1 AH3 C
54 DDIP2_1N DDIP2_1P DDI2_TXN_1 EDP_AUX_P EDP_AUXP 51
AC2
HDMI 54
54
DDIP2_1P
DDIP2_0N
DDIP2_0N AE4 DDI2_TXP_1
DDI2_TXN_2 DISP_UTILS
AM7
DDIP2_0P AE3
54 DDIP2_0P DDIP2_3N DDI2_TXP_2 DDIP1_AUXN
AE1 AC7
54 DDIP2_3N DDIP2_3P DDI2_TXN_3 DDI1_AUX_N DDIP1_AUXP DDIP1_AUXN 59
AE2 AC6
54 DDIP2_3P DDI2_TXP_3 DDI1_AUX_P DDIP1_AUXP 59
AD4
VCC3B DDI2_AUX_N
VCC3_SUS VCCIO AD3
DDI2_AUX_P
AG7
DDI3_AUX_N
AG6
DDI3_AUX_P
R0313

R0314

R0301

R0311
CN6 DDIP1_HPD

1/20W_24.9_1%_0201
GPP_E13/DDPB_HPD0/DISP_MISC0 DDIP2_HPD DDIP1_HPD 59
CM6
GPP_E14/DDPC_HPD1/DISP_MISC1 DDIP2_HPD 54
1

1
Change to 2K for 15m test CP7
GPP_E15/DPPD_HPD2/DISP_MISC2
CP6
GPP_E16/DPPE_HPD3/DISP_MISC3

R0307
@ CM7 EDP_HPD
GPP_E17/EDP_HPD/DISP_MISC4 EDP_HPD 51
VGA_BLON
1/16W_2K_5%_0402

1/16W_2K_5%_0402

1/20W_20K_5%_0201

CK11
1/20W_2.2K_5%_0201

VGA_BLON 85
2

2
EDP_BKLTEN PANEL_POWER_ON_CPU
CG11
EDP_VDDEN PANEL_BKLT_CTRL_CPU
CH11
EDP_BKLTCTL PANEL_BKLT_CTRL_CPU 51

1/20W_100K_5%_0201

1/20W_100K_5%_0201

1/20W_100K_5%_0201

1/20W_100K_5%_0201

1/20W_100K_5%_0201
2

2
EDP_COMP AM6
DISP_RCOMP

R0304

R0303

R0302

R0305

R0306
CC8 @ @
GPP_E19 CC9 GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#
GPP_E19/DPPB_CTRLDATA

1
DDIP2_CTRLCLK CH4
54 DDIP2_CTRLCLK DDIP2_CTRLDATA GPP_E20/DPPC_CTRLCLK
CH3
54 DDIP2_CTRLDATA GPP_E21/DPPC_CTRLDATA

-GPU_RST CP4
37 -GPU_RST GPP_E22/DPPD_CTRLCLK
To VGA_CORE IC, RPC3.7 GFX_PWR_EN R0315 2 1 0_0201_SP GFX_PWR_EN_PCH CN4
50 GFX_PWR_EN GPP_E23/DPPD_CTRLDATA
TX Net NAME:1R8VIDEO_AON_ON CR26
GPP_H17 GPP_H16/DDPF_CTRLCLK
CP26
GPP_H17/DDPF_CTRLDATA
1/20W_1M_1%_0201

1/20W_1M_1%_0201

1/20W_20K_5%_0201
1

B 1 of 20 B
R0309

@
R0308

R0312

WHISKEYLAKE-U_BGA1528
DIS@ DIS@ @
2

PANEL_POWER_ON_CPU D0301 2 1 RB520CM-30T2R_VMN2M2 PANEL_POWER_ON


PANEL_POWER_ON 51
LCD_SELF_TEST_ON D0302 2 1 RB520CM-30T2R_VMN2M2
51,85 LCD_SELF_TEST_ON

2
R0310

eDP_RCOMP
Trace Width: 5 mils 1/20W_10K_5%_0201
Isolation Spacing: 25 mils

1
Resistor Value: 24.9 or 100 ohm 1%
Max Length: 600 mils
Pull-up to VCCIO through 24.9-ohm 1%resistor.
For CNL, it is 100 ohm 1%
Please refer to PDG Table 3-2.
Cited by 575412_WHL_U_PDG_Rev0.9

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (1/16): DDI/TYPE-C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 3 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

UCPU1B
V32 -M_A_DDRCLK0_1066M
DDR0_CKN_0/DDR0_CKN_0 M_A_DDRCLK0_1066M -M_A_DDRCLK0_1066M 33
V31
M_A_DQ0 DDR0_CKP_0/DDR0_CKP_0 -M_A_DDRCLK1_1066M M_A_DDRCLK0_1066M 33 M_A_DQ[63:0] 5,33
A26 T32
M_A_DQ1 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKN_1/DDR0_CKN_1 M_A_DDRCLK1_1066M -M_A_DDRCLK1_1066M 33
D26 T31
M_A_DQ2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKP_1/DDR0_CKP_1 M_A_DDRCLK1_1066M 33 M_A_A[16:0] 33
D28
M_A_DQ3 DDR0_DQ_2/DDR0_DQ_2 M_A_CKE0
C28 U36
M_A_DQ4 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKE_0/DDR0_CKE_0 M_A_CKE1 M_A_CKE0 33 -M_A_DQS[7:0] 5,33
B26 U37
M_A_DQ5 DDR0_DQ_4/DDR0_DQ_4 DDR0_CKE_1/DDR0_CKE_1 M_A_CKE1 33
C26 U34
M_A_DQ6 DDR0_DQ_5/DDR0_DQ_5 DDR0_CKE_2/NC M_A_DQS[7:0] 5,33
B28 U35
TABLE M_A_DQ7 A28 DDR0_DQ_6/DDR0_DQ_6 DDR0_CKE_3/NC
M_A_DQ8 DDR0_DQ_7/DDR0_DQ_7 -M_A_CS0
B30 AE32
M_A_DQ9 DDR0_DQ_8/DDR0_DQ_8 DDR0_CS#_0/DDR0_CS#_0 -M_A_CS1 -M_A_CS0 33
D30 AF32
Pin Interleave Non-Interleave M_A_DQ10 B33 DDR0_DQ_9/DDR0_DQ_9 DDR0_CS#_1/DDR0_CS#_1
AE31 M_A_ODT0 -M_A_CS1 33
M_A_DQ11 DDR0_DQ_10/DDR0_DQ_10 DDR0_ODT_0/DDR0_ODT_0 M_A_ODT1 M_A_ODT0 33
D32 AF31
D M_A_DQ12 DDR0_DQ_11/DDR0_DQ_11 NC/DDR0_ODT_1 M_A_ODT1 33 D
A30
A26 DDR0_DQ[0] DDR0_DQ[0] M_A_DQ13 C30 DDR0_DQ_12/DDR0_DQ_12
AC37 M_A_A0
D26 DDR0_DQ[1] DDR0_DQ[1] M_A_DQ14 B32 DDR0_DQ_13/DDR0_DQ_13 DDR0_CAB_9/DDR0_MA_0
AC36 M_A_A1
M_A_DQ15 DDR0_DQ_14/DDR0_DQ_14 DDR0_CAB_8/DDR0_MA_1 M_A_A2
D28 DDR0_DQ[2] DDR0_DQ[2] M_A_DQ32
C32
DDR0_DQ_15/DDR0_DQ_15 DDR0_CAB_5/DDR0_MA_2
AC34
M_A_A3
H37 AC35
C28 DDR0_DQ[3] DDR0_DQ[3] M_A_DQ33 H34 DDR0_DQ_16/DDR0_DQ_32 NC/DDR0_MA_3
AA35 M_A_A4
DDR0_DQ_17/DDR0_DQ_33 NC/DDR0_MA_4
B26 DDR0_DQ[4] DDR0_DQ[4]
M_A_DQ34 K34
DDR0_DQ_18/DDR0_DQ_34 DDR0_CAA_0/DDR0_MA_5
AB35 M_A_A5
M_A_DQ35 K35 AA37 M_A_A6
C26 DDR0_DQ_19/DDR0_DQ_35 DDR0_CAA_2/DDR0_MA_6
B28 DDR0_DQ[5] DDR0_DQ[5] M_A_DQ36
M_A_DQ37
H36
H35 DDR0_DQ_20/DDR0_DQ_36 DDR0_CAA_4/DDR0_MA_7
AA36
AB34
M_A_A7
M_A_A8
A28 DDR0_DQ[6] DDR0_DQ[6] M_A_DQ38 K36 DDR0_DQ_21/DDR0_DQ_37 DDR0_CAA_3/DDR0_MA_8
DDR0_DQ_22/DDR0_DQ_38 DDR0_CAA_1/DDR0_MA_9
W36 M_A_A9
M_A_DQ39 M_A_A10
B30 DDR0_DQ[7] DDR0_DQ[7] M_A_DQ40
K37
N36 DDR0_DQ_23/DDR0_DQ_39 DDR0_CAB_7/DDR0_MA_10
Y31
W34 M_A_A11
Block 0 D30 DDR0_DQ[8] DDR0_DQ[8] M_A_DQ41 N34 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAA_7/DDR0_MA_11
DDR0_DQ_25/DDR0_DQ_41 DDR0_CAA_6/DDR0_MA_12
AA34 M_A_A12
TABLE of BJT (Q0401)
M_A_DQ42 R37 AC32 M_A_A13
B33 DDR0_DQ[9] DDR0_DQ[9] M_A_DQ43 R34 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAB_0/DDR0_MA_13
D32 DDR0_DQ[10] DDR0_DQ[10] M_A_DQ44 N37 DDR0_DQ_27/DDR0_DQ_43
AC31 M_A_A14 Vendor LCFC P/N Description
M_A_DQ45 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAB_2/DDR0_MA_14 M_A_A15
A30 N35 AB32
DDR0_DQ[11] DDR0_DQ[11] M_A_DQ46 R36 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_1/DDR0_MA_15
Y32 M_A_A16 ROHM SB00000WC0J S TR DTC015TMT2L NPN VMT3
C30 DDR0_DQ[12] DDR0_DQ[12] M_A_DQ47 R35 DDR0_DQ_30/DDR0_DQ_46 DDR0_CAB_3/DDR0_MA_16

B32 AN35 DDR0_DQ_31/DDR0_DQ_47


W32 M_A_BS0 TOSHIBA SB000010700 S TR RN1131MFV NPN VESM
DDR0_DQ[13] DDR0_DQ[13] AN34 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_4/DDR0_BA_0
AB31 M_A_BS1 M_A_BS0 33
C32 DDR0_DQ[14] DDR0_DQ[14] AR35 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_6/DDR0_BA_1
V34 M_A_BG0 M_A_BS1 33 ON SB000013J00 S TR DTC115TM3T5G NPN SOT-723-3
DDR0_DQ_34/DDR1_DQ_2 DDR0_CAA_5/DDR0_BG_0 M_A_BG0 33
AR34
DDR0_DQ[15] DDR0_DQ[15] AN37 DDR0_DQ_35/DDR1_DQ_3
V35 -M_A_ACT
DDR0_DQ_36/DDR1_DQ_4 DDR0_CAA_8/DDR0_ACT# M_A_BG1 -M_A_ACT 33
AN36 W35
DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_9/DDR0_BG_1 M_A_BG1 33
AR36
DDR0_DQ_38/DDR1_DQ_6 -M_A_DQS0
AR37 C27
DDR0_DQ_39/DDR1_DQ_7
DDR0_DQSN_0/DDR0_DQSN_0 M_A_DQS0
AU35 D27 VCC3M
DDR0_DQ_40/DDR1_DQ_8
DDR0_DQSP_0/DDR0_DQSP_0 -M_A_DQS1
AU34 D31
DDR0_DQ_41/DDR1_DQ_9
DDR0_DQSN_1/DDR0_DQSN_1 M_A_DQS1
AW35 C31
H37 DDR0_DQ[16] DDR0_DQ[32] AW34 DDR0_DQ_42/DDR1_DQ_10
DDR0_DQSP_1/DDR0_DQSP_1
J35 -M_A_DQS4
DDR0_DQ_43/DDR1_DQ_11
DDR0_DQSN_2/DDR0_DQSN_4
H34

2
DDR0_DQ[17] DDR0_DQ[33] AU37
DDR0_DQ_44/DDR1_DQ_12
DDR0_DQSP_2/DDR0_DQSP_4
J34 M_A_DQS4
AU36 P34 -M_A_DQS5
K34 DDR0_DQ[18] DDR0_DQ[34] AW36 DDR0_DQ_45/DDR1_DQ_13
DDR0_DQSN_3/DDR0_DQSN_5
P35 M_A_DQS5 VCC1R2A R0402
DDR0_DQ_46/DDR1_DQ_14
DDR0_DQSP_3/DDR0_DQSP_5
K35 DDR0_DQ[19] DDR0_DQ[35] AW37
DDR0_DQ_47/DDR1_DQ_15
DDR0_DQSN_4/DDR1_DQSN_0
AP35 1/20W_100K_5%_0201
BA35 AP34
H36 DDR0_DQ[20] DDR0_DQ[36]

1
DDR0_DQ_48/DDR1_DQ_32
DDR0_DQSP_4/DDR1_DQSP_0
BA34 AV34
DDR0_DQ_49/DDR1_DQ_33
DDR0_DQSN_5/DDR1_DQSN_1
H35 DDR0_DQ[21] DDR0_DQ[37] BC35
DDR0_DQ_50/DDR1_DQ_34
DDR0_DQSP_5/DDR1_DQSP_1
AV35
C BC34 BB35 DDR_VTT_PG_CTRL C
K36 DDR0_DQ[22] DDR0_DQ[38] BA37 DDR0_DQ_51/DDR1_DQ_35
DDR0_DQSN_6/DDR1_DQSN_4
BB34
DDR_VTT_PG_CTRL 106
DDR0_DQ_52/DDR1_DQ_36
DDR0_DQSP_6/DDR1_DQSP_4
K37 DDR0_DQ[23] DDR0_DQ[39] BA36
DDR0_DQ_53/DDR1_DQ_37
DDR0_DQSN_7/DDR1_DQSN_5
BF34

1
BC36 BF35
N36 DDR0_DQ[24] DDR0_DQ[40] BC37 DDR0_DQ_54/DDR1_DQ_38
DDR0_DQSP_7/DDR1_DQSP_5
Block 2 N34 DDR0_DQ_55/DDR1_DQ_39 -M_A_ALERT
DDR0_DQ[25] DDR0_DQ[41] BE35
BE34 DDR0_DQ_56/DDR1_DQ_40 NC/DDR0_ALERT#
W37
W31 M_A_PARITY -M_A_ALERT 33
2 Q0401
DTC015TMT2L_VMT3
R37 DDR0_DQ[26] DDR0_DQ[42] BG35 DDR0_DQ_57/DDR1_DQ_41 NC/DDR0_PAR
F36 M_A_VREF_CA_CPU M_A_PARITY 33
DDR0_DQ_58/DDR1_DQ_42 DDR_VREF_CA M_A_VREF_CA_CPU 33
R34 DDR0_DQ[27] DDR0_DQ[43] BG34 D35

3
DDR0_DQ_59/DDR1_DQ_43 DDR0_VREF_DQ_0
BE37 D37
N37 DDR0_DQ[28] DDR0_DQ[44] BE36 DDR0_DQ_60/DDR1_DQ_44 DDR0_VREF_DQ_1
E36
DDR0_DQ_61/DDR1_DQ_45 DDR1_VREF_DQ
N35 DDR0_DQ[29] DDR0_DQ[45] BG36
BG37 DDR0_DQ_62/DDR1_DQ_46 DDR_VTT_CNTL
C35 DDR_PG_CTRL

R36 DDR0_DQ[30] DDR0_DQ[46] DDR0_DQ_63/DDR1_DQ_47

2
R35 DDR0_DQ[31] DDR0_DQ[47] WHISKEYLAKE-U_BGA1528 R0401
2 of 20
@ 1/20W_10K_5%_0201

1
AN35 DDR0_DQ[32] DDR1_DQ[0]
AN34 DDR0_DQ[33] DDR1_DQ[1]
AR35 DDR0_DQ[34] DDR1_DQ[2]
AR34 DDR0_DQ[35] DDR1_DQ[3]
AN37 DDR0_DQ[36] DDR1_DQ[4] TABLE
AN36 DDR0_DQ[37] DDR1_DQ[5]
AR36 TABLE
DDR0_DQ[38] DDR1_DQ[6] Pin DDR3L LPDDR3 DDR4
AR37 DDR0_DQ[39]
AU35
DDR1_DQ[7] Pin Interleave Non-Interleave
DDR0_DQ[40] DDR1_DQ[8] AB35 DDR0_MA[5] DDR0_CAA[0] DDR0_MA[5]
Block 4 AU34 W36 DDR0_MA[9] DDR0_CAA[1] DDR0_MA[9]
AW35 DDR0_DQ[41] DDR1_DQ[9] C27 DDR0_DQSN[0] DDR0_DQSN[0]
DDR0_DQ[42] AA37 DDR0_MA[6] DDR0_CAA[2] DDR0_MA[6]
AW34 DDR1_DQ[10] D27 DDR0_DQSP[0] DDR0_DQSP[0] AB34
DDR0_DQ[43] DDR1_DQ[11] Block 0 D31 DDR0_DQSN[1] DDR0_DQSN[1] DDR0_MA[8] DDR0_CAA[3] DDR0_MA[8]
AU37 AA36 DDR0_CAA[4]
B
AU36 DDR0_DQ[44] DDR1_DQ[12] C31 DDR0_DQSP[1] DDR0_DQSP[1] DDR0_MA[7] DDR0_MA[7] B
V34 DDR0_CAA[5]
AW36 DDR0_DQ[45] DDR1_DQ[13] AA34
DDR0_BA[2] DDR0_BG[0]
DDR0_DQ[46] DDR0_MA[12] DDR0_CAA[6] DDR0_MA[12]
AW37 DDR1_DQ[14] W34
DDR0_DQ[47] J35 DDR0_DQSN[2] DDR0_DQSN[4] V35 DDR0_MA[11] DDR0_CAA[7] DDR0_MA[11]
DDR1_DQ[15] DDR0_CAA[8]
J34 DDR0_DQSP[2] DDR0_DQSP[4] W35 DDR0_MA[15] DDR0_ACT#
Block 2 P34 DDR0_MA[14] DDR0_CAA[9] DDR0_BG[1]
DDR0_DQSN[3] DDR0_DQSN[5]
P35 DDR0_DQSP[3] DDR0_DQSP[5]
BA35 DDR0_DQ[48] DDR1_DQ[32]
BA34 DDR0_DQ[49] DDR1_DQ[33] AP35 DDR0_DQSN[4] DDR1_DQSN[0] AC32 DDR0_MA[13] DDR0_CAB[0] DDR0_MA[13]
BC35 DDR0_DQ[50] DDR1_DQ[34] AP34 AB32 DDR0_CAS# DDR0_CAB[1] DDR0_MA[15]
BC34
DDR0_DQSP[4] DDR1_DQSP[0]
DDR0_DQ[51] DDR1_DQ[35] Block 4 AV34 DDR0_DQSN[5] DDR1_DQSN[1] AC31 DDR0_WE# DDR0_CAB[2] DDR0_MA[14]
BA37 DDR0_DQ[52] DDR1_DQ[36] AV35 Y32
BA36 DDR0_DQSP[5] DDR1_DQSP[1] DDR0_RAS# DDR0_CAB[3] DDR0_MA[16]
DDR0_DQ[53] DDR1_DQ[37] W32 DDR0_BA[0] DDR0_CAB[4] DDR0_BA[0]
BC36 DDR0_DQ[54] DDR1_DQ[38] AC34
BC37 DDR0_MA[2] DDR0_CAB[5] DDR0_MA[2]
DDR0_DQ[55] DDR1_DQ[39] BB35 DDR0_DQSN[6] DDR1_DQSN[4] AB31 DDR0_BA[1] DDR0_CAB[6] DDR0_BA[1]
BE35 Y31
Block 6 BE34
DDR0_DQ[56] DDR1_DQ[40] BB34 DDR0_DQSP[6] DDR1_DQSP[4] DDR0_MA[10] DDR0_CAB[7] DDR0_MA[10]
DDR0_DQ[57] DDR1_DQ[41] Block 6 BF34 DDR0_DQSN[7] DDR1_DQSN[5] AC36 DDR0_MA[1] DDR0_CAB[8] DDR0_MA[1]
BG35 AC37
BG34 DDR0_DQ[58] DDR1_DQ[42] BF35 DDR0_DQSP[7] DDR1_DQSP[5] DDR0_MA[0] DDR0_CAB[9] DDR0_MA[0]
DDR0_DQ[59] DDR1_DQ[43] AC35 DDR0_MA[3] Not Used DDR0_MA[3]
BE37 AA35
BE36 DDR0_DQ[60] DDR1_DQ[44] DDR0_MA[4] Not Used DDR0_MA[4]
BG36 DDR0_DQ[61] DDR1_DQ[45]
BG37 DDR0_DQ[62] DDR1_DQ[46]
DDR0_DQ[63] DDR1_DQ[47]
LOGIC

A A

LOGIC

LOGIC

Security Classification LC Future Center Secret Data Title


Issued Date 2015/09/01 Deciphered Date 2016/12/31 CPU (2/16): DDR (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 4 of 128


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5 4 3 2 1

UCPU1C

M_A_DQ16 M_A_DQ[63:0] 4,33


J22 AF28
M_A_DQ17 DDR1_DQ_0/DDR0_DQ_16
DDR1_CKN_0/DDR1_CKN_0
H25 AF29
M_A_DQ18 DDR1_DQ_1/DDR0_DQ_17DDR1_CKP_0/DDR1_CKP_0 -M_A_DQS[7:0] 4,33
G22 AE28
M_A_DQ19 DDR1_DQ_2/DDR0_DQ_18
DDR1_CKN_1/DDR1_CKN_1
H22 AE29
M_A_DQ20 DDR1_DQ_3/DDR0_DQ_19DDR1_CKP_1/DDR1_CKP_1 M_A_DQS[7:0] 4,33
F25
M_A_DQ21 DDR1_DQ_4/DDR0_DQ_20
J25 T28
M_A_DQ22 DDR1_DQ_5/DDR0_DQ_21DDR1_CKE_0/DDR1_CKE_0
G25 T29
M_A_DQ23 DDR1_DQ_6/DDR0_DQ_22DDR1_CKE_1/DDR1_CKE_1
F22 V28
M_A_DQ24 DDR1_DQ_7/DDR0_DQ_23 DDR1_CKE_2/NC
D22 V29
TABLE M_A_DQ25 C22 DDR1_DQ_8/DDR0_DQ_24 DDR1_CKE_3/NC
M_A_DQ26 DDR1_DQ_9/DDR0_DQ_25
C24 AL37
M_A_DQ27 DDR1_DQ_10/DDR0_DQ_26
DDR1_CS#_0/DDR1_CS#_0
D24 AL35
Pin Interleave Non-Interleave M_A_DQ28 A22 DDR1_DQ_11/DDR0_DQ_27
DDR1_CS#_1/DDR1_CS#_1
AL36
D M_A_DQ29 DDR1_DQ_12/DDR0_DQ_28
DDR1_ODT_0/DDR1_ODT_0 D
B22 AL34
M_A_DQ30 DDR1_DQ_13/DDR0_DQ_29 NC/DDR1_ODT_1
A24 AG36
J22 DDR1_DQ[0] DDR0_DQ[16] M_A_DQ31 B24 DDR1_DQ_14/DDR0_DQ_30DDR1_CAB_9/DDR1_MA_0
AG35
H25 DDR1_DQ[1] DDR0_DQ[17] M_A_DQ48 G31 DDR1_DQ_15/DDR0_DQ_31DDR1_CAB_8/DDR1_MA_1
DDR1_DQ_16/DDR0_DQ_48DDR1_CAB_5/DDR1_MA_2
AF34
M_A_DQ49 G32 AG37
G22 DDR1_DQ[2] DDR0_DQ[18] M_A_DQ50 H29 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_MA_3
AE35
H22 DDR1_DQ[3] DDR0_DQ[19] M_A_DQ51 H28 DDR1_DQ_18/DDR0_DQ_50 NC/DDR1_MA_4
DDR1_DQ_19/DDR0_DQ_51DDR1_CAA_0/DDR1_MA_5
AF35
M_A_DQ52 G28 AE37
F25 DDR1_DQ[4] DDR0_DQ[20] M_A_DQ53 G29 DDR1_DQ_20/DDR0_DQ_52DDR1_CAA_2/DDR1_MA_6
AC29
J25 DDR1_DQ[5] DDR0_DQ[21] M_A_DQ54 H31 DDR1_DQ_21/DDR0_DQ_53DDR1_CAA_4/DDR1_MA_7
DDR1_DQ_22/DDR0_DQ_54DDR1_CAA_3/DDR1_MA_8
AE36
M_A_DQ55 H32 AB29
G25 DDR1_DQ[6] DDR0_DQ[22] M_A_DQ56 L31 DDR1_DQ_23/DDR0_DQ_55DDR1_CAA_1/DDR1_MA_9
AG34
F22 DDR1_DQ[7] DDR0_DQ[23] M_A_DQ57 L32 DDR1_DQ_24/DDR0_DQ_56
DDR1_CAB_7/DDR1_MA_10
DDR1_DQ_25/DDR0_DQ_57
DDR1_CAA_7/DDR1_MA_11
AC28
M_A_DQ58 N29 AB28
D22 DDR1_DQ[8] DDR0_DQ[24] M_A_DQ59 N28 DDR1_DQ_26/DDR0_DQ_58
DDR1_CAA_6/DDR1_MA_12
AK35
Block 1 C22 M_A_DQ60 DDR1_DQ_27/DDR0_DQ_59
DDR1_CAB_0/DDR1_MA_13
DDR1_DQ[9] DDR0_DQ[25] M_A_DQ61
L28
DDR1_DQ_28/DDR0_DQ_60
C24 DDR1_DQ[10] DDR0_DQ[26] M_A_DQ62
L29
N31 DDR1_DQ_29/DDR0_DQ_61
DDR1_CAB_2/DDR1_MA_14
AJ35
AK34
D24 DDR1_DQ[11] DDR0_DQ[27] M_A_DQ63 N32 DDR1_DQ_30/DDR0_DQ_62
DDR1_CAB_1/DDR1_MA_15
DDR1_DQ_31/DDR0_DQ_63
DDR1_CAB_3/DDR1_MA_16
AJ34
A22 DDR0_DQ[28]
AJ29
DDR1_DQ_32/DDR1_DQ_16
B22 DDR1_DQ[12] AJ30
DDR1_DQ_33/DDR1_DQ_17DDR1_CAB_4/DDR1_BA_0
AJ37
AM32 AJ36
A24 DDR1_DQ[13] DDR0_DQ[29] AM31 DDR1_DQ_34/DDR1_DQ_18DDR1_CAB_6/DDR1_BA_1
W29
B24 DDR1_DQ[14] DDR0_DQ[30] AM30 DDR1_DQ_35/DDR1_DQ_19DDR1_CAA_5/DDR1_BG_0
DDR1_DQ_36/DDR1_DQ_20
AM29 Y28
DDR1_DQ[15] DDR0_DQ[31] AJ31 DDR1_DQ_37/DDR1_DQ_21DDR1_CAA_9/DDR1_BG_1
W28
DDR1_DQ_38/DDR1_DQ_22DDR1_CAA_8/DDR1_ACT#
AJ32
DDR1_DQ_39/DDR1_DQ_23 -M_A_DQS2
AR31 H24
DDR1_DQ_40/DDR1_DQ_24
DDR1_DQSN_0/DDR0_DQSN_2 M_A_DQS2
AR32 G24
DDR1_DQ_41/DDR1_DQ_25
DDR1_DQSP_0/DDR0_DQSP_2 -M_A_DQS3
AV30 C23
DDR1_DQ_42/DDR1_DQ_26
DDR1_DQSN_1/DDR0_DQSN_3 M_A_DQS3
AV29 D23
DDR1_DQ_43/DDR1_DQ_27
DDR1_DQSP_1/DDR0_DQSP_3 -M_A_DQS6
AR30 G30
G31 DDR1_DQ[16] DDR0_DQ[48] AR29 DDR1_DQ_44/DDR1_DQ_28
DDR1_DQSN_2/DDR0_DQSN_6
H30 M_A_DQS6
DDR1_DQ_45/DDR1_DQ_29
DDR1_DQSP_2/DDR0_DQSP_6
G32 DDR1_DQ[17] DDR0_DQ[49] AV32
DDR1_DQ_46/DDR1_DQ_30
DDR1_DQSN_3/DDR0_DQSN_7
L30 -M_A_DQS7
AV31 N30 M_A_DQS7 VCC1R2A
H29 DDR1_DQ[18] DDR0_DQ[50] BA32 DDR1_DQ_47/DDR1_DQ_31
DDR1_DQSP_3/DDR0_DQSP_7
AL31
DDR1_DQ_48/DDR1_DQ_48
DDR1_DQSN_4/DDR1_DQSN_2
H28 DDR1_DQ[19] DDR0_DQ[51] BA31
DDR1_DQ_49/DDR1_DQ_49
DDR1_DQSP_4/DDR1_DQSP_2
AL30
BD31 AU31
G28 DDR1_DQ[20] DDR0_DQ[52] DDR1_DQ_50/DDR1_DQ_50
DDR1_DQSN_5/DDR1_DQSN_3

1
BD32 AU30
DDR1_DQ_51/DDR1_DQ_51
DDR1_DQSP_5/DDR1_DQSP_3
C G29 DDR1_DQ[21] DDR0_DQ[53] BA30
DDR1_DQ_52/DDR1_DQ_52
DDR1_DQSN_6/DDR1_DQSN_6
BC31 R0504 C
BA29 BC30 1/20W_470_5%_0201
H31 DDR1_DQ[22] DDR0_DQ[54] BD29 DDR1_DQ_53/DDR1_DQ_53
DDR1_DQSP_6/DDR1_DQSP_6
BH31
DDR1_DQ_54/DDR1_DQ_54
DDR1_DQSN_7/DDR1_DQSN_7
H32 DDR1_DQ[23] DDR0_DQ[55] BD30 BH30

2
DDR1_DQ_55/DDR1_DQ_55
DDR1_DQSP_7/DDR1_DQSP_7
BG31
L31 DDR1_DQ[24] DDR0_DQ[56] BG32 DDR1_DQ_56/DDR1_DQ_56
Y29
Block 3 L32 DDR1_DQ_57/DDR1_DQ_57 NC/DDR1_ALERT#
DDR1_DQ[25] DDR0_DQ[57] BK32
BK31 DDR1_DQ_58/DDR1_DQ_58 NC/DDR1_PAR
AE34
BU31 -DRAMRST
N29 DDR1_DQ[26] DDR0_DQ[58] BG29 DDR1_DQ_59/DDR1_DQ_59 DRAM_RESET# -DRAMRST 33
DDR1_DQ_60/DDR1_DQ_60
N28 DDR1_DQ[27] DDR0_DQ[59] BG30
DDR1_DQ_61/DDR1_DQ_61 DDR_COMP_0
BN28 DDR_RCOMP0 R0501 1 2 1/20W_121_1%_0201
BK30 BN27 DDR_RCOMP1 R0502 1 2 1/20W_80.6_1%_0201
L28 DDR1_DQ[28] DDR0_DQ[60] BK29 DDR1_DQ_62/DDR1_DQ_62 DDR_COMP_1
BN29 DDR_RCOMP2 R0503 1 2 1/20W_100_1%_0201
DDR1_DQ_63/DDR1_DQ_63 DDR_COMP_2
L29 DDR1_DQ[29] DDR0_DQ[61] WHISKEYLAKE-U_BGA1528 WHL RCOMP
N31 DDR1_DQ[30] DDR0_DQ[62] @
3 of 20

N32 DDR1_DQ[31] DDR0_DQ[63]


[WHL PDG]for WHL DDR4 COMPENSATION [WHL PDG]for CNL DDR4 COMPENSATION
DDR_RCOMP[0] Pull down 121 ohm resistor DDR_RCOMP[0] Pull down 100 ohm resistor
DDR_RCOMP[1] Pull down 80.6 ohm resistor DDR_RCOMP[1] Pull down 100 ohm resistor
AJ29 DDR1_DQ[32] DDR1_DQ[16] DDR_RCOMP[2] Pull down 100 ohm resistor DDR_RCOMP[2] Pull down 100 ohm resistor
AJ30 DDR1_DQ[33] DDR1_DQ[17]
AM32 DDR1_DQ[34] DDR1_DQ[18]
AM31 DDR1_DQ[35] DDR1_DQ[19]
AM30 TABLE TABLE
DDR1_DQ[36] DDR1_DQ[20]
AM29 DDR1_DQ[37] DDR1_DQ[21]
AJ31 Pin Interleave Non-Interleave Pin DDR3L LPDDR3 DDR4
AJ32 DDR1_DQ[38] DDR1_DQ[22]
AR31 DDR1_DQ[39] DDR1_DQ[23] H24 DDR1_DQSN[0] DDR0_DQSN[2] AF35 DDR1_MA[5] DDR1_CAA[0] DDR1_MA[5]
Block 5 AR32 DDR1_DQ[40] DDR1_DQ[24] G24 DDR1_DQSP[0] DDR0_DQSP[2] AB29 DDR1_MA[9] DDR1_CAA[1] DDR1_MA[9]
AV30 DDR1_DQ[41] DDR1_DQ[25] Block 1 C23 DDR1_DQSN[1] DDR0_DQSN[3] AE37 DDR1_MA[6] DDR1_CAA[2] DDR1_MA[6]
AV29 DDR1_DQ[42] DDR1_DQ[26] D23 DDR1_DQSP[1] DDR0_DQSP[3] AE36 DDR1_MA[8] DDR1_CAA[3] DDR1_MA[8]
B AR30 DDR1_DQ[43] DDR1_DQ[27] AC29 DDR1_MA[7] DDR1_CAA[4] DDR1_MA[7] B
AR29 DDR1_DQ[44] DDR1_DQ[28] W29 DDR1_BA[2] DDR1_CAA[5] DDR1_BG[0]
AV32 DDR1_DQ[45] DDR1_DQ[29] G30 DDR1_DQSN[2] DDR0_DQSN[6] AB28 DDR1_MA[12] DDR1_CAA[6] DDR1_MA[12]
AV31 DDR1_DQ[46] DDR1_DQ[30] H30 DDR1_DQSP[2] DDR0_DQSP[6] AC28 DDR1_MA[11] DDR1_CAA[7] DDR1_MA[11]
DDR1_DQ[47] DDR1_DQ[31] Block 3 L30 W28 DDR1_CAA[8]
DDR1_DQSN[3] DDR0_DQSN[7] Y28
DDR1_MA[15] DDR1_ACT#
N30 DDR1_DQSP[3] DDR0_DQSP[7] DDR1_MA[14] DDR1_CAA[9] DDR1_BG[1]

AL31 DDR1_DQSN[4] DDR1_DQSN[2]


BA32 DDR1_DQ[48] DDR1_DQ[48] AL30 DDR1_DQSP[4] DDR1_DQSP[2]
BA31 DDR1_DQ[49] DDR1_DQ[49] AK35 DDR1_MA[13] DDR1_CAB[0] DDR1_MA[13]
Block 5 AU31 DDR1_DQSN[5] DDR1_DQSN[3] AK34
BD31 DDR1_DQ[50] DDR1_DQ[50] AU30
DDR1_CAS# DDR1_CAB[1] DDR1_MA[15]
BD32 DDR1_DQSP[5] DDR1_DQSP[3] AJ35 DDR1_WE# DDR1_CAB[2] DDR1_MA[14]
DDR1_DQ[51] DDR1_DQ[51] AJ34
BA30 DDR1_DQ[52] DDR1_DQ[52] DDR1_RAS# DDR1_CAB[3] DDR1_MA[16]
BA29 AJ37 DDR1_BA[0] DDR1_CAB[4] DDR1_BA[0]
DDR1_DQ[53] DDR1_DQ[53] BC31 DDR1_DQSN[6] DDR1_DQSN[6] AF34
BD29 DDR1_DQ[54] DDR1_DQ[54] DDR1_MA[2] DDR1_CAB[5] DDR1_MA[2]
BD30 BC30 DDR1_DQSP[6] DDR1_DQSP[6] AJ36 DDR1_BA[1] DDR1_CAB[6] DDR1_BA[1]
DDR1_DQ[55] DDR1_DQ[55] Block 7 BH31 DDR1_DQSN[7] DDR1_DQSN[7] AG34
BG31 DDR1_MA[10] DDR1_CAB[7] DDR1_MA[10]
Block 7 DDR1_DQ[56] DDR1_DQ[56] BH30 DDR1_DQSP[7] DDR1_DQSP[7] AG35
BG32 DDR1_MA[1] DDR1_CAB[8] DDR1_MA[1]
BK32 DDR1_DQ[57] DDR1_DQ[57] AG36
DDR1_MA[0] DDR1_MA[0]
DDR1_DQ[58] DDR1_DQ[58] AG37 DDR1_CAB[9]
BK31 DDR1_MA[3] Not Used DDR1_MA[3]
DDR1_DQ[59] DDR1_DQ[59] AE35
BG29 DDR1_MA[4] Not Used DDR1_MA[4]
BG30 DDR1_DQ[60] DDR1_DQ[60]
BK30 DDR1_DQ[61] DDR1_DQ[61]
BK29 DDR1_DQ[62] DDR1_DQ[62] LOGIC
DDR1_DQ[63] DDR1_DQ[63]

A A

LOGIC

LOGIC

Security Classification LC Future Center Secret Data Title


Issued Date 2015/09/01 Deciphered Date 2016/12/31 CPU (3/16): DDR (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 5 of 128


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TABLE : GT3e RCOMP Resistor


CPU SKU U43e U42
Pin A14 OPCE_RCOMP Reserved
Pin B14 OPC_RCOMP Reserved

D D
TABLE : Functional Strap
ITP_PMODE (DFX Test Mode)
HIGH DFX Test Mode Disabled (Default)
LOW DFX Test Mode Enabled

TABLE : Functional Strap


GPP_E6 (JTAG ODT Disable)
HIGH Enabled
LOW Disabled

TABLE : Functional Strap


GPP_H2/CNV_BT_I2S_SDO (eSPI Flash Sharing Mode)
HIGH Slave Attached Flash Sharing (SAFS) Enabled
LOW Master Attached Flash Sharing (MAFS) Enabled (Default) VCCST VCCST

VCCSTG
VCCSTG

2
R0605 R0604
1/20W_1K_5%_0201 1/20W_49.9_1%_0201

2
R0603 R0617

1
1/20W_1K_5%_0201 1/20W_100_5%_0201

1
UCPU1D

-CATERR AA4 T6 PROC_TCK R0611 1 2 0_0201_SP XDP_TCK0


CATERR# PROC_TCK PROC_TDI XDP_TDI
C PECI AR1 U6 R0612 1 2 0_0201_SP C
85 PECI -PROCHOT_CPU PECI PROC_TDI PROC_TDO XDP_TDO
-PROCHOT R0601 2 1 1/20W_499_1%_0201 Y4 Y5 R0613 1 2 0_0201_SP
85,102,108 -PROCHOT PROCHOT# PROC_TDO PROC_TMS XDP_TMS
-THRMTRIP BJ1 T5 R0614 1 2 0_0201_SP
THRMTRIP# PROC_TMS PROC_TRST -XDP_TRST
AB6 R0615 1 2 0_0201_SP
XDP_BPM#0 PROC_TRST#
TP0601 1 U1
XDP_BPM#1 BPM#_0 PCH_TCK_R
TP0602 1 U2 W6
XDP_BPM#2 BPM#_1 PCH_TCK
TP0603 1 U3 U5
XDP_BPM#3 BPM#_2 PCH_TDI
TP0604 1 U4 W5
BPM#_3 PCH_TDO
P5
PCH_TMS
Y6
PCH_TRST#
P6
PCH_JTAGX
CE9 W2
GPP_E3/CPU_GP0PROC_PREQ#
CN3 W1
GPP_E7/CPU_GP1PROC_PRDY#
CB34
GPP_B3/CPU_GP2

2
CC35
GPP_B4/CPU_GP3
R0610 R0602
R0606 1 2 1/20W_49.9_1%_0201 PROC_POPIRCOMP BP27 1/20W_51_5%_0201 @ 1/20W_51_5%_0201
PROC_POPIRCOMP
R0607 1 2 1/20W_49.9_1%_0201 PCH_OPIRCOMP BW25
PCH_OPIRCOMP
R0608 1 2 1/20W_49.9_1%_0201 OPCE_RCOMP L5

1
RSVD35
R0609 1 2 1/20W_49.9_1%_0201 OPC_RCOMP N5
RSVD36

Follow the CRB 4 of 20


R0609, R0610 for WHL 4+3e
WHISKEYLAKE-U_BGA1528
@

[WHL PDG FOR DCL DEBUG]

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (4/16): MISC/JTAG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 6 of 128


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GPP_C5, Weak internal PD GPP_C2, Internal PD 20K


Rising edge of RSMRST# L:Disable Intel ME Crypto TLS cipher suite (no confidentiality).
*H:Enable Intel ME Crypto Transport Layer Security (TLS) cipher
*L: LPC suite (with confidentiality).Support Intel AMT with TLS and
H: eSPI Intel SBA (Small Business Advantage) with TLS.

VCC3_SUS
VCC3_SUS

This signal has an internal pull-down.

2
0 = Disable IntelR DCI-OOB (Default)
FOR DCI USE

2
R0711 1 = Enable IntelR DCI-OOB VCC3_SUS
R0719 1/20W_1K_5%_0201
@ 1/20W_1K_5%_0201
D D

1
1
GPP_C2 PCHHOT R0717 1 2 1/20W_4.7K_5%_0201

GPP_C5

1
1
R0718
R0720 @ 1/20W_20K_5%_0201
@ 1/20W_20K_5%_0201

2
2
VCC3_SUS_SPI VCC3B
VCC3_SUS
VCC3B

R0723

R0721

R0722

R0704
C C

R0724

R0703
1

1
1/20W_499_1%_0201

1/20W_499_1%_0201

1/20W_4.7K_5%_0201
1/20W_100K_5%_0201

1/20W_100K_5%_0201

1/20W_100K_5%_0201
@

1/20W_8.2K_5%_0201

1/20W_4.7K_5%_0201
1

2
R0707

R0709

R0710

R0708

1/20W_10K_5%_0201

1/20W_8.2K_5%_0201
2

2
1

1
UCPU1E
SPI_CLK R0712 1 2 0_0402_SP R0712 CH37
21,98 SPI_CLK SPI_MISO_IO1 SPI0_CLK SMB_CLK
R0713 1 2 0_0402_SP R0713 CF37 CK14
21,98 SPI_MISO_IO1 SPI_MOSI_IO0 SPI0_MISO GPP_C0/SMBCLK SMB_DATA SMB_CLK 93
R0714 1 2 0_0402_SP R0714 CF36 CH15
21,98
21
SPI_MOSI_IO0
SPI_IO2
SPI_IO2 R0715 1 2 0_0402_SP R0715 CF34 SPI0_MOSI GPP_C1/SMBDATA
CJ15 GPP_C2 SMB_DATA 93 DIMM1,CP
SPI_IO3 SPI0_IO2 GPP_C2/SMBALERT#
R0716 1 2 0_0402_SP R0716 CG34
21 SPI_IO3 -SPI_CS0 SPI0_IO3
CG36 CH14
21 -SPI_CS0 -SPI_CS1_8MB SPI0_CS0# GPP_C3/SML0CLK
-SPI_CS0 For SPI CG35 CF15
21 -SPI_CS1_8MB -SPI_CS2 SPI0_CS1# GPP_C4/SML0DATA GPP_C5
-SPI_CS1 For SPI CH34 CG15
98 -SPI_CS2 SPI0_CS2# GPP_C5/SML0ALERT#
-SPI_CS2 For TPM
CN15 EC_SCL2
GPP_C6/SML1CLK EC_SDA2 EC_SCL2 93
CM15
CF20 GPP_C7/SML1DATA
CC34 PCHHOT
EC_SDA2 93 DGPU,G-Sensor Thermal-Sensor、
EC
GPP_D1/SPI1_CLK/BK1/SBK1 GPP_B23/SML1ALERT#/PCHHOT#
CG22
GPP_D2/SPI1_MISO_IO1/BK2/SBK2
CF22
GPP_D3/SPI1_MOSI_IO0/BK3/SBK3
CG23
GPP_D21/SPI1_IO2
CH23 CA29 R0725 1 2 0_0201_SP
GPP_D22/SPI1_IO3 GPP_A1/LAD0/ESPI_IO0 LPC_AD0 85
CG20 BY29 R0726 1 2 0_0201_SP
GPP_D0/SPI1_CS0#/BK0/SBK0 GPP_A2/LAD1/ESPI_IO1 LPC_AD1 85
BY27 R0727 1 2 0_0201_SP
GPP_A3/LAD2/ESPI_IO2 LPC_AD2 85
BV27 R0728 1 2 0_0201_SP EC and TPM Module debug port
GPP_A4/LAD3/ESPI_IO3 LPC_AD3 85
C-LINK CA28 R0729 1 2 0_0201_SP
CL_CLK_WLAN GPP_A5/LFRAME#/ESPI_CS# -LPC_FRAME 85
CH7 CA27 R0730 1 2 0_0201_SP
66 CL_CLK_WLAN CL_DATA_WLAN CL_CLK GPP_A14/SUS_STAT#/ESPI_RESET# -SUS_STAT 85
CH8
66 CL_DATA_WLAN -CL_RST_WLAN CL_DATA LPCCLK_0
66 -CL_RST_WLAN CH9 BV32 R0702 1 EMC@ 2 1/20W_22_1%_0201
B CL_RST# GPP_A9/CLKOUT_LPC0/ESPI_CLK LPCCLK_EC_24M 85 B
BV30
GPP_A10/CLKOUT_LPC1
BY30
GPP_A8/CLKRUN#
-KBRC BV29
85 -KBRC GPP_A0/RCIN#/TIME_SYNC1

27P_25V_J_NPO_0201

27P_25V_J_NPO_0201

27P_25V_J_NPO_0201

27P_25V_J_NPO_0201
IRQSER BV28 1
85 IRQSER GPP_A6/SERIRQ
EMC_NS@
5 of 20 1 1 1 1 C0701
WHISKEYLAKE-U_BGA1528 22P_50V_J_NPO_0402

C0702

C0703

C0704

C0705
2

@ 2
R0705 @ @ @ @
@ 1/20W_1K_5%_0201 2 2 2 2
1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (5/16): ESPI/SPI/SMBUS/C-LINK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 7 of 128


5 4 3 2 1

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5 4 3 2 1

VCC3B

R0817
1/16W_10K_5%_0402
1 @ 2 GPP_C15

VCC3B VCC3_SUS R0818


1/16W_10K_5%_0402
1 @ 2 -LED_MUTE

R0819
1/16W_10K_5%_0402

1/20W_10K_5%_0201
1 @ 2 -LED_MICMUTE
D D

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_1K_5%_0201
2

2
1/16W_20K_1%_0402

R0806

R0802

R0803

R0804
R0801
@

1
GPP_B17
UCPU1F
CC27
-TPM_IRQ GPP_B15/GSPI0_CS0#
CC32
98 -TPM_IRQ GPP_A7/PIRQA#/GSPI0_CS1#
CE28 CN22
GPP_B16/GSPI0_CLK GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
CE27 CR22
GPP_B18 GPP_B17/GSPI0_MISO GPP_D10/ISH_SPI_CLK/GSPI2_CLK
CE29 CM22
GPP_B18/GSPI0_MOSI GPP_D11/ISH_SPI_MISO/GSPI2_MISO GPP_D12
CP22
-WLAN_RF_KILL GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI
CA31
66 -WLAN_RF_KILL GPP_A11 GPP_B19/GSPI1_CS0# GPP_D5
CA32 CK22
GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN# GPP_D5/ISH_I2C0_SDA
CC29 CH20
GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL
CC30
GPP_B22 GPP_B21/GSPI1_MISO GPP_D7
CA30 CH22
GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA PAD_DISABLE_PCH PAD_DISABLE
CJ22 R0805 1 2 0_0201_SP
BRI_RSP_CNVI GPP_D8/ISH_I2C1_SCL PAD_DISABLE 89
FN, F1, F4 PD 100K, BIOS need output CK20
66 BRI_RSP_CNVI RGI_DT_CNVI GPP_F5/CNV_BRI_RSP
"High" while act i ve 66 RGI_DT_CNVI CG19 CJ27
BRI_DT_CNVI GPP_F6/CNV_RGI_DT GPP_H10/I2C5_SDA/ISH_I2C2_SDA
66 BRI_DT_CNVI CJ20 CJ29
RGI_RSP_CNVI GPP_F4/CNV_BRI_DT GPP_H11/I2C5_SCL/ISH_I2C2_SCL
CH19
66 RGI_RSP_CNVI GPP_F7/CNV_RGI_RSP -DISCRETE_PRESENCE
CM24
GPP_D13/ISH_UART0_RXD -DISCRETE_CTL
CN23
UART_RX GPP_D14/ISH_UART0_TXD
CR12 CM23
66,84 UART_RX UART_TX GPP_C20/UART2_RXD GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#
CP12 CR24
66,84 UART_TX -EC_SCI GPP_C21/UART2_TXD GPP_D16/ISH_UART0_CTS#/SML0BALERT#
CN12
85 -EC_SCI -EC_WAKE GPP_C22/UART2_RTS#
CM12 CG12
85 -EC_WAKE GPP_C23/UART2_CTS# GPP_C12/UART1_RXD/ISH_UART1_RXD -LED_MUTE
CH12
GPP_C13/UART1_TXD/ISH_UART1_TXD -LED_MICMUTE -LED_MUTE 88
@ TP0801 1 CM11 CF12
GPP_C16/I2C0_SDA GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15 -LED_MICMUTE 88
@ TP0802 1 CN11 CG14
GPP_C17/I2C0_SCL GPP_C15/UART1_CTS#/ISH_UART1_CTS#
C C
@ TP0803 1 CK12 BW35 TP4_RESET_PCH R0821 1 2 0_0201_SP TP4_RESET
GPP_C18/I2C1_SDA GPP_A18/ISH_GP0 -LID_CLOSE_R -LID_CLOSE TP4_RESET 88
51 Size CTL Size CTL CJ12 BW34 R0827 1 2 0_0201_SP
GPP_C19/I2C1_SCL GPP_A19/ISH_GP1 -LID_CLOSE 51,73,85,89
CA37
GPP_A20/ISH_GP2
@ TP0804 1 CF27 CA36
FPR_RESET_PCH GPP_H4/I2C2_SDA GPP_A21/ISH_GP3
1/20W_0_5%_0201 2 @ 1 R0828 CF29 CA35 1
73,85 FPR_RESET GPP_H5/I2C2_SCL GPP_A22/ISH_GP4

1
CA34 EMC_NS@
GPP_A23/ISH_GP5
@ TP0805 1 CH27 BW37 C0801 R0822
GPP_H6/I2C3_SDA GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF# 10P_25V_J_NPO_0201
@ TP0806 1 CH28 1/16W_100K_5%_0402
GPP_H7/I2C3_SCL 2
@ TP0807 1 CJ30

2
GPP_H9 GPP_H8/I2C4_SDA
@ TP0808 1 CJ31
GPP_H9/I2C4_SCL

WHISKEYLAKE-U_BGA1528 6 of 20
@

VCC3B

Panel ID
(Pin#7 Control) Graphics ID Graphics Control
-DISCRETE_ -DISCRETE_CTL
1

1
Size CTL Status PRESENCE Status (GPP_D14) R0825 R0823
Status (GPP_C19) (GPP_D13) R19M@ 1/20W_10K_5%_0201 DIS@ 1/20W_10K_5%_0201

15" 0 (GND Low) UMA 0 (R0824) R18M 0 (R0826)


2

2
-DISCRETE_PRESENCE VCC3B
B -DISCRETE_CTL B

GPP_D12, External pull-up is required. VCC3_SUS


1

1
14" 1 (NC High) DIS 1 (R0823) R19M 1 (R0825) Recommend 100K if pulled up to 3.3V or 75K

1
R0826 R0824
R18M@ UMA@ R0812
if pulled up to 1.8V.
1/20W_10K_5%_0201 1/20W_10K_5%_0201

1
@ 1/20W_10K_5%_0201
R0814
2

2
1/20W_100K_1%_0201

2
GPP_D5

2
1
GPP_D12
R0813

1
@
1/20W_10K_5%_0201 R0815
@

2
1/20W_10K_5%_0201

2
This strap should sample HIGH.
There should NOT be any on-board device driving it
to opposite direction during strap sampling.

GPP_B22, Internal PD 20K GPP_B18, Internal PD 20K


*L: SPI *L: Disable “ No Reboot” mode
H: LPC VCC3_SUS H: Enable “ No Reboot” mod
e GPP_D7, Reserved, Rising edge of DSW_PWROK VCC3_SUS
VCC3_SUS
1

1
R0809
@ 1/20W_20K_5%_0201 R0807 R0816
@ 1/20W_1K_5%_0201 1/20W_100K_1%_0201
2

2
GPP_B22 GPP_B18
GPP_D7
A A
1

1
R0810 R0808 External pull-up is required. Recommend 100K.
@ 1/20W_20K_5%_0201 @ 1/20W_20K_5%_0201 This strap should sample HIGH.
There should NOT be any on-board device driving it
to opposite direction during strap sampling
2

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (6/16): LPSS/ISH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 8 of 128


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5 4 3 2 1

VCC3_SUS VCC3_SUS
VCC3B

2
R0903 R0905

1
@ 1/20W_1K_5%_0201 1/20W_1K_5%_0201
@ R0914

1
D TP0901 1/16W_10K_5%_0402 D
Test_Point_20MIL

2
ME_FLASH R0904 1 2 0_0402_SP @ 1
85 ME_FLASH
UCPU1G
HDA_SYNC R0901 1 2 1/20W_33_5%_0201 HDA_SYNC_CPU BN34 CH36
78 HDA_SYNC HDA_BCLK HDA_BCLK_CPU HDA_SYNC/I2S0_SFRM GPP_G0/SD_CMD -LED_CAPSLOCK_PCH
EMC@ R0907 1 2 1/20W_33_5%_0201 BN37 CL35 R0915 1 2 0_0201_SP -LED_CAPSLOCK 85,88
78 HDA_BCLK HDA_SDO HDA_SDO_CPU HDA_BCLK/I2S0_SCLK GPP_G1/SD3_DATA0 -LED_NUMBER
R0902 1 2 1/20W_33_5%_0201 BN36 CL36
78 HDA_SDO HDA_SDIN0 HDA_SDO/I2S0_TXD GPP_G2/SD3_DATA1 -LED_NUMBER 88
BN35 CM35
78 HDA_SDIN0 HDA_SDI0/I2S0_RXD GPP_G3/SD3_DATA2
BL36 CN35
-HDA_RST -HDA_RST_CPU HDA_SDI1/I2S1_RXD/SNDW1_DATA GPP_G4/SD_DATA3
R0908 1 2 1/20W_33_5%_0201 BL35 CH35
78 -HDA_RST HDA_RST#/I2S1_SCLK/SNDW1_CLK GPP_G5/SD_CD#
CK23 CK36
GPP_D23/I2S_MCLK GPP_G6/SD_CLK
CK34
GPP_G7/SD_WP
BL37
I2S1_SFRM/SNDW2_CLK
BL34
I2S1_TXD/SNDW2_DATA

-CNV_RF_RESET CJ32
66 -CNV_RF_RESET GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#
CH32
CNV_CLKREQ GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK
66 CNV_CLKREQ CH29
GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ
CH30
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO
BW36
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
CP24 BY31
GPP_D19/DMIC_CLK0/SNDW4_CLK GPP_A16/SD_1P8_SEL
CN24
GPP_D20/DMIC_DATA0/SNDW4_DATA
CK33
SD_1P8_RCOMP SD_RCOMP R0906
CK25 CM34 1 2 1/20W_200_1%_0201
GPP_D17/DMIC_CLK1/SNDW3_CLK SD_3P3_RCOMP
PLANARID4 CJ25
GPP_D18/DMIC_DATA1/SNDW3_DATA
PCH_SPKR CF35
83 PCH_SPKR GPP_B14/SPKR
22P_25V_J_NPO_0201_MURATA

22P_25V_J_NPO_0201_MURATA
7 of 20
WHISKEYLAKE-U_BGA1528
EMC@ 1 EMC@ 1
C C0902 C0901 @ C

2 2

Table 3-1.RCOMP Recommendation for WHL and CFL

VCC3B
TPM ID
PLANARID4
Status (GPP_D18)
1

NTPM@
R0911 TPM 0 (R0913)
1/20W_10K_5%_0201
2

PLANARID4 NTPM 1 (R0911)


1

TPM@
R0913

B 1/20W_10K_5%_0201 B
2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (7/16): AUDIO/SDXC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 9 of 128


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5 4 3 2 1

D D

VCC3B
VCC3_SUS

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201
1

1
R1009

R1001

R1002

R1010

R1006

R1012

R1011
2

2
UCPU1H
PCIE5_L0_RXN BW9 CB5
37 PCIE5_L0_RXN PCIE5_L0_RXP PCIE5_RXN/USB31_5_RXN PCIE1_RXN/USB31_1_RXN
BW8 CB6
37 PCIE5_L0_RXP PCIE5_L0_TXN C1000 PCIE5_L0_TXN_C PCIE5_RXP/USB31_5_RXP PCIE1_RXP/USB31_1_RXP
1 2 0.22U_6.3V_K_X5R_0201 BW4 CA4
37 PCIE5_L0_TXN PCIE5_L0_TXP C1001 PCIE5_L0_TXP_C PCIE5_TXN/USB31_5_TXN PCIE1_TXN/USB31_1_TXN
1 2 0.22U_6.3V_K_X5R_0201 BW3 CA3
37 PCIE5_L0_TXP PCIE5_TXP/USB31_5_TXP PCIE1_TXP/USB31_1_TXP
PCIE5_L1_RXN BU6 BY8 USB3P2_RXN
37 PCIE5_L1_RXN PCIE5_L1_RXP PCIE6_RXN/USB31_6_RXN PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN USB3P2_RXP USB3P2_RXN 59
BU5 BY9
37 PCIE5_L1_RXP PCIE5_L1_TXN C1002 PCIE5_L1_TXN_C PCIE6_RXP/USB31_6_RXP PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP USB3P2_TXN USB3P2_RXP 59
1 2 0.22U_6.3V_K_X5R_0201 BU4 CA2 USB Port2 (TYPE-C)
37 PCIE5_L1_TXN PCIE5_L1_TXP C1003 PCIE5_L1_TXP_C PCIE6_TXN/USB31_6_TXN PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN USB3P2_TXP USB3P2_TXN 59
1 2 0.22U_6.3V_K_X5R_0201 BU3 CA1
AMD GPU 37 PCIE5_L1_TXP
PCIE5_L2_RXN
PCIE6_TXP/USB31_6_TXP PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP
USB3P3_RXN
USB3P2_TXP 59
BT7 BY7
37 PCIE5_L2_RXN PCIE5_L2_RXP PCIE7_RXN PCIE3_RXN/USB31_3_RXN USB3P3_RXP USB3P3_RXN 69
BT6 BY6
37 PCIE5_L2_RXP PCIE5_L2_TXN C1004 PCIE5_L2_TXN_C PCIE7_RXP PCIE3_RXP/USB31_3_RXP USB3P3_TXN USB3P3_RXP 69 USB Port3 (Left back AOU)
1 2 0.22U_6.3V_K_X5R_0201 BU2 BY4
37 PCIE5_L2_TXN PCIE5_L2_TXP C1005 PCIE5_L2_TXP_C PCIE7_TXN PCIE3_TXN/USB31_3_TXN USB3P3_TXP USB3P3_TXN 69
1 2 0.22U_6.3V_K_X5R_0201 BU1 BY3
37 PCIE5_L2_TXP PCIE7_TXP PCIE3_TXP/USB31_3_TXP USB3P3_TXP 69
PCIE5_L3_RXN BU9 BW6 USB3P4_RXN
37 PCIE5_L3_RXN PCIE5_L3_RXP PCIE8_RXN PCIE4_RXN/USB31_4_RXN USB3P4_RXP USB3P4_RXN 69
BU8 BW5
37 PCIE5_L3_RXP PCIE5_L3_TXN PCIE5_L3_TXN_C PCIE8_RXP PCIE4_RXP/USB31_4_RXP USB3P4_TXN USB3P4_RXP 69 USB Port4 For DCI(Left Front)
C1006 1 2 0.22U_6.3V_K_X5R_0201 BT4 BW2
37 PCIE5_L3_TXN PCIE5_L3_TXP PCIE5_L3_TXP_C PCIE8_TXN PCIE4_TXN/USB31_4_TXN USB3P4_TXP USB3P4_TXN 69
C1007 1 2 0.22U_6.3V_K_X5R_0201 BT3 BW1
37 PCIE5_L3_TXP PCIE8_TXP PCIE4_TXP/USB31_4_TXP USB3P4_TXP 69
PCIE9_RXN BP5 CE3
C 73 PCIE9_RXN PCIE9_RXP PCIE9_RXN USB2_1N NC C
BP6 CE4
73 PCIE9_RXP PCIE9_TXN C1010 PCIE9_TXN_C PCIE9_RXP USB2_1P
1 2 0.1U_10V_K_X5R_0201 BR2
LAN 73 PCIE9_TXN PCIE9_TXP C1011 1 2 0.1U_10V_K_X5R_0201 PCIE9_TXP_C BR1 PCIE9_TXN
CE1 USBC_USB2N
73 PCIE9_TXP PCIE9_TXP USB2_2N USBC_USB2P USBC_USB2N 63 TYPE-C
CE2
PCIE10_RXN USB2_2P USBC_USB2P 63
BN6
66 PCIE10_RXN PCIE10_RXP PCIE10_RXN
BN5 CG3 USBP3-
WLAN 66
66
PCIE10_RXP
PCIE10_TXN
PCIE10_TXN C1008
PCIE10_TXP C1009
1 2 0.1U_10V_K_X5R_0201 PCIE10_TXN_C
PCIE10_TXP_C
BR4 PCIE10_RXP
PCIE10_TXN
USB2_3N
USB2_3P
CG4 USBP3+
USBP3- 69
USBP3+ 69 Left back AOU
1 2 0.1U_10V_K_X5R_0201 BR3
66 PCIE10_TXP PCIE10_TXP
CD3 USBP4-
PCIE11_L0_SATA0_RXN USB2_4N USBP4- 69 DCI(Left Front)
BN10 CD4 USBP4+
96 PCIE11_L0_SATA0_RXN PCIE11_L0_SATA0_RXP PCIE11_RXN/SATA0_RXN USB2_4P USBP4+ 69
BN8
2.5" SATA HDD 96
96
PCIE11_L0_SATA0_RXP
PCIE11_L0_SATA0_TXN
PCIE11_L0_SATA0_TXN
PCIE11_L0_SATA0_TXP
BN4 PCIE11_RXP/SATA0_RXP
PCIE11_TXN/SATA0_TXN USB2_5N
CG5 TBT_USB5N
TBT_USB5P TBT_USB5N 73
BN3 CG6 IO/B
96 PCIE11_L0_SATA0_TXP PCIE11_TXP/SATA0_TXP USB2_5P TBT_USB5P 73
BL6 CC1 USBP6-
PCIE12_RXN/SATA1A_RXN USB2_6N USBP6- 51
BL5 CC2 USBP6+
BN2 PCIE12_RXP/SATA1A_RXP USB2_6P USBP6+ 51 Touch Panel
NC BN1 PCIE12_TXN/SATA1A_TXN
PCIE12_TXP/SATA1A_TXP USB2_7N
CG8
USB2_7P
CG9 NC
PCIE13_L3_RXN BK6
64 PCIE13_L3_RXN PCIE13_L3_RXP PCIE13_RXN
BK5 CB8 USBP8-
64 PCIE13_L3_RXP PCIE13_L3_TXN PCIE13_RXP USB2_8N USBP8- 51
BM4 CB9 USBP8+
64 PCIE13_L3_TXN PCIE13_L3_TXP BM3 PCIE13_TXN USB2_8P USBP8+ 51 CAMERA
64 PCIE13_L3_TXP PCIE13_TXP
CH5 USBP9-
PCIE13_L2_RXN USB2_9N USBP9- 73
BJ6 CH6 USBP9+
64 PCIE13_L2_RXN PCIE13_L2_RXP BJ5 PCIE14_RXN USB2_9P USBP9+ 73 Finger Printer
NVMe SSD 64
64
PCIE13_L2_RXP
PCIE13_L2_TXN
PCIE13_L2_TXN BL2 PCIE14_RXP
CC3 USBP10-
USBP10- 66
64 PCIE13_L2_TXP
PCIE13_L2_TXP BL1 PCIE14_TXN
PCIE14_TXP
USB2_10N
USB2_10P
CC4 USBP10+
USBP10+ 66
BT
PCIE13_L1_RXN BG5 CC5 USB2_COMP R1003 1 2 1/20W_113_1%_0201
64 PCIE13_L1_RXN PCIE13_L1_RXP PCIE15_RXN/SATA1B_RXN USB2_COMP USB2_ID
BG6 CE8 R1004 1 @ 2 1/20W_0_5%_0201
64 PCIE13_L1_RXP PCIE13_L1_TXN PCIE15_RXP/SATA1B_RXP USB2_ID USB2_VBU
BL4 CC6 R1005 1 @ 2 1/20W_1K_5%_0201
64 PCIE13_L1_TXN PCIE13_L1_TXP PCIE15_TXN/SATA1B_TXN USB2_VBUSSENSE
BL3
64 PCIE13_L1_TXP PCIE15_TXP/SATA1B_TXP -USB_PORT5_OC0
CK6 (IO/B)
PCIE13_L0_SATA1_RXN GPP_E9/USB2_OC0#/GP_BSSB_CLK -USB_PORT5_OC0 73
B BE5 CK5 B
64 PCIE13_L0_SATA1_RXN PCIE13_L0_SATA1_RXP PCIE16_RXN/SATA2_RXN GPP_E10/USB2_OC1#/GP_BSSB_DI -USB_PORT4_OC2
BE6 CK8 (Left Front)
SATA SSD 64
64
PCIE13_L0_SATA1_RXP
PCIE13_L0_SATA1_TXN
PCIE13_L0_SATA1_TXN BJ4 PCIE16_RXP/SATA2_RXP GPP_E11/USB2_OC2#
CK9 -USB_PORT3_OC3 -USB_PORT4_OC2
-USB_PORT3_OC3
69
69 (Left back AOU)
PCIE13_L0_SATA1_TXP PCIE16_TXN/SATA2_TXN GPP_E12/USB2_OC3#
BJ3
64 PCIE13_L0_SATA1_TXP PCIE16_TXP/SATA2_TXP HD_SSD_DEVSLP
CP8 (2.5_HDD)
GPP_E4/DEVSLP0 HD_SSD_DEVSLP 96
CR8
PCIE_RCOMP_N CE6 GPP_E5/DEVSLP1 SATA1_DEVSLP2
R1007 1 2 1/20W_100_1%_0201 CM8 (M.2_SSD)
PCIE_RCOMP_P CE5 PCIE_RCOMP_N GPP_E6/DEVSLP2 SATA1_DEVSLP2 64
PCIE_RCOMP_P
CN8 1 TP1001 @
GPP_E0/SATAXPCIE0/SATAGP0 BDC_ON
CR28 CM10
GPP_H12/M2_SKT2/CFG_0 GPP_E1/SATAXPCIE1/SATAGP1 -SATA_DTCT BDC_ON 66
CP28 CP10
GPP_H13/M2_SKT2/CFG_1 GPP_E2/SATAXPCIE2/SATAGP2 -SATA_DTCT 64
CN28
GPP_H14/M2_SKT2/CFG_2 M2_CARD_DET
CM28 CN7
GPP_H15/M2_SKT2/CFG_3 GPP_E8/SATALED#/SPI1_CS1# M2_CARD_DET 64

1/20W_10K_5%_0201
AR3 1 TP1002 @
RSVD37

2
M2_CARD_DET -SATA_DTCT

R1008
WHISKEYLAKE-U_BGA1528
@
8 of 20 0 -W/CARD ==>GND 0- SATA
1 -W/O CARD ==>PU 1- PCIE

1
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (8/16): PCIE/USB/SATA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 10 of 128


5 4 3 2 1

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5 4 3 2 1

D D

UCPU1I
WGR_RXD0N CR30
66 WGR_RXD0N WGR_RXD0P CNV_WR_D0N -CPU_C10_GATE
CP30 CN27
66 WGR_RXD0P CNV_WR_D0P GPP_H18/CPU_C10_GATE# -CPU_C10_GATE 15,123
WGR_RXD1N CM30 CM27
66 WGR_RXD1N WGR_RXD1P CNV_WR_D1N GPP_H19/TIMESYNC_0
CN30
66 WGR_RXD1P CNV_WR_D1P
CF25 XTAL_FREQ_SELECT
WGR_TXD0N GPP_H21 / XTAL_FREQ_SELECT
CN32 CN26
66 WGR_TXD0N WGR_TXD0P CNV_WT_D0N GPP_H22 GPP_H23
CM32 CM26
66 WGR_TXD0P CNV_WT_D0P GPP_H23
CK17
WGR_TXD1N GPP_F10
CP33
66 WGR_TXD1N WGR_TXD1P CNV_WT_D1N
CN33
66 WGR_TXD1P CNV_WT_D1P
BV35 GPD7
WGR_RXCN GPD7 DGFX_PWRGD
CN31 CN20
66 WGR_RXCN CNV_WR_CLKN GPP_F3 DGFX_PWRGD 50
WGR_RXCP CP31
66 WGR_RXCP CNV_WR_CLKP
CG25
WGR_TXDCN GPP_D4/IMGCLKOUT0/BK4/SBK4
CP34 CH25
66 WGR_TXDCN WGR_TXDCP CNV_WT_CLKN GPP_H20/IMGCLKOUT_1
CN34
66 WGR_TXDCP CNV_WT_CLKP
CR20 PLANARID1
CNV_WT_RCOMP CP32 GPP_F12/EMMC_DATA0
CM20 PLANARID2
CNV_WT_RCOMP_0 GPP_F13/EMMC_DATA1
CR32 CN19 PLANARID3
C CNV_WT_RCOMP_1 GPP_F14/EMMC_DATA2 C
CP20 CM19
GPP_F0/CNV_PA_BLANKING GPP_F15/EMMC_DATA3
CK19 CN18
GPP_F1 GPP_F16/EMMC_DATA4
CG17 CR18
GPP_F2 GPP_F17/EMMC_DATA5
CP18
GPP_F18/EMMC_DATA6
CR14 CM18
GPP_C8/UART0_RXD GPP_F19/EMMC_DATA7
CP14
GPP_C9/UART0_TXD
CN14 CM16
GPP_C10/UART0_RTS# GPP_F20/EMMC_RCLK
CM14 CP16
20190123 GPP_C11/UART0_CTS# GPP_F21/EMMC_CLK
CR16 PLANARID0
GPP_F11/EMMC_CMD
2

Intel update Mow CJ17 CN16 R1119


Spec to 75K Ohm GPP_F8/CNV_MFUART2_RXD GPP_F22/EMMC_RESET#
R1101 CH17 1/16W_200_1%_0402
GPP_F9/CNV_MFUART2_TXD EMMC_RCOMP
1/20W_150_1%_0201 CK15 1 2
A4WP_PRESENT EMMC_RCOMP
CF17
GPP_F23/A4WP_PRESENT
2
1

R1117 WHISKEYLAKE-U_BGA1528
1/20W_75K_5%_0201 9 of 20
@
1

GPP_H23, Internal Weak


pull-down
B B

VCC3_SUS

TABLE: PLANARID PLANARID3


1

GPP_H21, Internal Weak PLANARID2


R1115 pull-down PLANARID1
@ 1/20W_10K_5%_0201 PLANARID[3:0] PHASE PLANARID0
LOW: 38.4/19.2MHZ (DEFAULT)
HIGH: 24MHZ
0h (0000b) EVT
2

VCC3_SUS VCC3M
GPP_H23

1/20W_0_5%_0201

1/20W_0_5%_0201

1/20W_0_5%_0201

1/20W_0_5%_0201
1h (0001b) FVT

2
1/20W_4.7K_5%_0201

R1102

R1103

R1104

R1105
1/20W_100K_5%_0201

2h (0010b) SIT
1

@ @ @ @
2
R1113

R1116 3h (0011b) SIT-R


R1118

@ 1/20W_10K_5%_0201

1
Fh (1111b) SVT
2

XTAL_FREQ_SELECT
1/20W_10K_5%_0201

GPD7
2

A This strap must be A


R1114

configured to 0
(SAFS is disabled) @
if the eSPI or LPC strap is Security Classification LC Future Center Secret Data Title
configured to 0
1

(eSPI is disabled) Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (9/16): CSI-2/EMMC/CNVI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 11 of 128


5 4 3 2 1

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5 4 3 2 1

D D

VCC3B
2

R1250
UMA@ 1/20W_10K_5%_0201
1

-CLKREQ_PCIE5
2

R1209
1/20W_10K_5%_0201
DIS@
1

TABLE of XTAL (Y1201)


Vendor LCFC P/N Description
TXC SJ10000S500 S CRYSTAL 24MHZ 12PF +-20PPM 8Y24000034
HARMONY SJ10000RR00 S CRYSTAL 24MHZ 12PF X2C024000DC1H-HU

C XTAL24_IN_R C
UCPU1J

1
-PCIE5_CLK_100M AW2 AU1 CLKOUT_ITPXDP_N 1
37 -PCIE5_CLK_100M PCIE5_CLK_100M CLKOUT_PCIE_N_0 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P TP1201
GPU AY3 AU2 1 R1205
37 PCIE5_CLK_100M -CLKREQ_PCIE5 CLKOUT_PCIE_P_0 CLKOUT_ITPXDP_P TP1202
CF32 1/20W_200K_1%_0201
50 -CLKREQ_PCIE5 GPP_B5/SRCCLKREQ0#
BT32 SUSCLK_32K
SUSCLK_32K 66
FOOTPRINT:R_0402
-PCIE9_CLK_100M BC1 GPD8/SUSCLK
SM01000JN0J Y1201
73 -PCIE9_CLK_100M EMC

2
CLKOUT_PCIE_N_1

2
PCIE9_CLK_100M BC2 CK3 XTAL24_IN L1201 1 2 SBY100505T-300Y-N 24MHZ_12PF_8Y24000034
LAN 73 PCIE9_CLK_100M -CLKREQ_PCIE9 CLKOUT_PCIE_P_1 XTAL_IN XTAL24_OUT XTAL24_OUT_R
CE32 CK2 L1202 1 2 SBY100505T-300Y-N 1 3
73 -CLKREQ_PCIE9 GPP_B6/SRCCLKREQ1# XTAL_OUT
SM01000JN0J
66 -PCIE10_CLK_100M
-PCIE10_CLK_100M BD3 CJ1 CLK_BIASREF EMC SJ10000S500

4
PCIE10_CLK_100M CLKOUT_PCIE_N_2 CLK_BIASREF CNV_REFCLK_R
WLAN BC3 CM3 R1207 1 2 0_0201_SP
66 PCIE10_CLK_100M -CLKREQ_PCIE10 CLKOUT_PCIE_P_2 CLKIN_XTAL CNV_REFCLK 66
CF30
66 -CLKREQ_PCIE10 GPP_B7/SRCCLKREQ2#
BN31 RTCX1 C1201 1 2 10P_25V_D_NPO_0201
RTCX1
BH3 BN32 RTCX2
CLKOUT_PCIE_N_3 RTCX2
NC BH4
CLKOUT_PCIE_P_3

1/20W_10M_5%_0201
CE31 BR37 -SRTCRST 1 1
GPP_B8/SRCCLKREQ3# SRTCRST# -SRTCRST 20

2
BR34 -RTCRST C1202 C1203
RTCRST# -RTCRST 20

R1203
NC BA1 Y1202 15P_25V_J_NPO_0201 15P_25V_J_NPO_0201
CLKOUT_PCIE_N_4

6.8P_25V_C_NPO_0201

1/20W_60.4_1%_0201
BA2 32.768KHZ_9PF_9H03280012
CLKOUT_PCIE_P_4 2 2
CE30 2 SJ10000J900

1
GPP_B9/SRCCLKREQ4#

2
C1205

1
R1204
BE1
64 -PCIE13_CLK_100M CLKOUT_PCIE_N_5
M.2 SSD BE2
64 PCIE13_CLK_100M CLKOUT_PCIE_P_5 1@
CF31 C1204 1 2 10P_25V_D_NPO_0201
64 -CLKREQ_PCIE13 GPP_B10/SRCCLKREQ5#

1
WHISKEYLAKE-U_BGA1528
@
10 of 20
R T C X 1 、R T C X 2、 C r y s t al
1. Space > 15mils
B
2. No trace under crystal B
3. Place on oppsosit side of
MCP for temp inf l uence

TABLE of XTAL (Y1202)


Vendor LCFC P/N Description
TXC SJ10000J900 S CRYSTAL 32.768KHZ 9PF 20PPM
KDS SJ100069400 S CRYSTAL 32.768KHZ 9PF 1TJF09

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (10/16): CLOCK SIGNALS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 11, 2019 Sheet 12 of 128


5 4 3 2 1

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5 4 3 2 1

VCC3_SUS VCC1R05_SUS

2
R1313 R1314
1/20W_1K_5%_0201
R1326 1 2 0_0402_SP 1/20W_10K_5%_0201

1
D U1301 2 1 -PLTRST_FAR @ @ D
-PLTRST_FAR 37,64,66,73,85
1/20W_33_5%_0201 R1301 R1327 D1301 R1329

2
VCC3M 1/20W_0_5%_0201 RB751VM-40TE-17_UMD2M2 1/20W_62_5%_0201
R1328 1 2 Q1302 1 2 Q1301 1 2 VCCST_PWRGD
0_0201_SP

1
2 @ 1 -PLTRST_NEAR
-PLTRST_NEAR 98
1/20W_33_5%_0201 R1302
@

100P_25V_J_NPO_0201_MURATA

100P_25V_J_NPO_0201_MURATA
U1301

3
1 5 Q1302 Q1301
NC Vcc

2 2

C1302

C1301
2 CPUCORE_ON 1 LSK3541G1ET2L_VMT3 1 LSK3541G1ET2L_VMT3
IN A 85,108 CPUCORE_ON

2
@

3 4 1 1
GND OUT

NL17SZ17XV5T2G_SOT-553-5

VCC3M VCC3M VCC3M_PCH VCC3B

VCC3_SUS RTCVCC
For vPro -LAN WAKE

1/20W_10K_5%_0201

-PCH_SLP_S3 1
TP1303

2
1/20W_10K_5%_0201

1/20W_10K_5%_0201
1/20W_1K_5%_0201 -PCH_SLP_S4 1
TP1304
2

1/20W_1M_1%_0201
1/20W_100K_5%_0201
R1304

R1325
-PCH_SLP_S5 1
TP1305

1
R1305

R1306

R1320

R1303
C @ C

1
1

2
UCPU1K

-PLTRST BJ35 BJ37 -PCH_SLP_S0 1


-XDP_DBR GPP_B13/PLTRST# GPP_B12/SLP_S0# -PCH_SLP_S3 TP1302
CN10 BU36
SYS_RESET# GPD4/SLP_S3# -PCH_SLP_S4 -PCH_SLP_S3 85
-RSMRST BR36 BU27
85 -RSMRST RSMRST# GPD5/SLP_S4# -PCH_SLP_S5 -PCH_SLP_S4 85,106,107
BT29
CPU_PWRGD GPD10/SLP_S5# -PCH_SLP_S5 85
TP1301 Test_Point_20MIL 1 AR2
VCCST_PWRGD PROCPWRGD -PCH_SLP_SUS
BJ2 BU29 1
VCCST_PWRGOOD SLP_SUS# -PCH_SLP_LAN TP1306
BT31 1
BPWRG_R SLP_LAN# -PCH_SLP_WLAN TP1308
R1307 1 2 0_0201_SP CR10 BT30 1
85 BPWRG CPUCORE_PWRGD_R BP31 SYS_PWROK GPD9/SLP_WLAN# -PCH_SLP_M TP1311
R1308 1 2 0_0201_SP BU37 1
85 CPUCORE_PWRGD MPWRG_R PCH_PWROK GPD6/SLP_A# TP1310
R1309 1 2 0_0201_SP BP30
DSW_PWROK -PWRSW_EC
R1322 1 @ 2 1/20W_0_5%_0201 BU28
85,108 VGATE GPD3/PWRBTN# AC_PRESENT -PWRSW_EC 64,85
-SUSWARN BV34 BU35
-SUSWARN_N GPP_A13/SUSWARN#/SUSPWRDACK GPD1/ACPRESENT AC_PRESENT 85
R1310 1 2 0_0201_SP BY32 BV36 -BATLOW
GPP_A15/SUSACK# GPD0/BATLOW#
-PCIE_WAKE BU30
66 -PCIE_WAKE WAKE#
-LANWAKE_DSW BU32 BR35 -INTRUDER
GPD2/LAN_WAKE# INTRUDER#
BU34
GPD11/LANPHYPC GPP_B11
CC37
GPP_B11/EXT_PWR_GATE#
CC36
GPP_B2/VRALERT#
BT27 INPUT3VSEL
INPUT3VSEL

11 of 20
WHISKEYLAKE-U_BGA1528
B B
@

Follow the CRB


VCC3_SUS
Vinafix.com
1. must be always pulled-up to VCCRTC.
2. 1 = Enable DSW 3.3V-to-1.05V Integrated DeepSx Well (DSW) On-Die Voltage Regulator.
This must always be pulled high on product i on boar ds.
1/20W_4.7K_5%_0201

VCC3M
2
R1315

@
R1323 1 2 1/20W_10K_5%_0201 -BATLOW
1

INPUT3VSEL
A A

R1324 1 2 1/20W_10K_5%_0201 -RSMRST


1/20W_4.7K_5%_0201
2

R1317 1 2 1/20W_10K_5%_0201 CPUCORE_PWRGD


R1316

Security Classification LC Future Center Secret Data Title


R1318 1 @ 2 1/20W_10K_5%_0201 BPWRG
Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (11/16): SYSTEM PM
1

R1319 1 @ 2 1/20W_10K_5%_0201 AC_PRESENT


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 13 of 128


5 4 3 2 1

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5 4 3 2 1

575414_WHL_Ballout List
VCCGFXCORE_I VCCGFXCORE_I 110,112

VCCCPUCORE VCCCPUCORE 109,112

Comet Lake U 4+2 Processor] VCCCPUCORE


Comet Lake U 4+2 Processor [BOTTOM]10uF x8 47uF x20
VCCCPUCORE

1 1 1 1 1 1 1 1
Cost@ Cost@ Cost@ Cost@
C1449 C1450 C1451 C1452 C1453 C1454 C1455 C1456
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402
2 2 2 2 2 2 2 2
D D

Comet Lake U 4+2 Processor] VCCCPUCORE


Comet Lake U 4+2Processor[TOP]2.2uFx21 10uFx29 22uFx14 VCCCPUCORE VCCCPUCORE

UCPU1L
VCCCPUCORE AN9 AW24
VCCCORE5 VCCCORE35
AN10 AW25
VCCCORE1 VCCCORE36
AN24 AW26
VCCCORE2 VCCCORE37
AN26 AW27
VCCCORE3 VCCCORE38
AN27 AY24
VCCCORE4 VCCCORE44
1 1 1 1 1 1 1 1 1 1 AP2 AY26
VCCCORE6 VCCCORE45
Cost@ Cost@ Cost@ AP9 BA5
VCCCORE9 VCCCORE48
C1401 C1402 C1403 C1404 C1405 C1406 C1407 C1408 C1409 C1410 AP24 BA7
VCCCORE7 VCCCORE49
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 AP26 BA8
2 2 2 2 2 2 2 2 2 2 VCCCORE8 VCCCORE50
AR5 BA25
VCCCORE13 VCCCORE46
AR6 BA27
VCCCORE14 VCCCORE47
AR7 BB2
VCCCORE15 VCCCORE51
AR8 BB26
VCCCORE16 VCCCORE52
AR10 BC5
VCCCORE10 VCCCORE56
AR25 BC6
VCCCORE11 VCCCORE57
AR27 BC7
VCCCORE12 VCCCORE58
VCCCPUCORE AT9 BC9
VCCCORE19 VCCCORE59
AT24 BC10 VCCST VCCCPUCORE
VCCCORE17 VCCCORE53
AT26 BC26
VCCCORE18 VCCCORE54
AU5 BC27
VCCCORE24 VCCCORE55
AU6 BD5
VCCCORE25 VCCCORE63

1
1 1 1 1 1 1 1 1 1 1 AU7 BD8
VCCCORE26 VCCCORE64
Cost@ Cost@ AU8 BD10 R1406 R1407 R1408 R1409
VCCCORE27 VCCCORE60
C1411 C1412 C1413 C1433 C1434 C1435 C1436 C1437 C1438 C1439 AU9 BD25 1/20W_56_5%_02011/20W_100_1%_0201 1/20W_100_1%_0201 1/20W_100_1%_0201
VCCCORE28 VCCCORE61
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 AU24 BD27 Rpu1 Rpu1 Rpu2
2 2 2 2 2 2 2 2 2 2 VCCCORE20 VCCCORE62
AU25 BE9 @

2
VCCCORE21 VCCCORE69
AU26 BE24
VCCCORE22 VCCCORE65
AU27 BE25 [SKL PDG]VIDALERT# [SKL PDG]VIDSCK [SKL PDG]VIDSOUT
VCCCORE23 VCCCORE66
AV2 BE26
VCCCORE30 VCCCORE67
AV5 BE27
VCCCORE32 VCCCORE68
AV7 BF2
VCCCORE33 VCCCORE70
VCCCPUCORE AV10 BF9
VCCCORE29 VCCCORE73
AV27 BF24
VCCCORE31 VCCCORE71
AW5 BF26
VCCCORE39 VCCCORE72
1 AW6 BG27
VCCCORE40 VCCCORE74
AW7
VCCCORE41
C1440 AW8 AN6 R1410 1 2 0_0201_SP
C VCCCORE42 VCC_SENSE VCC_SENSE 108 C
10U_6.3V_M_X5R_0402 AW9 AN5 R1411 1 2 0_0201_SP
2 VCCCORE43 VSS_SENSE VSS_SENSE 108
AW10
VCCCORE34
AA3 -SVID_ALERT_R R1416 1 2 1/20W_220_5%_0201 -SVID_ALERT
VIDALERT# -SVID_ALERT 108
BB9 Rs1
RSVD3
BC24 AA1 SVID_CLK
RSVD4 VIDSCK SVID_CLK 108
AY9
RSVD1
BB24 AA2 SVID_DATA
RSVD2 VIDSOUT SVID_DATA 108
VCCCPUCORE Y3 VCCSTG
RSVD5

1
BG3 R1417
VCCSTG1
1/20W_100_1%_0201

1 1 1 1 1 1 1 1 1 1 WHISKEYLAKE-U_BGA1528
12 of 20

2
Cost@ Cost@ Cost@ Cost@ Cost@ @
C1414 C1415 C1416 C1417 C1418 C1419 C1420 C1421 C1422 C1423
2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201
2 2 2 2 2 2 2 2 2 2
VCCGFXCORE_I VCCGFXCORE_I
UCPU1M

A5 D15
VCCGT8 VCCGT58
VCCCPUCORE A6 D17
VCCGT9 VCCGT59
A8 D18
VCCGT10 VCCGT60
A11 D20
VCCGT1 VCCGT61
A12 E4
VCCGT2 VCCGT64
A14 F5
VCCGT3 VCCGT69
1 1 1 1 1 1 1 A15 F6
VCCGT4 VCCGT70
1

Cost@ Cost@ Cost@ A17 F7


VCCGT5 VCCGT71
C1424 C1425 C1426 C1427 C1428 C1429 C1430 C1431 C1432 VCCCPUCORE A18 F8
VCCGT6 VCCGT72
2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 2.2U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 4.3U_0402_4V6-M 4.3U_0402_4V6-M A20 F11
2

2 2 2 2 2 2 2 VCCGT7 VCCGT65
AA9 F14
VCCCORE75 VCCGT66
AB2 F17
VCCCORE76 VCCGT67
AB8 F20
AB9 VCCCORE77
VCCCORE78
VCCGT68
VCCGT73
G11 Comet Lake U 4+2Processor Processor VCCGT
AB10 G12
AC8 VCCCORE79
VCCCORE80
VCCGT74
VCCGT75
G14 Comet Lake U 4+2Processor [BOTTOM] 47uF x4 22uF x 15
AD9 G15
VCCCORE81 VCCGT76
AE8 G17
VCCCORE82 VCCGT77
AE9 G18
VCCCORE83 VCCGT78
AE10 G20
AF2 VCCCORE84
VCCCORE85
VCCGT79
VCCGT87
H5 Comet Lake U 4+2Processor Processor VCCGT
AF8 H6
AF10 VCCCORE86
VCCCORE87
VCCGT88
VCCGT89
H7 Comet Lake U 4+2Processor[TOP] 10uF x15,1uF x11
AG8 H8
VCCCORE88 VCCGT90
AG9 H11
VCCCORE89 VCCGT80
AH9 H12
VCCCORE90 VCCGT81
AJ8 H14
VCCCORE91 VCCGT82
AJ10 H15 VCCGFXCORE_I
B VCCCORE92 VCCGT83 B
AK2 H17
VCCCORE93 VCCGT84
AK9 H18
VCCCORE94 VCCGT85
AL8 H20
VCCCORE95 VCCGT86
AL9 J7
VCCCORE96 VCCGT95
AL10 J8 1 1 1 1 1 1 1
VCCCORE97 VCCGT96

3
VCCGFXCORE_I AM8 J11 Cost@
VCCCORE98 VCCGT91
B3 J14 C1470 C1471 C1472 C1473 C1474 C1475 C1476 C1477
VCCGT39 VCCGT92
B4 J17 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 4.3U_0402_4V6-M

4
VCCGT40 VCCGT93 2 2 2 2 2 2 2
B6 J20
VCCGT41 VCCGT94
B8 K2
VCCGT42 VCCGT98
B11 K11
VCCGT35 VCCGT97
B14 L7
VCCGT36 VCCGT100
B17 L8
VCCGT37 VCCGT101
B20 L10
VCCGT38 VCCGT99
C2 M9
VCCGT49 VCCGT102
C3 N7
VCCGT51 VCCGT104
C6 N8 VCCGFXCORE_I
VCCGT52 VCCGT105
C7 N9
VCCGT53 VCCGT106
C8 N10
VCCGT54 VCCGT103
C11 P2
VCCGT43 VCCGT107
C12 P8
VCCGT44 VCCGT108
C14 R9 1 1 1 1 1 1 1 1 1
VCCGT45 VCCGT109
C15 T8
VCCGT46 VCCGT111
C17 T9 VCCCPUCORE VCCGFXCORE_I C1481 C1482 C1483 C1484 C1485 C1486 C1487 C1488 C1489
VCCGT47 VCCGT112
C18 T10 10U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_0402
VCCGT48 VCCGT110 2 2 2 2 2 2 2 2 2
C20 U8
VCCGT50 VCCGT114
D4 U10
VCCGT62 VCCGT113

1
D7 V2
VCCGT63 VCCCORE100
D11 V9 R1414
VCCGT55 VCCGT116
VCCCPUCORE D12 W8 1/16W_100_1%_0402
VCCGT56 VCCGT117
D14 W9
VCCGT57 VCCGT118
Y10 Y8 VCCGFXCORE_I

2
VCCCORE99 VCCCORE101
E3 R1412 1 2 0_0402_SP
VCCGT_SENSE VCCGT_SENSE 108
D2 R1413 1 2 0_0402_SP
VSSGT_SENSE VSSGT_SENSE 108

13 of 20 1 1 1 1 1 1

1
Cost@
WHISKEYLAKE-U_BGA1528 R1415 C1490 C1491 C1492 C1493 C1494 C1495
@ 1/16W_100_1%_0402 10U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_040210U_6.3V_M_X5R_0402
2 2 2 2 2 2
[WHL PDG]Package Sensing Recommendations

2
1.Trace Length Match: <25mil
2.Space: >25mil
3.Trace impedance:50ohm
4.Sense traces should be referenced to a solid ground plane
5.Avoid crossing over plane splits

[WHL PDG]SVID
A A
VIDALERT#, VIDSCLK, and VIDSCLK comprise a three signal serial synchronous
interface (SVID) used to transfer power management information between the Whiskey
Lake processor and the voltage regulator controllers. Alert signal must be routed
between Clk and Data signals to minimize Cross-Talk.

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (12/16): CPU POWER (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 14 of 128

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5 4 3 2 1

[CML PDG]VCCPLL_OC [CML PDG]VCCSTG


Comet Lake U 4+2 Processor]VCCSA Comet Lake U 4+2 Processor]VDDQ [CML PDG]1uF x1 [CML PDG]1uF x1
Comet Lake U 4+2 Processor[BOTTOM]10uF x6 47uF x2 Comet Lake U 4+2 Processor[BOTTOM]10uF x6, 22uF x1 Primary side cap Primary side cap
VCC1R2A
VCCSFR_OC VCCSTG
VCCSA

2 1
1 1 1 1 1 1 1 2 C1545
C1551 1U_6.3V_K_X5R_0402_MURATA C1546
1 1 1 1 1 1 C1531 C1532 C1533 C1534 C1535 C1536 C1537 1U_6.3V_K_X5R_0201
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 22U_6.3V_M_X5R_0603 1 2
D
C1501 C1502 C1503 C1504 C1505 C1506 2 2 2 2 2 2 2 1 D
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402
2 2 2 2 2 2

[CML PDG]VCCST [WHL PDG]VCCPLL


Comet Lake U 4+2 Processor]VCCSA Comet Lake U 4+2 Processor]VDDQ [CML PDG]1uF x1 [WHL PDG]1uF x2
Comet Lake U 4+2 Processor[TOP]10uF x7 Comet Lake U 4+2 Processor[TOP]1uF x4, 10uF x3 Primary side cap Primary side cap
VCCSA
20190604 20190604 VCC1R2A VCCST
Remove for Cost Remove for Cost

2 2 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 C1549 C1550
@ @ 1U_6.3V_K_X5R_0402_MURATA 1U_6.3V_K_X5R_0402_MURATA C1552
C1507 C1508 C1509 C1510 C1511 C1512 C1513 C1538 C1539 C1540 C1541 C1542 C1543 C1544 1U_6.3V_M_X5R_0201
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 1 1 2
2 2 2 2 2 2 2 2 2 2 2 2 2 2

VCCSA
20190604
Remove for Cost

1 1 1
@
C C1516 C1517 C1520 C
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402
2 2 2
VCC1R2A VCCIO

UCPU1N
AK24
VCCIO1
AD36 AK26
VDDQ1 VCCIO2
AH32 AL24
VDDQ2 VCCIO3
AH36 AL25
Comet Lake U 4+2 Processor]VCCIO AM36 VDDQ3 VCCIO4
AL26
VDDQ4 VCCIO5
AN32 AL27
Comet Lake U 4+2 Processor[BOTTOM]1uF x4, 10uF x6 AW32 VDDQ5 VCCIO6
AM25
VDDQ6 VCCIO7
AY36 AM27
VDDQ7 VCCIO8
VCCIO BE32 BH24
VDDQ8 VCCIO9
BH36 BH25
VDDQ9 VCCIO10
VCCST R32 BH26
VDDQ10 VCCIO11
VCCSFR_OC VCCSTG Y36 BH27
VDDQ11 VCCIO12
1 1 1 1 BJ24 VCCSA
VCCIO13
BJ26
VCCIO14
C1521 C1522 C1523 C1524 BP16
1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 VCCIO15
BC28 BP18
2 2 2 2 RSVD1 VCCIO16
BP11 BG8
VCCST1 VCCSA2
BP2 BG10
VCCST2 VCCSA1
BH9
VCCSA3
BJ8
VCCSA5
BG1 BJ9 VCCIO VCCSA
VCCSTG1 VCCSA6
BG2 BJ10
VCCSTG2 VCCSA4
BK8
VCCSA9
VCCIO BL27 BK25
VCCPLL_OC1 VCCSA7
BM26 BK27
VCCPLL_OC2 VCCSA8
BL8
VCCSA13

1
BR11 BL9
VCCPLL1 VCCSA14
1 1 1 1 1 1 BT11 BL10 R1502 R1503
VCCPLL2 VCCSA10
BL24 1/20W_100_1%_0201 1/20W_100_1%_0201
B VCCSA11 B
C1525 C1526 C1527 C1528 C1529 C1530 BL26
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 VCCSA12
BM24

2
2 2 2 2 2 2 VCCSA15
BN25
VCCSA16
BP28 VCCIO_SENSE
VCCIO_SENSE VSSIO_SENSE
BP29
VSSIO_SENSE
BE7 VSSSA_SENSE
VSSSA_SENSE VCCSA_SENSE VSSSA_SENSE 108
BG7
VCCSA_SENSE VCCSA_SENSE 108
14 of 20

1
WHISKEYLAKE-U_BGA1528
@ R1504 R1505
1/20W_100_1%_0201 1/20W_100_1%_0201
VCCSFR_OC
VCC3M VCC1R2A

2
R1501 1 2 0_0603_SP
1

R1506
@ 1/16W_10K_1%_0402

@
2

A2 A1
VIN1 VOUT1
B2 B1
VIN2 VOUT2
C2 C1
CT PG
@
D1501 1 2 RB521CM-30T2R_VMN2M-2 ON D2 D1
85,106,107,123 A_ON ON GND
@ U1501
A D1502 1 2 RB521CM-30T2R_VMN2M-2 TPS22971YZPT_DSBGA8 A
11,123 -CPU_C10_GATE

1 1
C1548 C1547
@ 10U_6.3V_M_X5R_0402 @ 0.1U_6.3V_K_X7R_0402 Title
Security Classification LC Future Center Secret Data
2 2
Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (13/16): CPU POWER (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 15 of 128

5 4 3 2 1

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[WHL PDG]VCCPRIM_1P8 [WHL PDG]VCCPRIM_3P3 [WHL PDG]VCCRTC [WHL PDG]VCCDSW_GPIO [WHL PDG]VCCRTCEXT [WHL PDG]VCCPRIM_1P05 [WHL PDG]VCCPHYGTAON_1P05
[WHL PDG] VCCDPHY_1P24 [WHL PDG]VCCDSW_1P05 [WHL PDG]Close CP17 and CP23 [WHL PDG]Close CP29 [WHL PDG]Close BR23 [WHL PDG]Close BR24 [WHL PDG]Close BP24 [WHL PDG]1uF x1 [WHL PDG]22uF x1
[WHL PDG]Close CP25 [WHL PDG]Close BT24 [WHL PDG]1uF x2 [WHL PDG]1uF x1 and 0.1uF x1 [WHL PDG]1uF x1 and 0.1uF x1 [WHL PDG]1uF x1 [WHL PDG]1uF x1
[WHL PDG]4.7uF x1 [WHL PDG]1uF x1
VCC3_SUS_PRIM

1U_6.3V_K_X5R_0402_MURATA
VCC1R8_SUS_PRIM RTCVCC VCC3M_PCH VCCRTCEXT VCC1R05_SUS_PRIM VCC1R05_SUS_PRIM
VCCDPHY_1P24 VCCDSW_1P05

0.1U_6.3V_K_X7R_0402
VCC3M VCC3M_PCH

0.1U_6.3V_K_X5R_0201_MURATA

1U_6.3V_K_X5R_0402_MURATA
1U_6.3V_K_X5R_0402_MURATA

1U_6.3V_K_X5R_0402_MURATA

0.1U_6.3V_K_X5R_0201_MURATA

22U_6.3V_M_X5R_0603
1U_6.3V_K_X5R_0402_MURATA

1U_6.3V_K_X5R_0402_MURATA

1U_6.3V_K_X5R_0402_MURATA
R1601 1 2 0_0603_SP 2 2 1 2

C1605

C1606

C1618

C1608
C1604 2 2 2 1 2 2 2

2
C1601

C1617

C1609

C1616
VCC3_SUS VCC3_SUS_PRIM 4.7U_6.3V_M_X5R_0402_MURATA
C1612 C1619 C1620
1 1 2 1

1
R1602 1 2 0_0603_SP 1 1 1 2 1 1 1

VCC1R8_SUS VCC1R8_SUS_PRIM
D D
R1603 1 2 0_0603_SP

VCC1R05_SUS VCC1R05_SUS_PRIM

R1604 1 2 0_0603_SP

VCC1R05_SUS VCCPRIM_CORE

VCC1R05_SUS_PRIM VCC3_SUS_PRIM
R1605 1 2 0_0603_SP

UCPU1P
VCC1R05_SUS_PRIM RTCVCC VCCRTCEXT
BP20
VCCPRIM_1P051
BW16 CB16
VCCPRIM_1P059 VCCPRIM_3P33
BW18
VCCPRIM_1P0510
VCC1R8_SUS_PRIM BW19
VCCPRIM_1P0511
BY16
VCCPRIM_1P0512
CA14 BR23
VCCPRIM_1P0514 VCCRTC
CC15 BY20
VCCPRIM_1P81 VCCPRIM_1P0513
VCC3_SUS_PRIM CD15 BP24
VCCPRIM_1P84 DCPRTC
CD16
VCCPRIM_1P85
CP17
VCCPRIM_1P88
[WHL PDG]VCCA_XTAL_1P05 BR20
VCCPRIM_1P053
[WHL PDG]Close CP5 CB22
VCCPRIM_3P34
[WHL PDG]1uF x1 CB23 BT12
VCCPRIM_3P35 VCCAPLL_1P053
CC22
VCCPRIM_3P36
CC23 BP14
VCCPRIM_3P37 VCCA_BCLK_1P05
CD22 VCC1R05_SUS_XTAL
VCCPRIM_3P38
VCC1R05_SUS VCC1R05_SUS_XTAL VCCPRIM_CORE CD23 BR14
VCCPRIM_3P39 VCCAPLL_1P051
CP29
VCCPRIM_3P310
@ BU12
VCCPRIM_CORE VCCA_SRC_1P05
L1601 1 2MMZ0603AFY560VT_2P BU15
VCCPRIM_CORE1
BU22 CP5
VCCPRIM_CORE2 VCCA_XTAL_1P05
C BV15 C
VCCPRIM_CORE3
BY24 VCCLDOSRAM_1P24

1U_6.3V_K_X5R_0402_MURATA
BV16
VCCPRIM_CORE4 VCCDPHY_1P242
2 2 BV18 CA24
VCCPRIM_CORE5 VCCDPHY_1P244
C1611

C1615
1U_6.3V_K_X5R_0402_MURATA

R1606 1 2 0_0603_SP BV19


VCCPRIM_CORE6
BV20 BY23 VCC3M_PCH VCC1R05_SUS_PRIM
VCCPRIM_CORE7 VCCDPHY_1P241
BV22 CA23
1 1 VCCPRIM_CORE8 VCCDPHY_1P243 VCCDPHY_1P24
BW20 CP25
VCCPRIM_CORE9 VCCDPHY_EC_1P24
BW22
VCCPRIM_CORE10
CA12 BT23
VCCPRIM_CORE11 VCCDSW_3P32
CA16
VCCPRIM_CORE12
CA18 BR12
VCCPRIM_CORE13 VCCA_19P2_1P05
CA19
VCCPRIM_CORE14
CA20 VCC1R8_SUS_PRIM VCC3_SUS_PRIM
VCCPRIM_CORE15
CB12
VCCPRIM_CORE16
VCC1R05_SUS_PRIM CB14
VCCPRIM_CORE17
CB15 CC18
VCCDSW_1P05 VCCPRIM_CORE18 VCCPRIM_1P82
BT24 CC19
VCCDSW_1P05 VCCPRIM_1P83
VCC1R05_SUS_AMP CD18
VCCPRIM_1P86
BU14 CD19
VCCAPLL_1P054 VCCPRIM_1P87
CP23
VCCPRIM_1P89
BV12
VCCPRIM_MPHY_1P051
BW12 BW23
VCCPRIM_MPHY_1P053 VCCPRIM_3P32
BW14
VCCPRIM_MPHY_1P054
BY12
VCCPRIM_MPHY_1P055
BY14
VCCPRIM_MPHY_1P056
BV2 BP23
VCCAMPHYPLL_1P05 VCCPRIM_3P31
[WHL PDG]VCCAMPHYPLL_1P05
[WHL PDG]Close BV2 VCC3_SUS_PRIM VCC3M_PCH BR15 CB36
VCCAPLL_1P052 GPP_B0/CORE_VID0
[WHL PDG]1uF x1 VCC1R05_SUS_PRIM CB35
GPP_B1/CORE_VID1
CC12
VCCDUSB_1P05
VCC1R05_SUS VCC1R05_SUS_AMP BR24
VCCDSW_3P31
1U_6.3V_K_X5R_0402_MURATA

@ BT20
VCCHDA
L1602 1 2MMZ0603AFY560VT_2P
BV23
VCCSPI
B B
BT18
VCCPRIM_1P054
2 BT19
VCCPRIM_1P055
C1614

R1607 1 2 0_0603_SP BU18


VCCPRIM_1P057
BU19
VCCPRIM_1P058
1 BT22
VCCPRIM_1P056
BP22
VCCPRIM_1P052
BV14
VCCPRIM_MPHY_1P052

16 of 20
WHISKEYLAKE-U_BGA1528
@

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (1/16): DDI/TYPE-C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 16 of 128


5 4 3 2 1

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5 4 3 2 1

UCPU1R
UCPU1T UCPU1S
1 CR34 CR34 BL7 BT35 BY25
BT5 VSS_1 VSS_73
AE25 N6 CF23 VSS_145 VSS_217
@ TP1702 VSS_2 VSS_74 B37 VSS_290 VSS_362
V4 D6 J18
BY5 BM33 VSS_146 VSS_218
Test_Point_20MIL VSS_3 VSS_75 CB3 VSS_291 VSS_363
BE30 AL32 AU32
CP35 CM5 VSS_147 VSS_219
VSS_4 VSS_76 P10 VSS_292 VSS_364
CF28 BT36 BY28
CM37 AE27 VSS_148 VSS_220
VSS_5 VSS_77 B5 VSS_293 VSS_365
W10 D8 J21
CK37 BM35 VSS_149 VSS_221
VSS_6 VSS_78 CB33 VSS_294 VSS_366
BE31 AL7 AV25
D AW1 CM9 VSS_150 VSS_222 D
VSS_7 VSS_79 P3 VSS_295 VSS_367
CF3 D9 BY33
CM1 AE30 VSS_151 VSS_223
VSS_8 VSS_80 B7 VSS_296 VSS_368
W27 AM10 J24
BD6 BM36 VSS_152 VSS_224
VSS_9 VSS_81 CB4 VSS_297 VSS_369
CF4 BU11 AV28
AY4 CN13 VSS_153 VSS_225
VSS_10 VSS_82 P33 VSS_298 VSS_370
W30 E23 BY35
B34 AE7 VSS_154 VSS_226
VSS_11 VSS_83 B9 VSS_299 VSS_371
BF3 AM28 J33
E35 BM9 VSS_155 VSS_227
VSS_12 VSS_84 CB7 VSS_300 VSS_372
CG33 E27 AV3
A4 CN17 VSS_156 VSS_228
VSS_13 VSS_85 P36 VSS_301 VSS_373
W7 AM33 BY36
AE24 AF27 VSS_157 VSS_229
VSS_14 VSS_86 BA10 VSS_302 VSS_374
BF33 BU23 J36
AE26 BN30 VSS_158 VSS_230
VSS_15 VSS_87 CC11 VSS_303 VSS_375
CG7 E29 AV33
AF25 CN21 VSS_159 VSS_231
VSS_16 VSS_88 P4 VSS_304 VSS_376
BF36 AM35 J6
AG24 AF3 VSS_160 VSS_232
VSS_17 VSS_89 BA28 VSS_305 VSS_377
Y26 BU24 AV36
AG26 BN7 VSS_161 VSS_233
VSS_18 VSS_90 P7 VSS_306 VSS_378
BF4 E31 C1 C1 1
AH24 CN25 VSS_162 VSS_234
VSS_19 VSS_91 BA3 VSS_307 VSS_379
CH31 BU25 K21
AH25 AF30 VSS_163 VSS_235
VSS_20 VSS_92 CC20 VSS_308 VSS_380
Y27 E33 AV4 @ TP1706
B2 CN29 VSS_164 VSS_236
VSS_21 VSS_93 R27 VSS_309 VSS_381
BG25 AN25 C21 Test_Point_20MIL
B36 AF33 VSS_165 VSS_237
VSS_22 VSS_94 BB3 VSS_310 VSS_382
Y30 BU7 K22
C36 BP15 VSS_166 VSS_238
VSS_23 VSS_95 CC25 VSS_311 VSS_383
BG28 E9 AV6
C37 AF36 VSS_167 VSS_239
VSS_24 VSS_96 R28 VSS_312 VSS_384
CJ11 AN28 C25
1 CN1 CN1 AF4 VSS_168 VSS_240
VSS_25 VSS_97 BB33 VSS_313 VSS_385
Y33 BV11 K24
CN2 CN5 VSS_169 VSS_241
@ TP1708 VSS_26 VSS_98 CC28 VSS_314 VSS_386
CJ14 F12 AV8
CN37 AF7 VSS_170 VSS_242
Test_Point_20MIL VSS_27 VSS_99 R29 VSS_315 VSS_387
Y35 AN29 C29
CP2 BP25 VSS_171 VSS_243
VSS_28 VSS_100 BB36 VSS_316 VSS_388
BH28 F15 K25
1 D1 D1 CN9 VSS_172 VSS_244
VSS_29 VSS_101 CC31 VSS_317 VSS_389
CJ19 AN30 AW28
1 A32 A32 AG10 VSS_173 VSS_245
@ TP1705 VSS_30 VSS_102 R30 VSS_318 VSS_390
Y7 F18 C33
C F33 BP3 VSS_174 VSS_246 C
Test_Point_20MIL @ TP1703 VSS_31 VSS_103 BB4 VSS_319 VSS_391
BH29 AN31 K27
A3 CP1 CP1 1 VSS_175 VSS_247
Test_Point_20MIL VSS_32 VSS_104 CC7 VSS_320 VSS_392
CJ23 BV3 AW29
BJ7 BP32 VSS_176 VSS_248
VSS_33 VSS_105 @ TP1707 R31 VSS_321 VSS_393
BH32 F2 C4
CJ36 CP11 VSS_177 VSS_249
VSS_34 VSS_106 Test_Point_20MIL BC25 VSS_322 VSS_394
CJ28 AN7 K28
1 A36 A36 AH27 VSS_178 VSS_250
VSS_35 VSS_107 CD11 VSS_323 VSS_395
BH33 BV31 AW3
BK10 BP33 VSS_179 VSS_251
@ TP1704 VSS_36 VSS_108 T27 VSS_324 VSS_396
CJ33 F21 C9
CJ4 CP13 VSS_180 VSS_252
Test_Point_20MIL VSS_37 VSS_109 CD12 VSS_325 VSS_397
BH35 AN8 K29
AB27 AH28 VSS_181 VSS_253
VSS_38 VSS_110 T30 VSS_326 VSS_398
CJ35 BV33 AW30
BK2 BP4 VSS_182 VSS_254
VSS_39 VSS_111 BC29 VSS_327 VSS_399
BP19 F24 CA11
CK1 CP15 VSS_183 VSS_255
VSS_40 VSS_112 CD14 VSS_328 VSS_400
BR16 BV4 K3
AB3 AH29 VSS_184 VSS_256
VSS_41 VSS_113 T33 VSS_329 VSS_401
BY18 F3 AW31
BK28 BP7 VSS_185 VSS_257
VSS_42 VSS_114 T35 VSS_330 VSS_402
BY19 AP3 CA15
AB30 CP19 VSS_186 VSS_258
VSS_43 VSS_115 BC32 VSS_331 VSS_403
CC16 BW11 K30
BK3 AH30 VSS_187 VSS_259
VSS_44 VSS_116 CD24 VSS_332 VSS_404
BU16 F4 AY33
CK4 CP21 VSS_188 VSS_260
VSS_45 VSS_117 T36 VSS_333 VSS_405
CC14 AP33 CA22
AB33 AH31 VSS_189 VSS_261
VSS_46 VSS_118 CD25 VSS_334 VSS_406
BR22 BW15 K31
BK33 BR19 VSS_190 VSS_262
VSS_47 VSS_119 T7 VSS_335 VSS_407
BU20 G21 AY35
CK7 CP27 VSS_191 VSS_263
VSS_48 VSS_120 BC8 VSS_336 VSS_408
CD20 AP36 K32
AB36 AH33 VSS_192 VSS_264
VSS_49 VSS_121 CE33 VSS_337 VSS_409
BT14 G27 B12
BK4 BR25 VSS_193 VSS_265
VSS_50 VSS_122 U26 VSS_338 VSS_410
BP12 AP4 K4
CL2 AH35 VSS_194 VSS_266
VSS_51 VSS_123 BD28 VSS_339 VSS_411
CB24 G33 B15
AB4 CP37 VSS_195 VSS_267
VSS_52 VSS_124 CE35 VSS_340 VSS_412
CC24 AR28 CA25
BK7 AJ25 VSS_196 VSS_268
VSS_53 VSS_125 U7 VSS_341 VSS_413
J5 G35 K9
CM13 BT15 VSS_197 VSS_269
B VSS_54 VSS_126 BD33 VSS_342 VSS_414
U24 G36 B18 B
AB7 AJ28 VSS_198 VSS_270
VSS_55 VSS_127 CE36 VSS_343 VSS_415
BD7 AT33 CB11
BL25 BT16 VSS_199 VSS_271
VSS_56 VSS_128 V26 VSS_344 VSS_416
AR4 BW24 L27
CM17 CP9 VSS_200 VSS_272
VSS_57 VSS_129 BD35 VSS_345 VSS_417
AU4 G9 B21
AC10 AJ7 VSS_201 VSS_273
VSS_58 VSS_130 CE7 VSS_346 VSS_418
AW4 AT35 L33
BL28 CR2 VSS_202 VSS_274
VSS_59 VSS_131 V27 VSS_347 VSS_419
BA6 H21 B23
CM21 AK3 VSS_203 VSS_275
VSS_60 VSS_132 BD36 VSS_348 VSS_420
BC4 AT36 L35
AC27 CR36 CR36 1 VSS_204 VSS_276
VSS_61 VSS_133 CF11 VSS_349 VSS_421
BE4 BW7 B25
BL29 AK33 VSS_205 VSS_277
VSS_62 VSS_134 @ TP1701 V3 VSS_350 VSS_422
BE8 H27 CB18
CM25 D21 VSS_206 VSS_278
VSS_63 VSS_135 Test_Point_20MIL BE10 VSS_351 VSS_423
BA4 AT4 L36
AC30 AK36 VSS_207 VSS_279
VSS_64 VSS_136 CF14 VSS_352 VSS_424
BD4 BY11 B27
BL30 BT25 VSS_208 VSS_280
VSS_65 VSS_137 V30 VSS_353 VSS_425
BG4 AU10 CB19
CM29 D25 VSS_209 VSS_281
VSS_66 VSS_138 BE28 VSS_354 VSS_426
CJ2 BY15 L6
BL31 AK4 VSS_210 VSS_282
VSS_67 VSS_139 CF19 VSS_355 VSS_427
CJ3 H9 B29
CM31 BT28 VSS_211 VSS_283
VSS_68 VSS_140 V33 VSS_356 VSS_428
AM5 AU28 CB2
AD33 AL28 VSS_212 VSS_284
VSS_69 VSS_141 BE29 VSS_357 VSS_429
CM4 BY22 N25
BL32 BT33 VSS_213 VSS_285
VSS_70 VSS_142 CF2 VSS_358 VSS_430
AC5 J12 B31
CM33 D5 VSS_214 VSS_286
VSS_71 VSS_143 V36 VSS_359 VSS_431
AG5 AU29 CB20
AD35 AL29 VSS_215 VSS_287
VSS_72 VSS_144 BE3 VSS_360 VSS_432
CR6 J15 N27
VSS_216 VSS_288
VSS_361 VSS_433 CB25
VSS_289

17 of 20 19 of 20 18 of 20
WHISKEYLAKE-U_BGA1528 WHISKEYLAKE-U_BGA1528 WHISKEYLAKE-U_BGA1528
@ @ @
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (15/16): GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 17 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

VCCIO DFXTESTMODE
CFG0 CFG4 CFG3 VCC1R05_SUS_PRIM
[SKL EDS] *L: Embedded DisplayPort Enabled PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
0 : ENABLED
H: Embedded DisplayPort Disabled
1

SET DFX ENABLED BIT IN DEBUG INTERFACE MSR


L:Stall. 1 : DISABLED

2
R1807 *H:(Default) Normal
@ 1/16W_1K_5%_0402
Operation; No stall. R1809
1/16W_1.5K_5%_0402
2

D D

1
CFG0 CFG4 CFG3 ITP_PMODE
1

1
R1808 R1804 R1801 R1810
@ 1/16W_1K_1%_0402 1/16W_1K_1%_0402 @ 1/16W_1K_1%_0402 @ 1/16W_1K_1%_0402
2

2
HIGH - DFXTESTMODE DISABLED(DEFAULT)
LOW - DFXTESTMODE ENABLED
WEAK INTERNAL PU

TABLE
CFG0 : Stall Reset Sequence
after PCU PLL Lock until de-asserted
1 : No Stall
0 : Stall
UCPU1Q

CFG0 T4 F37 RSVD_TP5 1 TP1801 @


CFG_0 RSVD_TP5
F34 RSVD_TP4 1 TP1802 @ CFG4 : eDP Enable
RSVD_TP4
R4
CFG_1
1 : Disabled
T3 CP36 IST_TRIG 1 TP1803 @
CFG3 R3 CFG_2 IST_TRIG
CN36 RSVD_TP3 1 TP1804@ 0 : Enabled
CFG_3 RSVD_TP3
CFG4 J4
CFG_4
M4
CFG_5
J3 BJ36 RSVD72 1 TP1805 @
[SKL CRB] M3 CFG_6 RSVD72
BJ34 RSVD73 1 TP1806 @
CFG9 : SVID Bus Communication
CFG_7 RSVD73
R2
CFG_8
1 : Enabled
[SKL PDG]Route CFG9 N2 BK34 TP1 1 TP1807 @
R1 CFG_9 TP1
BR18 TP3 1 TP1808 @
0 : Disabled
HOOK[6] to CFG_10 TP3
1

N1
C
Skylake R1802 J2 CFG_11
C
ITP_PMODE. @ 1/20W_1K_5%_0201 L2 CFG_12
[SKL EDS]Zero Voltage Mode:VCCOPC is fixed OPC VR output voltage of 1V, the
Termination: CFG_13
J1 BT9 RSVD74 1 TP1809 @ processor can drive VR to LPM (Low Power Mode) which sets VR output to 0V using
CFG_14 RSVD74
Resistor value L1 BT8 RSVD75 1 TP1810 @
ZVM# signal as shown below:
2

CFG_15 RSVD75
from 1K ohm to 3K
ohm pull up to L3 BP8 RSVD76 1 TP1811 @
CFG_16 RSVD76
N3 BP9 RSVD77 1 TP1812 @
PCH_V1.0A Rail. CFG_18 RSVD77
L4 ZVM# state VCCOPC
CFG_17 CR4 RSVD29 1 TP1813 @
N4 RSVD29
CFG_19
CP3 RSVD26 1 TP1814 @ 0V 0V
CFG_RCOMP RSVD26
R1805 2 1 1/16W_49.9_1%_0402 AB5 CR3 RSVD27 1 TP1815 @
CFG_RCOMP RSVD27
ITP_PMODE W4 1V 1V
ITP_PMODE
@ TP1834 1 RSVD25 CG2
RSVD25
@ TP1835 1 RSVD24 CG1 [SKL EDS]Minimum Speed Mode: VCCEOPIO can be connected to OPC VR in this
RSVD24
AU3 RSVD78 1 TP1816 @ case VCCEOPIO is fixed to 1V. The processor can drive VR to LPM (Low Power
RSVD78
AT3 RSVD79 1 TP1817 @
RSVD79 Mode) which sets VR output to 0V using ZVM# signal .
In order to achieve better power/performance it is recommended to use a
@ TP1836 1 RSVD34 H4 separate VR for VCCEOPIO in this case VCCEOPIO is configurable to 0.8V/1V.
RSVD34
@ TP1837 1 RSVD33 H3 AN1 RSVD8 1 TP1818 @ The processor drives the VR to set VCCEOPIO value(0.8V/1V) using MSM#
RSVD33 RSVD8
AN2 RSVD9 1 TP1819 @ signal, based on the required bandwidth for the EOPIO interface as shown
RSVD9
@ TP1838 1 RSVD22 BV24 below:
RSVD22
@ TP1839 1 RSVD23 BV25 AN4 RSVD11 1 TP1820 @
RSVD23 RSVD11
AN3 RSVD10 1 TP1821 @
RSVD10
AL2 RSVD80 1 TP1822 @
RSVD80
AL1 RSVD81 1 TP1823 @ ZVM# state MSM# state VCCEOPIO
RSVD81

@ TP1840 1 RSVD69 G3
RSVD69 AL4 RSVD82 1 TP1824 @ 0V X 0V
@ TP1841 1 RSVD70 G4 RSVD82
RSVD70 AL3 RSVD83 1 TP1825 @
RSVD83

1V 0V 0.8V
@ TP1842 1 RSVD17 BK36 BP34 TP2 1 TP1826 @
RSVD17 TP2 VSS_392
@ TP1843 1 RSVD16 BK35 BP36
RSVD16 VSS_392
BP35 TP5 1 TP1827 @ 1V 1V 1V
B TP5 B
@ TP1844 1 RSVD35 W3
RSVD35
@ TP1845 1 RSVD7 AM4 C34 RSVD68 1 TP1828 @
RSVD7 RSVD68
@ TP1846 1 RSVD71 AM3 A34 1 TP1829 @
RSVD71 RSVD_TP1
B35 RSVD67 1 TP1830 @
RSVD67
CR35 RSVD84 1 TP1831 @
RSVD84
@ TP1847 1 RSVD1 A35
RSVD1
@ TP1848 1 RSVD30 D34 AH26 RSVD66 1 TP1832 @
RSVD30 RSVD66 UCPU1O
AJ27 RSVD85 1 TP1833 @
RSVD85
@ TP1849 1 RSVD32 G2 @ TP1851 1 RSVD46 K12
RSVD32 RSVD46
@ TP1850 1 RSVD31 G1 @ TP1852 1 RSVD47 K14 AA24 RSVD38 1 TP1869 @
RSVD31 RSVD47 RSVD38
E1 SKTOCC R1811 1 2 0_0402_SP @ TP1853 1 RSVD48 K15 AA26 RSVD39 1 TP1870 @
SKTOCC# RSVD48 RSVD39
@ TP1854 1 RSVD49 K17 AB25 RSVD40 1 TP1871 @
RSVD49 RSVD40
WHISKEYLAKE-U_BGA1528
20 of 20 @ TP1855 1 RSVD50 K18 AC24 RSVD41 1 TP1872 @
RSVD50 RSVD41
@ TP1856 1 RSVD51 K20 AC25 RSVD42 1 TP1873 @
@ RSVD51 RSVD42
@ TP1857 1 RSVD52 L25 AC26 RSVD43 1 TP1874 @
RSVD52 RSVD43
@ TP1858 1 RSVD53 M24 AD24 RSVD44 1 TP1875 @
RSVD53 RSVD44
@ TP1859 1 RSVD54 M26 AD26 RSVD45 1 TP1876 @
RSVD54 RSVD45
@ TP1860 1 RSVD55 P24
RSVD55
@ TP1861 1 RSVD56 P26 V25 1 TP1877 @
RSVD56 RSVD64
@ TP1862 1 RSVD57 R24 T25 1 TP1878 @
RSVD57 RSVD65
@ TP1863 1 RSVD58 R25
RSVD58
@ TP1864 1 RSVD59 R26
RSVD59
@ TP1865 1 RSVD60 W25
RSVD60
@ TP1866 1 RSVD61 V24
RSVD61
@ TP1867 1 RSVD62 Y25
RSVD62
@ TP1868 1 RSVD63 Y24
RSVD63

15 of 20
WHISKEYLAKE-U_BGA1528
@
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CPU (16/16): CFG/RESERVED
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 18 of 128


5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 19 of 128

5 4 3 2 1

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5 4 3 2 1

RTCVCC RTCVCC 13,16,100

RTC CONN.
RTCVCC

D D

RTC External Circuit


RTCBATT(R2001 D2003 )
RTCVCC 2
Trace width = 20mils @ C2001
1U_6.3V_M_X5R_0201
1

D2003
C D2003 2 1 RTCVCC C

RB520CM-30T2R_VMN2M2

2
R2001
1/20W_1K_5%_0201

1
1 2 -RTCRST
-RTCRST 12
R2002 1/20W_20K_5%_0201

2
C2002
1U_6.3V_K_X5R_0402_MURATA

2
JCMOS
ME@ 1 @ SHORT PADS
JRTC1

1
1 R2001
1
2
2
3
GND1
4
GND2

B HIGHS_WS33020-S0351-HF B
SP020011200

1 2 -SRTCRST
-SRTCRST 12
R2003 1/20W_20K_5%_0201

2
C2003
1U_6.3V_K_X5R_0402_MURATA

2
JME
1 @ SHORT PADS

1
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 RTC BATTERY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 20 of 128

5 4 3 2 1

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5 4 3 2 1

VCC3_SUS_SPI VCC3_SUS_SPI 7,85

VCC3_SUS VCC3_SUS 3,7,8,9,10,11,13,16,50,93,98,124

Mirror Code, Close to SPI ROM (U2101).


-ECSPI_SS R2107 1 2 0_0402_SP -SPI_CS0_16MB_R
D 85 -ECSPI_SS ECSPI_MOSI SPI_MOSI_IO0_16MB_R VCC3_SUS_SPI D
R2108 1 2 0_0402_SP VCC3_SUS
85 ECSPI_MOSI ECSPI_MISO SPI_MISO_IO1_16MB_R
R2109 1 2 0_0402_SP
85 ECSPI_MISO
ECSPI_CLK R2110 1 2 0_0402_SP SPI_CLK_16MB_R
85 ECSPI_CLK

1
RB520CM-30T2R_VMN2M2
2
D2101
R2117
@ 1/16W_0_5%_0402
TABLE of SPI ROM (U2101)

2
Vendor LCFC P/N Description
WINBOND SA00008A300 S IC FL 128M W25Q128JVSIQ SOIC 8P SPI
2
C2101
MXIC SA00009WJ00 S IC FL 128M MX25L12872FM2I-10
0.1U_6.3V_K_X5R_0201_MURATA
1

U2101
-SPI_CS0 R2101 1 2 0_0402_SP -SPI_CS0_16MB_R 1 8 VCC3_SUS_SPI
7 -SPI_CS0 /CS VCC
C C
SPI_MISO_IO1 R2102 1 2 1/16W_33_5%_0402 SPI_MISO_IO1_16MB_R 2 7 SPI_IO3_16MB_R R2103 1 2 1/16W_33_5%_0402 SPI_IO3
7,98 SPI_MISO_IO1 DO(IO1) /HOLD(IO3) SPI_IO3 7
SPI_IO2 R2104 1 2 1/16W_33_5%_0402 SPI_IO2_16MB_R 3 6 SPI_CLK_16MB_R R2105 1 2 1/16W_33_5%_0402 SPI_CLK
7 SPI_IO2 /WP(IO2) CLK SPI_CLK 7,98
4 5 SPI_MOSI_IO0_16MB_R R2106 1 2 1/16W_33_5%_0402 SPI_MOSI_IO0
GND DI(IO0) SPI_MOSI_IO0 7,98
2
W25Q128JVSIQ_SO8
C2102
0.1U_6.3V_K_X5R_0201_MURATA
1

U2102 SPI_8M@
-SPI_CS1_8MB R2111 1 2 0_0402_SP -SPI_CS0_8MB_R 1 8 VCC3_SUS_SPI
7 -SPI_CS1_8MB /CS VCC
R2112 1SPI_8M@ 2 1/16W_33_5%_0402 SPI_MISO_IO1_8MB_R 2 7 SPI_IO3_8MB_R R2114 1 SPI_8M@2 1/16W_33_5%_0402
DO (IO1) IO3
B B
R2113 1SPI_8M@ 2 1/16W_33_5%_0402 SPI_IO2_8MB_R 3 6 SPI_CLK_8MB_R R2115 1 SPI_8M@2 1/16W_33_5%_0402
IO2 CLK
4 5 SPI_MOSI_IO0_8MB_R R2116 1 SPI_8M@2 1/16W_33_5%_0402
GND DI (IO0)

2
W25Q64JVSSIQ_SO8 SPI_8M@
C2103
0.1U_6.3V_K_X5R_0201_MURATA
1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 SPI FLASH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 21 of 128


5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 22 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 23 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 24 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 25 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 26 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 27 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 28 of 128

5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 29 of 128

5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 30 of 128

5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 31 of 128

5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 32 of 128

5 4 3 2 1

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5 4 3 2 1

4,5 M_A_DQ[63:0]

4,5 -M_A_DQS[7:0]

4,5 M_A_DQS[7:0]

4 M_A_A[16:0]

VCC1R2A
VCC1R2A VCC1R2A VCC2R5A VCC1R2A VCC1R2A VCC0R6B

2
VCC1R2A
R3301
JDIMM1A JDIMM1B 1/16W_240_1%_0402
D D

1
1 2 M_A_A3 131 132 M_A_A2
M_A_DQ1 VSS_1 VSS_2 M_A_DQ4 M_A_A1 A3 A2 EVENT_n_1
3 4 133 134
DQ5 DQ4 A1 EVENT_n/NF
5 6 135 136
M_A_DQ0 VSS_3 VSS_4 M_A_DQ5 M_A_DDRCLK0_1066M VDD_9 VDD_10 M_A_DDRCLK1_1066M
7 8 137 138
DQ1 DQ0 4 M_A_DDRCLK0_1066M -M_A_DDRCLK0_1066M CK0_t CK1_t/NF -M_A_DDRCLK1_1066M M_A_DDRCLK1_1066M 4
9 10 139 140
-M_A_DQS0 VSS_5 VSS_6 4 -M_A_DDRCLK0_1066M CK0_c CK1_c/NF -M_A_DDRCLK1_1066M 4
11 12 141 142
M_A_DQS0 DQS0_C DM0_n/DBl0_n M_A_PARITY VDD_11 VDD_12 M_A_A0
13 14 143 144
DQS0_t VSS_7 M_A_DQ3 4 M_A_PARITY Parity A0
15 16
M_A_DQ6 VSS_8 DQ6
17 18
DQ7 VSS_9 M_A_DQ7 M_A_BS1 M_A_A10
19 20 145 146
M_A_DQ2 VSS_10 DQ2 4 M_A_BS1 BA1 A10/AP
21 22 147 148
DQ3 VSS_11 M_A_DQ29 -M_A_CS0 VDD_13 VDD_14 M_A_BS0
23 24 149 150
M_A_DQ24 VSS_12 DQ12 4 -M_A_CS0 M_A_A14 CS0_n BA0 M_A_A16 M_A_BS0 4
25 26 151 152
DQ13 VSS_13 M_A_DQ28 A14/WE_n A16/RAS_n
27 28 153 154
M_A_DQ25 VSS_14 DQ8 M_A_ODT0 VDD_15 VDD_16 M_A_A15
29 30 155 156
DQ9 VSS_15 -M_A_DQS3 4 M_A_ODT0 -M_A_CS1 ODT0 A15/CAS_n M_A_A13
31 32 157 158
VSS_16 DQS1_c M_A_DQS3 4 -M_A_CS1 CS1_n A13
33 34 159 160
DM1_n/DBl_n DQS1_t M_A_ODT1 VDD_17 VDD_18
35 36 161 162
M_A_DQ26 VSS_17 VSS_18 M_A_DQ27 4 M_A_ODT1 ODT1 C0/CS2_n/NC M_VREF_CA_DIMMA
37 38 163 164
DQ15 DQ14 VDD_19 VREFCA SA2_CHA_P
39 40 165 166
M_A_DQ31 VSS_19 VSS_20 M_A_DQ30 C1/CS3_n/NC SA2
41 42 167 168
DQ10 DQ11 M_A_DQ48 VSS_53 VSS_54 M_A_DQ51
43 44 169 170
M_A_DQ9 VSS_21 VSS_22 M_A_DQ8 DQ37 DQ36
45 46 171 172 VCC1R2A
DQ21 DQ20 M_A_DQ49 VSS_55 VSS_56 M_A_DQ52
47 48 173 174
M_A_DQ13 VSS_23 VSS_24 M_A_DQ12 DQ33 DQ32
49 50 175 176
DQ17 DQ16 -M_A_DQS6 VSS_57 VSS_58
51 52 177 178
-M_A_DQS1 VSS_25 VSS_26 M_A_DQS6 DQS4_c DM4_n/DBl4_n
53 54 179 180
M_A_DQS1 DQS2_c DM2_n/DBl2_n DQS4_t VSS_59 M_A_DQ50
55 56 181 182
DQS2_t VSS_27 M_A_DQ15 M_A_DQ54 VSS_60 DQ39
57 58 183 184 1 2
M_A_DQ10 VSS_28 DQ22 DQ38 VSS_61 M_A_DQ53
59 60 185 186 @ @
DQ23 VSS_29 M_A_DQ14 M_A_DQ55 VSS_62 DQ35
61 62 187 188 C3301 C3302
M_A_DQ11 VSS_30 DQ18 DQ34 VSS_63 M_A_DQ33
63 64 189 190 2.2U_6.3V_M_X5R_04020.1U_10V_K_X7R_0402
DQ19 VSS_31 M_A_DQ17 M_A_DQ32 VSS_64 DQ45 2 1
65 66 191 192
C M_A_DQ21 VSS_32 DQ28 DQ44 VSS_65 M_A_DQ37 C
67 68 193 194
DQ29 VSS_33 M_A_DQ16 M_A_DQ36 VSS_66 DQ41
69 70 195 196
M_A_DQ20 VSS_34 DQ24 DQ40 VSS_67 -M_A_DQS4
71 72 197 198
DQ25 VSS_35 -M_A_DQS2 VSS_68 DQS5_c M_A_DQS4
73 74 199 200
VSS_36 DQS3_c M_A_DQS2 DM5_n/DBl5_n DQS5_t
75 76 201 202
DM3_n/DBl3_n DQS3_t M_A_DQ35 VSS_69 VSS_70 M_A_DQ39
77 78 203 204
M_A_DQ18 VSS_37 VSS_38 M_A_DQ19 DQ46 DQ47
79 80 205 206
DQ30 DQ31 M_A_DQ38 VSS_71 VSS_72 M_A_DQ34
81 82 207 208
M_A_DQ22 VSS_39 VSS_40 M_A_DQ23 DQ42 DQ43
83 84 209 210
DQ26 DQ27 M_A_DQ40 VSS_73 VSS_74 M_A_DQ44
85 86 211 212 VCC1R2A
VSS_41 VSS_42 DQ52 DQ53
87 88 213 214
CB5/NC CB4/NC M_A_DQ43 VSS_75 VSS_76 M_A_DQ45
89 90 215 216
VSS_43 VSS_44 DQ49 DQ48
91 92 217 218
CB1/NC CB0/NC -M_A_DQS5 VSS_77 VSS_78
93 94 219 220
VSS_45 VSS_46 M_A_DQS5 DQS6_c DM6_n/DBl6_n
95 96 221 222
DQS8_c DM8_n/DBl_n/NC DQS6_t VSS_79 M_A_DQ41
97 98 223 224
DQS8_t VSS_47 M_A_DQ47 VSS_80 DQ54
99 100 225 226
VSS_48 CB6/NC DQS5 VSS_81 M_A_DQ46
101 102 227 228
CB2/NC VSS_49 M_A_DQ42 VSS_82 DQ50
103 104 229 230
VSS_50 CB7/NC DQ51 VSS_83 M_A_DQ61
105 106 231 232
CB3/NC VSS_51 M_A_DQ56 VSS_84 DQ60
107 108 -DRAMRST 233 234
M_A_CKE0 VSS_52 RESET_n M_A_CKE1 -DRAMRST 5 DQ61 VSS_85 M_A_DQ60
109 110 235 236
4 M_A_CKE0 CKE0 CKE1 M_A_CKE1 4 M_A_DQ57 VSS_86 DQ57
111 112 237 238
M_A_BG1 VDD_1 VDD_2 -M_A_ACT VCC3B DQ56 VSS_87 -M_A_DQS7
113 114 239 240
4 M_A_BG1 M_A_BG0 BG1 ACT_n -M_A_ALERT -M_A_ACT 4 VSS_88 DQS7_c M_A_DQS7
115 116 241 242
4 M_A_BG0 BG0 ALERT_n -M_A_ALERT 4 DM7_n/DBl7_n DQS7_t
117 118 243 244
VDD_3 VDD_4 VSS_89 VSS_90

1
M_A_A12 119 120 M_A_A11 M_A_DQ63 245 246 M_A_DQ58
M_A_A9 A12 A11 M_A_A7 DQ62 DQ63
121 122 R3302 247 248
A9 A7 M_A_DQ62 VSS_91 VSS_92 M_A_DQ59
123 124 0_0402_SP 249 250
M_A_A8 VDD_5 VDD_6 M_A_A5 DQ58 DQ59
125 126 251 252
M_A_A6 A8 A5 M_A_A4 SMB_CLK_3B VSS_93 VSS_94 SMB_DATA_3B
127 128 253 254
89,93 SMB_CLK_3B SMB_DATA_3B 89,93

2
A6 A4 VDDSPD_1 SCL SDA SA0_CHA_P
129 130 255 256
VDD_7 VDD_8 VDDSPD SA0
1 257 258
VPP_1 VTT SA1_CHA_P
EMC_NS@ 259 260
VPP_2 SA1
B C3307 [WHL PDG]VDDSPD B
ARGOS_D4AR0-26005-1P40 0.1U_25V_K_X5R_0201 1 1 261 262
2 GND_1 GND_2
ME@ [WHL PDG] EE 0.1uF x2, RF
2.2uF x2. C3303 C3304 ARGOS_D4AR0-26005-1P40
SP070015200 0.1U_6.3V_K_X7R_0201 2.2U_6.3V_M_X5R_0201
2 2 ME@
Place SP070015200
decoupling cap
close to DIMM

VCC1R2A

VCC3B VCC3B VCC3B


1

R3303
1

1
1/16W_1K_1%_0402
R3307 R3308 R3309
@ 1/16W_10K_5%_0402 @ 1/16W_10K_5%_0402 @ 1/16W_10K_5%_0402
2

R3304
2

1/16W_2_1%_0402
1 2 M_VREF_CA_DIMMA SA0_CHA_P SA1_CHA_P SA2_CHA_P
4 M_A_VREF_CA_CPU

1
1

C3305 R3310 R3311 R3312


1

0.022U_25V_K_X7R_0402_YAGEO 0_0402_SP 0_0402_SP 0_0402_SP


1

2 R3306
1

1/16W_1K_1%_0402 @ C3306
2

R3305 0.1U_16V_K_X7R_0402_MURATA
2

1/16W_24.9_1%_0402
2
2

A A

SPD Address = 0H

Security Classification LC Future Center Secret Data Title


Issued Date 2015/09/01 Deciphered Date 2016/12/31 DDR4 SUB CHANNEL-A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 33 of 128


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[WHL PDG]VDDQ
[WHL PDG] EE 10uF x16, 1uF x16. 330uF x1
Place 10uF/1uF decoupling cap, 4
near each side of the DIMM
connector close to VDD pins.
330uF placeholder Total quantity is referring to 2 channels.

D VCC1R2A D
VCC1R2A

10U_6.3V_M_X5R_0603_YAGEO
10U_6.3V_M_X5R_0603_YAGEO

10U_6.3V_M_X5R_0603_YAGEO

10U_6.3V_M_X5R_0603_YAGEO

10U_6.3V_M_X5R_0603_YAGEO

10U_6.3V_M_X5R_0603_YAGEO
10U_6.3V_M_X5R_0402

10U_6.3V_M_X5R_0402

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201

220U_B3_2.5VM_R35M
100P_50V_J_NPO_0201
0.1U_6.3V_K_X7R_0201
1 1
1
1 1 1 1 1 1 1 1 1 1 1
1 10U x 6

1
@ @ @ @ @ @ + 0.1U x 2
C3401 C3402 C3403 C3404 C3405 C3406 C3407 C3408 C3409 C3410 C3411 C3412 C3413 C3414 C3415 C3416 C3417 C3418 C3419
1U x 4
2

2
2 2 2 2 2 2 2 2 2 2 2 2 2 2
220U x 1

[WHL PDG]VPP
[WHL PDG] EE 10uF x2, 1uF x2.
C C
Place decoupling cap on DRAM side.

VCC2R5A

10U_6.3V_M_X5R_0402

10U_6.3V_M_X5R_0402

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201
100P_50V_J_NPO_0201
0.1U_6.3V_K_X7R_0201

2.2U_6.3V_M_X5R_0201

2.2U_6.3V_M_X5R_0201

2.2U_6.3V_M_X5R_0201

2.2U_6.3V_M_X5R_0201
1 1 1 1 1 1 1 1 1 1
RF_NS@ RF_NS@ @ @
C3420 C3421 C3422 C3423 C3424 C3425 C3434 C3435 C3436 C3437
2 2 2 2 2 2 2 2 2 2 10U x 1
1U x 1

B [WHL PDG]VTT B

[WHL PDG] EE 10uF x2, 1uF x4.


VCC0R6B
10U_6.3V_M_X5R_0402

10U_6.3V_M_X5R_0402

1U_6.3V_K_X5R_0201

1U_6.3V_K_X5R_0201
100P_50V_J_NPO_0201
0.1U_6.3V_K_X7R_0201

2.2U_6.3V_M_X5R_0201

2.2U_6.3V_M_X5R_0201

1 1 1 1 1 1 1 1
RF_NS@ RF_NS@ @
C3426 C3427 C3428 C3429 C3430 C3431 C3432 C3433
10U x 1
2 2 2 2 2 2 2 2 1U x 2

Total
Place decoupling on the VTT plane close to SODIMM 10U x 8
0.1U x 2
1U x 7
220U x 1
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 DDR4 SUB CHANNEL-A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 34 of 128


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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/09/01 Deciphered Date 2016/12/31 DDR4 SUB CHANNEL-B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 35 of 128


5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 DDR4 SUB CHANNEL-B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 36 of 128


5 4 3 2 1

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5 4 3 2 1

TABLE of GPU (UGPU1)


Vendor LCFC P/N Description
AMD(R19M-P25-70) SA00009DJ00 S IC 216-0923010 C0 FCBGA 769P GPU
AMD(R19M-M25-50) SA00008XC00 S IC 216-0915006 A0 FCBGA 769P GPU

D D

DIS@ support GEN3


UGPU1B @
symbol2
PCIE5_L0_TXP AT41 AV35 PCIE5_L0_RXP_C DIS@ C3701 1 2 0.22U_6.3V_K_X5R_0201 PCIE5_L0_RXP
10 PCIE5_L0_TXP PCIE5_L0_TXN PCIE_RX0P PCIE_TX0P PCIE5_L0_RXN_C PCIE5_L0_RXN PCIE5_L0_RXP 10
AT40 AU35 DIS@ C3702 1 2 0.22U_6.3V_K_X5R_0201
10 PCIE5_L0_TXN PCIE_RX0N PCIE_TX0N PCIE5_L0_RXN 10
PCIE5_L1_TXP AR41 AU38 PCIE5_L1_RXP_C DIS@ C3703 1 2 0.22U_6.3V_K_X5R_0201 PCIE5_L1_RXP
10 PCIE5_L1_TXP PCIE5_L1_TXN PCIE_RX1P PCIE_TX1P PCIE5_L1_RXN_C PCIE5_L1_RXN PCIE5_L1_RXP 10
AR40 AU39 DIS@ C3704 1 2 0.22U_6.3V_K_X5R_0201
10 PCIE5_L1_TXN PCIE_RX1N PCIE_TX1N PCIE5_L1_RXN 10
PCIE5_L2_TXP AP41 AR37 PCIE5_L2_RXP_C DIS@ C3705 1 2 0.22U_6.3V_K_X5R_0201 PCIE5_L2_RXP
10 PCIE5_L2_TXP PCIE5_L2_TXN PCIE_RX2P PCIE_TX2P PCIE5_L2_RXN_C PCIE5_L2_RXN PCIE5_L2_RXP 10
AP40 AR38 DIS@ C3706 1 2 0.22U_6.3V_K_X5R_0201
10 PCIE5_L2_TXN PCIE_RX2N PCIE_TX2N PCIE5_L2_RXN 10
PCIE5_L3_TXP AM41 AN37 PCIE5_L3_RXP_C DIS@ C3707 1 2 0.22U_6.3V_K_X5R_0201 PCIE5_L3_RXP
10 PCIE5_L3_TXP PCIE5_L3_TXN PCIE_RX3P PCIE_TX3P PCIE5_L3_RXN_C PCIE5_L3_RXN PCIE5_L3_RXP 10
AM40 AN38 DIS@ C3708 1 2 0.22U_6.3V_K_X5R_0201
10 PCIE5_L3_TXN PCIE_RX3N PCIE_TX3N PCIE5_L3_RXN 10
AL41 AL37
PCIE_RX4P PCIE_TX4P
AL40 AL38
PCIE_RX4N PCIE_TX4N
AK41 AJ37
PCIE_RX5P PCIE_TX5P
AK40 AJ38
PCIE_RX5N PCIE_TX5N
AJ41 AG37
PCIE_RX6P PCIE_TX6P
AJ40 AG38
PCIE_RX6N PCIE_TX6N
AH41 AE37
PCIE_RX7P PCIE_TX7P
AH40 AE38
PCIE_RX7N PCIE_TX7N

PCIE5_CLK_100M AV33 AV41 -PLTRST_FAR_VGA


C 12 PCIE5_CLK_100M -PCIE5_CLK_100M PCIE_REFCLKP PERSTB C
AU33 DIS@
12 -PCIE5_CLK_100M PCIE_REFCLKN PX_EX
AC41 R3701 2 1 1/16W_1K_5%_0402
PX_EN

AU41 PCIE_ZVSS
PCIE_ZVSS PCIE_ZVSS 41
REV 0.91

216-0905018-C3_FCBGA769

VCC1R8VIDEO_MAIN

JTAG
2

DIS@ R3703 DIS@ R3704 VCC3B_VGA


1/16W_10K_5%_0402 1/16W_10K_5%_0402

UGPU1A @ VCC3B_VGA
1

1
symbol1

1
TP3701 1 R3705 1 DIS@ 2 1/20W_33_5%_0201 AA38 AF41 JTAG_TDO 1 TP3703 R3708
B BP_0 JTAG_TDO JTAG_TDI B
TP3702 1 R3706 1 DIS@ 2 1/20W_33_5%_0201 AA37 AD40 1 TP3704 @ 1/16W_1K_5%_0402 R3712
BP_1 JTAG_TDI JTAG_TMS
AD41 1 TP3705 DIS@ 1/20W_10K_5%_0201
JTAG_TMS JTAG_TCK
AE41 1 TP3706

2
JTAG_TCK

2
TEST6 B2 AE40 TESTEN
41 TEST6 TEST6 TESTEN JTAG_TRSTB 118 -PLTRST_FAR_VGA
AF40
JTAG_TRSTB
1

-PLTRST_FAR D3701 DIS@ 1 2 RB520CM-30T2R_VMN2M2


REV 0.91 R3709 13,64,66,73,85 -PLTRST_FAR
DIS@ 1/16W_1K_5%_0402
216-0905018-C3_FCBGA769 -GPU_RST -PLTRST_FAR_VGA
D3702 DIS@ 1 2 RB520CM-30T2R_VMN2M2
3 -GPU_RST
2

VCC3B_VGA
1

R3710
DIS@ 1/16W_10K_5%_0402
2
1

R3711
A 1/16W_1K_5%_0402 A
@
2

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 R19M-P25(1/11):PEG I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 37 of 128


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45 DQA0_[31:0]
UGPU1D @
45 DQA1_[31:0]
symbol4
UGPU1C @ C2 AH1
45 MAA0_[8:0] DQB0_0 DQB1_0
symbol3 C1 AH2
DQA0_0 DQA1_0 DQB0_1 DQB1_1
L34 B27 D2 AJ2
45 MAA1_[8:0] DQA0_1 DQA0_0 DQA1_0 DQA1_1 DQB0_2 DQB1_2
L37 A27 D1 AK1
DQA0_2 DQA0_1 DQA1_1 DQA1_2 DQB0_3 DQB1_3
L38 B26 F1 AL2
DQA0_3 DQA0_2 DQA1_2 DQA1_3 DQB0_4 DQB1_4
J35 A26 G2 AM1
DQA0_4 DQA0_3 DQA1_3 DQA1_4 DQB0_5 DQB1_5
G37 A24 G1 AM2
DQA0_5 DQA0_4 DQA1_4 DQA1_5 DQB0_6 DQB1_6
E38 B23 H2 AN2
DQA0_6 DQA0_5 DQA1_5 DQA1_6 DQB0_7 DQB1_7
E35 A23 K2 AR1
DQA0_7 DQA0_6 DQA1_6 DQA1_7 DQB0_8 DQB1_8
D35 B22 K1 AR2
DQA0_8 DQA0_7 DQA1_7 DQA1_8 DQB0_9 DQB1_9
H41 B20 L2 AT1
DQA0_9 DQA0_8 DQA1_8 DQA1_9 DQB0_10 DQB1_10
H40 A20 L1 AT2
DQA0_10 DQA0_9 DQA1_9 DQA1_10 DQB0_11 DQB1_11
G41 B19 N2 AV2
A DQA0_11 DQA0_10 DQA1_10 DQA1_11 DQB0_12 DQB1_12 A
G40 A19 P2 AW1
DQA0_12 DQA0_11 DQA1_11 DQA1_12 DQB0_13 DQB1_13
E40 B17 P1 AW2
DQA0_13 DQA0_12 DQA1_12 DQA1_13 DQB0_14 DQB1_14
D41 A16 R2 AY3
DQA0_14 DQA0_13 DQA1_13 DQA1_14 DQB0_15 DQB1_15
D40 B16 R1 BA3
DQA0_15 DQA0_14 DQA1_14 DQA1_15 DQB0_16 DQB1_16
C41 A15 T2 AY4
DQA0_16 DQA0_15 DQA1_15 DQA1_16 DQB0_17 DQB1_17
C40 B15 T1 BA4
DQA0_17 DQA0_16 DQA1_16 DQA1_17 DQB0_18 DQB1_18
B39 A14 U2 AY5
DQA0_18 DQA0_17 DQA1_17 DQA1_18 DQB0_19 DQB1_19
A39 B14 W1 BA7
DQA0_19 DQA0_18 DQA1_18 DQA1_19 DQB0_20 DQB1_20
B38 B13 W2 AY7
DQA0_20 DQA0_19 DQA1_19 DQA1_20 DQB0_21 DQB1_21
B36 A11 Y1 AY8
DQA0_21 DQA0_20 DQA1_20 DQA1_21 DQB0_22 DQB1_22
A36 B11 Y2 BA8
DQA0_22 DQA0_21 DQA1_21 DQA1_22 DQB0_23 DQB1_23
B35 A10 AB2 AR4
DQA0_23 DQA0_22 DQA1_22 DQA1_23 DQB0_24 DQB1_24
A35 B10 AC1 AR5
DQA0_24 DQA0_23 DQA1_23 DQA1_24 DQB0_25 DQB1_25
B33 B8 AC2 AU4
DQA0_25 DQA0_24 DQA1_24 DQA1_25 DQB0_26 DQB1_26
B32 A7 AD1 AU7
DQA0_26 DQA0_25 DQA1_25 DQA1_26 DQB0_27 DQB1_27
A32 B7 AF1 AN8
DQA0_27 DQA0_26 DQA1_26 DQA1_27 DQB0_28 DQB1_28
B31 A6 AF2 AV11
DQA0_28 DQA0_27 DQA1_27 DQA1_28 DQB0_29 DQB1_29
A30 A4 AG1 AU11
DQA0_29 DQA0_28 DQA1_28 DQA1_29 DQB0_30 DQB1_30
B29 B4 AG2 AP11
DQA0_30 DQA0_29 DQA1_29 DQA1_30 DQB0_31 DQB1_31
B28 A3
DQA0_31 DQA0_30 DQA1_30 DQA1_31
A28 B3
DQA0_31 DQA1_31
R5 AE7
MAB0_0 MAB1_0
R8 AE8
MAA0_0 MAA1_0 MAB0_1 MAB1_1
G25 E15 N7 AG5
MAA0_1 MAA0_0 MAA1_0 MAA1_1 MAB0_2 MAB1_2
H25 H15 N4 AG4
MAA0_2 MAA0_1 MAA1_1 MAA1_2 MAB0_3 MAB1_3
E27 G13 L8 AJ4
MAA0_3 MAA0_2 MAA1_2 MAA1_3 MAB0_4 MAB1_4
D27 D13 N8 AG8
MAA0_4 MAA0_3 MAA1_3 MAA1_4 MAB0_5 MAB1_5
D29 H11 U8 AC8
MAA0_5 MAA0_4 MAA1_4 MAA1_5 MAB0_6 MAB1_6
H27 H13 U7 AC5
MAA0_6 MAA0_5 MAA1_5 MAA1_6 MAB0_7 MAB1_7
H23 H17 R4 AE4
MAA0_7 MAA0_6 MAA1_6 MAA1_7 MAB0_8 MAB1_8
E23 G17 L5 AJ8
MAA0_8 MAA0_7 MAA1_7 MAA1_8 MAB0_9 MAB1_9
D25 D15
MAA0_8 MAA1_8
H29 E11
MAA0_9 MAA1_9
H1 AP1
WCKB0_0 WCKB1_0
J2 AP2
WCKA0_0 WCKA1_0 WCKB0B_0 WCKB1B_0
D33 A22
45 WCKA0_0 WCKA0b_0 WCKA0_0 WCKA1_0 WCKA1b_0 WCKA1_0 45
E33 B21
45 WCKA0b_0 WCKA0B_0 WCKA1B_0 WCKA1b_0 45
AB1 AN4
WCKB0_1 WCKB1_1
AA2 AN5
WCKA0_1 WCKA1_1 WCKB0B_1 WCKB1B_1
B A34 A8 B
45 WCKA0_1 WCKA0b_1 WCKA0_1 WCKA1_1 WCKA1b_1 WCKA1_1 45
B34 B9
45 WCKA0b_1 WCKA0B_1 WCKA1B_1 WCKA1b_1 45
F2 AL1
EDCB0_0 EDCB1_0
M2 AU2
EDCA0_0 EDCA1_0 EDCB0_1 EDCB1_1
G38 B24 V1 BA6
45 EDCA0_0 EDCA0_1 EDCA0_0 EDCA1_0 EDCA1_1 EDCA1_0 45 EDCB0_2 EDCB1_2
F41 A18 AD2 AV7
45 EDCA0_1 EDCA0_2 EDCA0_1 EDCA1_1 EDCA1_2 EDCA1_1 45 EDCB0_3 EDCB1_3
B37 B12
45 EDCA0_2 EDCA0_3 EDCA0_2 EDCA1_2 EDCA1_3 EDCA1_2 45
A31 B6
45 EDCA0_3 EDCA0_3 EDCA1_3 EDCA1_3 45
E2 AK2
DDBIB0_0 DDBIB1_0
M1 AV1
DDBIA0_0 DDBIA1_0 DDBIB0_1 DDBIB1_1
J38 B25 V2 AY6
45 DDBIA0_0 DDBIA0_1 DDBIA0_0 DDBIA1_0 DDBIA1_1 DDBIA1_0 45 DDBIB0_2 DDBIB1_2
F40 B18 AE2 AV9
45 DDBIA0_1 DDBIA0_2 DDBIA0_1 DDBIA1_1 DDBIA1_2 DDBIA1_1 45 DDBIB0_3 DDBIB1_3
A38 A12
45 DDBIA0_2 DDBIA0_3 DDBIA0_2 DDBIA1_2 DDBIA1_3 DDBIA1_2 45
B30 B5
45 DDBIA0_3 DDBIA0_3 DDBIA1_3 DDBIA1_3 45
W8 AA8
ADBIB0 ADBIB1
ADBIA0 H21 H19 ADBIA1
45 ADBIA0 ADBIA0 ADBIA1 ADBIA1 45
G5 AL8
CSB0B_0 CSB1B_0
CSA0b_0 H31 E7 CSA1b_0
45 CSA0b_0 CSA0B_0 CSA1B_0 CSA1b_0 45

U4 AC4
CASB0B CASB1B
W4 AA4
RASB0B RASB1B VCC1R35VIDEO
CASA0b D23 D17 CASA1b L4 AJ7
45 CASA0b CASA0B CASA1B CASA1b 45 WEB0B WEB1B
RASA0b D21 D19 RASA1b
45 RASA0b RASA0B RASA1B RASA1b 45 VCC1R35VIDEO
WEA0b G29 D11 WEA1b
45 WEA0b WEA0B WEA1B WEA1b 45

1
W5 AA7
CKEB0 CKEB1
R3807

1
CKEA0 G21 E19 CKEA1 G4 AL5 R18M@ 1/16W_40.2_1%_0402
45 CKEA0 CKEA0 CKEA1 CKEA1 45 CLKB0 CLKB1
R3804 J4 AL4
CLKB0B CLKB1B
CLKA0 E31 D7 CLKA1 DIS@ 1/16W_40.2_1%_0402
45 CLKA0 CLKA1 45

2
CLKA0 CLKA1
CLKA0b D31 D9 CLKA1b
45 CLKA0b CLKA0B CLKA1B CLKA1b 45
R10 U10

2
MEM_CALRB MVREFDB
DIS@
R3801 1 2 1/16W_120_1%_0402 MEM_CALRA K15 K17 MVREFDA 2
MEM_CALRA MVREFDA

1
2 AM11 R18M@ C3803 R3808
DRAM_RSTB

1
DIS@ DIS@ REV 0.91 1U_10V_K_X5R_0402 R18M@ 1/16W_100_1%_0402
C
R3802 2 1 1/16W_51.1_1%_0402R3803 1 2 1/16W_10_1%_0402 DRAM_RST_A_R L32 DIS@ C3802 R3805 1 C
45 DRAM_RST_A DRAM_RSTA 216-0905018-C3_FCBGA769
REV 0.91 1U_10V_K_X5R_0402 DIS@ 1/16W_100_1%_0402

2
1
1 216-0905018-C3_FCBGA769
1

2
DIS@ C3801 R3806
120P_50V_J_NPO_0402 DIS@ 1/16W_4.99K_1%_0402
2
2

D D

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 R19M-P25(2/11):VRAM I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 38 of 128


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D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 Video
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 39 of 128

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TABLE of (U4001)
Vendor LCFC P/N Description
SILICON SA00007YU00 S IC SI51214-A1FAGMR 6P CLOCK GENERATOR
REALTEK SA0000A2200 S IC LV8089-GRT TDFN 6P GENERATOR

VCC1R8VIDEO_MAIN VCC1R8VIDEO_MAIN

L4001
BLM18PG121SN1D_2P
R19M@ U4001 R19M@
A 6 1 1 2 A
R4001 VSS VDD
1 R19M@ 2 SS_SET 5 2 XTALIN 1 1
SSCLK2/REFCLK_D/OE1/FSEL/SSEL/SSON#/PD#
XIN/CLKIN
R19M@ R19M@
1/16W_5.1K_1%_0402 4 3 XTALOUT C4001 C4002
SSCLK1/REFCLK/FSEL/SSEL/SSON#/OE2 XOUT

1
10U_6.3V_M_X5R_0402 0.1U_10V_K_X7R_0402
R4002 SA00007YU00 SI51214-A1FAGMR_TDFN6_1P2X1P4 2 2
@ 1/16W_5.1K_1%_0402

2
UGPU1F @ R4003
symbol6 BA39 GPU_XTALIN 1 2
XTALIN
R19M@
1/16W_0_5%_0402

1 1
C4006
R4007 and R4012 Co-Lay
C4005 0.1U_10V_K_X5R_0201
AY39 GPU_XTALOUT 0.1U_10V_K_X5R_0201 R18M@ 1/16W_0_5%_0402
XTALOUT
R18M@ 2 2 R4005 and R4011 Co-Lay 1/16W_1M_5%_0402 R4012
R4011 R4006 R19M@
1/16W_0_5%_0402 DIS@ 1 2 XTALIN

1
R19M@ 1 2
AV15 PLLCHARZ_L 1 TP4001 PAD @ R4009 R4010 XTALOUT 1 2 1/16W_0_5%_0402
PLLCHARZ_L PLLCHARZ_H
AU15 1 TP4002 PAD @ 1/16W_51.1_1%_0402 1/16W_51.1_1%_0402 R4007
PLLCHARZ_H
R18M@ R18M@ R4005 Y4001 DIS@ R18M@
1/16W_0_5%_0402 4 3 XTALIN_R 1 2 GPU_XTALIN
R4004

2
NC2 OSC2
R18M@
B PLL_ANALOG_OUT GPU_XTALOUT XTALOUT_R B
REV 0.91 AY38 1 @ 2 1 2 1 2
ANALOGIO OSC1 NC1
216-0905018-C3_FCBGA769 1/16W_16.2K_1%_0402 1 27MHZ_16PF_7V27000011 1
C4003 C4004
22P_50V_J_NPO_0402 22P_50V_J_NPO_0402
UGPU1G @ UGPU1H @ 2 2
symbol7 symbol8
AY32 AY22
TX2P_DPB0P TX2P_DPD0P
BA32 BA22
TX2M_DPB0N TX2M_DPD0N
AY31 AY21
TX1P_DPB1P TX1P_DPD1P
BA31 BA21 TABLE of (Y4001)
TX1M_DPB1N TX1M_DPD1N
AY30 AY20 Vendor LCFC P/N Description
TX0P_DPB2P TX0P_DPD2P
BA30 BA20 TXC SJ10000GI00 S CRYSTAL 27MHZ 16PF +-30PPM 7
TX0M_DPB2N TX0M_DPD2N
AY28 AY19 HARMONY SJ10000CV0J S CRYSTAL 27MHZ 16PF X3G027000
TXCBP_DPB3P TXCDP_DPD3P
BA28 BA19
TXCBM_DPB3N TXCDM_DPD3N
AY11
AUX1P
BA11
AUX1N

AM21 1 @ TP4009 PAD AY10


DDCAUX3P DDC1CLK
AP21 1 @ TP4010 PAD BA10
DDCAUX3N DDC1DATA
C C

UGPU1O @
symbol15
AY18
TX2P_DPE0P
AY36 AY27
TX5P_DPA0P TX5P_DPC0P
BA18
TX2M_DPE0N
BA36 BA27
TX5M_DPA0N TX5M_DPC0N
AY16
TX1P_DPE1P
AY35 AY26
TX4P_DPA1P TX4P_DPC1P
BA16
TX1M_DPE1N
BA35 BA26
TX4M_DPA1N TX4M_DPC1N
AY15
TX0P_DPE2P
AY34 AY25
TX3P_DPA2P TX3P_DPC2P
BA15
TX0M_DPE2N
BA34 BA25
TX3M_DPA2N TX3M_DPC2N
AY14
TXCEP_DPE3P
AY33 AY24
TXCAP_DPA3P TXCCP_DPC3P
BA14
TXCEM_DPE3N
BA33 BA24
TXCAM_DPA3N TXCCM_DPC3N
AP19 DGB_DATA[7] 1 @ TP4005 PAD
AUX2P
AM19 DGB_DATA[11] 1 @ TP4006 PAD
AUX2N
BA12
AUX_ZVSS
1

R4008 AU27 DGB_DATA[0]1 @ TP4003 PAD


DDCAUX5P
R19M@ 1/16W_150_1%_0402 AR23 AV19 DGB_DATA[8] 1 @ TP4007 PAD
D DDCAUX4P DDC2CLK D
AV27 DGB_DATA[1]1 @ TP4004 PAD
DDCAUX5N
REV 0.91 AP23 AU19 DGB_DATA[10] 1 @ TP4008 PAD
2

DDCAUX4N REV 0.91 DDC2DATA


REV 0.91
216-0905018-C3_FCBGA769 216-0905018-C3_FCBGA769 216-0905018-C3_FCBGA769

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 R19M-P25(3/11):DIGITA /XTAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 40 of 128


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VCC3B_VGA COMPATIBLE R19M-P25/70

1
VCC3B_VGA
R4102 VCC1R8VIDEO_MAIN
DIS@ 1/20W_10K_5%_0201 UGPU1K @ DBGDATA[15:0] Debug bus output data
symbol11
VCC3B_VGA L40 DBGDATA_0 1 @ TP4106 PAD

2
DBGDATA_0 DBGDATA_1
D4101 L41 1 @ TP4107 PAD
DBGDATA_1

2
RB751VM-40TE-17_UMD2M2 M40 DBGDATA_2 1 @ TP4108 PAD
DBGDATA_2 DBGDATA_3
DIS@ R4124 R4125 M41 1 @ TP4109 PAD
DBGDATA_3
UGPU1E @ 2 1 -VGA_AC_DC R4130 1 @ 2 1/20W_100K_5%_0201 -WAKEB R4131 1 @ 2 1/20W_100K_5%_0201 R19M@ 1/20W_10K_5%_0201 R19M@ 1/20W_10K_5%_0201 N40 DBGDATA_4 1 @ TP4110 PAD
GPU_GPIO0 -VGA_AC_DC 85 DBGDATA_4 DBGDATA_5
R4101 1 2 0_0402_SP +VDDR3 AM31 symbol5 W40 N41 1 @ TP4111 PAD
VDD_33 GPIO_0 DBGDATA_5

2
AA40 SCS00008K00 GPIO_19_CTF R4137 1 @ 2 1/20W_10K_5%_0201 P40 DBGDATA_6 1 @ TP4112 PAD

1
GPIO_1 GPU_GPIO2 TEST_PG DBGDATA_6 DBGDATA_7
AA35 R18M@ P41 1 @ TP4113 PAD
GPIO_2 GPU_GPIO21 TEST_PG_BACP DBGDATA_7
DIS@ R4182 R4146 1 @ 2 1/20W_5.1K_1%_0201 R4147 1 @ 2 1/20W_5.1K_1%_0201 R40 1 @ TP4114 PAD
DBGDATA_8
C4101 1/20W_0_5%_0201 1 1 R41 1 @ TP4115 PAD
GPU_GPIO5 DBGDATA_9
1U_6.3V_K_X5R_0402_MURATA AA34 T40 1 @ TP4116 PAD

1
D GPIO_5_REG_HOT_AC_BATT GPU_GPIO6_R R4183 1 R19M@ 2 1/20W_0_5%_0201 GPU_GPIO6 GPU_SCL DBGDATA_10 D
U35 R4148 1 DIS@ 2 1/20W_4.7K_1%_0201 @ C4105 @ C4106 T41 1 @ TP4117 PAD
GPIO_6_TACH GPU_GPIO6 102 0.1U_10V_K_X5R_0201 0.1U_10V_K_X5R_0201 DBGDATA_11
U40 1 @ TP4118 PAD
GPU_ROMSO GPU_SDA 2 2 DBGDATA_12
AP25 1 @ TP4130 PAD R4149 1 DIS@ 2 1/20W_4.7K_1%_0201 U41 1 @ TP4119 PAD
GPIO_8_ROMSO GPU_ROMSI DBGDATA_13
AM25 1 @ TP4129 PAD V40 1 @ TP4120 PAD
GPIO_9_ROMSI GPU_ROMSCK DBGDATA_14
AM27 1 @ TP4128 PAD V41 1 @ TP4121 PAD
GPIO_10_ROMSCK GPU_GPIO11 DBGDATA_15
W41 1 @ TP4142 PAD
GPIO_11 GPU_GPIO12
Y40 1 @ TP4143 PAD TEST6 R4156 1 R19M@ 2 1/20W_10K_5%_0201 REV 0.91
GPIO_12 GPU_GPIO13 37 TEST6
Y41 1 @ TP4144 PAD 216-0905018-C3_FCBGA769
GPIO_13 GPIO_14_HPD2
AU21 1 @ TP4138 PAD R4177 1 R18M@ 2 1/20W_0_5%_0201
GPIO_14_HPD2 GPU_GPIO15
AA41 1 @ TP4139 PAD
GPIO_15 GPU_GPIO16
U34 1 @ TP4140 PAD
GPIO_16_8P_DETECT GPU_GPIO17
R37 1 @ TP1448 PAD
GPIO_17_THERMAL_INT GPIO_18_HPD3 VCC3B_VGA
AV25 1 @ TP4136 PAD
GPIO_18_HPD3 GPIO_19_CTF
R38
GPIO_19_CTF GPU_GPIO20
AB40 1 @ TP4145 PAD
GPU_SCL GPIO_20 GPU_GPIO21 GPU_GPIO6 GPU_ROMSO
AC35 AB41 1 @ TP4148 PAD R4181 1 @ 2 1/20W_5.1K_1%_0201
GPU_SDA SCL GPIO_21 GPIO22_ROMCSB_R GPIO22_ROMCSB1 GPU_GPIO21 50
AC34 AP27 R4104 1 2 0_0201_SP @ TP4131 PAD
SDA GPIO_22_ROMCSB GPU_GPIO29 GPU_GPIO0
W37 1 @ TP4146 PAD R4126 1 @ 2 1/20W_5.1K_1%_0201 R4179 1 R19M@ 2 1/20W_5.1K_1%_0201
GPIO_29 GPU_GPIO30
SMBCLK AW40 W38 1 @ TP4147 PAD
SMBCLK GPIO_30 GPIO22_ROMCSB
SMBDAT AW41 BA38 GENERICA 1 @ TP4122 PAD R4129 1 R19M@ 2 1/20W_5.1K_1%_0201
SMBDAT GENERICA
AV29 GENERICB 1 @ TP4123 PAD
GENERICB GPU_HSYNC
AU31 GENERICC 1 @ TP4124 PAD R4132 1 R19M@ 2 1/20W_5.1K_1%_0201
GENERICC
AV31 GENERICD 1 @ TP4125 PAD
GENERICD GENERICE_HPD4 GPU_VSYNC
AU25 1 @ TP4134 PAD R4133 1 R19M@ 2 1/20W_5.1K_1%_0201
GPU_SVC GENERICE_HPD4 GENERICF_HPD5
AU17 AV23 1 @ TP4135 PAD
118 GPU_SVC
118 GPU_SVD
GPU_SVD
GPU_SVT
AV17
AR17
GPIO_SVC
GPIO_SVD
GENERICF_HPD5
GENERICG
AM29 GENERICG_HPD6
TEST_PG
R18M-M2-60 R4127 1 R19M@ 2 1/20W_5.1K_1%_0201 GPU_GPIO6 R4128 1 @ 2 1/20W_5.1K_1%_0201 VCC1R8VIDEO_MAIN
118 GPU_SVT GPIO_SVT GPU_HPD1 GPU_GPIO11
AV21 1 @ TP4141 PAD R4134 1 R19M@ 2 1/20W_5.1K_1%_0201
HPD1 DBGDATA_0
@ PAD TP4127 1 DDCVGACLK AN34 R4158 1 R19M@ 2 1/20W_5.1K_1%_0201
DDCVGACLK GPU_GPIO12
@ PAD TP4126 1 DDCVGADATA AP31 R4135 1 R19M@ 2 1/20W_5.1K_1%_0201
DDCVGADATA

1
R4159 1 R19M@ 2 1/20W_5.1K_1%_0201 DBGDATA_1
R4178 GPU_GPIO13 R4136 1 R19M@ 2 1/20W_5.1K_1%_0201
R18M@ 1/20W_1K_1%_0201 R4160 1 R19M@ 2 1/20W_5.1K_1%_0201 DBGDATA_2
R4138 1 @ 2 1/20W_10K_5%_0201 GPU_GPIO30
R4161 1 X76@ 2 1/20W_5.1K_1%_0201 DBGDATA_3 R4165 1 X76@ 2 1/20W_5.1K_1%_0201

2
AV40 -CLKREQ_PCIE5_VGA_R R4105 1 2 0_0201_SP R4139 1 R19M@ 2 1/20W_5.1K_1%_0201 GPU_GPIO29
TEST_PG CLKREQB -CLKREQ_PCIE5_VGA 50 DBGDATA_4 R4166
AY13 AU40 -WAKEB R4162 1 X76@ 2 1/20W_5.1K_1%_0201 1 X76@ 2 1/20W_5.1K_1%_0201
TEST_PG_BACP TEST_PG WAKEB GPU_GPIO2
BA13 R4180 1 R19M@ 2 1/20W_5.1K_1%_0201 R4140 1 @ 2 1/20W_5.1K_1%_0201
TEST_PG_BACO DBGDATA_5 R4167
R4163 1 X76@ 2 1/20W_5.1K_1%_0201 1 X76@ 2 1/20W_5.1K_1%_0201
R4141 1 R19M@ 2 1/20W_5.1K_1%_0201 GPU_GPIO20
AC40 R4164 1 R19M@ 2 1/20W_5.1K_1%_0201 DBGDATA_6
DIGON GPU_GPIO15
R4142 1 @ 2 1/20W_5.1K_1%_0201 R4143 1 @ 2 1/20W_5.1K_1%_0201
C AC37 DBGDATA_7 R4168 1 R19M@ 2 1/20W_5.1K_1%_0201 C
BL_ENABLE VCC1R8VIDEO_MAIN VCC1R8VIDEO_MAIN GPU_GPIO16
K41 AC38 R4144 1 @ 2 1/20W_5.1K_1%_0201 R4145 1 @ 2 1/20W_5.1K_1%_0201
RSVD#K41 BL_PWM_DIM
R34
RSVD#R34 GPU_HSYNC GPU_HPD1
W34 R4150 1 R19M@ 2 1/20W_10K_5%_0201
HSYNC

1
W35 GPU_VSYNC
VSYNC GPIO_14_HPD2
R4169 R4171 R4151 1 R19M@ 2 1/20W_10K_5%_0201
R18M@ 1/20W_8.45K_1%_0201 @ 1/20W_10K_5%_0201
AG34 GPIO_18_HPD3 R4152 1 R19M@ 2 1/20W_10K_5%_0201
SWAPLOCKA
AE34
TABLE of VRAM (UV3201 UV3202)

2
SWAPLOCKB GENERICG_HPD6 GENERICE_HPD4
AR29 GENERICC R4153 1 R19M@ 2 1/20W_10K_5%_0201
GENLK_CLK
AP29 Vendor P/N LCFC P/N Config need Mount
GENLK_VSYNC GENERICF_HPD5 R4154 1 R19M@ 2 1/20W_10K_5%_0201
Samsung K4G80325FB-HC28 SA000081C10 R4165 R4166 R4167

1
1 1
REV 0.91 R4170 R4172 GENERICG_HPD6 R4155 1 R19M@ 2 1/20W_10K_5%_0201
R18M@ 1/20W_2K_1%_0201 @ C4107 R18M@ 1/20W_4.75K_1%_0201 @ C4108 Micron MT51J256M32HF-70:B SA000081720 R4161 R4166 R4167
216-0905018-C3_FCBGA769 0.1U_10V_K_X5R_0201 0.1U_10V_K_X5R_0201 PCIE_ZVSS R4157 1 R19M@ 2 1/16W_200_1%_0402
2 2 37 PCIE_ZVSS Hynix H5GC8H24AJR-R0C SA000081620 R4165 R4162 R4167

2
VCC1R8VIDEO_MAIN VCC1R8VIDEO_MAIN

1
1
R4175
R4173 X76@ 1/20W_3.24K_1%_0201
R18M@ 1/20W_8.45K_1%_0201

2
2
GENERICB GENERICD

1
1

1
1 R4176
R4174 X76@ 1/20W_5.62K_1%_0201 @ C4110
R18M@ 1/20W_2K_1%_0201 @ C4109 0.1U_10V_K_X5R_0201
0.1U_10V_K_X5R_0201 2

2
2

2
B B

Memory (GDDR5) R4175 R4176

Samsung 2G K4G80325FB-HC28 PU 3.4K PD 10K 110

VCC3B_VGA
VCC3B_VGA
Hynix 2G H5GC8H24AJR-R0C PU 4.75K NC 111
1

R4110
DIS@ 1/16W_4.7K_1%_0402 R4111 Micron 2G
0_0402_SP MT51J256M32HF-70:B PU 3.24K PD 5.62K 101
2

VCC1R8VIDEO_MAIN +VDDIO_GPU
2
G1

SMBCLK 1 6 SMB03_CLK R4116 1 2 0_0201_SP VCC1R8VIDEO_MAIN


S1 D1 SMB03_CLK 85,91,92,93
1 Thermal Management

1
Q4102A UGPU1J @
L2N7002KDW1T1G_SOT363-6 R4117 R4118 R4119 symbol10
DIS@ @ DIS@ 1/20W_10K_5%_0201@
1/20W_10K_5%_0201 1/20W_10K_5%_0201 AM13 N35 GPU_DPLUS 1 @ TP4104 PAD
A TSVDD DPLUS A
SB000013A00
VCC3B_VGA
2

2
1 PAD TP4101@ 1 J8
TEMPIN0 GPU_DMINUS
N34 1 @ TP4105 PAD
DMINUS
1

@ C4103 GPU_SVD GPU_SVC GPU_SVT


R4114 0.1U_10V_K_X5R_0201 PAD TP4102@ 1 J7
TEMPINRETURN
5

DIS@ 1/16W_4.7K_1%_0402 2
1
1

1
U38 GPIO_28_FDO
G2

GPIO_28_FDO
R4120 R4121 R4122 DIS@ C4104 PAD TP4103@ 1 N38
2

SMB03_DATA TS_A
SMBDAT 4 3 SVC SVD Output Voltage (V) DIS@ 1/20W_10K_5%_0201@ 1/20W_10K_5%_0201@ 1/20W_10K_5%_0201 1U_6.3V_K_X5R_0402_MURATA
S2 D2 SMB03_DATA 85,91,92,93

1
2 REV 0.91
0 0 1.1 R4123
216-0905018-C3_FCBGA769
2

2
Q4102B @ 1/16W_10K_5%_0402 Title
L2N7002KDW1T1G_SOT363-6 0 1 1.0 Security Classification LC Future Center Secret Data
DIS@ R19M-P25(4/11):STRAP / GPIO
Issued Date 2015/01/12 Deciphered Date 2016/01/12

2
SB000013A00 PU AT EC SIDE, +3VS AND 4.7K 1 0 0.9
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
1 1 0.8 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 41 of 128


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1 2 3 4 5

VCCGFXCORE_D
VDDCI
UGPU1I @
N13 symbol9 L13
VDDC#0 VDDCI#0
1 1 1 1 1 N15 L17
A VDDC#1 VDDCI#1 A
DIS@ DIS@ DIS@ DIS@ DIS@ N21 L21 1 1 1 1
VDDC#2 VDDCI#2
C4201 C4202 C4203 C4204 C4205 N23 L25 DIS@ DIS@ DIS@ DIS@
VDDC#3 VDDCI#3
1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 N29 L29 C4244 C4245 C4246 C4247
2 2 2 2 2 VDDC#4 VDDCI#4
N31 N11 1U_6.3V_K_X5R_0201 1U_6.3V_K_X5R_0201 1U_6.3V_K_X5R_0201 1U_6.3V_K_X5R_0201
VDDC#5 VDDCI#5 2 2 2 2
R13 U11
VDDC#6 VDDCI#6
R15 AA11
VDDC#7 VDDCI#7
R21 AE11
VDDC#8 VDDCI#8
R23
VDDC#9
R29
VDDC#10
R31
VDDC#11
1 1 1 1 1 U13
VDDC#12
DIS@ DIS@ DIS@ DIS@ DIS@ U15
VDDC#13
C4206 C4207 C4208 C4209 C4210 U21
VDDC#14
1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 U23
2 2 2 2 2 VDDC#15
U29
VDDC#16
U31
VDDC#17
W13
VDDC#18
W15
VDDC#19
W21
VDDC#20
W23
VDDC#21
W29
VDDC#22
1 1 1 1 1 W31
VDDC#23
DIS@ DIS@ DIS@ DIS@ DIS@ AA13
VDDC#24
C4211 C4212 C4213 C4214 C4215 AA15
VDDC#25
1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 AA21
2 2 2 2 2 VDDC#26
AA23
VDDC#27
AA29
VDDC#28
AA31
VDDC#29
AC13
VDDC#30
AC15
VDDC#31
AC21
VDDC#32
1 1 1 1 1 AC23
VDDC#33
DIS@ DIS@ DIS@ DIS@ DIS@ AC29
VDDC#34
C4216 C4217 C4218 C4219 C4220 AC31
VDDC#35
1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 AE13
2 2 2 2 2 VDDC#36
AE15
VDDC#37
AE21
VDDC#38
AE23
VDDC#39
AE29
VDDC#40
B AE31 B
VDDC#41
AG13
VDDC#42
AG15
VDDC#43
AG21
VDDC#44
AG23
VDDC#45
AG29
VDDC#46
AG31
VDDC#47
AJ13
VDDC#48
AJ15
VDDC#49
AJ17
VDDC#50
AJ19
VDDC#51
AJ21
VDDC#52
AJ23
VDDC#53
AJ25
VDDC#54
AJ27
VDDC#55
AJ29
VDDC#56
AJ31
VDDC#57
AL13
VDDC#58
AL15
VDDC#59
AL17
VDDC#60
AL19
VDDC#61
AL21
VDDC#62
AL23
VDDC#63 FBVDD_VCC_SENSE
AL25 C3 1 PAD TP4201 @
VDDC#64 FB_VMEMIO GPU_VDDCI_SENSE
AL27 AV13
VDDC#65 FB_VDDCI GPU_VDD_SENSE GPU_VDDCI_SENSE 118
AL29 AR13
VDDC#66 FB_VDDC GPU_GND_SENSE GPU_VDD_SENSE 118 VDDCI VDD_08
AL31 AU13
VDDC#67 FB_VSS GPU_GND_SENSE 118
REV 0.91
R19M@
216-0905018-C3_FCBGA769
J5002
VCC1R35VIDEO 1 2
1 2
VCC1R8VIDEO_MAIN JUMP_43X79
UGPU1N @ Install-R19M@
symbol14
K11 AM15
VMEMIO#0 VDD_18#0
1 1 1 1 1 K13 AP15
VMEMIO#1 VDD_18#1
DIS@ DIS@ DIS@ DIS@ DIS@ K19 AR15 1 1 1
VMEMIO#2 VDD_18#2
C4229 C4230 C4231 C4232 C4233 K23 DIS@ DIS@ DIS@
VMEMIO#3
1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 K27 C4241 C4242 C4243
C 2 2 2 2 2 VMEMIO#4 C
K31 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201
VMEMIO#5 2 2 2 VDD_08
L10
VMEMIO#6
N10
VMEMIO#7
W10
VMEMIO#8
AC10
VMEMIO#9
AG10
VMEMIO#10
AC32
VDD_08#0
1 1 1 1 1 AG32
VDD_08#1
DIS@ DIS@ DIS@ DIS@ DIS@ AG35 1 1 1 1 1 1 1
VDD_08#2
C4234 C4235 C4236 C4237 C4238 AJ32 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
VDD_08#3
1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 1U_6.3V_M_X5R_0201 AJ34 C4248 C4249 C4250 C4251 C4252 C4253 C4254
2 2 2 2 2 VDD_08#4
AL34 1U_6.3V_K_X5R_0201 1U_6.3V_K_X5R_0201 1U_6.3V_K_X5R_02011U_6.3V_K_X5R_0201 1U_6.3V_K_X5R_02011U_6.3V_K_X5R_02011U_6.3V_K_X5R_0201
VDD_08#5 2 2 2 2 2 2 2
W32
VDD_08

AM23
VSS#227
AM17
VSS#228
REV 0.91

216-0905018-C3_FCBGA769

D D

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 R19M-P25((5/11):POWER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 42 of 128


1 2 3 4 5

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 Video
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 43 of 128

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1 2 3 4 5

A A

UGPU1L @ UGPU1M @
symbol12 symbol13
A2 J39 AA5 AN40
VSS#0 VSS#58 VSS#115 VSS#171
A5 J40 AA10 AN41
VSS#1 VSS#59 VSS#116 VSS#172
A9 J41 AA17 AP13
VSS#2 VSS#60 VSS#117 VSS#173
A13 K21 AA19 AP17
VSS#3 VSS#61 VSS#118 VSS#174
A17 K25 AA25 AR3
VSS#4 VSS#62 VSS#119 VSS#175
A21 K29 AA27 AR7
VSS#5 VSS#63 VSS#120 VSS#176
A25 K40 AA32 AR11
VSS#6 VSS#64 VSS#121 VSS#177
A29 L3 AA39 AR19
VSS#7 VSS#65 VSS#122 VSS#178
A33 L7 AC3 AR21
VSS#8 VSS#66 VSS#123 VSS#179
A37 L11 AC7 AR25
VSS#9 VSS#67 VSS#124 VSS#180
A40 L15 AC11 AR27
VSS#10 VSS#68 VSS#125 VSS#181
B1 L19 AC17 AR31
VSS#11 VSS#69 VSS#126 VSS#182
B40 L23 AC19 AR35
VSS#12 VSS#70 VSS#127 VSS#183
B41 L27 AC25 AR39
VSS#13 VSS#71 VSS#128 VSS#184
C5 L31 AC27 AU1
VSS#14 VSS#72 VSS#129 VSS#185
C7 L35 AC39 AU3
VSS#15 VSS#73 VSS#130 VSS#186
C9 L39 AE1 AU9
VSS#16 VSS#74 VSS#131 VSS#187
C11 N1 AE3 AU23
VSS#17 VSS#75 VSS#132 VSS#188
C13 N3 AE5 AU29
B VSS#18 VSS#76 VSS#133 VSS#189 B
C15 N5 AE10 AW3
VSS#19 VSS#77 VSS#134 VSS#190
C17 N17 AE17 AW5
VSS#20 VSS#78 VSS#135 VSS#191
C19 N19 AE19 AW7
VSS#21 VSS#79 VSS#136 VSS#192
C21 N25 AE25 AW9
VSS#22 VSS#80 VSS#137 VSS#193
C23 N27 AE27 AW11
VSS#23 VSS#81 VSS#138 VSS#194
C25 N32 AE32 AW13
VSS#24 VSS#82 VSS#139 VSS#195
C27 N37 AE35 AW15
VSS#25 VSS#83 VSS#140 VSS#196
C29 N39 AE39 AW17
VSS#26 VSS#84 VSS#141 VSS#197
C31 R3 AG3 AW19
VSS#27 VSS#85 VSS#142 VSS#198
C33 R7 AG7 AW21
VSS#28 VSS#86 VSS#143 VSS#199
C35 R11 AG11 AW23
VSS#29 VSS#87 VSS#144 VSS#200
C37 R17 AG17 AW25
VSS#30 VSS#88 VSS#145 VSS#201
C39 R19 AG19 AW27
VSS#31 VSS#89 VSS#146 VSS#202
E1 R25 AG25 AW29
VSS#32 VSS#90 VSS#147 VSS#203
E3 R27 AG27 AW31
VSS#33 VSS#91 VSS#148 VSS#204
E4 R32 AG39 AW33
VSS#34 VSS#92 VSS#149 VSS#205
E9 R35 AG40 AW35
VSS#35 VSS#93 VSS#150 VSS#206
E13 R39 AG41 AW37
VSS#36 VSS#94 VSS#151 VSS#207
E17 U1 AJ1 AW39
VSS#37 VSS#95 VSS#152 VSS#208
E21 U3 AJ3 AY1
VSS#38 VSS#96 VSS#153 VSS#209
E25 U5 AJ5 AY2
VSS#39 VSS#97 VSS#154 VSS#210
E29 U17 AJ10 AY9
VSS#40 VSS#98 VSS#155 VSS#211
E39 U19 AJ11 AY12
VSS#41 VSS#99 VSS#156 VSS#212
E41 U25 AJ35 AY17
VSS#42 VSS#100 VSS#157 VSS#213
G3 U27 AJ39 AY23
VSS#43 VSS#101 VSS#158 VSS#214
G7 U32 AL3 AY29
VSS#44 VSS#102 VSS#159 VSS#215
G11 U37 AL7 AY37
VSS#45 VSS#103 VSS#160 VSS#216
G15 U39 AL10 AY40
VSS#46 VSS#104 VSS#161 VSS#217
G19 W3 AL11 AY41
VSS#47 VSS#105 VSS#162 VSS#218
G23 W7 AL32 BA2
VSS#48 VSS#106 VSS#163 VSS#219
G27 W11 AL35 BA5
VSS#49 VSS#107 VSS#164 VSS#220
G31 W17 AL39 BA9
C VSS#50 VSS#108 VSS#165 VSS#221 C
G35 W19 AN1 BA17
VSS#51 VSS#109 VSS#166 VSS#222
G39 W25 AN3 BA23
VSS#52 VSS#110 VSS#167 VSS#223
J1 W27 AN7 BA29
VSS#53 VSS#111 VSS#168 VSS#224
J3 W39 AN35 BA37
VSS#54 VSS#112 VSS#169 VSS#225
J5 AA1 AN39 BA40
VSS#55 VSS#113 VSS#170 VSS#226
J34 AA3
VSS#56 VSS#114
J37
VSS#57
REV 0.91
REV 0.91
216-0905018-C3_FCBGA769
216-0905018-C3_FCBGA769

D D

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 R19M-P25(6/11):GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 44 of 128


1 2 3 4 5

VInafix.com
1 2 3 4 5

VCC1R35VIDEO

38 DQA0_[31:0]
R4510 1 DIS@ 2 1/16W_60.4_1%_0402 CLKA0
38 DQA1_[31:0]
R4511 1 DIS@ 2 1/16W_60.4_1%_0402 CLKA0b
38 MAA0_[8:0]
R4512 1 DIS@ 2 1/16W_60.4_1%_0402 CLKA1b
38 MAA1_[8:0]
R4513 1 DIS@ 2 1/16W_60.4_1%_0402 CLKA1

VCC1R35VIDEO
1

UV1
R4501 UV2
@ 1/16W_2.37K_1%_0402 MF=0 MF=1 MF=1 MF=0
A A
VCC1R35VIDEO MF=0 MF=1 MF=1 MF=0
A4 DQA0_8
2

VREFD1_A0 EDCA0_1 DQ24 DQ0 DQA0_9 DQA1_5


C2 A2 A4
38 EDCA0_1 EDCA0_0 EDC0 EDC3 DQ25 DQ1 DQA0_11 EDCA1_0 DQ24 DQ0 DQA1_3
C13 B4 C2 A2
38 EDCA0_0 EDC1 EDC2 DQ26 DQ2 38 EDCA1_0 EDC0 EDC3 DQ25 DQ1

1
EDCA0_2 R13 B2 DQA0_10 BYTE0 EDCA1_1 C13 B4 DQA1_4
38 EDCA0_2 EDCA0_3 EDC2 EDC1 DQ27 DQ3 DQA0_14 38 EDCA1_1 EDCA1_2 EDC1 EDC2 DQ26 DQ2 DQA1_2
1 R2 E4 R4514 R13 B2 BYTE4
38 EDCA0_3 EDC3 EDC0 DQ28 DQ4 38 EDCA1_2 EDC2 EDC1 DQ27 DQ3
1

E2 DQA0_12 @ 1/16W_2.37K_1%_0402 EDCA1_3 R2 E4 DQA1_7


DQ29 DQ5 DQA0_15 38 EDCA1_3 EDC3 EDC0 DQ28 DQ4 DQA1_1
R4502 @ C4501 F4 E2
DDBIA0_1 DQ30 DQ6 DQA0_13 DQ29 DQ5 DQA1_6
@ 1/16W_5.49K_1%_0402 1U_6.3V_M_X5R_0201 D2 F2 F4
38 DDBIA0_1

2
2 DDBIA0_0 DBI0# DBI3# DQ31 DQ7 DQA0_0 VREFD1_A1 DDBIA1_0 DQ30 DQ6 DQA1_0
D13 A11 D2 F2
38 DDBIA0_0 DDBIA0_2 DBI1# DBI2# DQ16 DQ8 DQA0_2 38 DDBIA1_0 DDBIA1_1 DBI0# DBI3# DQ31 DQ7 DQA1_9
P13 A13 D13 A11
38 DDBIA0_2 38 DDBIA1_1
2

DDBIA0_3 DBI2# DBI1# DQ17 DQ9 DQA0_1 DDBIA1_2 DBI1# DBI2# DQ16 DQ8 DQA1_10
P2 B11 P13 A13
38 DDBIA0_3 DBI3# DBI0# DQ18 DQ10 DQA0_3 38 DDBIA1_2 DDBIA1_3 DBI2# DBI1# DQ17 DQ9 DQA1_8
B13 BYTE1 P2 B11
DQ19 DQ11 38 DDBIA1_3 DBI3# DBI0# DQ18 DQ10

1
CLKA0 J12 E11 DQA0_7 1 B13 DQA1_11 BYTE5
38 CLKA0 CK DQ20 DQ12 DQA0_4 DQ19 DQ11 DQA1_14
CLKA0b J11 E13 R4515 CLKA1 J12 E11
38 CLKA0b CK# DQ21 DQ13 DQA0_6 38 CLKA1 CK DQ20 DQ12 DQA1_12
CKEA0 J3 F11 @ 1/16W_5.49K_1%_0402 @ C4504 CLKA1b J11 E13
VCC1R35VIDEO 38 CKEA0 CKE# DQ22 DQ14 DQA0_5 38 CLKA1b CK# DQ21 DQ13 DQA1_15
F13 1U_6.3V_M_X5R_0201 CKEA1 J3 F11
DQ23 DQ15 DQA0_23 2 38 CKEA1 CKE# DQ22 DQ14 DQA1_13
U11 F13

2
MAA0_2 DQ8 DQ16 DQA0_21 DQ23 DQ15 DQA1_21
H11 U13 U11
MAA0_5 BA0/A2 BA2/A4 DQ9 DQ17 DQA0_22 MAA1_4 DQ8 DQ16 DQA1_23
K10 T11 H11 U13
BA1/A5 BA3/A3 DQ10 DQ18 BA0/A2 BA2/A4 DQ9 DQ17
1

MAA0_4 K11 T13 DQA0_20 BYTE2 MAA1_3 K10 T11 DQA1_20


MAA0_3 BA2/A4 BA0/A2 DQ11 DQ19 DQA0_19 MAA1_2 BA1/A5 BA3/A3 DQ10 DQ18 DQA1_22
R4503 H10 N11 K11 T13
BA3/A3 BA1/A5 DQ12 DQ20 DQA0_18 MAA1_5 BA2/A4 BA0/A2 DQ11 DQ19 DQA1_16
@ 1/16W_2.37K_1%_0402 N13 H10 N11 BYTE6
DQ13 DQ21 DQA0_16 VCC1R35VIDEO BA3/A3 BA1/A5 DQ12 DQ20 DQA1_18
M11 N13
MAA0_7 DQ14 DQ22 DQA0_17 DQ13 DQ21 DQA1_17
K4 M13 M11
2

VREFD2_A0 MAA0_1 A8/A7 A10/A0 DQ15 DQ23 DQA0_26 MAA1_0 DQ14 DQ22 DQA1_19
H5 U4 K4 M13
MAA0_0 A9/A1 A11/A6 DQ0 DQ24 DQA0_28 MAA1_6 A8/A7 A10/A0 DQ15 DQ23 DQA1_30
H4 U2 H5 U4
A10/A0 A8/A7 DQ1 DQ25 A9/A1 A11/A6 DQ0 DQ24

1
MAA0_6 K5 T4 DQA0_27 MAA1_7 H4 U2 DQA1_29
MAA0_8 A11/A6 A9/A1 DQ2 DQ26 DQA0_29 MAA1_1 A10/A0 A8/A7 DQ1 DQ25 DQA1_28
1 J5 T2 R4516 K5 T4
A12/RFU/NC DQ3 DQ27 A11/A6 A9/A1 DQ2 DQ26
1

N4 DQA0_25 BYTE3 @ 1/16W_2.37K_1%_0402 MAA1_8 J5 T2 DQA1_31


DQ4 DQ28 DQA0_30 A12/RFU/NC DQ3 DQ27 DQA1_24
R4504 @ C4502 A5 N2 N4 BYTE7
VPP/NC1 DQ5 DQ29 DQA0_24 DQ4 DQ28 DQA1_27
@ 1/16W_5.49K_1%_0402 1U_6.3V_M_X5R_0201 U5 M4 A5 N2

2
2 VPP/NC2 DQ6 DQ30 DQA0_31 VREFD2_A1 VPP/NC1 DQ5 DQ29 DQA1_25
M2 U5 M4
DQ7 DQ31 VCC1R35VIDEO VPP/NC2 DQ6 DQ30 DQA1_26
M2
2

VCC1R35VIDEO DQ7 DQ31


R4507 2 DIS@ 1 1/16W_1K_1%_0402 J1
MF VCC1R35VIDEO
R4508 2 DIS@ 1 1/16W_1K_1%_0402 J10 R4520 1 DIS@ 21/16W_1K_1%_0402 J1
SEN MF

1
R4509 2 DIS@ 1 1/16W_121_1%_0402 J13 B1 1 R4521 1 DIS@ 21/16W_1K_1%_0402 J10
ZQ VDDQ1 SEN
D1 R4517 R4522 1 DIS@ 21/16W_121_1%_0402 J13 B1
VDDQ2 ZQ VDDQ1
F1 @ 1/16W_5.49K_1%_0402 @ C4505 D1
VDDQ3 VDDQ2
ADBIA0 J4 M1 1U_6.3V_M_X5R_0201 F1
VCC1R35VIDEO 38 ADBIA0 ABI# VDDQ4 2 VDDQ3
RASA0b G3 P1 ADBIA1 J4 M1
38 RASA0b 38 ADBIA1

2
CSA0b_0 RAS# CAS# VDDQ5 ABI# VDDQ4
G12 T1 CASA1b G3 P1
38 CSA0b_0 CS# WE# VDDQ6 38 CASA1b RAS# CAS# VDDQ5
CASA0b L3 G2 WEA1b G12 T1
38 CASA0b CAS# RAS# VDDQ7 38 WEA1b CS# WE# VDDQ6
WEA0b L12 L2 RASA1b L3 G2
38 WEA0b WE# CS# VDDQ8 38 RASA1b CAS# RAS# VDDQ7
1

B3 CSA1b_0 L12 L2
VDDQ9 38 CSA1b_0 WE# CS# VDDQ8
R4505 D3 B3
VDDQ10 VDDQ9
B DIS@ 1/16W_2.37K_1%_0402 F3 D3 B
WCKA0b_0 VDDQ11 VCC1R35VIDEO VDDQ10
D5 H3 F3
38 WCKA0b_0 WCKA0_0 WCK01# WCK23# VDDQ12 WCKA1b_0 VDDQ11
D4 K3 D5 H3
38 WCKA0_0 38 WCKA1b_0
2

VREFC_A0 WCK01 WCK23 VDDQ13 WCKA1_0 WCK01# WCK23# VDDQ12


M3 D4 K3
WCKA0b_1 VDDQ14 38 WCKA1_0 WCK01 WCK23 VDDQ13
P5 P3 M3
38 WCKA0b_1 WCK23# WCK01# VDDQ15 VDDQ14

1
WCKA0_1 P4 T3 WCKA1b_1 P5 P3
38 WCKA0_1 WCK23 WCK01 VDDQ16 38 WCKA1b_1 WCKA1_1 WCK23# WCK01# VDDQ15
1 E5 R4518 P4 T3
VDDQ17 38 WCKA1_1 WCK23 WCK01 VDDQ16
1

DIS@ N5 DIS@ 1/16W_2.37K_1%_0402 E5


VREFD1_A0 VDDQ18 VDDQ17
R4506 C4503 A10 E10 N5
VREFD2_A0 VREFD1 VDDQ19 VREFD1_A1 VDDQ18
DIS@ 1/16W_5.49K_1%_0402 1U_6.3V_M_X5R_0201 U10 N10 A10 E10

2
2 VREFC_A0 VREFD2 VDDQ20 VREFC_A1 VREFD2_A1 VREFD1 VDDQ19
J14 B12 U10 N10
VREFC VDDQ21 VREFC_A1 VREFD2 VDDQ20
D12 J14 B12
2

VDDQ22 VREFC VDDQ21


F12 D12
VDDQ23 VDDQ22
H12 F12
VDDQ24 VDDQ23

1
DRAM_RST_A J2 K12 1 H12
38 DRAM_RST_A RESET# VDDQ25 DRAM_RST_A VDDQ24
M12 R4519 DIS@ J2 K12
VDDQ26 RESET# VDDQ25
P12 DIS@ 1/16W_5.49K_1%_0402 C4506 M12
VDDQ27 VDDQ26
T12 1U_6.3V_M_X5R_0201 P12
VDDQ28 2 VDDQ27
G13 T12

2
VDDQ29 VDDQ28
H1 L13 G13
VSS1 VDDQ30 VDDQ29
K1 B14 H1 L13
VSS2 VDDQ31 VSS1 VDDQ30
B5 D14 K1 B14
VSS3 VDDQ32 VSS2 VDDQ31
G5 F14 B5 D14
VSS4 VDDQ33 VSS3 VDDQ32
L5 M14 G5 F14
VSS5 VDDQ34 VSS4 VDDQ33
T5 P14 L5 M14
VSS6 VDDQ35 VSS5 VDDQ34
B10 T14 T5 P14
VSS7 VDDQ36 VSS6 VDDQ35
D10 B10 T14
VSS8 VSS7 VDDQ36
G10 D10
VSS9 VSS8
L10 A1 G10
VSS10 VSSQ1 VSS9
P10 C1 L10 A1
VSS11 VSSQ2 VSS10 VSSQ1
T10 E1 P10 C1
VSS12 VSSQ3 VSS11 VSSQ2
H14 N1 T10 E1
VSS13 VSSQ4 VSS12 VSSQ3
K14 R1 H14 N1
VCC1R35VIDEO VSS14 VSSQ5 VSS13 VSSQ4
U1 K14 R1
VSSQ6 VCC1R35VIDEO VSS14 VSSQ5
H2 U1
VSSQ7 VSSQ6
G1 K2 H2
VDD1 VSSQ8 VSSQ7
L1 A3 G1 K2
VDD2 VSSQ9 VDD1 VSSQ8
G4 C3 L1 A3
VDD3 VSSQ10 VDD2 VSSQ9
L4 E3 G4 C3
VDD4 VSSQ11 VDD3 VSSQ10
C5 N3 L4 E3
VDD5 VSSQ12 VDD4 VSSQ11
R5 R3 C5 N3
VDD6 VSSQ13 VDD5 VSSQ12
C10 U3 R5 R3
VDD7 VSSQ14 VDD6 VSSQ13
R10 C4 C10 U3
VDD8 VSSQ15 VDD7 VSSQ14
D11 R4 R10 C4
VDD9 VSSQ16 VDD8 VSSQ15
G11 F5 D11 R4
VDD10 VSSQ17 VDD9 VSSQ16
L11 M5 G11 F5
VDD11 VSSQ18 VDD10 VSSQ17
P11 F10 L11 M5
VDD12 VSSQ19 VDD11 VSSQ18
C G14 M10 P11 F10 C
VDD13 VSSQ20 VDD12 VSSQ19
L14 C11 G14 M10
VDD14 VSSQ21 VDD13 VSSQ20
R11 L14 C11
VSSQ22 VDD14 VSSQ21
A12 R11
VSSQ23 VSSQ22
C12 A12
VSSQ24 VSSQ23
E12 C12
VSSQ25 VSSQ24
N12 E12
VSSQ26 VSSQ25
R12 N12
VSSQ27 VSSQ26
170-BALL U12 R12
VSSQ28 VSSQ27
H13 170-BALL U12
VSSQ29 VSSQ28
SGRAM GDDR5 K13 H13
VSSQ30 VSSQ29
A14 SGRAM GDDR5 K13
VSSQ31 VSSQ30
C14 A14
VSSQ32 VSSQ31
E14 C14
VSSQ33 VSSQ32
N14 E14
VSSQ34 VSSQ33
R14 N14
VSSQ35 VSSQ34
U14 R14
VSSQ36 VSSQ35
U14
VSSQ36
X76@
X76@
SA000081C10 H5GQ1H24AFR-T2L_BGA170
SA000081C10 H5GQ1H24AFR-T2L_BGA170
UV1 SIDE
VCC1R35VIDEO VCC1R35VIDEO UV2 SIDE
10U_6.3V_M_X5R_0402

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201
10U_6.3V_M_X5R_0402

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ C4524 C4525 C4526 C4527 C4528 C4529 C4530 C4531 C4532
C4507 C4508 C4509 C4510 C4511 C4512 C4513 C4514 C4515
2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 2 2

VCC1R35VIDEO UV1 SIDE


D D
VCC1R35VIDEO UV2 SIDE
0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201

0.1U_10V_K_X5R_0201
1 1 1 1 1 1 1 1
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ 1 1 1 1 1 1 1 1
C4516 C4517 C4518 C4519 C4520 C4521 C4522 C4523 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
C4533 C4534 C4535 C4536 C4537 C4538 C4539 C4540
2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 2

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 VRAM CHANNEL-A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 45 of 128


1 2 3 4 5

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 Video
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 46 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 Video
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 47 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 Video
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 48 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 Video
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 49 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

VCC3B

2
VCC3B to VCC3B_VGA
R5001
@ 1/16W_10K_5%_0402

1
GFX_PWR_EN R5002 2 @ 1 1/16W_1K_1%_0402 1R8VIDEO_MAIN_DRV
3 GFX_PWR_EN

1
1
R5003 VCC5M VCC3B
@ 1/16W_10K_5%_0402 @ C5001 VCC3B_VGA
0.1U_25V_K_X5R_0402
2

2
D5001
RB751V-40_SOD323-2

1
DIS@

D
R5012 3 1
1 2 DIS@ 1/16W_30K_1%_0402
Q5002
AO3413_SOT23-3

G
2

2
D DIS@ D
R5004 1 DIS@ 2 1/16W_30K_1%_0402 VDDCI_EN SB93413000J
VDDCI_EN 118

1
D5004 1 1

1
RB751V-40_SOD323-2 R5005 DIS@ DIS@
DIS@ @ 1/16W_10K_5%_0402 DIS@ C5002 R5013 C5004 DIS@
0.22U_25V_K_X5R_0402 1/16W_10K_1%_0402 0.22U_25V_K_X5R_0402 R5014
1 2 2 2 1/16W_300_1%_0402

2
R5015
-GFX_PWR_EN 1/16W_10K_5%_0402
D

3
DIS@
R5006 1 DIS@ 2 1/16W_30K_1%_0402 1R35VIDEO_ON 5 2 1 -GFX_PWR_EN
1R35VIDEO_ON 120
R5010 G
D

6
0_0402_SP Q5001B
20180613 1 S

4
R5007 C5003 GFX_PWR_EN 1 2 2 Q5001A L2N7002KDW1T1G_SOT363-6
Add D3702 and mount D3701 for GPU power-off slow rate @ 1/16W_10K_5%_0402 DIS@ 0.1U_25V_K_X5R_0402 G L2N7002KDW1T1G_SOT363-6 DIS@
S DIS@ SB000013A00

1
1
2 SB000013A00
Discharge Circuit

2
R5011
@ 1/16W_100K_5%_0402 VDS=60
VCC3B_VGA VCC3B_VGA
VCC1R8_SUS VGS=20

2
VCC3_SUS Id=320mA
2

1
DIS@
R5008 R5009 R5038
@ 1/16W_100K_5%_0402 @ 1/16W_100K_5%_0402 1/20W_10K_5%_0201

5
1

2
GFXCORE_D_PWRGD 1

P
118 GFXCORE_D_PWRGD B DGFX_PWRGD
4
1R35VIDEO_PWRGD Y DGFX_PWRGD 11
2
A

G
120 1R35VIDEO_PWRGD
DIS@
3 U5001
TABLE of ANDGATE (U5001) MC74VHC1G09DFT2G_SC70-5
SA000046R0J
Vendor LCFC P/N Description
ON SA000046R0J S IC MC74VHC1G09DFT2G SC70 5P

2
R5036
NXP SA00003Y00J S IC 74AHC1G09GW TSSOP 5P OD A 0_0402_SP
DIODES SA00009WT00 S IC 74AHC1G09SE-7 SOT353 5P AND GATE

VCC3B_VGA 1
N3703

C C
1

R5037
2

@
G

1/20W_10K_5%_0201
@
Q5008
2

L2N7002KWT1G_SOT323-3
-CLKREQ_PCIE5_VGA 3 1 SB000019400
41 -CLKREQ_PCIE5_VGA -CLKREQ_PCIE5 12
S

PCC circuit VCC1R8_SUS VCC1R8_SUS 16,66,78,80,85,116

VCC1R8_SUS to VCC1R8VIDEO_MAIN
VCC1R8VIDEO_MAIN VCC1R8VIDEO_MAIN 37,40,41,42

VCC3B_VGA

1 1
C5007 R5021 1 @ 2 1/16W_0_5%_0402
GPU_GPIO21 41
@ C5006 @ 0.1U_10V_K_X7R_0402
.01U_16V_K_X7R_0402
R5016 2 2
1/16W_0_5%_0402 U5002 VCC3B_VGA
1 2 VDDC_IMON_PCC_R 1 5
118 VDDC_IMON_PCC +IN V+
@
2 R5018 R5019
V-
1/16W_649K_+-1%_0402 1/16W_10M_5%_0402 U5003
1 3 4 1 @ 2 1 @ 2 1 5
-IN OUT OUT VCC
C5005
@ 100P_50V_J_NPO_0201 2
GND VCC3B_VGA VCC5M VCC1R8_SUS VCC1R8VIDEO_MAIN
@ OPA348AIDCKR_SO5 R5020
2 1 @ 2 3 4
IN+ IN- VCC3B_VGA
1/16W_280K_1%_0402 @TLV3201AIDBVR_SOT23-5 @ C5008
B 1U_6.3V_K_X5R_0402_MURATA B

1
R5022
R5017 1 @ 2 1/16W_0_5%_0402 @ 1/16W_13.3K_1%_0402 R5030
0_0805_SP

2
1
1
VCC1R05_SUS to VCC1R05B_VGA PCC 60A >> R3213 = 13.3K ohm, R3216 = 10.2K ohm @
R5023
1/16W_10.2K_1%_0402 @ C5009
PCC 72A >> R3213 = 11.5K ohm, R3216 = 10.2K ohm 1000P_50V_K_X7R_0201
40 mils

1
2
40 mils
2
VCC1R8VIDEO_MAIN_R

D
R5026 R5027 3 1
VCC3M 1/16W_10K_5%_0402 1/16W_47K_5%_0402
DIS@ R5029 Q5004
1/16W_10K_1%_0402 AO3413_SOT23-3

G
2

2
DIS@ DIS@
-1R8VIDEO_MAIN_DRV1 2 SB93413000J
1
R5025 1

1
C5015 R18M@ 1/16W_0_5%_0402 D DIS@ Discharge Circuit
0.1U_6.3V_K_X7R_0402 1R8VIDEO_MAIN_DRV 1 @ 2 2 Q5003 C5014

1
2 G 0.22U_25V_K_X5R_0402
L2N7002KWT1G_SOT323-3
SB000019400 2 DIS@
S DIS@ R5035

3
1/16W_300_1%_0402
Mos max 2.5A , But 0.95VS_VGA EDC is 3A

2
VCC1R05_SUS VDD_08 R5034
GFX_PWR_EN 1/16W_10K_5%_0402
Nominal at 0.95 V, Need check

1
D DIS@
1

support up to 1.05 V functionally.

1
U5004 R18M@ 2 1 2 -1R8VIDEO_MAIN_DRV
R5028 G
VDD

@ 1/16W_100K_5%_0402
3 4 S Q5005 DIS@

3
D S
L2N7002KWT1G_SOT323-3

2
SB000019400
GFX_PWR_EN R5039 1 R18M@ 2 1/16W_82K_+-1%_0402 GFX_PWR_EN_R 2 5
ON CAP
0.47U_25V_K_X5R_0402_YAGEO

GND

SLG59M1448VTR_STDFN8-6_1X1P6
6

1 1 1
C5016 R18M@ C5018
R18M@ C5017 R18M@ 2200P_25V_K_X7R_0402
A 10U_6.3V_M_X5R_0402 A
2 2 2
1

D
-GFX_PWR_EN 2 Q5009
G L2N7002KWT1G_SOT323-3
R18M@
S SB000019400
3

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 R19M-P25:Load SW VGA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 50 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

LOGO_LED Side A VCC3SW


VCC3M VCC3P
LCDVDD Circuit R5102 1 21/16W_100K_5%_0402 -PWRSWITCH 2
JSW1
1

LED_LOGO R5103 1 2 1/16W_3.9K_5%_0402 LED_LOGO_CONN SHORT PADS


85 LED_LOGO
@
73,85 -PWRSWITCH
Close connector

2
U5101
W= 60 mil 5 1 W= 60 mil
IN OUT
EMC@
From PCH 2 D5102
GND
1 1 PESD5V0U2BT_SOT23-3
PANEL_POWER_ON4 3 C5108

1
3 PANEL_POWER_ON EN OC 4.7U_10V_K_X5R_0603
D 1 C5122 D
G524B1T11U_SOT23-5 2200P_50V_K_X7R_0402
C5107 SA000074R00 2 2 EMC_NS@
1U_6.3V_K_X5R_0402_MURATA
2

VSYS15
VBL15
R5115 1 2 0_0805_SP VBL15
TABLE of POWER SWITCH (U5101)
Vendor LCFC P/N Description 1
C5101
GMT SA000074R00 S IC G524B1T11U SOT23 5P POWER SWITCH 0.01U_25V_K_X7R_0201
2
SILERGY SA000074P00 S IC SY6288C20AAC SOT23 5P POWER SWITCH

LCD_Self_test
VCC3P VCC3LCD
PANEL_BKLT_CTRL_CPU D5105 2 1 RB520CM-30T2R_VMN2M2 PANEL_BKLT_CTRL
3 PANEL_BKLT_CTRL_CPU
R5101 1 2 0_0603_SP VCC3LCD
LCD_SELF_TEST_ON D5106 2 1 RB520CM-30T2R_VMN2M2
3,85 LCD_SELF_TEST_ON

2
R5110

1/20W_10K_5%_0201 VCC3B
Size CTL
Status (GPP_C19)
R5116 1 @ 2 1/16W_0_5%_0402
C
eDP/CMOS/LOGO-LED CONN. C

1
15@ 0 (GND Low)

1
L5101 EMC_NS@ R5122
10 USBP6- USBP6- 4 3 USBP6-_CONN R5109
4 3
1/20W_100K_5%_0201 JLCD1
Touch Panel 14@ 1 (NC High) 1
R5109 W= 80 mil 1
10 USBP6+ USBP6+ 1 2 USBP6+_CONN 2

2
1 2 2
3
3
SM070003X00 4
4
EXC24CH900U_4P 5
PANEL_BKLT_CTRL 5
1 2 6
LCD_SELF_TEST_ON LCD_SELF_TEST_ON_CONN 6
R5117 @ 1/16W_0_5%_0402 R5120 1 2 0_0402_SP 7
Size CTL_CONN 7
Size CTL R5121 1 2 0_0201_SP 8
8 Size CTL 8
9
9
R5122 10
10
R5118 1 @ 2 1/16W_0_5%_0402 1/20W_100K_5%_0201 11
11
1 @ 2 12
12
13
EDP_HPD 13
14
3 EDP_HPD 14
L5102 EMC@ W= 60 mil 15
USBP8-_CONN 15
USBP8- 4 3 16
10 USBP8- 4 3 BACKLIGHT_ON 16
17
CAMERA 85 BACKLIGHT_ON
LED_LOGO_CONN 18 17
USBP8+_CONN DMIC_DATA0 18
USBP8+ 1 2 78 DMIC_DATA0 19
10 USBP8+ 1 2 DMIC_CLK0 19
20
78 DMIC_CLK0 20
SM070003X00 21
EDP_AUXP 21
EXC24CH900U_4P C5117 1 2 0.1U_10V_K_X7R_0402 EDP_AUXP_CONN 22
3 EDP_AUXP EDP_AUXN 22
C5116 1 2 0.1U_10V_K_X7R_0402 EDP_AUXN_CONN 23
3 EDP_AUXN 23
1 2 24
EDP_TXP0 24
R5119 @ 1/16W_0_5%_0402 C5118 1 2 0.1U_10V_K_X7R_0402 EDP_TXP0_CONN 25
3 EDP_TXP0 EDP_TXN0 25
C5119 1 2 0.1U_10V_K_X7R_0402 EDP_TXN0_CONN 26
3 EDP_TXN0 26
27
EDP_TXP1 27
C5120 1 2 0.1U_10V_K_X7R_0402 EDP_TXP1_CONN 28
3 EDP_TXP1 EDP_TXN1 28
C5121 1 2 0.1U_10V_K_X7R_0402 EDP_TXN1_CONN 29
3 EDP_TXN1 29
30
USBP6-_CONN 30
31
USBP6+_CONN 31
B 32 B
32
33
USBP8-_CONN 33
34
USBP8+_CONN 34
35
35
36
36
37
8,73,85,89 -LID_CLOSE 37
38
VCC3B_R 38
VCC3B R5107 1 2 0_0603_SP W= 40 mil 39 41
39 GND1
VCC3SW 40 42
40 GND2
HIGHS_FC5AF401-3181H

1
1 ME@
R5113 EMC@
1/16W_100K_5%_0402 C5131
680P_50V_K_X7R_0402
2

2
RF
VBL15 VCC3B_R VCC3LCD LED_LOGO_CONN

RF@ 1 RF@ RF@ 1 RF@ 1 RF@ 1 RF@ RF@ 1 RF@


1

C5123 C5124 C5125 C5126 C5127 C5128 C5129 C5130


0.1U_16V_K_X7R_0402_MURATA 47P_50V_J_NPO_0402 0.1U_16V_K_X7R_0402_MURATA 100P_50V_J_NPO_0402 100P_50V_J_NPO_0402 47P_50V_J_NPO_0402 0.1U_16V_K_X7R_0402_MURATA 100P_50V_J_NPO_0402
A A
2

2 2 2 2 2

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12
LCD CAMERA/MIC/TOUCH SREEN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 51 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 Video
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 52 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 HDMI Re-Timer
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 53 of 128

5 4 3 2 1

VInafix.com
A B C D E

DDIP2_0P C5404 1 2 0.1U_10V_K_X5R_0201 HDMI_DATA0P


3 DDIP2_0P
DDIP2_0N C5405 1 2 0.1U_10V_K_X5R_0201 HDMI_DATA0N
3 DDIP2_0N

DDIP2_1P C5406 1 2 0.1U_10V_K_X5R_0201 HDMI_DATA1P


3 DDIP2_1P
DDIP2_1N C5407 1 2 0.1U_10V_K_X5R_0201 HDMI_DATA1N
3 DDIP2_1N

DDIP2_2P C5408 1 2 0.1U_10V_K_X5R_0201 HDMI_DATA2P


3 DDIP2_2P
DDIP2_2N C5409 1 2 0.1U_10V_K_X5R_0201 HDMI_DATA2N
3 DDIP2_2N

DDIP2_3P C5410 1 2 0.1U_10V_K_X5R_0201 HDMI_CLKP


1 3 DDIP2_3P 1
DDIP2_3N C5411 1 2 0.1U_10V_K_X5R_0201 HDMI_CLKN
3 DDIP2_3N
R5417 1 @ 2 1/16W_0_5%_0402

1/20W_470_5%_0201

1/20W_470_5%_0201

1/20W_470_5%_0201

1/20W_470_5%_0201

1/20W_470_5%_0201

1/20W_470_5%_0201

1/20W_470_5%_0201

1/20W_470_5%_0201
1

1
VCC5B
R5405 R5406 R5407 R5408 R5409 R5410 R5411 R5412
FL5401 EMC@
HDMI_DATA2P 4 3 HDMI_DATA2P_CONN
4 3

2
G

2
HDMI_DATA2N 1 2 HDMI_DATA2N_CONN
1 2
3 1 EXC24CH900U_4P

D
Q5401 R5418 1 @ 2 1/16W_0_5%_0402
L2N7002KWT1G_SOT323-3
SB000019400
VCC5B_HDMI
R5419 1 @ 2 1/16W_0_5%_0402

VCC3B FL5402 EMC@


HDMI_DATA1P 4 3 HDMI_DATA1P_CONN
4 3
D5403 AZ1045-04F_DFN2510P10E-10-9

1
HDMI_DATA1N 1 2 HDMI_DATA1N_CONN
1 2
1

R5401 R5402
R5413 HDMI_DDC_DATA9 1 HDMI_DDC_DATA EXC24CH900U_4P 1/20W_1.8K_5%_0201 1/20W_1.8K_5%_0201
2

1/20W_1M_5%_0201 HDMI_DDC_CLK 8 2 HDMI_DDC_CLK


G

HDMI_HPD_CONN7 4 HDMI_HPD_CONN

2
6 5
2

R5420 1 @ 2 1/16W_0_5%_0402
DDIP2_HPD 3 1 HDMI_HPD_CONN
3 DDIP2_HPD
S

2 2
Q5403
2

EMC@ R5421 1 @ 2 1/16W_0_5%_0402


Vgs(th) Max >=2.0V 1

3
L2N7002KWT1G_SOT323-3 R5414 EMC_NS@
SB000019400 1/20W_20K_5%_0201 C5412
1000P_50V_K_X7R_0402
2 FL5403 EMC@ HDMI CONN.
1

HDMI_DATA0P 4 3 HDMI_DATA0P_CONN
4 3
JHDMI1 ME@
HDMI_HPD_CONN 19
HDMI_DATA0N HDMI_DATA0N_CONN HP_DET
D5405 AZ1045-04F_DFN2510P10E-10-9 1 2 18
1 2 +5V
17
VCC3B HDMI_DDC_DATA DDC/CEC_GND
EXC24CH900U_4P 16
HDMI_DDC_CLK SDA
15
HDMI_CLKN_CONN 9 HDMI_CLKN_CONN SCL
1 14
HDMI_CLKP_CONN 8 HDMI_CLKP_CONN Reserved
2 13 20
HDMI_DATA0N_CONN 7 HDMI_DATA0N_CONN HDMI_CLKN_CONN CEC GND1
4 R5422 1 @ 2 1/16W_0_5%_0402 12
HDMI_DATA0P_CONN 6 HDMI_DATA0P_CONN CK-
5 11 21
HDMI_CLKP_CONN CK_shield GND2
10
CK+
5

HDMI_DATA0N_CONN 9 22
G

D0- GND3
Q5402B R5423 1 @ 2 1/16W_0_5%_0402 8
HDMI_DATA0P_CONN D0_shield
7 23
HDMI_DATA1N_CONN D0+ GND4
EMC@ 6

3
DDIP2_CTRLCLK HDMI_DDC_CLK D1-
4 3 5
S

3 DDIP2_CTRLCLK D1_shield
D

FL5404 EMC@ HDMI_DATA1P_CONN 4


HDMI_CLKP HDMI_CLKP_CONN HDMI_DATA2N_CONN D1+
L2N7002KDW1T1G_SOT363-6 4 3 3
4 3 D2-
2

2
G

HDMI_DATA2P_CONN D2_shield
Q5402A 1
HDMI_CLKN HDMI_CLKN_CONN D2+
1 2
1 2
DDIP2_CTRLDATA 1 6 HDMI_DDC_DATA EXC24CH900U_4P SINGA_2HE3Y62-000111F
S

3 DDIP2_CTRLDATA
D

D5404 AZ1045-04F_DFN2510P10E-10-9 DC232002X00


L2N7002KDW1T1G_SOT363-6
Vgs(th) Max >=2.0V
R5424 1 @ 2 1/16W_0_5%_0402
HDMI_DATA1N_CONN 9 1 HDMI_DATA1N_CONN
HDMI_DATA1P_CONN 8 2 HDMI_DATA1P_CONN
HDMI_DATA2N_CONN 7 4 HDMI_DATA2N_CONN
HDMI_DATA2P_CONN 6 5 HDMI_DATA2P_CONN
3 3

EMC@
3

PMOS ? Id? =< 2A; Vgs(th)<-1.2


V
VCC5B VCC5B_HDMI_F VCC5B_HDMI

F5401
1 2

0.5A_6V_1206L050YRHF 1
VSYS15 VCC5M
C5403
200mA 0.1U_6.3V_K_X5R_0201_MURATA
1

2
1

R5403 @ 1 3 Q5405
D

1/16W_100K_5%_0402 R5425
1/20W_1K_5%_0201 LP2301ALT1G_SOT-23-3
G
2

2
2

-B_ON
1

R5404
1/16W_133K_1%_0402
AC:9V-->5.1V
2

4 4
AC+DC:13V-->7.4V
1

D
85,106,123,127 B_ON 2 Q5404
G L2N7002KWT1G_SOT323-3
SB000019400
S
3

TABLE of POWER SWITCH (F5401) Security Classification LC Future Center Secret Data Title

LCFC P/N Description Issued Date 2015/01/12 Deciphered Date 2016/01/12 HDMI CONNECTOR
LITTELFUSE SP040005G00 S FUSE 1206L050YRHF 0.5A 6V CURUS/TUV THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
BOURNS SP040005L00 S_PPTC_TH MF-NSMF050-2 0.5A 13.2V UL/TUV DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 54 of 128

A B C D E

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 TBT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 55 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 TBT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 56 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 TBT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 57 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 TBT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 58 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

VCC5M VCC5M 50,54,69,73,78,84,103,107,108,109,110,111,116,118,123,125,127

USBC_VBUS20 USBC_VBUS20 63,125

VCC3SW VCC3SW 51,73,85,100,101,102,105,127

VCC3_LDO_PD VCC3_LDO_PD 63,85,125

5V_IN 5V_IN 125

D D

VCC5M
VCON_IN_R 5V_IN
No less than 20mil Width
R5901
1/10W_0_5%_0603
1 @ 2 VCON_IN_R

5V_IN
5V_IN
No less than 20mil Width
1
1 3

S
C5920 VDS=-20
10U_10V_K_X5R_0603 Q5901
2 AO3413_SOT23-3 VGS=+-8V R5906

G
2
SB93413000J Id=3A 1/16W_47K_5%_0402 1 1
Vth=-1v 2 C5901 C5902
TYPEC_GPIO9 1 10U_10V_K_X5R_0603 0.1U_10V_K_X5R_0201
2 2

VCC5M USBC_VBUS20 VCC3_LDO_PD

VCC3SW
VCC3_LDO_PD

R5903

R5904

R5905
C LDO_3V3 C

No less than 20mil Width


1

2 R5907

2 R5908

2 R5909
1
2

1
1/16W_115K_1%_0402

1/16W_200K_1%_0402

1/16W_100K_5%_0402
C5903
4.7U_10V_K_X5R_0603
2

1/20W_4.7K_1%_0201 1

1/20W_4.7K_1%_0201 1

1/20W_4.7K_1%_0201 1
High enable discharge
Low disable discharge USBC_VBUS20

10

25

26
U5901

VCON_IN

5V_IN

LDO_3V3

1
R5927
1/10W_150_1%_0603

PD Controller W=10 mil

2
USB3P2_TXN C5904 1 2 0.22U_6.3V_K_X5R_0201 USB3P2_TXN_C 41 4 USBC_SBU2
10 USB3P2_TXN USB3P2_TXP USB3P2_TXP_C 42 SSTX_1P/2N SBU2/MGPIO7 USBC_SBU1 USBC_SBU2 63
C5905 1 2 0.22U_6.3V_K_X5R_0201 3
10 USB3P2_TXP SSTX_1N/2P SBU1/MGPIO6 USBC_SBU1 63

1
D

10Gbps MUX System Side

Type-C Port side


USB3P2_RXN C5906 1 2 0.22U_6.3V_K_X5R_0201 USB3P2_RXN_C 39 8 VBUS_DSCHG R5926 1 2 0_0402_SP VBUS_DSCHG_R 2 Q5902
10 USB3P2_RXN USB3P2_RXP USB3P2_RXP_C 40 SSRX_1P/2N C_DM/BB_DM G
C5907 1 2 0.22U_6.3V_K_X5R_0201 7 L2N7002KWT1G_SOT323-3
10 USB3P2_RXP SSRX_1N/2P C_DP/BB_DP
W=10 mil SB000019400
11 USBC_CC2 S
USBC_CC2 63

3
DDIP1_3P DDIP1_3P_C CC2 USBC_CC1
C5908 1 2 0.1U_10V_K_X5R_0201 38 9 VDS=60
3 DDIP1_3P DDIP1_3N DDIP1_3N_C DP3_1N/2P CC1 USBC_CC1 63
C5909 1 2 0.1U_10V_K_X5R_0201 37
3 DDIP1_3N DDIP1_2P C5910 1 2 0.1U_10V_K_X5R_0201 DDIP1_2P_C 46 DP3_1P/2N
18 USBC_RX2P VGS=20
3 DDIP1_2P DP2_1N/2P C_RX2_1N/2P USBC_RX2P 63
3 DDIP1_2N
DDIP1_2N C5911 1 2 0.1U_10V_K_X5R_0201 DDIP1_2N_C 45
DP2_1P/2N C_RX2_1P/2N
19 USBC_RX2N
USBC_RX2N 63 Id=320mA
DDIP1_1P C5912 1 2 0.1U_10V_K_X5R_0201 DDIP1_1P_C 44 14 USBC_TX2P
3 DDIP1_1P DDIP1_1N DDIP1_1N_C DP1_1N/2P C_TX2_1N/2P USBC_TX2N USBC_TX2P 63
C5913 1 2 0.1U_10V_K_X5R_0201 43 15
3 DDIP1_1N DDIP1_0P DDIP1_0P_C DP1_1P/2N C_TX2_1P/2N USBC_RX1P USBC_TX2N 63
C5914 1 2 0.1U_10V_K_X5R_0201 36 16
3 DDIP1_0P DDIP1_0N DDIP1_0N_C DP0_1N/2P C_RX1_1N/2P USBC_RX1N USBC_RX1P 63
C5915 1 2 0.1U_10V_K_X5R_0201 35 17
3 DDIP1_0N DP0_1P/2N C_RX1_1P/2N USBC_TX1P USBC_RX1N 63
12
C_TX1_1N/2P USBC_TX1N USBC_TX1P 63
13
B C_TX1_1P/2N USBC_TX1N 63 B

DDIP1_AUXN C5916 1 2 0.1U_10V_K_X5R_0201 DDIP1_AUXN_C 2


3 DDIP1_AUXN DDIP1_AUXP DDIP1_AUXP_C AUX_N/MGPIO5
C5917 1 2 0.1U_10V_K_X5R_0201 1
3 DDIP1_AUXP AUX_P/MGPIO4
@ TP5901 1 MGPIO3 6 33 -PD_I2C_INT
SNK_PS_ACK H_DM/DCI_CLK/MGPIO3 SM_INT/GPIO4 -PD_I2C_INT 85
5
125 SNK_PS_ACK H_DP/DCI_DATA/MGPIO2 I2C_DATA_PD
31
SM_SDA/GPIO6 I2C_DATA_PD 85
SRC_PS_EN 27 32 I2C_CLK_PD
125 SRC_PS_EN
TYPEC_GPIO9 28
I2C_EN/GPIO10
RTS5455 SM_SCL/GPIO5 I2C_CLK_PD 85

I2C_INT/GPIO9

125 SRC_PS_FO SRC_PS_FO 29 24 U5901_REXT


I2C_SDA/GPIO8 REXT
-SNK_PS_EN 30 20 U5901_DB_CFG
125 -SNK_PS_EN I2C_SCL/GPIO7 DB_CFG
34
HPD/GPIO3 DDIP1_HPD 3

1
220P_50V_K_X7R_0402

220P_50V_K_X7R_0402

1/16W_100K_5%_0402
R5916 R5917

1
LOC_PWR_MON 23 1 1 1/16W_0_5%_0402 @ 1/16W_6.2K_1%_0402
LOC_PWR_MON

C5918

C5919

R5925
-SRC_PS_FLT 22 47
125 -SRC_PS_FLT

2
IMON E_PAD
VMON 21 2 2

2
VMON
1/16W_100K_5%_0402
1/16W_10K_1%_0402
1/16W_4.99K_1%_0402
1

1
R5910

R5911

R5912

RTS5455-GR_QFN46_6P5X4P5
SA00008DF00
2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 THUNDERBOLT PD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 59 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 PD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 60 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 TYPE-C MUX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 61 of 128

5 4 3 2 1

VInafix.com
A B C D E

1 1

2 2

BLANK

3 3

4 4

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 DOCKING CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 62 of 128


A B C D E

VInafix.com
5 4 3 2 1

VCC3_LDO_PD

1
C6301
1U_6.3V_K_X5R_0201
2

U6301
VCC3_LDO_PD
W=10 mil 10 W=10 mil
D VPWR D
USBC_SBU1 15 1 USBC_SBU1_CONN
59 USBC_SBU1 SBU1 C_SBU1
USBC_SBU2 14 2 USBC_SBU2_CONN
59 USBC_SBU2 SBU2 C_SBU2

1
USBC_CC1 12 4 USBC_CC1_CONN
59 USBC_CC1 CC1 C_CC1
USBC_CC2 11 5 USBC_CC2_CONN
59 USBC_CC2 CC2 C_CC2
R6302
20 7 1/20W_10K_5%_0201
20190122 Follow Spec D1 RPD_G1
19

2
Spec Indicate: D2
17 6
NC1 NC2 NC1 RPD_G2
16
Unused pin. NC2 U6301_9
Connect to Ground 9
U6301_3 FLT
3
VBIAS
8
GND1
13
GND2
0.1U_50V_K_X5R_0402

18
GND3
1

2 21
THERMAL_PAD
C6307

R6320
0_0201_SP
SN1710033RUKR_WQFN20_3X3
1 SA000093G00
2

USBC_SBU1_CONN R6318 1 2 1/20W_2M_5%_0201 L4707 EMC@


USBC_SBU2_CONN R6319 1 2 1/20W_2M_5%_0201 BLM18KG300TN1D_2P
1 2
USBC_VBUS20
L4706 EMC@
BLM18KG300TN1D_2P
1 2 USBC_VBUS20_CONN

1
1 2 2 2 D6315

1
EMC@ EMC@ EMC@ EMC@ UCLAMP2271P.TNT SGP1610N2
C4713 C4715 C4716 C4714 EMC_NS@
1000P_50V_K_X7R_0402 100P_50V_J_NPO_0402 100P_50V_J_NPO_0402 1000P_50V_K_X7R_0402
2 1 1 1 JUSBC1

2
21 17 USBC_CC2_CONN
Vbus4 CC2 USBC_CC1_CONN
16 5

2
Vbus3 CC1
9
Vbus2
4
Vbus1
USBC_USB2N_CONN 19
Dn2
18
Dp2
7
USBC_USB2P_CONN Dn1
6
Dp1
If D6315 change to asm, 34
USBC_RX2N_CONN GND14
please pay attention to 10 33
USBC_RX2P_CONN SSRXn2 GND13
11 32
the diodes voltage of the D6315 . SSRXp2 GND12
31
USBC_TX2N_CONN GND11
15 30
USBC_TX2P_CONN SSTXn2 GND10
C 14 29 C
SSTXp2 GND9
28
USBC_RX1N_CONN GND8
22 27
USBC_RX1P_CONN SSRXn1 GND7
23 26
SSRXp1 GND6
25
USBC_TX1N_CONN GND5
3 24
USBC_TX1P_CONN SSTXn1 GND4
2 13
SSTXp1 GND3
12
GND2
1
USBC_SBU2_CONN GND1
20
USBC_SBU1_CONN SBU2
8
SBU1

HIGHS_UB11126-A5A0B-1H
ME@
DC23300G700

TABLE of EMC TVS (D6301~D6314)


Vendor LCFC P/N Description
NXP SC400008300 S DIO_ESD PESD5V0H1BSF SOD962
FL6305 EMC@
USBC_USB2N_CONN 4 3 USBC_USB2N AMAZING SC400009F00 S DIO_ESD AZ5B6S-01B.R7G CSP0603P2Y
4 3 USBC_USB2N 10

USBC_USB2P_CONN 1 2 USBC_USB2P
1 2 USBC_USB2P 10
EXC24CH900U_4P

Co-Lay
AC Cap Close to U5901(PD)
D6301 EMC@ D6309 EMC@
B B
FL6301 EMC@
USBC_TX1N C6310 1 2 0.1U_10V_K_X7R_0402 USBC_TX1N_C 1 2 USBC_TX1N_CONN USBC_TX1N_C R6306 1 @ 2 1/16W_0_5%_0402 USBC_TX1N_CONN USBC_TX1P_CONN
1 2 2 1 USBC_RX1P_CONN
59 USBC_TX1N 1 2 1 2 2 1

USBC_TX1P C6311 1 2 0.1U_10V_K_X7R_0402 USBC_TX1P_C 4 3 USBC_TX1P_CONN USBC_TX1P_C R6307 1 @ 2 1/16W_0_5%_0402 USBC_TX1P_CONN PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2
59 USBC_TX1P 4 3
EXC24CH900U_4P D6302 EMC@ D6310 EMC@

USBC_TX1N_CONN
1 2 2 1 USBC_RX1N_CONN
1 2 2 1
FL6302 EMC@
USBC_TX2P C6308 1 2 0.1U_10V_K_X7R_0402 USBC_TX2P_C 4 3 USBC_TX2P_CONN USBC_TX2P_C R6308 1 @ 2 1/16W_0_5%_0402 USBC_TX2P_CONN
59 USBC_TX2P 4 3
PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2

USBC_TX2N C6309 1 2 0.1U_10V_K_X7R_0402 USBC_TX2N_C 1 2 USBC_TX2N_CONN USBC_TX2N_C R6309 1 @ 2 1/16W_0_5%_0402 USBC_TX2N_CONN D6303 EMC@ D6311 EMC@
59 USBC_TX2N 1 2
EXC24CH900U_4P USBC_CC2_CONN1 2 2 1 USBC_SBU1_CONN
1 2 2 1

FL6303 EMC@ PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2


USBC_RX1N C6312 1 2 0.33U_10V_K_X5R_0402 USBC_RX1N_C 4 3 USBC_RX1N_CONN USBC_RX1N_C R6310 1 @ 2 1/16W_0_5%_0402 USBC_RX1N_CONN
59 USBC_RX1N 4 3
D6304 EMC@ D6305 EMC@

USBC_RX1P C6313 1 2 0.33U_10V_K_X5R_0402 USBC_RX1P_C 1 2 USBC_RX1P_CONN USBC_RX1P_C R6311 1 @ 2 1/16W_0_5%_0402 USBC_RX1P_CONN USBC_USB2P_CONN
1 2 2 1 USBC_USB2N_CONN
59 USBC_RX1P 1 2 1 2 2 1
EXC24CH900U_4P
PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2

FL6304 EMC@ D6306 EMC@ D6312 EMC@


USBC_RX2P C6314 1 2 0.33U_10V_K_X5R_0402 USBC_RX2P_C 1 2 USBC_RX2P_CONN USBC_RX2P_C R6312 1 @ 2 1/16W_0_5%_0402 USBC_RX2P_CONN
59 USBC_RX2P 1 2 USBC_SBU2_CONN USBC_CC1_CONN
1 2 2 1
1 2 2 1
USBC_RX2N C6315 1 2 0.33U_10V_K_X5R_0402 USBC_RX2N_C 4 3 USBC_RX2N_CONN USBC_RX2N_C R6313 1 @ 2 1/16W_0_5%_0402 USBC_RX2N_CONN
59 USBC_RX2N 4 3
PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2
EXC24CH900U_4P
D6307 EMC@ D6313 EMC@
1/20W_220K_5%_0201

1/20W_220K_5%_0201

1/20W_220K_5%_0201

1/20W_220K_5%_0201

USBC_RX2N_CONN
1 2 2 1 USBC_TX2N_CONN
1 2 2 1
1

1
R9818

R9817

R9816

R9815

PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2

D6308 EMC@ D6314 EMC@


2

USBC_RX2P_CONN
1 2 2 1 USBC_TX2P_CONN
1 2 2 1

PESD5V0H1BSF_SOD962-2 PESD5V0H1BSF_SOD962-2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 TYPE-C CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 11, 2019 Sheet 63 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

VCC3B
VCC3B VCC3B

M.2 SSD(M TYPE)

2
R6401 R6402 R6404

For E-Series 0_0805_SP 1/20W_10K_5%_0201 1/20W_10K_5%_0201

1
JSSD1

-SSD_DTCT 1 2 VCC3B_SSD
85 -SSD_DTCT GND_1 3.3V_1
D 3 4 D
GND_2 3.3V_2
5 6 D6401
10 PCIE13_L3_RXN PERN3 N/C_2
7 8 -PLP_INT 2 1
10 PCIE13_L3_RXP PERP3 N/C_3 -PWRSW_EC 13,85
9 10
PCIE13_L3_TXN_CONN GND_3 DAS/DSS#/LED1#
C6401 1 2 0.22U_6.3V_K_X5R_0201 11 12 RB520CM-30T2R_VMN2M2
10 PCIE13_L3_TXN PCIE13_L3_TXP_CONN PETN3 3.3V_3
C6402 1 2 0.22U_6.3V_K_X5R_0201 13 14
10 PCIE13_L3_TXP PETP3 3.3V_4
15 16
GND_4 3.3V_5
17 18
10 PCIE13_L2_RXN PERN2 3.3V_6
19 20
10 PCIE13_L2_RXP PERP2 N/C_4
21 22
PCIE13_L2_TXN_CONN GND_5 N/C_5
C6403 1 2 0.22U_6.3V_K_X5R_0201 23 24
10 PCIE13_L2_TXN PCIE13_L2_TXP_CONN PETN2 N/C_6
C6404 1 2 0.22U_6.3V_K_X5R_0201 25 26 @ TP6401
10 PCIE13_L2_TXP PETP2 N/C_7
27 28 Test_Point_20MIL
GND_6 N/C_8
29 30 -PLP_FDBK 1
10 PCIE13_L1_RXN PERN1 N/C_9
31 32
10 PCIE13_L1_RXP PERP1 N/C_10
33 34
PCIE13_L1_TXN_CONN GND_7 N/C_11
C6405 1 2 0.22U_6.3V_K_X5R_0201 35 36
10 PCIE13_L1_TXN PCIE13_L1_TXP_CONN PETN1 N/C_12 SATA1_DEVSLP2
C6406 1 2 0.22U_6.3V_K_X5R_0201 37 38
10 PCIE13_L1_TXP PETP1 DEVSLP SATA1_DEVSLP2 10
39 40
GND_8 N/C_13
41 42
10 PCIE13_L0_SATA1_RXP PERN0/SATA-B+ N/C_14
43 44
10 PCIE13_L0_SATA1_RXN PERP0/SATA-B- N/C_15
45 46
PCIE13_L0_SATA1_TXN_CONN GND_9 N/C_16
C6407 1 2 0.22U_6.3V_K_X5R_0201 47 48
10 PCIE13_L0_SATA1_TXN PCIE13_L0_SATA1_TXP_CONN PETN0/SATA-A- N/C_17 -PLTRST_FAR
C6408 1 2 0.22U_6.3V_K_X5R_0201 49 50
10 PCIE13_L0_SATA1_TXP PETP0/SATA-A+ PERST# -CLKREQ_PCIE13 -PLTRST_FAR 13,37,66,73,85
51 52
-PCIE13_CLK_100M GND_10 CLKREQ# -CLKREQ_PCIE13 12
53 54
12 -PCIE13_CLK_100M PCIE13_CLK_100M REFCLKN PEWAKE#
55 56
12 PCIE13_CLK_100M REFCLKP N/C_18
57 58
GND_11 N/C_19
59 NC NC 60
61 NC NC 62
63 NC NC 64
65 NC NC 66
67 68
-SATA_DTCT N/C_1 SUSCLK
69 70
10 -SATA_DTCT M2_CARD_DET PEDET 3.3V_7
71 72
10 M2_CARD_DET GND_12 3.3V_8
73 74
GND_13 3.3V_9
C 75 C
GND_14
2 2
1

77 76
PEG1 PEG2
R6403 C6410 C6411
@ 1/20W_0_5%_0201 10U_6.3V_M_X5R_0402 0.01U_6.3V_K_X7R_0201_MURATA
ARGOS_NASM0-S6705-TSH4 1 1
ME@
2

SP070014G00

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 M.2 SOCKET 3 MODULE I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 64 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 PCIE RE-DRIVER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 65 of 128

5 4 3 2 1

VInafix.com
VCC3WLAN R6622 1 2 0_0402_SP
VCC3WLAN 128

VCC1R8_SUS VCC3M

KEY-E NGFF CCARD FOR WLAN


H=3.20mm Connector

1
VCC3WLAN

R6623 @ R6624
@ 1/20W_4.7K_5%_0201 1/20W_100K_5%_0201

2
1 1 1 1 1 1
C6605 C6606 RF@ C6607 RF@ C6608 C6609 C6610
10U_6.3V_M_X5R_0402 10U_6.3V_M_X5R_0402 100P_50V_J_NPO_0402 100P_50V_J_NPO_0402 0.1U_25V_K_X5R_0402 0.1U_25V_K_X5R_0402
2 2 2 2 2 2

3
@ D D
Q6301A 2 @ 5
G G -CNV_RF_RESET 9
VCC3B DMN65D8LDW-7_SOT363-6 Q6301B
DMN65D8LDW-7_SOT363-6
VCC3B S S

1
R6625

2
1/20W_75K_1%_0201
R6603
1/20W_10K_5%_0201
CNVi Reset is low active

2
JWLAN1
R6607
R6606
1/16W_49.9K_1%_0402

1
1 2 1/16W_49.9K_1%_0402 @ @
GND_1 3.3V_1
USBP10+ 3 4
10 USBP10+ USB_DP 3.3V_2
USBP10- 5 6

2
10 USBP10- USB_DN LED1_N
7 8
WGR_RXD1N GND_2 PCM_CLK -CNV_RF_RESET_R
9 10
11 WGR_RXD1N WGR_RXD1P WGR_D1N PCM_SYNC/RF_RESET_B
11 12
11 WGR_RXD1P WGR_D1P PCM_IN CNV_CLKREQ_R
13 14 R6626 1 2 0_0402_SP
WGR_RXD0N GND_3 PCM_OUT/CLKREQ0
15 16
11 WGR_RXD0N WGR_RXD0P WGR_D0N LED2_N
17 18
11 WGR_RXD0P WGR_D0P GND_4
19 20
WGR_RXCN GND_5 UART_WAKE_N BRI_RSP_CNVI_R BRI_RSP_CNVI
21 22 R6608 1 2 1/20W_22_5%_0201 VCC1R8_SUS VCC3M
11 WGR_RXCN WGR_RXCP WGR_CLKN UART_RX/BRI_RSP R6609 1 UART_RX BRI_RSP_CNVI 8
23 @ 2 1/16W_0_5%_0402 UART_RX 8,84
11 WGR_RXCP WGR_CLKP NC 24
PU +3VALW, To EC 25 NC NC 26 R6610 1 @ 2 1/16W_0_5%_0402 UART_TX
UART_TX 8,84
PU +3VALW, To PCH PCIE_WAKE# 20190226 27 NC NC 28
29 NC NC 30

1
Intel Design suggestion 31 NC 32 RGI_DT_CNVI_R R6611 1 2 1/20W_22_5%_0201 RGI_DT_CNVI
no need capacitor,C6601、C6602 UART_TX_RGI_DT RGI_RSP_CNVI_R RGI_RSP_CNVI RGI_DT_CNVI 8
、 33 34 R6612 1 2 1/20W_22_5%_0201
PCIE10_TXP change to 0 ohme GND_6 UART_CTS/RGI_RSP BRI_DT_CNVI_R BRI_DT_CNVI RGI_RSP_CNVI 8
10 PCIE10_TXP 35 36 R6613 1 2 1/20W_22_5%_0201 R6627 @ R6628
PCIE10_TXN PETP0 UART_CTS/BRI_DT -CL_RST_WLAN BRI_DT_CNVI 8
37 38 @ 1/20W_4.7K_5%_0201 1/20W_100K_5%_0201
10 PCIE10_TXN PETN0 CLINK_RESET CL_DATA_WLAN -CL_RST_WLAN 7
39 40
CL_DATA_WLAN 7

2
PCIE10_RXP PCIE10_RXP_C GND_7 CLINK_DATA CL_CLK_WLAN
R6642 1 2 0_0201_SP 41 42
10 PCIE10_RXP PCIE10_RXN PCIE10_RXN_C PERP0 CLINK_CLK 20190226 For Intel Design suggestion CL_CLK_WLAN 7
R6643 1 2 0_0201_SP 43 44
10 PCIE10_RXN PERN0 COEX3 R6611 R6613 33 to 22 Ohm
45 46
PCIE10_CLK_100M GND_8 COEX2
47 48
12 PCIE10_CLK_100M -PCIE10_CLK_100M REFCLKP0 COEX1 SUSCLK_32K_R SUSCLK_32K
49 50 R6614 1 2 1/16W_33_5%_0402
12 -PCIE10_CLK_100M REFCLKN0 SUSCLK PRERST0_N -PLTRST_FAR SUSCLK_32K 12
51 52 R6615 1 2 1/16W_0_5%_0402
-PLTRST_FAR 13,37,64,73,85
-CLKREQ_PCIE10 53 GND_9 PERST0_N
54 BDC_ON_R R6638 1 @ 2 1/16W_0_5%_0402 @ Q6302B
12 -CLKREQ_PCIE10 CLKREQ0_N W_DISABLE2_N WLAN_RST 85

3
-EC_WLAN_WAKE R6604 1 2 0_0402_SP -WLAN_WAKE 55 56 -WLAN_RF_KILL @ D D DMN65D8LDW-7_SOT363-6
-PCIE_WAKE PEWAKE0_N W_DISABLE1_N -WLAN_RF_KILL 8
R6605 1 @ 2 1/16W_0_5%_0402 57 58 Q6302A 2 5
13 -PCIE_WAKE WGR_TXD1N GND_10 A4WP_I2C_DATA G G CNV_CLKREQ 9
59 60 BOM SELECTION FOR 1 DMN65D8LDW-7_SOT363-6
11 WGR_TXD1N WGR_TXD1P WP_D1N A4WP_I2C_CLK CNV_REFCLK
61 62 R6616 1 2 0_0402_SP
11 WGR_TXD1P WP_D1P A4WP_IRQ_N REFCLK0_CNVI_R EC_TX CNV_REFCLK 12 S S
63 64 R6617 1 @ 2 1/16W_100_1%_0402
EC_TX 85

4
GND_11 REFCLK0

1
WGR_TXD0N 65 66 R6619 1 2
11 WGR_TXD0N WGR_TXD0P WP_D0N PERST1_N
67 68 0_0201_SP
11 WGR_TXD0P WP_D0P CLKREQ1_N

1
69 70 R6618 1 2 0_0402_SP BDC_ON @ R6629
WGR_TXDCN GND_12 PEWAKE1_N BDC_ON 10
71 72 R6620 1/20W_71.5K_1%_0201
11 WGR_TXDCN WGR_TXDCP WT_CLKN 3.3V_3 EC_RX
73 74 @ 1/16W_100K_5%_0402 R6621 1 @ 2 1/16W_100_1%_0402 EC_RX 85
11 WGR_TXDCP

2
WT_CLKP 3.3V_4
75
GND_13

2
2

77 76
GND15 GND14
R6641
@ 1/20W_10K_5%_0201
VCC3B ARGOS_NASE0-S6705-TSH4
ME@
1

R6601 1 @ 2 1/16W_10K_5%_0402 -EC_WLAN_WAKE SP07001AL00 CNVi PU VCC1R8_SUS

VCC3M VCC3WLAN

R6602 1 2 1/16W_4.7K_5%_0402 WLAN_RST R6640 2 @ 1 1/16W_10K_5%_0402 BRI_RSP_CNVI R6633 1 @ 2 1/16W_20K_5%_0402 CNV_REFCLK


RGI_RSP_CNVI R6634 1 @ 2 1/16W_20K_5%_0402
BDC_ON R6630 2 @ 1 1/16W_10K_5%_0402 BRI_DT_CNVI R6635 1 @ 2 1/16W_4.7K_5%_0402 1

1
RGI_DT_CNVI R6636 1 2 1/16W_20K_5%_0402 RF_NS@
-WLAN_RF_KILL R6631 2 @ 1 1/16W_10K_5%_0402 C6603
R6637 1 @ 2 1/16W_100K_5%_0402 R6639 33P_50V_J_NPO_0402
VCC3B 1/16W_10K_5%_0402 2

2
R6632 2 @ 1 1/16W_10K_5%_0402
GPP_F6/CNV_RGI_DT
TABLE of WLAN(JWLAN1)
Vendor P/N LCFC P/N UART_TX / RGI_D
20K ohms PU 1.8v close to M.2
TE TE_1-2199119-1_75P-T SP021703091 serial resistor close to PCH
Don’ t put any PD resistor?

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 WLAN NGFF CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 66 of 128

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 M.2 SOCKET 2 MODULE I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 67 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 DDI DEMUX/HDMI LEVEL SHIFTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 68 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

R6911 1 @ 2 1/16W_0_5%_0402

USB POWER SWITCH USB DCI


C6906 1 2 0.1U_6.3V_K_X5R_0201_MURATA USB3P4_TXP_C 1
FL6901
2 USB3P4_TXP_CONN
10 USB3P4_TXP 1 2

C6907 1 2 0.1U_6.3V_K_X5R_0201_MURATA USB3P4_TXN_C 4 3 USB3P4_TXN_CONN


10 USB3P4_TXN 4 3
EXC24CH900U_4P
USB_PWR_S1
EMC@
VCC5M

W=80mils U6901 W=80mils 1 2


5 1 R6917 @ 1/16W_0_5%_0402
IN OUT

1 2
GND
D C6912 USB_ON1 4 3 -USB_PORT4_OC2 R6918 1 @ 2 1/16W_0_5%_0402 D
73,85 USB_ON1 ENB OCB -USB_PORT4_OC2 10
0.1U_10V_K_X7R_0402
2 SY6288D20AAC_SOT23-5
SA000074Q00
FL6902
1 2 USB3P4_RXP_CONN
10 USB3P4_RXP 1 2

4 3 USB3P4_RXN_CONN
TABLE of POWER SWITCH (U6901) 10 USB3P4_RXN 4 3
EXC24CH900U_4P
Vendor LCFC P/N Description EMC@
SILERGY SA000074Q00 S IC SY6288D20AAC SOT23 5P POWER SWITCH 1 2
R6922 @ 1/16W_0_5%_0402
GMT SA000079400 S IC G517F2T11U SOT-23 5P POWER SWITCH

TABLE of Organic Capacitor (C6905)


Vendor LCFC P/N Description
PANASONIC SGA00007U00 S POLY C 150U 6.3V M B15G R35M TPG H1.4
D6902 AZ1045-04F_DFN2510P10E-10-9 NECTOKIN SGA00009W00 S POLY C 150U 6.3V M B15G R35M PSL H1.4
KEMTE SGA0000AN00 S POLY C 150U 6.3V M B15G R35M T520 H1.5
USB3P4_TXP_CONN 9 1 USB3P4_TXP_CONN
USB3P4_TXN_CONN 8 2 USB3P4_TXN_CONN FL6904
USB3P4_RXP_CONN 7 4 USB3P4_RXP_CONN USBP4- 1 2 USBP4-_CONN USB_PWR_S1 PLACE NEAR USB CONN
USB3P4_RXN_CONN USB3P4_RXN_CONN 10 USBP4- 1 2
6 5

0.1U_6.3V_K_X5R_0201_MURATA
USBP4+ 4 3 USBP4+_CONN
10 USBP4+ 4 3

470P_50V_K_X7R_0402
EXC24CH900U_4P 1
EMC@ EMC@ 2 1
3

EMC@
+

C6903

C6904
C6905
@ 150U_B15G_6.3VM_R35M
SGA00007U00
1 2 2

C C

D6901
USBP4-_CONN 1 6 USBP4+_CONN JUSB2 ME@
1 4
USBP4-_CONN VBUS PGND
2 7
USBP4+_CONN D- GND1
3 10
USB3P4_RXN_CONN D+ GND2
2 5 5 11
USB3P4_RXP_CONN SSRX- GND3
6 12
USB3P4_TXN_CONN SSRX+ GND4
8 13
USB3P4_TXP_CONN SSTX- GND5
9
SSTX+
3 4
SINGA_2UB2306-006111F
CM1293A-04SO_SC-74-6 DC011811080
EMC@

R6927 1 @ 2 1/16W_0_5%_0402

USB AOU 10 USB3P3_TXP


USB3P3_TXP C6909 1 2 0.1U_10V_K_X7R_0402 USB3P3_TXP_C 1
FL6903
1 2
2 USB3P3_TXP_CONN

USB3P3_TXN C6908 1 2 0.1U_10V_K_X7R_0402 USB3P3_TXN_C 4 3 USB3P3_TXN_CONN


10 USB3P3_TXN 4 3
EXC24CH900U_4P
EMC@
1 2
R6928 @ 1/16W_0_5%_0402

VCC5M USB_PWR_S2
R6929 1 @ 21/16W_0_5%_0402
Current Limit Target:
2.3A(2.1-2.45A)
FL6905
U6902 USB3P3_RXP 1 2 USB3P3_RXP_CONN
10 USB3P3_RXP 1 2
1 12
IN OUT USBP3+_AOU
10
DP_IN USBP3-_AOU USB3P3_RXN USB3P3_RXN_CONN
B USBP3+ 3 11 4 3 B
10 USBP3+ DP_OUT DM_IN 10 USB3P3_RXN 4 3
USBP3- 2 14
10 USBP3- DM_OUT GND
EXC24CH900U_4P
EMC@
9 -AOU_IFLG -AOU_IFLG 85
STATUS#
1 2
4 R6930 @ 1/16W_0_5%_0402
-USB_PORT3_OC3 ILIM_SEL
13
10 -USB_PORT3_OC3 USB_ON2 FAULT#
85 USB_ON2 5
EN U6901_ILIM_LO
15 R6925 1 @ 2 1/16W_2.7M_5%_0402 FL6906
AOU_SEL1 ILIM_LO U6901_ILIM_HI USBP3-_AOU USBP3-_CONN
85 AOU_SEL1 6 16 R6926 1 2 1/16W_22.1K_1%_0402 1 2
CLT1 ILIM_HI 1 2
7
AOU_SEL2 CLT2
85 AOU_SEL2 8 17
CLT3 GND_Pad USBP3+_AOU USBP3+_CONN
1 4 3
4 3
SN1702001RTER_WQFN16_3X3
C6901 @ EXC24CH900U_4P
0.1U_10V_K_X7R_0402 TI SN1702001RTER EMC@
2 SA00008HF00

D6904 AZ1045-04F_DFN2510P10E-10-9 TABLE of Organic Capacitor (C6911)


Vendor LCFC P/N Description
USB3P3_RXN_CONN 9 1 USB3P3_RXN_CONN PANASONIC SGA00007U00 S POLY C 150U 6.3V M B15G R35M TPG H1.4
USB3P3_RXP_CONN 8 2 USB3P3_RXP_CONN
USB3P3_TXN_CONN 7 4 USB3P3_TXN_CONN NECTOKIN SGA00009W00 S POLY C 150U 6.3V M B15G R35M PSL H1.4
TABLE of POWER SWITCH (U6902) USB3P3_TXP_CONN 6 5 USB3P3_TXP_CONN
KEMTE SGA0000AN00 S POLY C 150U 6.3V M B15G R35M T520 H1.5
Vendor LCFC P/N Description
USB_PWR_S2
TI SA00008HF00 S IC SN1702001RTER WQFN 16P USB CHARGING
EMC@
DIODES SA00009D800 S IC PI5USB2546HZHEX TQFN 16P CONTROLLER
3

1
1
C6910 + C6911
CLT1 CLT2 CLT3 ILIM_SEL MOD 470P_50V_K_X7R_0402 150U_B15G_6.3VM_R35M
SGA00007U00
2 2
0 0 0 X DCH OUT held low

D6903
1 1 1 1 CDP Data Connected and Port Power Mgt. Function Active USBP3+_CONN 1 6 USBP3-_CONN
* USB_PWR_S2
A
* 1 1 1 0 SDP2 Data Connected
2 5 1
JUSB3 ME@
4
A

USBP3-_CONN VBUS PGND


2 7
* 1 1 0 X SDP1 Data Connected USBP3+_CONN
USB3P3_RXN_CONN
3
5
D-
D+
GND1
GND2
10
11
USB3P3_RXP_CONN SSRX- GND3
3 4 6 12
* 0 1 0 X SDP1 Data Connected
CM1293A-04SO_SC-74-6
USB3P3_TXN_CONN
USB3P3_TXP_CONN
8
9
SSRX+
SSTX-
GND4
GND5
13
SSTX+
EMC@
1 0 0 X DCP_Short Device Forced to stay in DCP BC 1.2 charging mode SINGA_2UB2306-006111F
DC011811080

1 0 1 X DCP_Divider Device Forced to stay in DCP Divider 1 Charging Mode


Security Classification LC Future Center Secret Data Title
0 1 1 X DCP_Auto Data Disconnected and Port Power Mgt. Function Active
* Issued Date 2015/01/12 Deciphered Date 2016/01/12 USB TYPE-A CONNECTOR
X THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
0 0 1 DCP_Auto Data Disconnected and Power Wake Function Active AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 69 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 USB TYPE-A CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 70 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 USB3.0 RE-DRIVER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 71 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 SMART CARD READER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 72 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

IO_40_Pin conn
FPR_RESET_CONN VCC3B VCC3SW VCC3B VCC3LAN VCC5M

1
0_0402_SP
D
SB000019400

R7308
D
FPR_RESET 2 D
L2N7002KWT1G_SOT323-3

1/20W_10K_5%_0201
G

1
Q7301
S

2
@ R7309 JIOB1

1/20W_10K_5%_0201
W=80mil 1
1

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201
2

2
2

1
R7306
3
3

R7305

R7304

R7303
4
4
@ @ @ 5
5
6

2
6
7

2
7
8
8
9
9
10
FPR_RESET FPR_RESET_CONN 10
R7301 1 2 0_0201_SP 11
8,85 FPR_RESET -PLTRST_FAR 11
12
13,37,64,66,85 -PLTRST_FAR 12
85 -LANWAKE -LANWAKE 13
-CLKREQ_PCIE9 13
12 -CLKREQ_PCIE9 14
FPR_GREEN_LED 14
-CLKREQ_PCIE8 For LAN 15
85 FPR_GREEN_LED -LED_PWR 15
16
85 -LED_PWR 16
51,85 -PWRSWITCH -PWRSWITCH 17
USB_ON1 17
18
69,85 USB_ON1 -USB_PORT5_OC0 18
19
10 -USB_PORT5_OC0 -LID_CLOSE 19
20
8,51,85,89 -LID_CLOSE 20
21
TBT_USB5P 21
22
USB2.0 10
10
TBT_USB5P
TBT_USB5N
TBT_USB5N 23
24
22
23
PCIE9_RXN 24
25
10 PCIE9_RXN PCIE9_RXP 25
26
10 PCIE9_RXP 26
27
PCIE9_TXN 27
28
GBE LAN PHY 10
10
PCIE9_TXN
PCIE9_TXP
PCIE9_TXP 29
30
28
29
PCIE9_CLK_100M 30
31
12 PCIE9_CLK_100M -PCIE9_CLK_100M 31
12 -PCIE9_CLK_100M 32
32
C 33 C
33
USBP9+ 34
10 USBP9+ 34
USBP9- 35
Finger Printer 10 USBP9-
FPR_PWR_SHIELD
36
37
35
36
85 FPR_PWR_SHIELD 37
38
38
39 41
39 GND1

1
40 42
40 GND2
R7302
1/20W_10K_5%_0201 @ HIGHS_FC5AF401-3181H
ME@
SP01001UC00

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 GBE JACKSONVILLE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 73 of 128


5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 LAN SWITCH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 74 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 LAN MAGNFTICS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 75 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 MEDIA CONTROLLER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 76 of 128

5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 MEDIA CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 77 of 128


5 4 3 2 1

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5 4 3 2 1

VCC3B VCC3B_CODEC

R7804 1 2 0_0603_SP
Close to Pin13,16 Close to Pin3
VCC5B_CODEC

+VDD_HDA
VCC5B

R7805 1 2 0_0603_SP
VCC5B_CODEC
HeadPhone/LINE OUT
VCC3M +VDD_HDA
1
+MICBIASB
1 1 C7819
1

1
1U_6.3V_K_X6S_0402 R7803 1 2 0_0402_SP

2
C7805 C7801 C7806 C7808 2
D 10U_6.3V_M_X5R_0603_YAGEO 10U_6.3V_M_X5R_0603_YAGEO 0.1U_10V_K_X7R_0402 0.1U_10V_K_X7R_0402 R7813 R7814 D
2

2
2 2 R7821 1/16W_3K_5%_0402 1/16W_3K_5%_0402
1/20W_10K_5%_0201
VCC3B 1 @ 2

1
VCC1R8_SUS L2N7002KWT1G_SOT323-3 VCC1R8_SUS_CODEC HP_L_JACK_R R7801 1 2 1/16W_51_1%_0402 HP_L_JACK
HP_L_JACK 84

2
SB000019400

G
Q7801 R7807 C7827
@ 1/16W_100_5%_0402 10U_6.3V_M_X5R_0603_YAGEO
PORTB_L 1 2 1 2
Please Close to Pin9 1 3
Close to Pin7 Close to Pin29

S
VCC3B_CODEC
R7806 1 2 0_0402_SP HP_R_JACK_R R7802 1 2 1/16W_51_1%_0402 HP_R_JACK
VCC5M HP_R_JACK 84
R7808 C7828
VCC3B_CODEC 1/16W_100_5%_0402 10U_6.3V_M_X5R_0603_YAGEO
1 PORTB_R 1 2 1 2
VCC1R8_SUS_CODEC
1 C7807
1 1 0.1U_10V_K_X7R_0402
C7804 2
C7803 C7802 0.1U_10V_K_X7R_0402 1 1
2.2U_6.3V_M_X5R_0402 0.1U_10V_K_X7R_0402 2
2 2 C7814 C7813
2.2U_6.3V_M_X5R_0402 0.1U_10V_K_X7R_0402 1
2 2
C7816
1U_6.3V_K_X6S_0402
2

AGND
VCC3B_CODEC VCC3B_CODEC
VCC1R8_SUS_CODEC
1
+VDD_HDA C7818
C C
1

1
1U_6.3V_K_X6S_0402 VCC5M
R7812 C7815 2
1/16W_47K_5%_0402 0.47U_25V_M_X5R_0201

2
D7801 AGND 1 1
RB751VM-40TE-17_UMD2M2
2

SCS00008K00 C7810 C7809

1
AGND 2.2U_6.3V_M_X5R_0402 0.1U_10V_K_X7R_0402
-SPK_MUTE 1 2 2 2 R7820 VCC5B_CODEC

39

38

37

28

27
85 -SPK_MUTE

9
U7801 0_0201_SP

LDO_V12

HDA_VDDIO

DVDD_IO

VDD18

LDO_AVDD

VREFP

VREF_DAC
-HDA_RST 2 18
9 -HDA_RST

2
RESET# CP_VDD18
HDA_BCLK R7809 1 2 0_0201_SP HDA_BCLK_R 40 21 2.2U_6.3V_M_X5R_0402 1 2 C7821
9 HDA_BCLK BCLK CP_VNEG
HDA_SYNC 41 22 2.2U_6.3V_M_X5R_0402 1 2 C7822
9 HDA_SYNC SYNC CP_VPOS
HDA_SDIN0 R7811 1 2 1/16W_33_5%_0402 HDA_SDIN0_R 42 29 AVDD5
9 HDA_SDIN0 SDI AVDD5
HDA_SDO 1 13
9 HDA_SDO SDO PVDD5_LEFT
BEEP_MIX_ATT 36 16
83 BEEP_MIX_ATT PCBEEP PVDD5_RIGHT
-SPK_MUTE_D 7
SPKR_MUTE#/SPDIF/GPIO1 SP_OUTL+
12
SENSE_A PORTG_LEFT+ SP_OUTL+ 82
35
80 SENSE_A JSENSE SP_OUTL-
14
PORTG_LEFT- SP_OUTL- 82
6 17 SP_OUTR+
MUSIC_REQ/SPDIF/GPIO0 PORTG_RIGHT+ SP_OUTR+ 82
15 SP_OUTR-
DMIC_CLK0 DMIC_CLK0_R PORTG_RIGHT- SP_OUTR- 82
R7810 1 EMC@ 2 1/16W_33_5%_0402 10
51 DMIC_CLK0 PORTC_DMIC_CLK1/GPIO2

1/16W_15_5%_0402

1/16W_15_5%_0402

1/16W_15_5%_0402

1/16W_15_5%_0402
32 +MICBIASB
DMIC_DATA0 MICBIASB
8
51 DMIC_DATA0 PORTC_DMIC_DATA1/GPIO3

1
1 W= 80mils 34 PORTB_R
+VDD_HDA PORTB_R

R7816

R7817

R7818

R7819
EMC_NS@ 4
TEST1 PORTB_L
C7830 33 Apple --> EXT_MIC_A, HGNDB
680P_50V_K_X7R_0402 PORTB_L Nokia --> EXT_MIC_B, HGNDA
B R7815 1 2 1/16W_10K_5%_0402 5 B
2 TEST2 MIC_RING2_CODEC
31
MIC_RING2_CODEC 81

SP_OUTR+_R 2

SP_OUTL+_R 2
PORTD_B
C7812 1 2 2.2U_6.3V_M_X5R_0402FLY_P 19 30 MIC_SLEEVE_CODEC
CP_FLY_P PORTD_A MIC_SLEEVE_CODEC 81

SP_OUTR-_R

SP_OUTL-_R
FLY_N 20 26 MIC_SLEEVE
CP_FLY_N HGNDB MIC_SLEEVE 79,81

220P_50V_K_X7R_0402

220P_50V_K_X7R_0402

220P_50V_K_X7R_0402

220P_50V_K_X7R_0402
25 MIC_RING2
HGNDA MIC_RING2 79,81
11
EAPD HP_R_JACK_R
24
PORTA_R HP_L_JACK_R
43 23
EP PORTA_L

W= 300mils C7837 1 1 1 1

C7833

C7834

C7836

C7835
0.1U_10V_K_X7R_0402 CX11880-11Z_QFN42_5X5
EMC@ SA00009AW00
1 2
2 2 2 2
C7838
0.1U_10V_K_X7R_0402 EMI filter for Class D output signals
EMC_NS@
1 2 Close to Codex
C7839
0.1U_10V_K_X7R_0402
EMC_NS@
1 2

AGND

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CODEC-CX11880
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 78 of 128


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5 4 3 2 1

NEAR AUDIO CONN


C7908
0.1U_10V_K_X7R_0402
EMC@
1 2

C7907
1U_6.3V_K_X5R_0402_MURATA
EMC@
D 1 2 D
WIDE PATTERN

AGND

JHP1 ME@ MIC_RING2_CONN R7901 1 EMC@ 2 1/10W_0_5%_0603 MIC_RING2


6
6 MIC_SLEEVE_CONN MIC_SLEEVE MIC_RING2 78,81
D7906 1 2 MMZ1608Y102BTA00_2P
MIC_SLEEVE 78,81
5
5 HP_L_JACK_CONN
HP_R_JACK_CONN HP_L_JACK_CONN 84
2
2 HP_JACK_IN HP_R_JACK_CONN 84
HP_JACK_IN 80
7
7
1
1
3
3

3300P_50V_K_X7R_0402

3300P_50V_K_X7R_0402

100P_50V_J_NPO_0402

100P_50V_J_NPO_0402

100P_50V_J_NPO_0402

100P_50V_J_NPO_0402
4 1 1 1 1 1 1
4
EMC@ EMC@ EMC_NS@ EMC_NS@ EMC@ EMC@
SINGA_2SJ3092-003111F C7903 C7904 C7905 C7906 C7901 C7902
2 2 2 2 2 2
DC23000AT00 AGND

C C

GND GND

MIC_RING2_CONN MIC_SLEEVE_CONN HP_R_JACK_CONN HP_L_JACK_CONN HP_JACK_IN

AOZ8231ADI-03_DFN1P0X0P6-2

AOZ8231ADI-03_DFN1P0X0P6-2

AOZ8231ADI-03_DFN1P0X0P6-2

AOZ8231ADI-03_DFN1P0X0P6-2

AOZ8231ADI-03_DFN1P0X0P6-2
1

1
1

1
EMC@ EMC@ EMC@ EMC@ EMC@
D7901 D7902 D7903 D7904 D7905

2
2

2
GND GND GND GND GND

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 AUDIO CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 79 of 128


5 4 3 2 1

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2 1

VCC1R8_SUS VCC1R8_SUS 16,50,66,78,85,116

VCC1R8_SUS

B B

1
R8004
1/16W_1K_1%_0402

2
VCC3B

SENSE_A_R R8003 1 2 1/16W_2.49K_1%_0402 SENSE_A


SENSE_A 78

2
R8001
1/20W_10K_5%_0201

3
Q8001

HP_JACK_IN 1 LSK3541G1ET2L_VMT3
79 HP_JACK_IN

2
AGND

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 AUDIO JACK SENSE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 80 of 128

2 1

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5 4 3 2 1

D D

Apple --> EXT_MIC_A, HGNDB


EXT. MIC/LINE IN Nokia --> EXT_MIC_B, HGNDA

MIC_SLEEVE_CODEC R8101 1 2 1/16W_100_5%_0402 EXT_MIC_A_R C8101 1 2 2.2U_6.3V_K_X5R_0402_YAGEO MIC_SLEEVE


C 78 MIC_SLEEVE_CODEC MIC_SLEEVE 78,79 C

MIC_RING2_CODEC R8102 1 2 1/16W_100_5%_0402 EXT_MIC_B_R C8102 1 2 2.2U_6.3V_K_X5R_0402_YAGEO MIC_RING2


78 MIC_RING2_CODEC MIC_RING2 78,79

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 AUDIO EXT MIC I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 81 of 128


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5 4 3 2 1

SPK CONN.
D D

JSPK1 ME@
SP_OUTR+ EMC@ FL8201 1 2 BLM18PG221SN1D_2P SP_OUTR+_L 1
78 SP_OUTR+ SP_OUTR- SP_OUTR-_L 1
EMC@ FL8202 1 2 BLM18PG221SN1D_2P 2
78 SP_OUTR- SP_OUTL+ SP_OUTL+_L 2
EMC@ FL8203 1 2 BLM18PG221SN1D_2P 3 5
78 SP_OUTL+ 3 GND1
SP_OUTL- EMC@ FL8204 1 2 BLM18PG221SN1D_2P SP_OUTL-_L 4 6
78 SP_OUTL- 4 GND2
CVILU_CI4304M1HR0-NH
SP011811080

C C

EMC@ C8201 1 2 1000P_50V_K_X7R_0402 SP_OUTL-_L

EMC@ C8202 1 2 1000P_50V_K_X7R_0402 SP_OUTL+_L

EMC@ C8203 1 2 1000P_50V_K_X7R_0402 SP_OUTR-_L

EMC@ C8204 1 2 1000P_50V_K_X7R_0402 SP_OUTR+_L

EMI parts Close to connector

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 AUDIO JACK SENSE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 82 of 128

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5 4 3 2 1

D
Audio Beep D

R8303 C8301
EC_SPKR 2 1 1 2
85 EC_SPKR
1/16W_4.7K_5%_0402 0.1U_10V_K_X7R_0402

R8304 C8302
PCH_SPKR 2 1 1 2 8301
9 PCH_SPKR
1/16W_4.7K_5%_0402 0.1U_10V_K_X7R_0402
C C

1
R8302
@ 1/20W_10K_5%_0201

2
BEEP_MIX_ATT
BEEP_MIX_ATT 78

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 AUDIO BEEP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 83 of 128

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5 4 3 2 1

Audio Debug Function P.40


EC IT8227E
UART_EN

D D
P.10
PCH UART
UART2_TX SW@
UART2_RX
P.41
U4101 P.52
SW@ TS5USBA224RSWR
R4106
R4107 Audio Jack
P.50 P.51
Codec Head Phone/ R4105
USB/AUDIO SWITCH
HP_OUTR Line Out R4108
HP_OUTL

AUDIO@
R5124
R5125

VCC3M VCC3M VCC5M

C C

1
R8405 R8406
@ 1/20W_10K_5%_0201 @ 1/20W_10K_5%_0201

2
UART_EN @
85 UART_EN
U8401
HP_R_JACK_CONN R8403 1 @ 2 1/20W_0_5%_0201 HP_R_JACK_SW 9 1 UART_RX
79 HP_R_JACK_CONN VBUS D- UART_RX 8,66
7 10 UART_TX
D+/R D+ UART_TX 8,66
HP_L_JACK_CONN R8404 1 @ 2 1/20W_0_5%_0201 HP_L_JACK_SW 6 5
79 HP_L_JACK_CONN D-/L VAUDIO
8 2 HP_R_JACK_R_SW R8407 1 @ 2 1/20W_0_5%_0201 HP_R_JACK
ASEL R HP_L_JACK_R_SW R8408 1 HP_R_JACK 78
4 3 @ 2 1/20W_0_5%_0201 HP_L_JACK
GND L HP_L_JACK 78
TS5USBA224_UQFN10_1P8X1P4
SA00007RR00

TABLE: Co-Lay
Mode Audio UART
AUDIO DEBUG PORT
HP_R_JACK_CONN R8409 1 2 0_0201_SP HP_R_JACK_L_RR R8401 1 2 0_0201_SP HP_R_JACK

B
UART_EN L H HP_L_JACK_CONN HP_L_JACK_L_RR HP_L_JACK B
R8410 1 2 0_0201_SP R8402 1 2 0_0201_SP

TABLE:

Part Name For NPI For MP

U4101 SW@ ASM NA


R4102 SW@ ASM NA
R4106 SW@ ASM NA
R4107 SW@ ASM NA
R5014 SW@ ASM NA
R5015 SW@ ASM NA
R4105 AUDIO@ NA ASM
R4108 AUDIO@ NA ASM

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 AUDIO DEBUG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 84 of 128


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5 4 3 2 1

VCC3SW_EC
For ESPI and LPC interface VCC3SW VCC3SW_EC VCC3SW_AVCC
VCC3B VCC1R8_SUS -PWRSW_EC 1 TP8501 @
All capacitors close to EC
R8501 L8501 SENSE6 1 TP8502 @
0_0603_SP BLM18PG121SN1D_2P
1 2 1 2 SENSE7 1 TP8503 @
1 1 1 1 1 1
1 1 @ @ SENSE7 1 TP8504 @
@ C8503 C8504 C8505 C8506 C8507 C8508
R8502 1 2 1/16W_10K_5%_0402 C8501 C8502 0.1U_25V_K_X5R_0402 0.1U_25V_K_X5R_0402 0.1U_25V_K_X5R_0402 0.1U_25V_K_X5R_0402 0.1U_25V_K_X5R_0402 0.1U_25V_K_X5R_0402 VCC3M
1000P_50V_K_X7R_0402 0.1U_25V_K_X5R_0402 2 2 2 2 2 2
2 2

1
R8503 1 2 1/16W_10K_5%_0402 -LPC_FRAME
R8538
1/20W_10K_1%_0201
EC_AGND
R8539

2
D D
1/20W_15K_1%_0201
-TEMBER_DETECT 1 2
-HDD_DTCT 96
R8504 2 1 0_0402_SP -PLTRST_FAR_EC VCC3_SUS_SPI
13,37,64,66,73 -PLTRST_FAR
VCC3B VCC1R8_SUS VCC1R8_SUS VCC3SW_AVCC VCC3SW_EC R8540
R8508 1/20W_33K_1%_0201
@ 1/16W_0_5%_0402 1 2
-SSD_DTCT 64
R8505 2 1 1/16W_0_5%_0402 1 @ 2
7 -SUS_STAT
R8509
0_0402_SP
1 2 R8562
Close to CPU R8506 minimum trace width 12 mil 1/16W_51K_+-1%_0402
1/16W_0_5%_0402 1 2
VCC3M 1 @ 2 VCC3SW_EC Close to EC -KBD_BL_DTCT 88

UEC1A_FSPI
R8507 C8509 20160127

UEC1A_VCC
1

0_0402_SP 0.1U_25V_K_X5R_0402
R8570 1 2 +VCOREVCC 1 2
1. Add TEMBER_DETECT# circuit
1/20W_10K_1%_0201 2. Change Resistor value
Un-stuff if not necessary.
RT1
2

114
121

106

127
THERMISTOR_CPU 1 2 UEC1A -PROCHOT

11

26
50
92

74

12
6,102,108 -PROCHOT

1
D

VSTBY_FSPI

VCORE
VCC

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5

AVCC

VSTBY(PLL)
PANAS_ERTJ0EG103FA LPC_AD0 10 24 LED_LOGO PROCHOT_EC 2 Q8501
7 LPC_AD0 EIO0/LAD0/GPM0(3) PWM0/GPA0 LED_LOGO 51
LPC_AD1 9 25 KBD_BL_PWM G L2N7002KWT1G_SOT323-3 1
7 LPC_AD1 EIO1/LAD1/GPM1(3) PWM1/GPA1 KBD_BL_PWM 88

2
LPC_AD2 8 PWM 28 M_ON2 SB000019400
7 LPC_AD2 LPC_AD3 EIO2/LAD2/GPM2(3) PWM2/GPA2 -LED_PWR M_ON2 114,116
7 29 R8560 S C8512
7 LPC_AD3 -LED_PWR 73

3
-PLTRST_FAR_EC EIO3/LAD3/GPM3(3) PWM3/GPA3 CPUCORE_ON
22 30 1/20W_100K_5%_0201 47P_50V_J_NPO_0402
LPCCLK_EC_24M ERST#/LPCRST#/GPD2 SMCLK5/PWM4/GPA4 FAN_ON CPUCORE_ON 13,108 2
13 31 FAN_ON 90
-LID_CLOSE 7 LPCCLK_EC_24M -LPC_FRAME ESCK/LPCCLK/GPM4(3) SMDAT5/PWM5/GPA5
-WRST -KBRC 6

1
7 -LPC_FRAME ECS#/LFRAME#/GPM5(3)
47 FAN_FRQ
TACH0A/GPD6(3) FAN_FRQ 90
1 1 1 LPC 48 AOU_SEL2
TACH1A/TMA1/GPD7(3) AOU_SEL2 69
EMC_NS@ EMC_NS@
C8510 C8511 C8516 FPR_PWR_SHIELD 126
73 FPR_PWR_SHIELD GA20/GPB5(3) -TEMBER_DETECT
1U_10V_K_X5R_0402 10P_50V_J_NPO_0402 10P_50V_J_NPO_0402 IRQSER 5 66
2 2 2 7 IRQSER PD_VBUS_C_CTRL1_EC ALERT#/SERIRQ/GPM6(3) ADC0/GPI0(3) THERMISTOR_CPU
15 67
125 PD_VBUS_C_CTRL1_EC -EC_SCI PLTRST#/ECSMI#/GPD4(3) ADC1/GPI1(3) THERMISTOR_DGPU
C 23 68 C
8 -EC_SCI ECSCI#/GPD3 ADC2/GPI2(3) THERMISTOR_CHARGER THERMISTOR_DGPU 92
-WRST 14 69
WRST# ADC3/GPI3(3) FAN_ID THERMISTOR_CHARGER 92
-KBRC 4 70
7 -KBRC KBRST#/GPB6(3) ADC4/GPI4(3) FAN_ID 90 VCC3SW_EC
R8546
A/D D/A 1/16W_10K_5%_0402

VCC3M

88 -LED_FNLOCK
-LED_FNLOCK 113
CRX0/GPC0
IT8227 TACH2A/GPJ0(3)
TACH2B/GPJ1(3)
DAC2/TACH0B/GPJ2(3)
76
77
78
-PD_I2C_INT_R
-PCH_SLP_S5_R
VGATE_EC
R8543
R8544
R8545
1
1
1
2 0_0402_SP
2 0_0402_SP
2 0_0402_SP
-PD_I2C_INT
-PCH_SLP_S5
VGATE
-PD_I2C_INT 59
-PCH_SLP_S5 13
VGATE 13,108
M_ON 1 2

VCC3SW_EC
-AOU_IFLG
R8510

R8511
1

1
2 1/16W_10K_5%_0402

2 1/20W_10K_5%_0201
-AOU_IFLG

-HOTKEY
69 -AOU_IFLG 123
CTX0/TMA0/GPB2(3) CIR
LQFP DAC3/TACH1B/GPJ3(3)
79

94
-PWRSHUTDOWN

SMB03_CLK
-PWRSHUTDOWN 100,101,105

-SPK_MUTE 1
R8547
1/16W_10K_5%_0402

2
CRX1/SIN1/SMCLK3/GPH1/ID1 SMB03_CLK 41,91,92,93
95 SMB03_DATA
DRV[17:0] CTX1/SOUT1/GPH2/SMDAT3/ID2 GSENSE_INT SMB03_DATA 41,91,92,93
R8512 1 2 1/16W_10K_5%_0402 DRV1 88 DRV[17:0] DRV0 36 122 GSENSE_INT 91
KSO0/PD0 DTR1#/SBUSY/GPG1/ID7 -PROCHOT_GPU
DRV1 37 34 -PROCHOT_GPU 118 R8548
KSO1/PD1 PWM7/RIG1#/GPA7 FPR_GREEN_LED
R8513 1 2 1/16W_10K_5%_0402 DRV2 DRV2 38 35 1/16W_10K_5%_0402
KSO2/PD2 RTS1#/GPE5 M_TEMP FPR_GREEN_LED 73
DRV3 39 UART port 73 M_TEMP 101 1 @ 2
FAN_ID KSO3/PD3 ADC7/CTS1#/GPI7(3) -VGA_AC_DC
R8514 1 2 1/20W_10K_5%_0201 DRV4 40 72
KSO4/PD4 ADC6/DSR1#/GPI6(3) ADP_I -VGA_AC_DC 41
DRV5 41 71
R8571 1 2 1/20W_10K_5%_0201 -LANWAKE DRV6 42 KSO5/PD5 ADC5/DCD1#/GPI5(3) ADP_I 102,128 For Mirror Code
KSO6/PD6
R8516 1 @ 2 1/16W_10K_5%_0402 -EC_WAKE
DRV7
DRV8
43
44 KSO7/PD7 RXD/SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
16
17
EC_RX
EC_TX
EC_RX 66 "H" --> Enable
DRV9 45 KSO8/ACK#
KSO9/BUSY
TXD/SOUT0/LPCPD#/GPE6 EC_TX 66 "L" --> Disable (Default)
DRV10 46 81 VGA_BLON VGA_BLON 3
KSO10/PE DAC5/RIG0#/GPJ5(3)
DRV11 51 KBMX
USB_ON1 KSO11/ERR# USB_ON1
R8518 2 1 1/16W_10K_5%_0402 DRV12 52 33 USB_ON1 69,73
KSO12/SLCT GINT/CTS0#/GPD5 BACKLIGHT_ON VCC3SW_EC
DRV13 53 119
AC_PRESENT KSO13 DSR0#/GPG6 PROCHOT_EC BACKLIGHT_ON 51
R8564 2 1 1/16W_10K_5%_0402 DRV14 54 80
KSO14 DAC4/DCD0#/GPJ4(3)
DRV15 55
VCC3B KSO15 ACIN_EC
DRV16 56 R8553 1 @ 2 1/16W_10K_5%_0402
KSO16/SMOSI/GPC3(3)
DRV17 57
SENSE[7:0] KSO17/SMISO/GPC5(3) USB_ON2
85
SMB03_DATA 88 SENSE[7:0] PS2CLK0/CEC/TMB0/GPF0 -PWRSW_EC USB_ON2 69
R8520 1 2 1/16W_2.2K_5%_0402 SENSE0 58 86 R8554 1 @ 2 1/16W_0_5%_0402
KSI0/STB# PS2DAT0/TMB1/GPF1 IPDCLK_R -PWRSW_EC 13,64
SENSE1 59 PS/2 89 R8549 1 2 1/20W_33_5%_0201 IPDCLK IPDCLK 89
SMB03_CLK KSI1/AFD# PS2CLK2/GPF4 IPDDATA_R
R8521 1 2 1/16W_2.2K_5%_0402 SENSE2 60 90 R8550 1 2 1/20W_33_5%_0201 IPDDATA @
KSI2/INIT# PS2DAT2/GPF5 IPDDATA 89
SENSE3 61 D8501 2 1 RB751V-40_SOD323-2
FAN_FRQ KSI3/SLIN# ACIN 102
R8522 1 2 1/16W_10K_5%_0402 SENSE4 62 D8502 @ 2 1 RB520CM-30T2R_VMN2M2
KSI4 WLAN_RST_D WLAN_RST
SENSE5 63 125 R8572 @1 2 1/16W_0_5%_0402
KSI5 SSCE1#/GPG0 -SPK_MUTE WLAN_RST 66
SENSE6 64 SPI ENABLE 100 C8513 1 2 100P_50V_J_NPO_0402
B KSI6 SSCE0#/GPG2 -SPK_MUTE 78 B
SENSE7 65
KSI7 EC_SPKR
32
PWM6/SSCK/GPA6 EC_SPKR 83
-LANWAKE 118
-LED_CAPSLOCK 73
-LANWAKE PECI_R SMDAT2/PECIRQT#/GPF7(3) VCC3_LDO_PD
R8525 1 @ 2 1/20W_10K_5%_0201 R8531 1 2 1/16W_43_5%_0402 117
6 PECI I2C_DATA_BT SMCLK2/PECI/GPF6(3) OTP_RESET
116 120
101,102 I2C_DATA_BT I2C_CLK_BT SMDAT1/GPC2 TMRI0/GPC4(3) B_ON_EC B_ON OTP_RESET 100
R8563 2 1 1/20W_2K_5%_0201 BPWRG 115 SM BUS 124 R8551 1 2 0_0402_SP R8555 1 2 1/16W_10K_5%_0402
101,102 I2C_CLK_BT I2C_DATA_PD I2C_DATA_PD_EC SMCLK1/GPC1 TMRI1/GPC6(3) B_ON 54,106,123,127
R8532 1 2 0_0402_SP 88
59 I2C_DATA_PD I2C_CLK_PD I2C_CLK_PD_EC SMDAT0/GPF3
R8767 1 2 1/20W_10K_5%_0201 -KBRC R8533 1 2 0_0402_SP 87
59 I2C_CLK_PD SMCLK0/GPF2
110 -PWRSWITCH
VCC3SW_EC PWRSW/GPB3 LCD_SELF_TEST_ON -PWRSWITCH 51,73
111

13,106,107 -PCH_SLP_S4
-PCH_SLP_S4 R8534 1 2 0_0402_SP -PCH_SLP_S4_R 21
RI2#/GPD1
GPB4
GPB1
GPB0
109
108
-LID_CLOSE
ACIN_EC
LCD_SELF_TEST_ON 3,51
-LID_CLOSE 8,51,73,89 AC_LED
R8526 1 2 1/16W_10K_5%_0402 -LID_CLOSE -PCH_SLP_S3 R8535 1 2 0_0402_SP -PCH_SLP_S3_R 18 WAKE UP 112 UART_EN_EC R8552 1 2 0_0402_SP
13 -PCH_SLP_S3 RI1#/GPD0(3) RING#/CK32KOUT/LPCRST#/GPB7 UART_EN 84
A_ON R8536 1 2 0_0402_SP A_ON_R 107
R8527 1 2 1/16W_100K_5%_0402 -WRST 15,106,107,123 A_ON GPE4 TABLE of AC LED (LED1)
R8528 1 2 1/16W_2.2K_5%_0402 I2C_CLK_BT ECSPI_CLK 105 84 AOU_SEL1 Vendor LCFC P/N Description
21 ECSPI_CLK -ECSPI_SS FSCK/GPG7 EGCLK/GPE3 M_ON AOU_SEL1 69
101 83
R8529 1 2 1/16W_2.2K_5%_0402 I2C_DATA_BT 21 -ECSPI_SS ECSPI_MOSI 102 FSCE#/GPG3
EXTERNAL SERIAL FLASH
EGCS#/GPE2
82 BPWRG
M_ON 105 LITE ON SC50000GM00 S LED LTW-327DSKF-5A 3X1 ORANGE/WHITE
21 ECSPI_MOSI ECSPI_MISO FMOSI/GPG4 EGAD/GPE1 BPWRG 13
103
21 ECSPI_MISO FMISO/GPG5
R8573 1 2 0_0201_SP FPR_RESET EVERLIGHT SC50000GD00 S LED 12-22A/S2ST3D-C30/2C(FTK) ORG/WHI
FPR_RESET 8,73
AC_PRESENT R8537 1 2 0_0402_SP AC_PRESENT_R 128 19 FPR_RESET_EC R8574 1 @ 2 1/20W_0_5%_0201 -LED_CAPSLOCK
13 AC_PRESENT GPJ6/THERMTRIP_SHUTDOWN# SMCLK4/L80HLAT/BAO/GPE0 -LED_CAPSLOCK 9,88
-EC_WAKE 2 20 -HOTKEY
8 -EC_WAKE GPJ7 SMDAT4/L80LLAT/GPE7 -HOTKEY 88
R8569 1 2 1/20W_10K_5%_0201 LCD_SELF_TEST_ON CLOCK
3 ME_FLASH
GPH7 CPUCORE_PWRGD ME_FLASH 9
1 2 GPIO 99
ID6/GPH6 CPUCORE_PWRGD 13
C8517 100P_25V_J_NPO_0201 98 ACOFF
ID5/GPH5 LED_AC_CON ACOFF 102
97
ID4/GPH4 LED_AC_CHG
20181106 Core Team Vanness 96
For BOE Panel Issue ID3/GPH3
93 -RSMRST
CLKRUN#/ID0/GPH0 -RSMRST 13

AVSS
LED1

VSS1

VSS2
VSS3
VSS4
VSS5
LED_AC_CHG R8565 1 2 1/20W_390_5%_0201 LED_AC_CHG_R A1 C
R8558 ORG
1/16W_100K_5%_0402 1

27
49
91
104

75
1 2 B_ON LED_AC_CON R8566 1 2 1/20W_604_1%_0201 LED_AC_CON_R A2
IT8227E-256/BX_LQFP128_14X14
Please don't place any PU Resistor on GPG[7:2] WHI
R8559 (Reserve hardware strapping) 1222A-S2ST3D-C30-2C-FTK_ORG_WHI
SA00009B310 EC_AGND
1/16W_100K_5%_0402 SC50000GM00
1 2 A_ON 1 1 S LED LTW-327DSKF-5A 3X1 ORANGE/WHITE
A L8502 EMC_NS@ EMC_NS@ A
BLM18PG121SN1D_2P C8514 C8515
1 2 0.1U_6.3V_K_X5R_0201_MURATA 0.1U_6.3V_K_X5R_0201_MURATA
2 2

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 EC_IT8227E-256/BX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Tuesday, July 23, 2019 Sheet 85 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

BLANK C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 EC_IT8227E-256/DX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 86 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 EC_IT8227E-256/DX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 87 of 128

5 4 3 2 1

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5 4 3 2 1

Keyboard CONN
VCC3B VCC3M
VCC3B VCC3M

1
R8817 R8818 R8819 R8820
@ 1/16W_0_5%_0402 @ 1/16W_0_5%_0402 1/10W_0_5%_0603 @ 1/16W_0_5%_0402

2
D D

2 1/20W_15K_5%_0201

2 1/20W_15K_5%_0201

2 1/20W_15K_5%_0201

2 1/20W_15K_5%_0201

2 1/20W_15K_5%_0201

2 1/20W_15K_5%_0201

2 1/20W_15K_5%_0201

2 1/20W_15K_5%_0201
1
C8801
0.1U_6.3V_K_X5R_0201_MURATA
@ @ @ @ @ @ @ @ 2

R8801 1

R8802 1

R8803 1

R8804 1

R8805 1

R8806 1

R8807 1

R8808 1
JKBL1
40 42
40 GND2
39 41
-LED_NUMBER -LED_NUMBER_R 39 GND1
R8816 1 2 1/20W_100_5%_0201 38
9 -LED_NUMBER 38
DRV17 37
37
DRV16 36
36
TP4MIDDLE 35
35
TP4RIGHT 34
34
TP4LEFT 33
33
32
-LED_CAPSLOCK -LED_CAPSLOCK_R 32
R8809 1 2 1/20W_100_5%_0201 31
9,85 -LED_CAPSLOCK 31
30
30
-HOTKEY 29
85 -HOTKEY -LED_MICMUTE -LED_MICMUTE_R 29
R8810 1 2 1/20W_100_5%_0201 28
8 -LED_MICMUTE -LED_MUTE -LED_MUTE_R 28
R8811 1 2 1/20W_100_5%_0201 27
8 -LED_MUTE -LED_FNLOCK -LED_FNLOCK_R 27
R8812 1 2 1/20W_100_5%_0201 26
85 -LED_FNLOCK VCC3M_KBD 26
25
25
DRV11 24
85 DRV[17:0] 24
DRV8 23
23
DRV10 22
22
DRV12 21
21
DRV9 20
20
DRV13 19
19
DRV15 18
18
DRV5 17
17
DRV7 16
16
DRV6 15
15
DRV3 14
85 SENSE[7:0] 14
DRV1 13
C 13 C
SENSE0 12
12
DRV2 11
11
DRV4 10
10
SENSE3 9
9
SENSE2 8
8
DRV0 7
7
SENSE5 6
6
SENSE4 5
5
DRV14 4
4
SENSE6 3
3
SENSE7 2
2
SENSE1 1
1

100P_50V_J_NPO_0402

100P_50V_J_NPO_0402

100P_50V_J_NPO_0402

100P_50V_J_NPO_0402

100P_50V_J_NPO_0402

2
1 1 1 1 1 HIGHS_FC5AF401-3181H
EMC@ EMC@ EMC@ EMC@ EMC@ D8800 2 ME@
C8803 C8804 C8805 C8806 C8807 PESD5V0U2BT_SOT23-3 C8802
EMC@ 3300P_25V_K_X7R_0201
2 2 2 2 2
1

1
PLACE NEAR JKBL2

Track Point B

VCC5B VCC3B

2
R8822 R8821
1/16W_0_5%_0402@ 0_0402_SP

1
VCC_TP

VCC3B VCC5B
1/20W_10K_5%_0201
1/20W_4.7K_5%_0201

1/20W_4.7K_5%_0201
2

VCC_TP

2
R8813

R8814

R8815

R8823 R8824
@ 1/16W_0_5%_0402 0_0402_SP
1

1
VCC_TP
VCC5B_TP

JTP1
1
1
TP4DATA 2
89 TP4DATA TP4_RESET 2
3
8 TP4_RESET 3
TP4MIDDLE 4
4
TP4RIGHT 5
5
TP4LEFT 6
6
7
7
TP4CLK 8
89 TP4CLK 8
9
A KBD_BL_PWM 9 A
10
85 KBD_BL_PWM -KBD_BL_DTCT 10
11 13
85 -KBD_BL_DTCT 11 GND1
220P_25V_K_X7R_0201_MURATA

12 14
12 GND2
22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

2 2 2 JAE_FL10F012HA1R3000
C8810

C8808

C8809

ME@
SP01001G300
1 1 1

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 CP/TPOINT/KB CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 88 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

Click Pad
VCC3B VCC3B

4700P_6.3V_K_X7R_0201_MURATA
C8901 R8913 R8901 R8902

1
1/20W_100K_5%_0201

1/20W_4.7K_5%_0201

1/20W_4.7K_5%_0201
1
R8903
0_0603_SP
2

2
JCP1
1
SMB_CLK_3B 1
33,93 SMB_CLK_3B 2
2
3
3
88 TP4DATA TP4DATA 4
4
88 TP4CLK TP4CLK 5
SMB_DATA_3B 5
33,93 SMB_DATA_3B 6
VCC3B_PAD 6
7
-LID_CLOSE -LID_CLOSE_CONN 7
C D8909 1 2 RB520CM-30T2R_VMN2M2 8 C
8,51,73,85 -LID_CLOSE 8
IPDCLK 9
85 IPDCLK 9
IPDDATA 10
85 IPDDATA 10
11 13
PAD_DISABLE 11 GND1
12 14
8 PAD_DISABLE 12 GND2

HIGHS_FC5AF121-2121H
ME@
SP01001XU00
TP4DATA

TP4CLK
2

D8907
PESD5V0U2BT_SOT23-3
EMC@
1

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 TOUCH PAD/FPR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 89 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

FAN CONN.
D D
VCC5B

1
R9001
0_0603_SP

2
40mil ME@
VCC5B_F4 1
FAN_ON 1
2
85 FAN_ON 2
3
3
4
4
5
5
6
C GND1 C
7
GND2
JFAN1
HIGHS_WS33050-S0351-HF
SP020010W00

FAN_ID
FAN_ID 85

FAN_FRQ
FAN_FRQ 85

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12
FAN CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 90 of 128


5 4 3 2 1

VInafix.com
A B C D E

1 VCC3B VCC3B 1

2
2
R9104
R9101 0_0402_SP
@ 1/20W_10K_5%_0201

1
1
2 2
C9101 C9103
0.1U_6.3V_K_X5R_0201_MURATA 0.1U_6.3V_K_X5R_0201_MURATA
1 1
2 2

Close to pin 3 Close to pin 7


U9101
U9101
ADDR_SEL 1 12 I2C_CLK_GSENSE
SDO/SA0 SCL/SPC SMB03_CLK 41,85,92,93
I2C_DATA_GSENSE 2 11
41,85,92,93 SMB03_DATA SDA/SDI/SDO NC GSENSE_CS
3 10 R9103 1 2 0_0201_SP VCC3B
VDD_IO CS
4 9
GSENSE_INT RES GND_2
5 8
85 GSENSE_INT INT1 GND_1
1 INT2 6 7
INT2 VDD
TP9101 LIS2DWLTR_LGA12_2X2
Test_Point_20MIL SA00009AQ00
2

R9102
1/20W_10K_5%_0201
3 3
1

TABLE of G-SENSOR(U9101)
Vendor LCFC P/N Description
ST SA00009AQ00 S IC LIS2DWLTR LGA 12P G-SENSOR
KIONIX SA000081E00 S IC KX022-1020 LGA 12P G-SENSOR

4 4

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 APS G-SENSOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 91 of 128


A B C D E

VInafix.com
5 4 3 2 1

Thermal Sensor Close to CPU


VCC3B U9201 @
D D

1 10 SMB03_CLK
VDD SMCLK SMB03_CLK 41,85,91,93
REMOTE1+ 2 9 SMB03_DATA
DP1 SMDATA SMB03_DATA 41,85,91,93
1
REMOTE1- 3 8
DN1 ALERT#
@ C9201
0.1U_10V_K_X5R_0402_MURATA REMOTE2+ 4 7 R9201 1 @ 2 1/16W_10K_5%_0402 VCC3B
2 DP2 THERM#
REMOTE2- 5 6
DN2 GND
1. Address 1001_101xb
F75303M_MSOP10 2. Internal pull up 1.2K to 1.5V
SA000046C0J R for init i al t her mal s hut do wn t e mp

Close to CHARGER
VCC3M

REMOTE1+ REMOTE2+
C C

1
1 1 R9209
1/20W_10K_1%_0201 REMOTE1+
@ C9202 @ C9203 1

1
2200P_50V_K_X7R_0402 2200P_50V_K_X7R_0402 @ C @

2
2 2 THERMISTOR_CHARGER C9204 2 Q9201
85 THERMISTOR_CHARGER B
100P_50V_J_NPO_0402 MMST3904-7-F_SOT323-3

1
REMOTE1- REMOTE2- 2 E SB000010U00

3
PANAS_ERTJ0EG103FA RT3 REMOTE1-

2
Close to GPU
VCC3M
B B

1
R9210
1/20W_10K_1%_0201

2
THERMISTOR_DGPU
85 THERMISTOR_DGPU
REMOTE2+

1
1

1
RT2 @ C @
PANAS_ERTJ0EG103FA C9205 2 Q9202
100P_50V_J_NPO_0402 B MMST3904-7-F_SOT323-3
2 E SB000010U00

3
REMOTE2-

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 THERMAL SENSOR/ VIN DETECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 92 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

SMBus
D D

DIMM1,CP
VCC3_SUS
VCC3B VCC3B

1
R9303 R9304
R9305 R9306 1/16W_4.7K_5%_0402 1/16W_4.7K_5%_0402
1/20W_10K_5%_0201 1/20W_10K_5%_0201

2
2
G
SMB_CLK 6 1 SMB_CLK_3B

S
7 SMB_CLK SMB_CLK_3B 33,89

D
Q9301A
L2N7002KDW1T1G_SOT363-6
SB000013A00
R9301 1 @ 21/16W_0_5%_0402

5
G
SMB_DATA 3 4 SMB_DATA_3B

S
7 SMB_DATA SMB_DATA_3B 33,89

D
C C
Q9301B
L2N7002KDW1T1G_SOT363-6
SB000013A00
R9302 1 @ 21/16W_0_5%_0402

GPU, Thermal Sendor,


Embedded Controller, G sensor

B VCC3B B
2
G

EC_SCL2 6 1 SMB03_CLK
S

7 EC_SCL2 SMB03_CLK 41,85,91,92


D

Q9303A
5

L2N7002KDW1T1G_SOT363-6
G

SB000013A00

EC_SDA2 3 4 SMB03_DATA
S

7 EC_SDA2 SMB03_DATA 41,85,91,92


D

Q9303B
L2N7002KDW1T1G_SOT363-6
SB000013A00

2N7002KDWH
Vth= min 1V, max 2.5V
ESD 2KV

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 SMBUS SWITCH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 93 of 128

5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 THINK ENGINE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 94 of 128

5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 THINK ENGINE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 95 of 128

5 4 3 2 1

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5 4 3 2 1

SATA HDD CONN.

D D

VCC5B

1
R9601
0_0805_SP

2
C C

1 1 1 1
@ @ @
C9601 C9602 C9603 C9604

VCC5B_HDD
10U_10V_K_X5R_0603 10U_10V_K_X5R_0603 1U_10V_K_X5R_0402 0.1U_25V_K_X5R_0402
2 2 2 2

JHDD1 ME@

14 16
PCIE11_L0_SATA0_TXP C9608 PCIE11_L0_SATA0_TXP_CONN 14 GND16
1 2 0.01U_6.3V_K_X7R_0201_MURATA 13 15
10 PCIE11_L0_SATA0_TXP 13 GND15
PCIE11_L0_SATA0_TXN C9607 1 2 0.01U_6.3V_K_X7R_0201_MURATA PCIE11_L0_SATA0_TXN_CONN 12
10 PCIE11_L0_SATA0_TXN 12
11
PCIE11_L0_SATA0_RXN C9606 PCIE11_L0_SATA0_RXN_CONN 11
10 PCIE11_L0_SATA0_RXN 1 2 0.01U_6.3V_K_X7R_0201_MURATA 10
PCIE11_L0_SATA0_RXP C9605 PCIE11_L0_SATA0_RXP_CONN 10
1 2 0.01U_6.3V_K_X7R_0201_MURATA 9
10 PCIE11_L0_SATA0_RXP 9
8
HD_SSD_DEVSLP HD_SSD_DEVSLP_R 8
R9602 1 2 0_0402_SP 7
10 HD_SSD_DEVSLP -HDD_DTCT 7
6
85 -HDD_DTCT 6
5
5
4
4
3
3
2
2
1
1

HIGHS_FC5AF141-3181H

B
SP01001MM00 B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 SATA HDD CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 96 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 SATA RE-DRIVER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 97 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

VCC3B VCC3_SUS_TPM

D D
R9807 1 @ 2 1/16W_0_5%_0402

VCC3_SUS

R9808 1 2 0_0402_SP

VCC3_SUS_TPM

VCC3_SUS_TPM

2 2 2 2
TPM@ TPM@ @ TPM@
C9801 C9802 C9803 C9804

2
TPM@ 0.1U_6.3V_K_X5R_0201_MURATA 0.1U_6.3V_K_X5R_0201_MURATA 0.1U_6.3V_K_X5R_0201_MURATA 10U_6.3V_M_X5R_0402
R9802 1 1 1 1
1/20W_10K_5%_0201

1
Close to Pin1, Pin8, Pin22
C C

TABLE

Pin TCG Nuvoton ST Micro

22
U9801

1
TPM@
No
PTP Spec (v38) NPCT750LABYX ST33HTPH2E32AHC0

VHIO2

VHIO1

VSB
-TPM_IRQ R9809 1 2 0_0201_SP -TPM_IRQ_R 18 2
8 -TPM_IRQ PIRQ#/GPIO2 NC1
3 1 VDD VSB NC
NC2
4
SPI_MOSI_IO0 R9803 1 TPM@ 2 1/20W_33_5%_0201 SPI_MOSI_IO0_2_R 21 PP/GPIO6
5 2 GND NC GND
7,21 SPI_MOSI_IO0 MOSI/GPIO7 NC3
7,21 SPI_MISO_IO1
SPI_MISO_IO1 R9804 1 TPM@ 2 1/20W_33_5%_0201 SPI_MISO_IO1_2_R 24
MISO NC5
9 3 NC NC NC
10 4 GPIO GPIO/PP PP
NC6
11
NC7
12 5 NC NC NC
-SPI_CS2 R9805 1 TPM@ 2 1/20W_0_5%_0201 -SPI_CS2_R 20 NC8
13 6 GPIO GPIO3 NC
7 -SPI_CS2 SCS#/GPIO5 GPIO4
NC9
14 7 GPIO NC GPIO
SPI_CLK R9806 1 TPM@ 2 1/20W_33_5%_0201 SPI_CLK_2_R 19 15
7,21 SPI_CLK SCLK
NPCT750LABYX_QFN32_5X5 NC10
16
8 VDD VHIO NC
-PLTRST_NEAR GND1
17 25
13 -PLTRST_NEAR PLTRST# NC11
26
NC12
6 27
GPIO3 NC13
28 9 NC NC NC
NC14
7 31
NC4 NC15
32 10 NC NC NC
NC16 NC NC
11 NC
B
SDA/GPIo0
29 12 NC NC NC B
30
SCL/GPIO1 13 GPIO GPIO4 NC
GND2

GND3
14 NC NC NC
15 NC NC NC
16 GND GND NC
23

33

SA00008KS20

17 SPI_RST# RST# SPI_RST#


18 SPI_PIRQ# PIRQ#/GPIO2 SPI_PIRQ#
19 SPI_CLK SCLK SPI_CLK
20 SPI_CS# SCS#/GPIO5 SPI_CS#
21 MOSI MOSI/GPIO7 MOSI
22 VDD VHIO VPS
23 GND GND NC
24 MISO MISO MISO

TABLE of TPM (U9801)


25 NC NC NC
Vendor P/N LCFC P/N 26 NC NC NC
Nuvoton NPCT750LABYX SA00008KS20 27 NC NC NC
28 NC NC NC
ST Micro ST33HTPH2E32AHC0 SA000089E20 29 SDA/GPIO1 SDA/GPIO1 NC
30 SDA/GPIO0 SDA/GPIO0 NC
A 31 NC NC NC A

32 NC NC NC

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 DISCRETE TPM 2.0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 98 of 128


5 4 3 2 1

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5 4 3 2 1

D
Screw Hole D

H1 H2 H3 H4 H5 H6 H7 H8 H9 H10
PAD_C8P0D2P3 PAD_C8P0D2P3 PAD_C8P0D2P3 PAD_C7P0D3P3 PAD_C7P0D3P3 PAD_C7P0D3P3 PAD_C7P0D3P3 PAD_C7P0D3P3 PAD_C2P3D2P3 PAD_C2P3D2P3

@ @ @ @ @ @ @ @ @ @

1
H11 H12 H13 H14 H15 H16 H17 H18 H19 H20
PAD_D2P4 PAD_C2P3D2P3 PAD_C8P0D2P3 PAD_C1P4D1P4N PAD_D4P0 PAD_C8P0 PAD_C2P2D2P2N PAD_C2P3D2P3 PAD_D3P0 PAD_CB8P0D4P0

@ @ @ @ @ @ @ @ @ @
1

1
C C

H21 H22 H24 H25 H26 H27 H28 H29 H30


PAD_C8P0D2P3 PAD_D3P2 PAD_C8P0 PAD_C8P0 PAD_C2P3D2P3 PAD_D2P8X2P4 PAD_C5P0D4P0 PAD_C6P0D4P6 PAD_DR1P5X2P4

@ @ @ @ @ @ @ @ @
1

1
PCB Fedical Mark PAD
FD1 FD2 FD3 FD4 FD5 FD6

B B
1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 SCREW HOLE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 99 of 128


5 4 3 2 1

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5 4 3 2 1

VINT20_IN VINT20_IN 102,125

VSYS15 VSYS15 51,54,102,103,105,106,108,109,110,111,114,118,120,127

VCC3SW VCC3SW 51,59,73,85,101,102,105,127

RTCVCC RTCVCC 13,16,20


D D

PD0002
1SS355VMTE-17

PD0003 1 2
PR0002 1SS355VMTE-17 PR0003 PR0001 VINT20_IN
0_0402_SP 1/16W_100K_1%_0402
1/16W_10K_1%_0402
1 2 2 1 1 2 1 2 1 2
85,101,105 -PWRSHUTDOWN VSYS15
PD0004
1SS355VMTE-17

2
3
PQ0002
E
2
B PR0004
PMBT3906 1/16W_750K_5%_0402

1
C
VCCGT VCORE3 VCORE2 VCORE1

1
540_0402NEW_30%_PRF15BB541NB6RC 540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC 540_0402NEW_30%_PRF15BB541NB6RC

1
C PT0001 PT0002 PT0003 PT0004
PQ0003 2 2 1 2 1 2 1 2 1
C PMBT3904 B C
PQ0001
E 2N7002KW_SOT323-3
2
3

1
D
PC0001 2 OTP_RESET 85
1U_25V_K_X7R_0603_YAGEO G
1 DIS@ DIS@
S

3
2 1 2 1 2 1 2 1

PT0005 PT0006 PT0007 PT0008


540_0402NEW_30%_PRF15BB541NB6RC 540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC 540_0402NEW_30%_PRF15BB541NB6RC
Charger VDDCI VCCGFXCORE_D VCCSA
2 1 2 1

PR0006 PR0005
1/16W_0_5%_0402 1/16W_0_5%_0402
UMA@ UMA@

RTC Battery
B B

VCC3SW
2

PR0007
0_0402_SP

RTCVCC
1

<10,50> 1 2

PD0001
2

CUS357_SOD323-2 @
PR0008
1/16W_43K_1%_0402
1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 VIN Detector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.3

Date: Thursday, July 04, 2019 Sheet 100 of 128


5 4 3 2 1

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5 4 3 2 1

VCC3SW

1
D D
PR0101
1/16W_1M_5%_0402
EMC@
PL0102
BLM18KG300TN1D_2P
PT0101 under CPU bottom side for CPU thermal protection.

2
ME@ VMB2 VMB 1 2
JDC1 PF0101 This is for thermal team request.
HIGHS_WS33081-S0201-HF 12A_32V_0501012.WRS EMC@
PL0101
1 MBAT_PWR15_IN 2 1 BLM18KG300TN1D_2P
1 BAT_PWR15
9 2
PTH1 2 I2C_CLK_BT_R
3 1 2
3 I2C_DATA_BT_R
10 4 PR0105
PTH2 4
5 @ 1/16W_0_5%_0402
5 EMC@ EMC@

2
11 6 PR01061 2 1/16W_100_1%_0402 1 2
PTH3 6
7
I2C_CLK_BT 85,102
PC0102 PC0101 VCC3B
7
12 8 1000P_50V_K_X7R_0402 0.01U_25V_K_X7R_0402 PR0108

1
PTH4 8
PR01021 21/16W_100_1%_0402 0_0402_SP
I2C_DATA_BT 85,102
1 2
C PR0109 1/16W_10K_1%_0402
A/D +VL_3.3V C

2
1 2
M_TEMP 85
PR0104

1
BATT_OUT 102 1/16W_16.5K_1%_0402
PC0103
0.1U_16V_K_X7R_0603_YAGEO PU0101

1
1 8 NTC_V_1
VCC TMSNS1

EMC_NS@
PESD5V0U2BT_SOT23-3
PR0107 2 7 OTP_N_002 2 1
GND RHYST1
1/16W_0_5%_0402
85,100,105 -PWRSHUTDOWN 1 2 OTP_N_003 3 6 PR0103
OT1 TMSNS2
1/16W_10K_1%_0402

1
PD0101
4 5
1 OT2 RHYST2
PT0101
G718TM1U_SOT23-8 100K_0402_1%_NCP15WF104F03RC

2
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 BATTERY INPUT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 101 of 128


5 4 3 2 1

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5 4 3 2 1

VINT20_IN VINT20_IN 100,125

VSYS15 VSYS15 51,54,100,103,105,106,108,109,110,111,114,118,120,127

BAT_PWR15 BAT_PWR15 101

PJ0201
2 1
2 1
@ JUMP_43X79
D D

VINT20_IN
EMC_NS@
PL0201 EMC@
1UH_PCMB053T-1R0MS_7A_20% PR0201 PQ0204 PR0204 PL0202
1W_0.01_+-1%_1206_100PPM/C AONY36324 1/16W_56_5%_0402 2.2UH_CMLE063T-2R2MS_10A_20% PQ0205
1 2 VINT20 1 2 VBUS 1 2 AONH36334
VSYS15

9
33U_D2_25VM_R40M
10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
2 2

1
1000P_50V_K_X7R_0201

330P_50V_K_X7R_0402
0.01U_25V_K_X7R_0201

0.1U_25V_K_X5R_0402

0.1U_25V_K_X5R_0402
1/20W_10_1%_0201
PC0213

10U_25V_K_X5R_0805_H1.25_MUR
1

1
PR0202

PC0201

PC0243

PC0238

PC0212

PC0229

PC0228

PC0233

EMC@ PC0227

EMC@ PC0216
0.1U_25V_K_X5R_0402

0.1U_25V_K_X5R_0402

PR0205 5 0.047U_25V_K_X7R_0402_MURATA PC0220 EMC@ 7 10

1
+
EMC_NS@

EMC_NS@

@PC0236
1/20W_10_1%_0201 2 4 0.047U_25V_K_X7R_0402_MURATA PR0203 6 4
PC0232

PC0210
1

1
1 1
EMC@

PC0211

PC0235

PC0239

PC0244

PC0231
@ PC0224 3 1/16W_56_5%_0402 5 3

2
2

2
EMC@

EMC@
PC0206

PC0202

PC0205
0.1U_25V_K_X7R_0402_MURATA PR0207 2

1 2

12
2 2 1 1/10W_2.2_5%_0603 PR0206 EMC@
2

0.01U_25V_K_X7R_0402
1/10W_2.2_5%_0603 PC0240
2 330P_50V_K_X7R_0402 PQ0201

2
2 30 25 AONR21357_DFN8

1
BTST1 BTST2

1
0_0201_SP

0_0201_SP

PC0241
1 8

PR0208

PR0209
PC0208 LX1_CHG 32 23 LX2_CHG 2 7 PR0210
1 SW1 SW2
0.01U_25V_K_X7R_0402 3 6 1W_0.01_+-1%_1206_100PPM/C

1
1 DL1_CHG 29 26 DL2_CHG 5 1 2
LODRV1 LODRV2 BAT_PWR15

2
DH1_CHG DH2_CHG

0.1U_25V_K_X7R_0402_MURATA

0.1U_25V_K_X7R_0402_MURATA
PC0225 31 24 PC0219

10U_25V_K_X5R_0805_H1.25_MUR
1 1

4
HIDRV1 HIDRV2

1
1U_25V_K_X5R_0402

1U_25V_K_X5R_0402

PC0218
0.47U_25V_K_X5R_0603 1 2

PC0242

PC0230
1 22
VBUS VSYS

1
PC0214

PC0215
0.1U_25V_K_X7R_0402_MURATA

2
C 2 21 BATDRV# 2 2 @ C
ACN BATDRV#

2
3 20
ACP SRP
1 2 VDDA 7 PU0201 19
BQ25700_VDD VDDA SRN
PR0212 1
1/10W_10_5%_0603 2
BQ25700ARSNR_QFN32_4X4 BQ25700_VDD

1
PR0211 6 28 1 2 PR0213 1
1/10W_10_5%_0603 2
ILIM_HIZ REGN
1/16W_10_1%_0402 PR0214 PR0215 1/20W_40.2K_1%_0201 PC0234 2.2U_10V_K_X5R_0402
1/20W_255K_1%_0201 1 2 1 2 PC0209680P_25V_K_X7R_0201_MURATA
1 PC0223 1800P_25V_K_X7R_0201 16 17 1 2 1 2
COMP1 COMP2
2 1 PC0217 PR0216 1/20W_20K_1%_0201

2
PC0207 100P_50V_K_X7R_0201 1 2
1U_25V_K_X5R_0402 -PROCHOT_P 1 2 11 18 PC0237 15P_25V_J_NPO_0201
PROCHOT# CELL_BATPRES

1
2 PR0217 0_0201_SP

1/20W_220K_5%_0201
1 2 13
PD0203 85,101 I2C_CLK_BT SCL

PR0219
PR0218 0_0402_SP 8 1 2 ADP_I 85,128
-PROCHOT_P IADPT
6,85,108 -PROCHOT 2 1 1 2 12
85,101 I2C_DATA_BT SDA
PR0220 0_0402_SP 9 1 2 @ PR0221

2
IBAT
85 ACIN 1 2 4 PR0222 0_0201_SP 1/16W_0_5%_0402
1SS355VMTE-17 PR0223 0_0402_SP CHRG_OK
10 1 2
PD0202
1 2 5
ENZ_OTG
PSYS
PR0224 0_0201_SP
PSYS 108 VDDA
PR0225 0_0201_SP 27
PGND

100P_50V_K_X7R_0201

100P_50V_K_X7R_0201

100P_50V_K_X7R_0201
41 GPU_GPIO6 2 1 15
CMPOUT

1
PR0226 33
PAD

1
PR0227 1/20W_100K_1%_0201 14 PR0228
1SS355VMTE-17 CMPIN VCC3M

PC0222

PC0221

PC0203
0_0402_SP PQ0203 D 1/16W_137K_1%_0402 PR0229
1 2 2 @ PR0230 1/20W_82K_1%_0201

1
85 ACOFF G 1/20W_0_5%_0201

1
ADP_I 1 2

2
2
B S 2N7002KW_SOT323-3 B
20190523 PR0232

3
1/20W_300K_1%_0201
PR0231 VINT20

1
1/20W_10K_1%_0201
PD0201

1
PQ0202 D PR0234

2
1 2 2 1/20W_100K_1%_0201
@ PR0233 101 BATT_OUT G
1/20W_100K_1%_0201
VCC3M VCC3SW

2
1SS355VMTE-17

1
S 2N7002KW_SOT323-3

3
PR0235

1
0.1U_25V_K_X7R_0402_MURATA
1/20W_1M_5%_0201

1/20W_10K_1%_0201
2

1
PR0237

2
1
@PC0226
@ PR0236 PR0239
1/20W_10K_1%_0201 0_0201_SP
@ PR0238 @

2
1/20W_0_5%_0201

2
@ POUT1 PAD 1 1 2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 BATTERY CHARGER(BQ25700A)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 102 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

VSYS15 VSYS15 51,54,100,102,105,106,108,109,110,111,114,118,120,127

VCC5M VCC5M 50,54,59,69,73,78,84,107,108,109,110,111,116,118,123,125,127

D D

VCC5M
VCC3M
FSW=750 KHz
TDC:8A

1
10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
@ PR0302
1/16W_100K_5%_0402
OCP:12A
VSYS15 @
PJ0301 PR0310 PC0306

2
2 1 +5V_VIN 1/10W_10_5%_0603 0.1U_25V_M_X7R_0603
2 1

2200P_25V_K_X7R_0402
47P_50V_J_NPO_0402
+5V_PWRGD +5VBS 1 2 1 2

0.1U_25V_K_X5R_0402
1

1
RF_NS@ PC0310

EMC@ PC0313

EMC@ PC0301

PC0308

PC0309
JUMP_43X79 PU0301
VCC5M

1
PL0301
8A

PGOOD

BOOT
2

2
2 1UH_PCMC063T-1R0MN_11A_20% PJ0302

10P_50V_J_NPO_0402
5 2 +5VLX 1 2 +5VALW_P 2 1
VIN LX1 2 1
C C

2
3 EMC_NS@ @ JUMP_43X118
LX2

2200P_25V_K_X7R_0402
PR0308
3V5V_ON

0.1U_25V_K_X5R_0402
22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25
1/10W_4.7_5%_0603 1

PC0312
LV6228CGQUF_UQFN12_3X3 PR0305 1 1

1
PC0318

PC0314

PC0304

PC0303

EMC@ PC0311

EMC@ PC0302
3V5V_ON 6 10 +5VOUT 0_0402_SP

1
EN VOUT
2

0.1U_25V_K_X5R_0402
PR0306 @

2
1

2
2 2

PC0316
12 0_0402_SP
VCC5M CLK
11
100mA 1 2
LDO

1
1/16W_1K_1%_0402
EMC_NS@
+VL_3.3V

PR0307
PC0315

4.7U_6.3V_K_X5R_0603
9 1 2 680P_50V_K_X7R_0402
VCC

AGND

PGND
PR0304 @ @

+5V_VCC
@ PR0309 +5VALW_P
1

PC0307
1/16W_0_5%_0402

2
1/16W_0_5%_0402

4
2

1U_6.3V_K_X5R_0402_MURATA
2

1
PC0305
PC0317 @ PR0303

1
1U_25V_K_X7R_0603_YAGEO 1/16W_15K_5%_0402
PR0301 1

2
0_0402_SP

2
2

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/08 Deciphered Date 2013/08/05 DC/DC VCC5M (LV6228)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 103 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/08 Deciphered Date 2013/08/05 DC/DC VCC5M_PD_AB (NB693)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 104 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

VSYS15 VSYS15 51,54,100,102,103,106,108,109,110,111,114,118,120,127

VCC3M VCC3M 4,11,13,15,16,50,51,66,78,84,85,88,92,102,103,106,108,114,116,118,120,123,124,126,127,128

D D

VCC3M

1
@ PR0501 VCC3M
1/16W_100K_5%_0402
FSW=750 KHz
VSYS15
PU0501 TDC:8A

2
@ SYX198BQNC_QFN10_3X3

2
PJ0501
1 +3V_VIN 7 2 +3V_PWRGD
OCP:11A
2 1 EN2 PG

2200P_25V_K_X7R_0402
PR0503 PC0504

1
0.1U_25V_K_X5R_0402

10U_25V_K_X5R_0805_H1.25_MUR
47P_50V_J_NPO_0402
1 0_0603_SP 0.1U_25V_M_X7R_0603
VCC3M

1
PC0505
JUMP_43X79 PR0502 8 6 +3VBS 1 2 1 2

PC0501
IN BS

PC0503
RF_NS@ PC0502
1/16W_1M_5%_0402 PL0501
2.2UH_CMLE063T-2R2MS_10A_20% PJ0502
8A

2
2 9 10 +3VLX 1 2 +3VALW_P 2 1
3V5V_ON

2
GND LX 2 1
PR0504
C EMC@ 0_0402_SP @ JUMP_43X118 C

2200P_25V_K_X7R_0402
EMC@ 3V5V_ON 1 4 +3VALW_OUT 1 2 +3VALW_P EMC_NS@
EN1 OUT

0.1U_25V_K_X5R_0402
22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25
PR0506 PR0505
0_0402_SP 1/10W_4.7_5%_0603
100mA 1 1 1 1

1
PC0508

PC0506

PC0509

PC0512

EMC@ PC0510

EMC@ PC0513
PR0507 +3VALW_FB 3 5 1 2
1/16W_20K_1%_0402 FB LDO VCC3SW

2 1
85 M_ON M_ON 1 2 1

2
PC0511 EMC_NS@ 2 2 2 2
4.7U_6.3V_K_X5R_0603 PC0507
1 2 680P_50V_K_X7R_0402

1
@ PR0508 1/20W_0_5%_0201 2

1
2
PR0509
VCC3SW @ PC0514 1/16W_1M_5%_0402
0.1U_25V_K_X5R_0402

1
1/20W_47K_5%_02011/16W_47K_1%_0402
PC0515 PR0512

2
1
1/16W_47K_1%_0402

PR0511
0.01U_25V_K_X7R_0402 1/16W_1K_1%_0402
1

PR0510

1 2 1 2
2

6
D
2

2
2

G PQ051A
3

B
D 2N7002KDWH_SOT363-6 B
@PR0513

5 S
85,100,101 -PWRSHUTDOWN
1
G
PQ051B
1

S
4

2N7002KDWH_SOT363-6

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/08 Deciphered Date 2013/08/05 DC/DC VCC3M (STX198)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 105 of 128

5 4 3 2 1

VInafix.com
A B C D

1 1

PJ0602
2 1
2 1
VSYS15 VSYS15 51,54,100,102,103,105,108,109,110,111,114,118,120,127
@ JUMP_43X118
VCC1R2A VCC1R2A 4,5,15,33,34
PJ0603
VCC0R6B VCC1R2AP 2 1 VCC1R2A
VCC0R6B 33,34 2 1
@ JUMP_43X118

PJ0604
VCC0R6B
VCC0R6BP
2
2 1
1
VCC0R6B
TDC: 1.5A
PU0601 @ JUMP_43X39

PC0602
0.1U_25V_K_X5R_0402
VCC1R2A
PJ0601 EMC@ EMC@ RF_NS@ RF_NS@ 1 1 2 TDC: 8.4A
VSYS15 2
2 1
1 VSYS15_1.2V 2
IN1
BS
OCP: 10A
10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

2200P_25V_K_X7R_0402
Fsw: 300KHz
0.1U_25V_K_X5R_0402

47P_50V_J_NPO_0402

68P_50V_J_NPO_0402
@ JUMP_43X79

1
1 3
IN2
1

1
PC0601

PC0604

PC0605

PC0606

PC0607
2 6 PR0611 2
LX1
PC0603

1/16W_0_5%_0402
4
2

2
2 IN3
19

2
LX2
PL0601
5 0.68UH_PCMC063T-R68MN_15.5A_20%
IN4 LX_1.2V

1/16W_20K_1%_0402
20 1 2 VCC1R2AP
LX3
VCC1R2AP

2
SY8310RAC_QFN20_3X3 PC0608

1/10W_4.7_5%_0603

2200P_25V_K_X7R_0402
EMC_NS@

PR0603
330P_50V_K_X7R_0402

680P_50V_K_X7R_0402
PR0602

0.1U_25V_K_X5R_0402
22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25

22U_6.3V_M_X5R_0805_MUR_H1.25
7 15 FB_1.2V 1 1 1 1 1 1

2
PG FB

1
PC0625

PC0614

PC0624

PC0609

PC0615

PC0610

EMC@ PC0611

EMC@ PC0612
1/16W_20K_1%_0402
1

2 1
@ PR0601

1
PC0613
1/16W_100K_1%_0402

2
2
2 2 2 2 2 2

PR2013
14 PR0612
VDDQ

EMC_NS@
2
1/16W_1K_1%_0402

1
1 2 17
VCC3M

1
BIAS
1
PR0613 PC0616 13
VTT
1/16W_4.7_1%_0402 4.7U_10V_K_X5R_0402

PR0605 0_0402_SP 2 12 VCC0R6BP


S3_1.2V VTTSNS
4 DDR_VTT_PG_CTRL 1 2 10
S3
VCC0R6BP @ @

22U_6.3V_M_X5R_0603
1/16W_1M_5%_0402

0.1U_25V_K_X5R_0402
PR0606 @
1

1
22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

PC0621
1/16W_0_5%_0402
1

1
PR0610

PC0618

PC0619

@ PC0620
54,85,123,127 B_ON 2 1
@ PC0617 11 VTTREF_0.6V
VTTREF_0.6V

2
VTTREF
3 0.1U_6.3V_K_X7R_0402 9 3
2

2
S5
2

PR0607 1
@ 1/16W_0_5%_0402

GND1

GND2
1 2 S5_1.2V PC0622

TEST
GND
13,85,107 -PCH_SLP_S4 1U_10V_K_X6S_0402
2
1/16W_1M_5%_0402

PR0608 0_0402_SP
1 2
15,85,107,123 A_ON
21

18

16
1
PR0609

PC0623
0.1U_16V_K_X7R_0402_MURATA
2

4 4

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCC1R2A(SY8310RAC)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 106 of 128


A B C D

VInafix.com
5 4 3 2 1

VCC5M VCC5M 50,54,59,69,73,78,84,103,108,109,110,111,116,118,123,125,127

VCC2R5A VCC2R5A 33,34

D D

VCC2R5A
TDC: 2A
OCP: 4A
Fsw: 1MHz
@ PJ0702
@ PJ0701 PL0701 JUMP_43X39

4
JUMP_43X39 1UH_PH041H-1R0MS_20%
2 1 VIN_+2.5VSP 10 1 2.5VSP_LX 1 2 +2.5VSP 2 1 VCC2R5A
VCC5M

PG
2 1 PVIN2 LX1 2 1

2
9 2 EMC_NS@
PVIN1 LX2

1
PR0702

1
C PC0701 PC0702 8 3 1/10W_4.7_5%_0603 C
SVIN1 LX3

1
10U_10V_K_X5R_0603 10U_10V_K_X5R_0603 EMC@ EMC@

2
PU0701 PR0703 PC0703

2 1

2200P_25V_K_X7R_0402
22U_6.3V_M_X6S_0805_H1.25

22U_6.3V_M_X6S_0805_H1.25

0.1U_25V_K_X5R_0402
RT8068AZQW_WDFN10_3X3 1/16W_31.6K_1%_0402 22P_50V_J_NPO_0402

1
20170901 5 6 EMC_NS@

GND

2
EN FB

PC0707

PC0705

PC0708

PC0706
@ PR0701 PC0704

NC
1/16W_0_5%_0402 680P_50V_K_X7R_0402

2
1 2
13,85,106 -PCH_SLP_S4

11

7
2
1 2 EN_2.5VSP
15,85,106,123 A_ON

1
PR0704 @ PR0705 @ PC0709
0_0402_SP 1/16W_1M_5%_0402 0.22U_10V_K_X5R_0402

2
PR0706

1
1/16W_10K_1%_0402

2
B B

A Security Classification LC Future Center Secret Data Title A

Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCC2R5A(RT8068A)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 107 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

close to PL1102 (SA)

PT0801 PR0802 PR0803


PC0801 VCCST
100K_0402_1%_NCP15WF104F03RC 1/16W_12K_1%_0402 1/10W_7.5K_1%_0603
2 1 1 2 1 2 1 2
111 CSN_1PH SW_1PH 111
PR0801

2
0_0402_SP 1000P_25V_K_X7R_0402
1 2 1 2 VSN_1PH PR0805
15 VSSSA_SENSE
1/16W_10_1%_0402

1/16W_100_1%_0402

1/16W_56.2_1%_0402
PR0804 PC0803 PC0805

1/16W_45.3_1%_0402
PC0802 1/16W_1.8K_1%_0402 3300P_50V_K_X7R_0402 0.01U_25V_K_X7R_0402

1
1000P_25V_K_X7R_0402 1 2 1 2 20190413

2
PR0809

PR0806

PR0807
PC0804

2
PR0808 PR0810 PC0806 0.1U_25V_K_X5R_0402

2
VCC3M

1/16W_93.1K_1%_0402
0_0402_SP 1/16W_2.74K_1%_0402 0.01U_25V_K_X7R_0402
1 2 1 2 VSP_1PH 1 2 @
15 VCCSA_SENSE

1
220P_50V_K_X7R_0402
D D

1/16W_10K_1%_0402
PR0814
PC0807

1
1
VGATE 13,85 1/16W_49.9_1%_0402
1

PC0809

PR0813
2 1 81215_SCLK 1 2

2
SVID_CLK 14
PWM1_1PH/ICCMAX_1PH 111

PR0811
1000P_25V_K_X7R_0402 1000P_25V_K_X7R_0402 PR0812 PR0815 0_0402_SP
1
PC0808 2 2 0_0402_SP 81215_ALERT 1 2

2
-SVID_ALERT 14
1 2

1
PR0816 PR0818 81215_SDIO 1 2
SVID_DATA 14
1/16W_31.6K_1%_0402 1/16W_18.7K_1%_0402
PR0819 1 2 PR0817
PR0821 1/16W_750_1%_0402 PC0810 1 2 1/16W_10_1%_0402
0_0402_SP 1 2 1 2 81215_SCLK CPUCORE_ON 13,85
1 2 VSP_4PH 81215_ALERT PR0820
14 VCC_SENSE 81215_SDIO
0.015U_25V_K_X7R_0402 0_0402_SP
1 2
PC0812

2
1000P_25V_K_X7R_0402 PC0811 PR0822
15P_50V_J_NPO_0402 0_0402_SP
PR0823 PR0824 VSN_1PH 1 2

1
0_0402_SP 1/16W_1.37K_1%_0402 VCCGT_SENSE 14
1 2 1 2 VSN_4PH
14 VSS_SENSE

1
VSP_1PH PC0813
PC0814 1000P_25V_K_X7R_0402
1 2

2
PR0825 PR0826
2200P_25V_K_X7R_0402 1/16W_1.5K_1%_0402 0_0402_SP
1 2 1 2 VSSGT_SENSE 14

PC0815
PC0816 PC0817 1 2

53

52
51
50
49
48
47
46
45
44
43
42
41
40
47P_50V_J_NPO_0402 PR0827 470P_50V_K_X7R_0402
1/16W_49.9_1%_0402 2200P_25V_K_X7R_0402

PAD

VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH
VR_RDY
PWM_1PH/ICCMAX_1PH
EN
SCLK
ALERT#
SDIO
1 2 1 2 1 2 PR0830
1/16W_24.9K_1%_0402 PC0819 PC0820
PR0828 PR0829 1 2 PR0831 -PROCHOT 6,85,102 PR0832 470P_50V_K_X7R_0402 47P_50V_J_NPO_0402
1/16W_3.3K_1%_0402 1/16W_1K_1%_0402 1/16W_100_5%_0402 PR0833 1/16W_49.9_1%_0402
C 1 2 1 2 1 2 PC0821 VSP_4PH 1 39 2 1 1/16W_28K_1%_0402 1 2 1 2 1 2 C
VSN_4PH VSP_4PH VR_HOT#
PC0818 470P_50V_K_X7R_0402 2 38 1 2 PC0822
VSN_4PH VSP_2PH
2200P_25V_K_X7R_0402 1 2 3 37 1 2 1 2 1 2
DIFFOUT_4PH IMON_4PH VSN_2PH
4 36 1 2 PC0823 PR0834 PR0835
FB_4PH DIFFOUT_4PH IMON_2PH DIFFOUT_2PH
5 35 470P_50V_K_X7R_0402 1/16W_1K_1%_0402 1/16W_3.3K_1%_0402
COMP_4PH FB_4PH DIFFOUT_2PH FB_2PH
6 34 2200P_25V_K_X7R_0402
ILIM_4PH COMP_4PH FB_2PH COMP_2PH
BASE@ PR0836 1 21/16W_15K_5%_0402 7 PU0801 33
ILIM_4PH COMP_2PH

1/16W_165K_1%_0402 1/16W_73.2K_1%_0402
PREF@ PR0873 1 21/16W_18.2K_1%_0402 8 NCP81215PMNTXG_QFN52_6X6 32 ILIM_2PH 1
PR0837 21/16W_13.7K_1%_0402
CSCOMP_4PH ILIM_2PH
1/16W_73.2K_1%_0402

close to PL0903 (VCCCPUCORE) CSCOMP_4PH 9 31 CSCOMP_2PH close to PL1003 (VCCGFXCORE_I)


CSSUM_4PH CSCOMP_2PH
680P_50V_K_X7R_0402

10 30 CSSUM_2PH
CSREF_4PH CSSUM_2PH

1
560P_50V_K_X7R_0402

CSP1_4PH 11 29

PWM1_2PH_B/ICCMAX_2PH
CSP1_4PH CSREF_2PH
1

680P_50V_K_X7R_0402

560P_50V_K_X7R_0402

PR0839
PT0802 CSSUM_4PH CSP2_4PH 12 28 CSP1_2PH

PWM2_2PH_B/ROSC_1PH
PWM1_4PH/ICCMAX_4PH
CSP2_4PH CSP1_2PH
PR0838

CSP3_4PH CSP2_2PH

PWM4_4PH/ROSC_MPH
MURAT_NCP15WM224E03RC 1 1 13 27 PT0803
CSP3_4PH CSP2_2PH
1/16W_165K_1%_0402

PC0825

MURAT_NCP15WM224E03RC

TTSENSE_1PH/PSYS
1 1
PC0826

PC0827

PC0828
PWM3_4PH/VBOOT
PR0840

PWM2_4PH/ADDR

2
1

1
1/16W_90.9K_1%_0402 PC0829
2

2 1

2 2

TTSENSE_4PH

TTSENSE_2PH
1 2 PC0824 0.1U_25V_K_X5R_0402
109 SW1_4PH

2
PR0841 2 2
0.1U_25V_K_X5R_0402
2

2
CSP4_4PH
PR0842

PR0843
1/16W_90.9K_1%_0402
1 2
109 SW2_4PH

DRON
VRMP
PREF@ PR0844 PR0845

VCC
1/16W_90.9K_1%_0402 VSYS15 1/16W_54.9K_1%_0402
1

1
1 2 1 2 SW1_2PH
109 SW3_4PH

14
15
16
17
18
19
20
21
22
23
24
25
26
2

20190415 20190415
PR0846
1/16W_1K_1%_0402 PC0830 CSP4_4PH
0.1U_25V_K_X5R_0402 PSYS 102
PC0831 2 1 TSENSE_4PH PC0832
1

PR0847 0.01U_25V_K_X7R_0402 0.1U_25V_K_X5R_0402 PR0849


1 2 1 2 TSENSE_2PH 2 1 1/16W_20K_1%_0402
109 CSN1_4PH
1/16W_10_1%_0402 VCC5M 2 1 1 2

1U_10V_K_X5R_0402
PR0850 PR0848 1 2
1 2 CSREF_4PH 1/10W_2.2_1%_0603 CSREF_2PH 1
PR0852 2
109 CSN2_4PH CSN1_2PH 110

1/16W_66.5K_1%_0402

1/16W_54.9K_1%_0402
1/16W_10_1%_0402 PR0851 1/16W_10_1%_0402
2
PC0833

PREF@ PR0853 1/16W_25.5K_1%_0402

1/16W_4.32K_1%_0402
1 2
109 CSN3_4PH

2
PREF@ PR0854

BASE@ PR0874
1/16W_10_1%_0402
1

1
B PWM1_2PH/ICCMAX_2PH 110 B

PR0855
PR0856

2
1/16W_97.6K_1%_0402
2

2
109,110,111 DVON

1
PR0857

2
1/16W_97.6K_1%_0402
109 PWM1_4PH/ICCMAX_4PH
PR0858

1
PR0859 1/16W_2K_1%_0402
109 PWM2_4PH/ADDR CSP1_2PH
1/16W_2K_1%_0402 1 2
SW1_4PH 1 2 CSP1_4PH SW1_2PH 110
2

1
@PR0860 PC0834
109 PWM3_4PH/VBOOT
1

PC0835 1/16W_100K_1%_0402 0.1U_25V_K_X5R_0402

2
2

0.1U_25V_K_X5R_0402
PR0861 Vboot for Core/GT CSREF_2PH
2

CSREF_4PH 1/16W_24.9K_1%_0402
PR0862
1/16W_2K_1%_0402 24.9Kohm 0V
1

SW2_4PH 1 2 CSP2_4PH
2
1

@PR0863 169Kohm 1.05V


PC0836 1/16W_100K_1%_0402
0.1U_25V_K_X5R_0402
2

CSREF_4PH
PREF@ PR0864
1/16W_2K_1%_0402 TSENSE_4PH TSENSE_2PH
SW3_4PH 1 2 CSP3_4PH
2

Vinafix
1

@PR0865
PREF@ PC0837 1/16W_100K_1%_0402 PR0866 PR0867
0.1U_25V_K_X5R_0402 VCC5M VCC5M 1/16W_1.5K_1%_0402 1/16W_1.5K_1%_0402 VCC5M
2

CSREF_4PH
1

1
2

2
BASE@
2

PR0868 PR0869 PR0870 PR0871 PR0872


1/16W_7.32K_1%_0402

1/16W_7.32K_1%_0402

A 1/16W_1K_1%_0402 1/16W_1K_1%_0402 1/16W_1K_1%_0402 A


PT0804 PT0805
100K_0402_1%_NCP15WF104F03RC 100K_0402_1%_NCP15WF104F03RC
1

1
1

CSP3_4PH CSP4_4PH CSP2_2PH


close to PU0901 close to PU7
(CORE) (VCCGFXCORE_I)

LC Future Center Secret Data Project Name

E14/E15 NM-C421
Rev Title
0.1 DC/DC IMVP8
Date: Thursday, July 04, 2019 Sheet 108 o f 128
5 4 3 2 1

VER1.10

VInafix.com
5 4 3 2 1

PL0901
VSYS15 BLM18KG300TN1D_2P
VSYS15 51,54,100,102,103,105,106,108,110,111,114,118,120,127
1 2
VCCCPUCORE VCCCPUCORE 14,112 EMC@ VSYS15
EMC@ EMC@
PC0902 PC0903 PC0904 PC0905 PC0906 PC0907 PL0902

47P_50V_J_NPO_0402
1 BLM18KG300TN1D_2P

1
2200P_25V_K_X7R_0402

PC0901
0.1U_25V_K_X5R_0402
1 2

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
EMC@ For Perf

2
2 RF_NS@
1/10W_2.2_1%_0603 VCCCPUCORE

5
PR0901
2 1 PQ0901 TDC= 58A
AON6380_DFN8-5
IccMAX=85A

2
D PC0908 D
0.22U_25V_K_X7R_0603
HG_B1 4 OCP=91A

1
PU0901
NCP81151MNTBG_DFN8_2X2
1 8 PL0903
BST DRVH
0.15UH_CMLE064T-R15MS0R725-88_35A_20%

3
2
1
2 7 SW_B1 1 4
108 PWM1_4PH/ICCMAX_4PH PWM SW
VCCCPUCORE For Base

2
3 6 EMC@ 2 3 1
108,110,111 DVON EN GND
PR0902 PC0909

VCC5M
4
VCC DRVL
5 1/10W_4.7_5%_0603 + VCCCPUCORE

330U_D2_2VM_R9M
FLAG
TDC= 48A

2 1
1
PC0910 LG_B1 4 4 2
1U_10V_K_X5R_0402 EMC@ IccMAX=70A

9
PC0911
OCP = 76A

2
680P_50V_K_X7R_0402

1
3
2
1

3
2
1
PQ0902 PQ0903
AONS36323_DFN AONS36323_DFN

CSN1_4PH 108

20190430 SW1_4PH 108

PL0904
BLM18KG300TN1D_2P
1 2
EMC@ VSYS15
EMC@ EMC@
PC0912 PC0913 PC0914 PC0915 PC0916 PC0917 RF_NS@ PL0905

47P_50V_J_NPO_0402
1 BLM18KG300TN1D_2P

1
2200P_25V_K_X7R_0402

PC0918
0.1U_25V_K_X5R_0402
1 2

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
EMC@
C C

2
2
1/10W_2.2_1%_0603

5
PR0903
2 1 PQ0904
AON6380_DFN8-5

2
PC0919
0.22U_25V_K_X7R_0603
HG_B2 4

1
PU0902
NCP81151MNTBG_DFN8_2X2
1 8 PL0906
BST DRVH
0.15UH_CMLE064T-R15MS0R725-88_35A_20%

3
2
1
2 7 SW_B2 1 4
108 PWM2_4PH/ADDR PWM SW
VCCCPUCORE

2
DVON 3 6 EMC@ 2 3 1
EN GND
PR0904 PC0920
4 5 +
1/10W_4.7_5%_0603
VCC5M VCC DRVL

330U_D2_2VM_R9M
FLAG

2 1
1

PC0922 LG_B2 4 4 2
1U_10V_K_X5R_0402 EMC@
9

PC0921
2

680P_50V_K_X7R_0402

1
3
2
1

3
2
1
PQ0905 PQ0906
AONS36323_DFN AONS36323_DFN

CSN2_4PH 108

20190430 SW2_4PH 108

B B
PREF_EMC@
PL0907
For Perf PREF_EMC@
PREF_EMC@ PREF_RF_NS@
BLM18KG300TN1D_2P
1 2
VSYS15
PREF@ PREF@ PREF@ PREF@ PREF_EMC@
PC0923 PC0924 PC0925 PC0926 PC0927 PC0928 PL0908

47P_50V_J_NPO_0402
1 BLM18KG300TN1D_2P
1

1
2200P_25V_K_X7R_0402

PC0929
0.1U_25V_K_X5R_0402
1 2
10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
2

2
2
PREF@ PR0905
5

1/10W_2.2_1%_0603 PREF@
2 1 PQ0907
PREF@ AON6380_DFN8-5
2

PC0930
0.22U_25V_K_X7R_0603
PREF@ HG_B3 4
1

PU0903
NCP81151MNTBG_DFN8_2X2 PREF@
1 8 PL0909
BST DRVH
0.15UH_CMLE064T-R15MS0R725-88_35A_20%
3
2
1

2 7 SW_B3 1 4
108 PWM3_4PH/VBOOT PWM SW
VCCCPUCORE
5

DVON 3 6 PREF_EMC@ 2 3 PREF@ 1


EN GND
PR0906 PC0933
4 5 +
1/10W_4.7_5%_0603
VCC5M VCC DRVL

330U_D2_2VM_R9M
FLAG

PREF@
2 1
1

PC0932 LG_B3 4 4 2
1U_10V_K_X5R_0402 PREF_EMC@
9

PC0931
2

680P_50V_K_X7R_0402
1

PREF@ PREF@
3
2
1

3
2
1

PQ0908 PQ0909
AONS36323_DFN AONS36323_DFN

CSN3_4PH 108

A A
20190430 SW3_4PH 108

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCCCPUCORE (NCP81151)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 109 of 128


5 4 3 2 1

VER1.10

VInafix.com
5 4 3 2 1

VSYS15 VSYS15 51,54,100,102,103,105,106,108,109,111,114,118,120,127


PL1001
VCCGFXCORE_I VCCGFXCORE_I 14,112
EMC@ EMC@ BLM18KG300TN1D_2P
RF_NS@ 1 2
VSYS15
EMC@
PC1002 PC1003 PC1004 PC1005 PC1006 PC1007 PL1002

33U_D2_25VM_R40M

33U_D2_25VM_R40M

33U_D2_25VM_R40M
47P_50V_J_NPO_0402
1 BLM18KG300TN1D_2P

1
2200P_25V_K_X7R_0402

PC1008
0.1U_25V_K_X5R_0402
1 2

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
1 1 1
EMC@ + + +

PC1009

PC1010

PC1001
D D

2
2
1/10W_2.2_1%_0603
VCCGFXCORE_I

5
PR1001 2 2 2
2 1 PQ1001 @ @ @
AON6380_DFN8-5 TDC= 18A

2
PC1011
0.22U_25V_K_X7R_0603
HG_A1
IccMAX=31A
PU1001 4
OCP min = 40A

1
NCP81253MNTBG_DFN8_2X2

1 8 PL1003
BST DRVH
0.15UH_CMLE064T-R15MS0R725-88_35A_20%

3
2
1
2 7 SW_A1 1 4
108 PWM1_2PH/ICCMAX_2PH PWM SW
VCCGFXCORE_I

2
3 6 EMC@ 2 3
108,109,111 DVON EN GND
PR1002 1

FLAG
4 5 1/10W_4.7_5%_0603
VCC5M VCC DRVL + PC1012
330U_D2_2VM_R9M

1 1
1

PC1013 LG_A1 4 4

9
1U_10V_K_X5R_0402 EMC@ 2
PC1014
2

680P_50V_K_X7R_0402

2
3
2
1

3
2
1
C C
PQ1002 PQ1003
AONS36323_DFN AONS36323_DFN
CSN1_2PH 108

SW1_2PH 108

20190430

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCCGFXCORE_I (NCP81253)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 110 of 128


5 4 3 2 1

VER1.10

VInafix.com
5 4 3 2 1

VSYS15 VSYS15 51,54,100,102,103,105,106,108,109,110,114,118,120,127

VCCSA VCCSA 15,112

D D
PL1101
EMC@EMC@ RF_NS@ BLM18KG300TN1D_2P
1 2
VSYS15
PC1102 PC1103 PC1104 PC1105 EMC@

47P_50V_J_NPO_0402
1

1
2200P_25V_K_X7R_0402
0.1U_25V_K_X5R_0402

PC1101
10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
2

2
2
1/10W_2.2_1%_0603 20190415

5
PR1101
2 1

+VCC_SA

2
PC1106
0.22U_25V_K_X7R_0603
PU1101 HG_1PH4 PQ1101 TDC= 4A

1
C NCP81253MNTBG_DFN8_2X2 AONR32340C_DFN8-5 C
IccMAX=6A
1 8 PL1102
BST DRVH
0.47UH_PCMB063T-R47MS3R675_18A_20% OCP = 9A

3
2
1
2 7 SW_1PH_SA 1 4
108 PWM1_1PH/ICCMAX_1PH PWM SW
VCCSA

5
3 6 2 3
108,109,110 DVON EN GND
FLAG

4 5
VCC5M VCC DRVL

2
EMC@
PR1102
1

PC1107 LG_1PH 4 PQ1102 1/10W_4.7_5%_0603


9

1U_10V_K_X5R_0402 AONR32340C_DFN8-5
2

1 1
EMC@

3
2
1
PC1108
680P_50V_K_X7R_0402

2
CSN_1PH 108
B B
SW_1PH 108

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCCSA (NCP81253)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 111 of 128


5 4 3 2 1

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VCCGFXCORE_I
[Decoupling Requirements for Comet Lake U 4+2 Processor]22uFx15, 47uFx4
VCCCPUCORE Primary side cap.
[Decoupling Requirements for Comet Lake U 4+2 Processor]10uFx8, 47uFx20
Primary side cap.

VCCCPUCORE
VCCGFXCORE_I

D 1 1 1 1 1 1 1 1 1 1 D
1 1 1 1 1 1 1 1 1
Cost@ PC1202 PC1203 PC1204 PC1205 PC1206 PC1207 PC1208 PC1209 PC1210 PC1219
PC1201 PC1211 PC1212 PC1213 PC1214 PC1215 PC1216 PC1217 PC1218 22U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_0603
22U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_0603 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 2 2 Cost@ Cost@ Cost@ Cost@

VCCCPUCORE

VCCGFXCORE_I

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Cost@
PC1230 PC1231 PC1232 PC1233 PC1234 PC1235 PC1236 PC1237 PC1238 PC1220 PC1221 PC1222 PC1223 PC1224 PC1225 PC1226 PC1227 PC1228 PC1229
22U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_0603 22U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_0603
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Cost@ Cost@ Cost@ Cost@

VCCCPUCORE

VCCGFXCORE_I

1 1 1
1
Cost@ PC1239 PC1240 PC1241
PC1243 22U_6.3V_M_X5R_060322U_6.3V_M_X5R_060322U_6.3V_M_X5R_0603
22U_6.3V_M_X5R_0603 2 2 2
2 Cost@ Cost@
C C

VCCGFXCORE_I
VCCCPUCORE [Decoupling Requirements for Comet Lake U 4+2 Processor]1uFx15, 10uFx15
[Decoupling Requirements for Comet Lake U 4+2 Processor]10uFx8, 47uFx20 Secondary side cap.
Primary side cap.
VCCCPUCORE
VCCCPUCORE
VCCGFXCORE_I VCCGFXCORE_I
22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

2 2 2 2 2 2

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603
PC1249

PC1250

PC1251

PC1252

PC1253

PC1254

2 2 2 2 2 2 1
PC1255

PC1256

PC1257

PC1258

PC1259

PC1261

PC1244

2 2 2 2 2 2 2 2 2 2 2 2

PC1262

PC1263

PC1264

PC1265

PC1266

PC1267

PC1268

PC1269

PC1270

PC1271

PC1272

PC1273
1 1 1 1 1 1
1 1 1 1 1 1 2
1 1 1 1 1 1 1 1 1 1 1 1

Cost@
Cost@ Cost@

Cost@

Cost@

Cost@

Cost@

Cost@

Cost@

Cost@
B VCCCPUCORE B
22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

1 1 1 1 1 1 1 1 1 1 1
PC1245

PC1246

PC1247

PC1248

PC1294

PC1295

PC1296

PC1297

PC1298

PC1299

PC1274

2 2 2 2 2 2 2 2 2 2 2

Cost@ Cost@ Cost@

VCCSA
[Decoupling Requirements for Comet Lake U 4+2 Processor]10uFx6, 47uFx2, 10uFx7
Primary side cap.

VCCSA
VCCSA
22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

A A
22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

2 2 2 2 2 2 2 2 2
PC1288

PC1289

PC1290

PC1291

PC1292

PC1293

PC1284

PC1285

PC1286

1 1 1 1 1 1 1 1 1

@ @ Title
@
Security Classification LC Future Center Secret Data
Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 112 of 128


5 4 3 2 1

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5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 113 of 128

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5 4 3 2 1

VSYS15 VSYS15 51,54,100,102,103,105,106,108,109,110,111,118,120,127

VCC1R05_SUS VCC1R05_SUS 13,16,50,123

VCC1R05_SUS
D
FSW=700KHz D

TDC:10A
OCP:13A

PJ1402
2 1
2 1
@ JUMP_43X118

PR1403 PJ1403

1
0_0402_SP 2 1
PR1402 +1.05VALWP_BST
1 2 VCC1R05P 2 1 VCC1R05_SUS
1/20W_150K_5%_0201 @ JUMP_43X118

1
11

10
PC1402 PL1403
0.22U_25V_K_X5R_0402 0.68UH_PCMC063T-R68MN_15.5A_20%

BST
CLM

2
C C
PJ1401 EMC@ EMC@
2 1 +1.05VALWP_VIN 1 9+1.05VALWP_SW 1 2
VSYS15 2 1 VIN SW VCC1R05P

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603
@ JUMP_43X79 EMC@ RF_NS@ PR1401
2200P_25V_K_X7R_0402

2200P_25V_K_X7R_0402

0.1U_25V_K_X5R_0402
EMC@ 1/16W_10K_1%_0402 EMC_NS@

1/16W_5.1K_1%_0402
10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

2
0.1U_25V_K_X5R_0402

2 SUS_ON2

47P_50V_J_NPO_0402
1 1 15

PC1410
EN
1

1
PC1401

PC1403

PC1404

PC1408

PC1409

PC1412

PC1413

PC1414

PC1415

PC1416
PR1404
PC1405

2
PC1406

PR1405
13 +1.05VALWP_FB 1/10W_4.7_5%_0603
FB

1
PC1411 PU1401 PC1407
2

2
2 0.1U_16V_K_X7R_0402_MURATA PR1406 220P_25V_K_X7R_0201_MURATA

1
NB693GQ-Z_QFN16_3X3 1/20W_100K_1%_0201

2
12 1 2
PG VCC3M

1
PR1408 PR1407
85,116 M_ON2

1
0_0201_SP EMC_NS@ 1/20W_499_1%_0201 PR1409
1 2 14 16 +1.05VALWP_VIN PC1417 1/20W_40.2K_1%_0201
MODE NC2
680P_50V_K_X7R_0402

2
1 2 3 8 +1.05VALWP_SW
VCC3M 3V3 NC1
PR1410
1/16W_5.1_5%_0402

PGND1

PGND2

PGND3

PGND4

PGND5
2
B PC1418 B

1
1U_10V_K_X5R_0402
PR1411
1

1/16W_60.4K_1%_0402

2
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCC1R05_SUS(NB653)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 114 of 128


5 4 3 2 1

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D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 115 of 128

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5 4 3 2 1

VCC3M VCC3M 4,11,13,15,16,50,51,66,78,84,85,88,92,102,103,105,106,108,114,118,120,123,124,126,127,128

VCC5M VCC5M 50,54,59,69,73,78,84,103,107,108,109,110,111,118,123,125,127

VCC1R8_SUS VCC1R8_SUS 16,50,66,78,80,85

D D

VCC1R8_SUS
TDC: 2A
PR1601
0_0402_SP
1 2 VDD_+1.8V @ PJ1602
VCC5M JUMP_43X39
1
PU1601
C PC1601 2 1 VCC1R8_SUS C
2 1
1U_25V_K_X5R_0402 11
2 Pad

1
10 1 +1.8VSP
VDD VOUT1

1
PJ1601 PR1602
2 1 VIN_+1.8VSP 9 2 1/16W_12.7K_1%_0402 PC1602 EMC@ EMC@
VCC3M 2 1 VIN3 VOUT2
22P_50V_J_NPO_0402

2200P_25V_K_X7R_0402
22U_6.3V_M_X6S_0805_H1.25

22U_6.3V_M_X6S_0805_H1.25

22U_6.3V_M_X6S_0805_H1.25

0.1U_25V_K_X5R_0402
JUMP_43X39 8 3

2
VIN2 VOUT3
1

PC1609
@

@ PC1605

PC1606

PC1607

PC1608
PC1603 PC1604 7 4 +1.8V_FB
VIN1 ADJ
10U_10V_K_X5R_0603 10U_10V_K_X5R_0603
2

2
6 5
EN PGOOD

1
RT9059GQW_WDFN10_3X3
PR1603
PR1604 1/16W_10K_1%_0402
0_0402_SP

2
B 1 2 M_ON2_1.8V B
85,114 M_ON2
1
PC1610
0.1U_6.3V_K_X7R_0402
2

A Security Classification LC Future Center Secret Data Title A

Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCC1R8_SUS (RT9059)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 116 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 117 of 128

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5 4 3 2 1

DIS_EMC@
VSYS15 PL1801
VSYS15 51,54,100,102,103,105,106,108,109,110,111,114,120,127
BLM18KG300TN1D_2P
VCCGFXCORE_D 1 2
VCCGFXCORE_D 42
DIS_EMC@
VDDCI PL1802
VDDCI 42
BLM18KG300TN1D_2P
VIN_+VDDC_1 1 2
DIS_EMC@ DIS@ DIS@ VSYS15

2200P_25V_K_X7R_0402
PRE-PWROK METAL VID CODES DIS_RF_NS@ DIS_EMC@

0.1U_25V_K_X5R_0402
47P_50V_J_NPO_0402

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
1

1
PC1802

PC1803

PC1804

PC1805

PC1806
SVC SVD Boot Voltage
DIS@
PQ1801
0 0 1.1V VCCGFXCORE_D

2
5

5
2
AON7380_DFN8-5
0 1 1.0V DIS@
PQ1802
(R19M-P25-70 )
1 0 0.9V(Default) VDDC_UGATE1 4 4 AON7380_DFN8-5 TDC=33A
EDC=77A
1 1 0.8V

1
2
3

1
2
3
OCP=90A
PL1803
PR1801 0.15UH_CMLE064T-R15MS0R725-88_35A_20% DIS@
0_0201_SP VDDC_PHASE1 1 4
1 2
VCCGFXCORE_D

470U_D2_2VM_R4.5M
DIS@
D 42 GPU_GND_SENSE PR1803 2 3 D

330U_D2_2VM_R9M

0.1U_10V_K_X5R_0402_MURATA
1 1

2
1/10W_2.2_5%_0603

22U_6.3V_M_X5R_0603
DIS@ DIS_EMC@

2
VDDC_BOOT1 1 + +

PC1808

PC1809

PC1810

PC1811
2 1 2 PQ1803 PR1804 DIS@

5
2 1 PR1805 AON7318 DIS@ 1/10W_4.7_5%_0603
PC1801 DIS@ PC1812 0_0402_SP DIS@ PQ1804

1
1 2 GFXCORE_D_PWRGD 50 2 2
DIS@ PR1802 68P_25V_J_NPO_0201 PC1807 AON7318

1
1/20W_100_5%_0201 1 2 1 2 VDDC_LGATE1 4
0.1U_25V_M_X7R_0603 4
VCCGFXCORE_D 2 1

2
330P_25V_K_X7R_0201 DIS_EMC@

1
2
3

1
2
3
DIS@ PR1806 R19M@ PR1809 PC1813 DIS@
1/20W_100_5%_0201 DIS@ 1/20W_66.5K_1%_0201 680P_50V_K_X7R_0402

1
42 GPU_VDD_SENSE 1 2 1 2 1 2 DIS@
PR1810 PR1811 PR1812
PR1807 DIS@ PR1808 R18M@ PR1870 1/20W_10K_1%_0201
0_0201_SP 1/20W_10K_1%_0201 1/20W_38.3K_1%_0201 1 2
0_0201_SP 0_0201_SP
VCCGFXCORE_D
1 2 VCC3M DIS_EMC@
(R18M-M2-60 )

2
DIS@ TDC=25A
PC1814

1
3662_VREF 1 2 2 1 PC1815 PR1814
DIS@ EDC=60A
0.1U_25V_K_X5R_0201 1/20W_1.18K_1%_0201 OCP=78A

2
330P_25V_K_X7R_0201 PR1813 VDDC_ISEN1P 1 2
0_0201_SP DIS@
@

1
VCC3B_VGA

VDDC_ISEN1N

VDDC_ISEN1P

VDDC_ISEN2P

1
3662_PGOOD
@PR1815

VDDC_COMP
DIS@

VDDC_VSEN

3662_RGND
1/16W_402_1%_0402 PC1816

VDDC_FB
VDDC_BOOT2 0.47U_25V_M_X5R_0201

2
2
1

VDDC_UGATE2

2
PR1816 PR1817 PR1818 VDDC_ISEN1N 1 2

1
1/20W_105K_1%_0201 1/20W_316K_1%_0201 DIS@ DIS@
1/20W_64.9K_1%_0201 PR1819 PC1817 PR1820 PR1822

10

1
1/20W_4.7K_5%_0201 0.1U_25V_K_X5R_0201 1/20W_1_1%_0201 1/20W_1.18K_1%_0201
2

1
DIS@ VDDC_ISEN2P 1 2

ISEN1N

ISEN1P

VSEN

ISEN2P

FB

COMP

RGND

PGOOD

BOOT2

UGATE2
1
DIS@ DIS@ DIS@ DIS@ PC1818
DIS@ PR1821 40 VDDC_PHASE2 0.1U_25V_K_X5R_0201

2
PHASE2
0_0201_SP
-PROCHOT_GPU 1 2 11 39 VDDC_LGATE2 DIS_EMC@
85 -PROCHOT_GPU VRHOT_L LGATE2
1

PL1804
PR1823 PR1824 VDDC_TSEN 12 38 VDDC_BOOT1 BLM18KG300TN1D_2P
TSEN BOOT1
1/20W_1.65K_1%_0201 1/20W_3.01K_1%_0201 1 2
@ PR1825 3662_SET1 13 37 VDDC_UGATE1 DIS_EMC@
SET1 UGATE1
1/20W_0_5%_0201 PL1805
2

1 2 VDDC_IMON 14 PU1801 36 VDDC_PHASE1 BLM18KG300TN1D_2P


DIS@ DIS@ 50 VDDC_IMON_PCC IMON PHASE1 VIN_+VDDC_2
RT3662ACGQW_WQFN40_5X5 1 2
3662_VREF 15
VREF_PINSET LGATE1
35 VDDC_LGATE1 PR1826 DIS_EMC@ VSYS15
0_0402_SP

2200P_25V_K_X7R_0402
VDDCI_IMON 16 34 3662_PVCC 1 2
IMON_NB PVCC VCC5M DIS_RF_NS@ DIS_EMC@ DIS@ DIS@

0.1U_25V_K_X5R_0402
47P_50V_J_NPO_0402

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
3662_SET1 -PLTRST_FAR_VGA 1 2 GPU_POK_R 18 17 3662_VCC 1 2 1
37 -PLTRST_FAR_VGA PWROK VCC

1
PC1819

PC1820

PC1823

PC1821

PC1822
PR1827 0_0201_SP
PR1831 1/20W_61.9K_1%_0201 1 2 GPU_SVC_R 19 33 VDDCI_LGATE PR1828
VDDC_TSEN 41 GPU_SVC SVC LGATE_NB
1 2 DIS@ PR1829 1/16W_100_1%_0402 1/16W_4.7_1%_0402

2
1 2 GPU_SVD_R 20 32 VDDCI_PHASE 2
41 GPU_SVD DIS@ DIS@ DIS@
1/16W_100_1%_0402 SVD PHASE_NB

2
DIS@ DIS@ PR1830 PQ1805 PQ1806

5
1 2 GPU_SVT_R 21 31 VDDCI_UGATE PC1824 PC1825 AON7380_DFN8-5 AON7380_DFN8-5
PT1801 41 GPU_SVT SVT UGATE_NB

ISENN_NB

ISENP_NB

COMP_NB
PR1832 0_0402_SP

BOOT_NB
DIS@

TSEN_NB
2.2U_10V_K_X5R_0402 2.2U_10V_K_X5R_0402

1
1 2

FB_NB
VDDIO
DIS@ DIS@ VDDC_UGATE2 4 4

GND

VIN

EN
DIS@ 100K_0402_1%_NCP15WF104F03RC

1
2
3

1
2
3
C 1 2 VDDCI_TSEN C

41

22

23

24

25

26

27

28

29

30
PR1833 1/20W_61.9K_1%_0201 DIS@
1

PL1806
PT1802
PR1834 DIS@ 0.15UH_CMLE064T-R15MS0R725-88_35A_20% DIS@

3662_VDDIO
DIS@

VDDCI_COMP
VDDC_PHASE2

VDDCI_BOOT
PR1835 1 2 1 4

VDDCI_TSEN
DIS@ DIS_EMC@

VDDCI_EN_1
VDDCI_ISEN1N

VDDCI_ISEN1P
1/20W_32.4K_1%_0201 1/20W_23.7K_1%_0201
VCCGFXCORE_D

470U_D2_2VM_R4.5M
DIS@ DIS@

VDDCI_FB

3662_VIN
PR1837 2 3

330U_D2_2VM_R9M

470U_D2_2VM_R4.5M
DIS@ DIS@

0.1U_10V_K_X5R_0402_MURATA
PR1836 1 1 1
2

100K_0402_1%_NCP15WF104F03RC

2
1/10W_2.2_5%_0603 PQ1807

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603
DIS@ DIS@ DIS_EMC@

2
VDDC_BOOT2 1 + + +

PC1827

PC1831

PC1828

PC1829

PC1832

PC1833
1 2 2 1 2 AON7318 PR1838
+VDDIO_GPU DIS@
1

5
PQ1808 1/10W_4.7_5%_0603
PR1839 PR1841 1/20W_2.2_5%_0201 PR1842 DIS@ AON7318

1
1
1/20W_18.2K_1%_0201 PR1840 1/20W_280_1%_0201 PR1867 0_0402_SP PC1826 2 2 2
DIS@ R18M@ @

2 1
1/16W_1.15K_1%_0402 PC1830 1/20W_10K_1%_0201 2 1 VDDCI_EN 50 VDDC_LGATE2 4
0.1U_25V_M_X7R_0603 4
1 2 DIS_EMC@
VCC5M
2

2
1U_6.3V_K_X5R_0201 PC1834

1
2
3

1
2
3
DIS@ DIS@ DIS@ DIS@

1
R18M@ PR1868 680P_50V_K_X7R_0402

1
1/20W_10K_1%_0201 1 2 PR1844 PR1845
1 2 VIN_+VDDC_1 0_0201_SP 0_0201_SP
PR1843
1/16W_4.7_1%_0402

2
1
PC1837 PC1835
DIS@
PC1836
DIS@ PR1846 68P_25V_J_NPO_0201 0.1U_25V_K_X5R_0201

2
1/20W_10_1%_0201 1 2 1 2
2 1 DIS@
VDDCI
330P_25V_K_X7R_0201 DIS@ DIS@
3662_VREF PR1849 PR1850
3662_VREF DIS@ 1/20W_49.9K_1%_0201 1/20W_1.18K_1%_0201
1 2 VDDCI_FB_R 1 2 1 2 VDDC_ISEN2P 1 2
42 GPU_VDDCI_SENSE
R19M@ PR1852 1/20W_11.8K_1%_0201
1 2 PR1847 1/20W_10_1%_0201 PR1848 DIS@

1
R18M@ PR1871 1/20W_12.4K_1%_0201 DIS@ 1/20W_10K_1%_0201 @ DIS@
1 2 PR1851 PC1838
DIS@ 1/16W_402_1%_0402 0.47U_25V_M_X5R_0201

2
1

R18M@ PR1872 R18M@ PR1873


1

DIS@ 1/20W_14K_1%_0201 1/16W_4.12K_1%_0402 PC1839

2
PR1853 1 2 1 2 PR1857 330P_25V_K_X7R_0201 VDDC_ISEN1N 1 2 VCCGFXCORE_D VDDCI
PT1803
2

1/20W_3.9_1%_0201 DIS@ 0_0201_SP DIS@ DIS@


1 2 1 2 1 2 1 2VDDC_IMON @ PR1854 PR1858
R19M@ PR1855 R19M@ PR1856 1/20W_1_1%_0201 1/20W_1.18K_1%_0201
2

100K_0402_1%_NCP15WF104F03RC 1/20W_15K_1%_0201 1/16W_2.74K_1%_0402 VDDC_ISEN1P 1 2 R18M@


1

DIS@ DIS@ PR1859 PJ1801 @


PC1840 1/20W_20.5K_1%_0201 1 2
1 2
0.47U_25V_M_X5R_0201 1 2
2

DIS@ DIS@ JUMP_43X118


PR1861 PR1862
PT1804
DIS@ 1/20W_23.7K_1%_0201 1/20W_330_5%_0201 PJ1802 @
1 2 1 2 1 2 1 2 VDDCI_IMON 1 2
1 2
DIS@ R19M@
100K_0402_1%_NCP15WF104F03RC PR1860 PL1807 JUMP_43X118
1/20W_6.19K_1%_0201 BLM18KG300TN1D_2P
1 2
R19M@
PL1808
BLM18KG300TN1D_2P
VIN_+VDDCI 1 2
R19M@ VSYS15
DIS_RF_NS@ R19M@

2200P_25V_K_X7R_0402
R19M@ R19M@

0.1U_25V_K_X5R_0402
47P_50V_J_NPO_0402

10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR
1

1
B

PC1841

PC1842

PC1843

PC1844

PC1845
B

5
VDDCI

2
2
VCCGFXCORE_D
GPU Decoupling Cap TDC=8A
VDDCI_UGATE 4
EDC=12A
OCP=15A
R19M@
1 1 1 1 1 PQ1809

3
2
1
DIS@ DIS@ DIS@ DIS@ DIS@ AONR32340C_DFN8-5 R19M@
PC1860 PC1861 PC1862 PC1863 PC1864 PL1809
47U_6.3V_M_X5R_0603 47U_6.3V_M_X5R_0603 47U_6.3V_M_X5R_0603 47U_6.3V_M_X5R_0603 47U_6.3V_M_X5R_0603 0.36UH_PDME064TR36MS1_24A_20% R19M@
2 2 2 2 2 VDDCI_PHASE 1 4 VDDCI
VDDCI
R19M@ R19M@ R19M@ R19M@
PR1863 2 3

330U_D2_2VM_R9M

0.1U_10V_K_X5R_0402_MURATA
1

2
1/10W_2.2_5%_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603
R19M@

2
VDDCI_BOOT1 +

PC1847

PC1849

PC1850

PC1851

PC1852

PC1853
2 1 2 PR1864

5
1/10W_4.7_5%_0603
VCCGFXCORE_D 1 1 1 R19M@

1
PC1846 2
DIS@ DIS@ DIS@ R19M@ @ @

1
PC1865 PC1866 PC1867 VDDCI_LGATE 0.1U_25V_M_X7R_06034 PQ1810
47U_6.3V_M_X5R_0603 47U_6.3V_M_X5R_0603 47U_6.3V_M_X5R_0603 AON7380_DFN8-5
2 2 2

1
2
3

2
R19M@
PC1854
680P_50V_K_X7R_0402

1
VDDCI
22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603
1

1
PC1872

PC1873

PC1874

PC1875

PC1876

PC1877

PC1878

VCC1R35VIDEO
R19M@
2

PR1865
@ @ @ @ @ @ @ 1 1 1/20W_1.5K_1%_0201
DIS@ DIS@ VDDCI_ISEN1P 1 2
1 1 PC1870 PC1871

1
DIS@ DIS@ 22U_6.3V_M_X5R_0603 22U_6.3V_M_X5R_0603 R19M@

1
PC1868 PC1869 2 2 PR1866 R19M@
22U_6.3V_M_X5R_0603 22U_6.3V_M_X5R_0603 1/20W_1.5K_1%_0201 PC1855
2 2 0.47U_25V_M_X5R_0201

2
2
VDDCI_ISEN1N 2 1

R19M@

1
PR1869 R19M@
1/20W_0_5%_0201 PC1856
0.1U_25V_K_X5R_0201

2
A A

<Variant Name>

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 DC/DC VCCGFXCORE_D(RT3662AC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 118 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 119 of 128

5 4 3 2 1

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5 4 3 2 1

VSYS15 VSYS15 51,54,100,102,103,105,106,108,109,110,111,114,118,127

VCC1R35VIDEO VCC1R35VIDEO 38,42,45,118

D D

VCC1R35VIDEO VCC1R35VIDEO
TDC: 8A
OCP: 13A
Fsw: 700KHz

1
@ PJ2002

1
JUMP_43X118

2
1
DIS@

2
PR2002 PL2001
1/20W_150K_5%_0201 0.68UH_PCMC063T-R68MN_15.5A_20%
1 2 +1.35VSP
PR2003

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603

22U_6.3V_M_X5R_0603
0_0402_SP
DIS@

2200P_25V_K_X7R_0402

0.1U_25V_K_X5R_0402
1 2 DIS_EMC_NS@

PC2003

PC2004

PC2005

PC2006

PC2007

PC2008
PR2004

PC2010
1

1
PC2009
+1.35VSP_BST 1/10W_4.7_5%_0603

2
11

10

1/20W_10_1%_0201
PC2011 PC2002

2
PR2005
0.22U_25V_K_X5R_0402 220P_25V_K_X7R_0201_MURATA

CLM

BST

1
C PJ2001 DIS_EMC_NS@ C
DIS@ DIS@

1
2 1 +1.35VSP_VIN 1 9 +1.35VSP_SW PC2012
VSYS15 2 1 VIN SW
680P_50V_K_X7R_0402

1
@ JUMP_43X79 PR2001 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@

2
2200P_25V_K_X7R_0402

0.1U_25V_K_X5R_0402

1/16W_10K_1%_0402 DIS_EMC@
10U_25V_K_X5R_0805_H1.25_MUR

10U_25V_K_X5R_0805_H1.25_MUR

DIS_EMC@

1
VCC1R35VIDEO_EN
47P_50V_J_NPO_0402

1 1 2 15
EN
1

1
PC2001

PC2013

PC2014

PR2006
PC2015

DIS@
PC2016

DIS@ DIS@ 13 1/20W_499_1%_0201


FB
1
PC2017 PU2001
2

2 0.1U_16V_K_X7R_0402_MURATA PR2007

2
DIS_RF_NS@ NB693GQ-Z_QFN16_3X3 1/20W_100K_1%_0201
DIS@
2

12 2 1
DIS@ PG VCC3M

1
DIS@
DIS_EMC@ 1 2 1R35VIDEO_PWRGD 50 PR2009
DIS_EMC@ PR2010 0_0201_SP 1/20W_12.4K_1%_0201
1 2 14 16 +1.35VSP_VIN PR2008
50 1R35VIDEO_ON

2
MODE NC2
0_0402_SP
DIS@

DIS@ DIS@
1
PR2011 2 1/16W_5.1_5%_0402 3 8 +1.35VSP_SW
VCC3M 3V3 NC1
DIS@

1
PGND1

PGND2

PGND3

PGND4

PGND5
PR2012
1/16W_10K_1%_0402
1

PC2018
1U_10V_K_X5R_0402

2
Pin 8 and Pin16 DIS@
2

B DIS@ B
follow MPS suggestion

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/05 Deciphered Date 2014/12/31 DC/DC VCC1R35VIDEO(NB693GQ)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 2.0

Date: Thursday, July 04, 2019 Sheet 120 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 121 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 122 of 128

5 4 3 2 1

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5 4 3 2 1

VCC1R05_SUS VCC1R05_SUS 13,16,50,114

VCCSTG VCCSTG 6,14,15

VCCIO VCCIO 3,15,18

VCC5M VCC5M 50,54,59,69,73,78,84,103,107,108,109,110,111,116,118,125,127

VCCST VCCST 6,14,15,108

D D

TABLE of POWER SWITCH (U12301)


Vendor LCFC P/N Description
TI SA00008C900 S IC TPS22976DPUR WSON 14P LOAD SWITCH
GMT SA00008F400 S IC G2898KD1U TDFN 14P LOAD SWITCH
RICHTEK SA000067200 S IC RT9740AGQW WDFN 14P LOAD SWITCH

VCC1R05M to VCCIO & VCCST


VCC5M VCC3M

1
R12301
VCC1R05_SUS @ 1/16W_10K_5%_0402 VCCIO
3 A

2
U12301 J12301 Install@
1 14 VCCIO_AP 1 2
VIN1_1 VOUT1_2 1 2
@ 2 13
VIN1_2 VOUT1_1
1 D12301 1 2 RB521CM-30T2R_VMN2M-2 @ 1 JUMP_43X118
11,15 -CPU_C10_GATE VCCIO_DRV
54,85,106,127 B_ON R12302 1 2 0_0402_SP 3 12 C12303 1 2 1000P_25V_K_X7R_0402
ON1 CT1
C12301 C12305
1U_6.3V_K_X6S_0402 4 11 0.1U_10V_K_X7R_0402
2 VBIAS GND 2
C @ VCCST C
R12303 1 2 0_0402_SP 5 10 C12304 1 2 100P_50V_J_NPO_0402
VCC1R05_SUS
15,85,106,107 A_ON ON2 CT2 60mA
6 9
VIN2_1 VOUT2_2 VCCST_OUT
7 8 R12304 1 2 0_0402_SP
VIN2_2 VOUT2_1

1 15 1
GPAD
C12302 TPS22966DPUR_WSON14_2X3 C12306
1U_6.3V_K_X6S_0402 0.1U_10V_K_X7R_0402
2 SA00008C900 2
S IC TPS22976DPUR WSON 14P LOAD SWITCH

Notice: TPS22976DPUR is common symbol with TPS22966DPUR

VCC3M VCC1R05_SUS VCCSTG VCCIO VCCSTG


Slew Rate=10uS<TR<65us T_on<65us
R12307 1 2 0_0402_SP
1

R12305
@ 1/16W_10K_5%_0402
B B
2

U12302
TPS22971YZPT_DSBGA8
D12302 A2 A1
VIN1 VOUT1
@ RB521CM_30
B_ON 1 2 B2 B1
VIN2 VOUT2
C2 C1
CT PG
D2 D1
ON GND

@ D12304
SA00008GZ00
RB521CM_30 @
-CPU_C10_GATE 1 2

1 1
C12307 @ C12308
10U_6.3V_M_X5R_0402 0.1U_6.3V_K_X7R_0201
2 2
@

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 LOADSW VCCIO&VCCST&VCCSTG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 123 of 128

5 4 3 2 1

VInafix.com
5 4 3 2 1

VCC3M VCC3_SUS
D D

R12401
1 2

0_0805_SP

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 LOAD SW PCH SUS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 124 of 128


5 4 3 2 1

VInafix.com
5 4 3 2 1

USBC_VBUS20 USBC_VBUS20 59,63

VCC3_LDO_PD VCC3_LDO_PD 59,63,85

VINT20_IN VINT20_IN 100,102

VCC5M VCC5M 50,54,59,69,73,78,84,103,107,108,109,110,111,116,118,123,127

5V_IN 5V_IN 59

TABLE of DIODE (D12501 D12503)


D D
Vendor LCFC P/N Description
ROHM SC100007L00 S DIO 1SS355VMTE-17 SOD323
PANJIT SC100001K0J S DIO 1SS355 SOD323 T/R-5K
LRC SC100007100 S DIO L1SS355T1G SOD-323

VCC5M
5V_IN

D12501
1SS355VMTE-17

2 1

Vr=80V
Ifm=225mA
D12503
1SS355VMTE-17
U12502
USBC_VBUS20_J 2 1 USBC_VBUS20_D 3 4
IN OUT
1
6 1 1
ADJ

1
Vr=80V C12508 R12507 1 2 1/16W_100K_5%_0402 1
2.2U_50V_K_X5R_0603 EN
R12509 C12509 C12510
Ifm=225mA 2 5 2 1/20W_73.2K_1%_0201 47P_25V_J_NPO_0201 2.2U_10V_K_X5R_0402
GND NC 2 2
SYV634DEC_DFN6_2X2

2
SA00008EQ00

1
C D Q12501 C
2 L2N7002KWT1G_SOT323-3
85 PD_VBUS_C_CTRL1_EC G SB000019400 vref0.6V

1
1
S R12510

3
R12508 1/20W_10K_1%_0201
1/20W_100K_5%_0201

2
2

VCC5M

1 1
C12511 C12512 USBC_VBUS20
100U_6.3V_M_X5R_1206_H1.6 1U_25V_K_X5R_0402 VCC3_LDO_PD
2 2

1
J12501

1
JUMP_43X118
Install@

1
2
Correct item number: 3A R12518 R12519

2
VCC3_LDO_PD SCS0000D200 1/20W_10K_5%_0201 1/20W_10K_5%_0201

@
D12502

2
1

B B
R12511 U12501
1/20W_10K_5%_0201 A1 B1 2 1 USBC_VBUS20_J R12515 1 @ 2 1/16W_1M_5%_0402
VIN1 VCP1 2 1
A2 B2
VIN2 VCP2
C1 U12503
2

VCP3
PTVS24VS1UR_SOD123W2

1
59 -SRC_PS_FLT -SRC_PS_FLT A4 C2 VINT20_IN @ B2 B3
FLT# VBUS1 VBUS1 OVLO SNK_PS_ACK
D1 J12502 C2 A2

1
59 SRC_PS_EN SRC_PS_EN VBUS2 VBUS2 ACK SNK_PS_ACK 59
B4 D2 JUMP_43X118 D2
EN VBUS3 VBUS3
E1 C3
59 SRC_PS_FO 不不不不 VBUS4 GND1

2
SRC_PS_FO C4 A3 E2 D3
FO ILIM VBUS5 GND2
1/20W_16K_1%_0201

1 E3

2
GND3
1
1/20W_100K_5%_0201

1/20W_100K_5%_0201

B3 A1
GND1 VINT1
1

R12514

C3 C12514 B1 A3 -SNK_PS_EN
GND2 4.7U_50V_K_X5R_0805_H1.25 VINT2 EN# -SNK_PS_EN 59
D3 C1
GND3 2 VINT3
R12512 R12513 D4 D1
CAP close U4301.D2 VINT4

1
2

NX5P3290UKZ_WLCSP16 1 R12516 R12517


2

NX20P5090UK_WLCSP15 @ 1/20W_100K_5%_0201 1/16W_0_5%_0402


SA00008BS00 C12513
1000P_50V_K_X7R_0201 SA00007JY00

2
2
1 1
C12515 C12516
1U_25V_K_X5R_0402 4.7U_50V_K_X5R_0805_H1.25
2 2
close U4302.B2

TABLE of TypeC Load Switch (U12501) TABLE of TypeC Load Switch (U12503)
A
Vendor LCFC P/N P/N Vendor LCFC P/N P/N A

NXP SA00008BS00 S IC NX5P3290UKZ WLCSP 16P NXP SA00007JY00 NX20P5090UKAZ


GMT SA0000A2J00 S IC G3712B61U WLCSP 16P KINETIC SA00009G700 KTS1677EVH-TR

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 PD_DCIN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 125 of 128


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VCC3LAN VCC3LAN 73

D D

VCC3M VCC3LAN
C C

R12601 1 2 0_0805_SP

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 LOAD SW LAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 126 of 128


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VCC3SW VCC3SW 51,59,73,85,100,101,102,105

VCC3M VCC3M 4,11,13,15,16,50,51,66,78,84,85,88,92,102,103,105,106,108,114,116,118,120,123,124,126,128

VCC5M VCC5M 50,54,59,69,73,78,84,103,107,108,109,110,111,116,118,123,125

VCC5B VCC5B 54,78,88,90,96

D VCC3B VCC3B 3,7,8,9,10,12,13,33,50,51,54,64,66,73,78,80,85,88,89,91,92,93,98,101,128 D

VCC3SW

R12701 1 @ 2 B_ON 1/16W_10K_5%_0402

Smart Switch
1. MIRROR code, is correct????
2. After reset EC, EC control "Low", not High or Disable. VCC5M To VCC5B
C
VCC3M To VCC3B C

VCC5M VCC5B
VIN 5V and 3.3V (VBIAS=5V), IMAX(per channel)=6A, Rds=18mohm
U12701 J12701
VCC5M 1 14 VCC5B_LS 1 2
VIN1_1 VOUT1_2 1 2
2 13
VCC5M VIN1_2 VOUT1_1
JUMP_43X118
B_ON 3 12 C12710 1 2 1000P_25V_K_X7R_0402 Install@
54,85,106,123 B_ON ON1 CT1
1 1 1 1
4 11 VCC3B
VBIAS GND 1
C12701 C12702 C12703 C12708
0.1U_16V_K_X7R_0402_MURATA 0.1U_16V_K_X7R_0402_MURATA 0.1U_16V_K_X7R_0402_MURATA 1U_6.3V_K_X5R_0402_MURATA B_ON 5 10 C12711 1 2 100P_50V_J_NPO_0402 C12713
2 EMC_NS@ 2 EMC_NS@ 2 EMC_NS@ 2 VCC3M ON2 CT2
0.1U_10V_K_X7R_0402
6 9 J12702 2
VIN2_1 VOUT2_2 VCC3B_LS
7 8 1 2
VIN2_2 VOUT2_1 1 2

1 15 JUMP_43X118 1
GPAD
Install@
C12709 TPS22976DPUR_WSON14P_3X2 C12712
VSYS15 1U_6.3V_K_X5R_0402_MURATA 0.1U_10V_K_X7R_0402
2 SA00008C900 2
S IC TPS22976DPUR WSON 14P LOAD SWITCH
B B
Notice: TPS22976DPUR is common symbol with TPS22966DPUR
1 1 1 1
C12704 C12705 C12706 C12707
0.1U_16V_K_X7R_0402_MURATA 0.1U_16V_K_X7R_0402_MURATA 0.1U_16V_K_X7R_0402_MURATA 0.1U_16V_K_X7R_0402_MURATA
2 EMC_NS@ 2 EMC_NS@ 2 EMC_NS@ 2 EMC_NS@

TABLE of POWER SWITCH (U12601)


Vendor LCFC P/N Description
TI SA00008C900 S IC TPS22976DPUR WSON 14P LOAD SWITCH
GMT SA00008F400 S IC G2898KD1U TDFN 14P LOAD SWITCH
RICHTEK SA000067200 S IC RT9740AGQW WDFN 14P LOAD SWITCH

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 LOAD SW B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 127 of 128

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VCC3WLAN VCC3WLAN 66

D D

VCC3M
VCC3WLAN

W= 60 mil

1
R12801 U12801
1/16W_10K_5%_0402 5 1 VCC3WLAN
IN OUT VCC3B VCC3WLAN
2 W= 60 mil

2
GND
ADP_I 4 3 R12803 1 @ 21/8W_0_5%_0805 VCC3WLAN
85,102 ADP_I EN OC
G524B1T11U_SOT23-5 VCC3M
SA000074R00
C C
R12804 1 @ 21/8W_0_5%_0805

TABLE of POWER SWITCH (U12801)


Vendor LCFC P/N Description
GMT SA000074R00 S IC G524B1T11U SOT23 5P POWER SWITCH
SILERGY SA000074P00 S IC SY6288C20AAC SOT23 5P POWER SWITCH

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/01/12 Deciphered Date 2016/01/12 LOAD SW WLAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
E14/E15 NM-C421 0.1

Date: Thursday, July 04, 2019 Sheet 128 of 128

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