BASIC FET AMPLIFIERS

Reference: Electronic Circuit Analysis and Design by Donald A . Neamen, McGraw-Hill

MOSFET AMPLIFIER –LOAD LINE AND SMALL-SIGNAL PARAMETERS

 The following figure shows an NMOS common-source circuit with a time-varying voltage
source in series with the DC source. We assume the time-varying input signal is
sinusoidal.
 The transistor characteristics, DC load line, and Q-point are also shown. The DC load
line and Q-point are functions of vGS, VDD, RD, and input voltage. The transistor must be
biased in the saturation region.

 Also shown in the figure the sinusoidal variation in the gate-to-source voltage, drain
current, and drain-to-source voltage, as a result of the sinusoidal source v i. The total
gate-to-source voltage is the sum of VGSQ and vi.
 As vi increases, the instantaneous value of vGS increases, and the bias point moves up
the load line. A larger vGS means a larger drain current and a smaller value of v DS. For
negative vi, the instantaneous value of vGS decreases below the Q-value, and the bias
point moves down the load line. A smaller v GS value means a smaller drain current and
increased value of vDS.
 For the FET to operate as linear amplifier, the transistor must be biased in the saturation
region, and the instantaneous drain current and drain-to-source voltage must also be
confined to the saturation region.
 From the circuit the output voltage is
vDS  vO  VDD  iDRD  VDD  IDQ  id  RD   VDD  IDQRD   idRD
 The time-varying output signal is the time-varying drain-to-source voltage
vo  vds  idRD
 Where id  g m vgs

 The drain current, which is composed of ac signals superimposed on the Q-value, flows
through the voltage source VDD. Since the voltage across this source is assumed to be
constant, the sinusoidal current produces no sinusoidal voltage component across this
element. The equivalent ac impedance is therefore zero, or a short circuit. Consequently,
in the ac equivalent circuit, the DC voltage sources are equal to zero. Therefore the ac
equivalent circuit can be drawn as below.

 To develop a small-signal equivalent circuit let us assume that the signal frequency is
sufficiently low so that any capacitance at the gate terminal can be neglected. The input
to the gate thus appears as an open circuit, or an infinite resistance. Therefore simplified
small-signal equivalent circuit for the NMOS device is can be drawn as below.

 The small-signal equivalent circuit can also be expanded to take into account the finite
output resistance of a MOSFET biased in the saturation region. The output resistance
becomes finite due to non-zero slope in the iD versus vDS curve. The expanded small-signal
equivalent circuit of the n-channel MOSFET is shown below. The equivalent circuit is a
transconductance amplifier in that the input signal is a voltage source and the output
signal is a current.
  The previous discussion on n-channel MOSFET also applied to p-channel MOSFET. A p-
channel MOSFET circuit is shown below. Note that the power supply voltage is connected
to the source. The current direction has been accordingly changed. The ac equivalent
circuit can be drawn replacing the DC voltage by ac short circuit. The ac equivalent circuit
of the p-channel MOSFET is the same as that of the n-channel device, except that all
current directions and voltage polarities are reversed.
 The small-signal equivalent circuit of the p-channel MOSFET amplifier is shown below.
 The output voltage is Vo  g m Vsg  ro R D  .
 The control voltage Vsg, given in terms of the input signal voltage is Vsg  Vi .
 The small-signal voltage gain is
Vo
Av   g m  ro RD 
Vi
 This expression for the small-signal voltage gain of the p-channel MOSFET amplifier is
exactly the same as that of the n-channel MOSFET amplifier. The negative sign indicates
that a 180-degree phase reversal exists between the output and input signals, for both
the PMOS and the NMOS circuit.

THE COMMON SOURCE MPLIFIER:

 The MOSFET is a three terminal device and therefore three basic single-transistor
amplifier configurations can be formed, depending on which of the three transistor
terminals is used as signal ground. These three basic configurations are called common
source, common drain (source follower) and common gate.

Basic Common-Source Configuration

 First we will consider the common source configuration, shown below.

 For the circuit assume that the transistor is biased in the saturation region by resistors
R1 and R2, and that the signal frequency is sufficiently large for the coupling capacitor to
 act essentially as a short circuit. The signal source is represented by a Thevenin
equivalent circuit, in which the signal voltage source vi is in series with an equivalent
source resistance RSi. We will see RSi should be much less than the amplifier input
resistance, Ri  R1 R2 ,in order to minimize the loading effect.
 The small-signal equivalent circuit is shown below. The output voltage is
Vo  g m Vgs  ro RD 
 The input gate-to-source voltage is
 Ri 
v gs    Vi
 R i  R Si 
 So the small-signal voltage gain is
Vo g m Vgs  ro R D   Ri 
Av    g m  ro R D   
Vi v gs  R i  R Si 
 Ri 
 
 R i  R Si 
 We can also relate the ac drain current to the ac drain-to-source voltage as Vds  IdRD

 The input resistance to the amplifier is Ris  R1 R2 . Since the low-frequency input
resistance looking into the gate of the MOSFET is essentially infinite, the input resistance is only a
function of bias resistors.
 The output resistance looking back into the output terminals is found by setting the
independent input source Vi equal to zero, which means that Vgs = 0. The output
resistance is therefore Ro  RD ro .

Common-Source Amplifier with Source Resistor and Bypass Capacitor

 A source resistor RS tends to stabilize the Q-point against variations in transistor

parameters. However, a source resistor also reduces the signal gain. A common source
amplifier with source resistor is shown below.
 A source bypass capacitor added to the common-source circuit with a source resistor will
minimize the loss in the small-signal voltage gain, while maintaining the Q-point. The Q-
point stability can be further increased by replacing the source resistor with a constant-
current source, as shown below. If the signal frequency is sufficiently large so that bypass
capacitor essentially as an ac short-circuit, the source will be held at signal ground.
THE SOURCE-FOLLOWER AMPLIFIER:

 A source-follower circuit is shown below. Here the output is taken off the source with
respect to ground and the drain is connected directly to VDD. Since VDD becomes signal
ground in the ac equivalent circuit, we have the name common drain. The more common
name is source follower.

 The small-signal equivalent circuit, assuming the coupling capacitors acts as a short
circuit, is shown below. The drain is at signal ground, and the small-signal resistance ro
of the transistor is in parallel with the dependent current source. An alternate small-
signal equivalent circuit, but with all signal grounds at a common point is also shown.

 The output voltage is Vo  g mVgs  Rs ro  .
 Writing KVL equation from input to output results in the following
Vin  Vgs  Vo  Vgs   g mVgs  Rs ro 
 Therefore, gate-to-source voltage is
 Vin  1 gm 
Vgs    Vin
1  g m  Rs ro   1 g m    Rs ro  
 The above equation is written in the form of a MOSFET voltage-divider equation, in which
the gate-to-source of the NMOS device looks like a resistance with a value of 1/gm. More
accurately, the effective resistance looking into the source terminal (ignoring r o) is 1/gm.

 The voltage Vin is related to the source input voltage Vi by

 Ri 
Vin    Vi
 R i  R Si 
where Ri  R1 R2 is the input resistance to the amplifier.
 The small-signal voltage gain is
Vo  g m Vgs   R s ro   g mVgs  Rs ro   R i 
Av     
Vi Vin Vin  R i  R Si 
 Ri 
 
 R i  R Si 

Or, A v 
 g mVgs  Rs ro 
 Ri  g m  Rs ro   R i 
   
Vgs 1  g m  Rs ro   R i  RSi  1  g m  Rs ro   R i  R Si 
R s ro  Ri 
Or, A v   
1 g m    R s ro    R i  R Si 
 Which again is written in the form of a voltage-divider equation. It shows that the
magnitude of the voltage gain is always less than unity. This result is inconsistent with
the results of BJT emitter-follower circuit.
 Although the voltage gain is slightly less than unity, the source follower is an extremely
useful circuit because the output resistance is less than that of a common-source circuit.
A small output resistance is desirable when the circuit is to act as an ideal voltage source
and drive a load circuit without suffering any loading effect.
 The input resistance is the Thevenin equivalent resistance of the bias resistors. Even
though the input resistance to the gate of the MOSFET is essentially infinite, the input
bias resistance do provide a loading effect. This same was seen in the common-source
circuit.
 To calculate the output resistance, we set all independent small-signal sources equal to
zero, apply a test voltage to the output terminals, and measure a test current.
 The following circuit is used to determine the output resistance of the source follower. We
set Vi = 0 and apply a test voltage Vx.

 Since there are no capacitance in the circuit, the output impedance is simply an output
resistance, which is defined as Ro = Vx/Ix.
 Writing a KCL equation at the output source terminal produces
Vx Vx
Ix  g m Vgs  
Rs ro
 Since there is no current in the input portion of the circuit, we see that V gs = -Vx.
 Therefore,
 1 1
Ix  Vx  g m   
 R s ro 
 The output resistance is then
Vx 1
Ro    1 g m  R s ro
Ix 1 1
gm  
R s ro
 From the figure we see that the voltage Vgs is directly across the current source g m Vgs .
This means that the effective resistance of the device is 1 g m . The output resistance,
derived above, can therefore be written directly. This result also means that the resistance
looking into the source terminal (ignoring ro) is 1 g m as previously noted.
THE COMMON-GATE CONFIGURATION:

 In the common-gate configuration, the input signal is applied to the source terminal and
the gate is at signal ground.
 The common-gate configuration shown below is biased with a constant current source IQ.
The Gate resistor RG prevents the buildup of static charge on the gate terminal, and the
capacitor CG ensures that the Gate is at signal ground. The coupling capacitor CC1 couples
the signal to the source, and the coupling capacitor CC2 couples the output voltage to load
resistance RL.

 The small-signal equivalent circuit is shown below. The small-signal transistor resistance
ro is assumed to be infinite.
 The output voltage is
Vo    g mVgs   RD RL 
 Writing KVL equation around the input, we find
Vi  IiR Si  Vgs
Where Ii  g m Vgs
 The gate-to-source voltage then can be written as
Vi    g mVgs  RSi  Vgs
Vi
Or, Vgs  
1  g mRSi
 The small-signal voltage gain is found as
Vo   g m Vgs   RD RL  g m  RD RL 
Av   
Vi Vgs 1  g mRSi  1  g mRSi
Since the voltage gain is positive, the output and input signals are in phase.
 In many cases, the signal input to a common-gate circuit is a current. The following figure
shows a small-signal equivalent common-gate circuit with a Norton equivalent circuit as
the signal source.
 The output current can be written as
  RD 
Io     g m Vgs 
 RD  RL 
 At the input we have
Vgs
Ii  g m Vgs  0
RSi
 1 
Or, Ii   g m   Vgs  0
 R Si 
Ii Ii IiRSi
Or, Vgs    
 1   1  g mR Si  1  g mR Si
 gm    
 RSi   R Si 
 The small-signal current gain is then
 RD 
   g m Vgs 
Io  R D  R L   R D   g mR Si 
Ai     
Ii Vgs 1  g mR Si   R D  R L   1  g mR Si 
R Si
 If RD RL and gmRSi 1 , then the current gain is essentially unity as it is for an ideal
BJT common-base circuit.

 In contrast to the common-source and common-drain amplifiers, the common-gate

circuit has a low input resistance because of the transistor. However, if the input signal
is a current, a low input resistance is an advantage.
 The input resistance is defined as
Vgs
Ri  
Ii
 Since Ii  g m Vgs , the input resistance is
Vgs Vgs 1
Ri    
Ii g m Vgs gm
 The output resistance can be found by setting the input signal voltage equal to zero. From
the small-signal equivalent circuit we see that Vgs  g m Vgs R Si , which means that
Vgs  0 .
 The output resistance, looking back from the load resistance, is therefore Ro  RD .
THREE BASIC AMPLIFIER CONFIGURATION – SUMMARY AND COMPARISON

Configuration Voltage Current Input Resistance Output Resistance

Gain Gain
Common-Source Av  1 - RTH Moderate to High
(Determined by RD)
Common- Av  1 - RTH Low
Drain/Emitter Follower (~Hundreds of Ω)
Common-Gate Av  1 Ai  1 Low Moderate to High
(~Hundreds of Ω) (Determined by RD

MULTISTAGE AMPLIFIERS

 The following circuit is a cascade of common-source amplifier followed by a source-

follower amplifier. The common-source provides a small-signal voltage gain and the
source follower has a low output impedance.

 The small-signal equivalent circuit is shown below.

 The output voltage is
Vo  g m2 Vgs2  R S2 RL 
 Also
Vgs2  Vo  g m1Vgs1R D1
Where
 Ri 
Vgs1    Vi
 R i  R Si 
 Then
 Ri 
Vgs2  g m1R D1   Vi  Vo
 R i  R Si 
 Therefore,
  Ri  
Vo  g m2 g m1RD1   Vi  Vo   RS2 RL 
  Ri  RSi  
 The small-signal voltage gain is then
Vo g m1g m2R D1  R S2 R L   R i 
Av    
Vi 1  g m2  R S2 R L   R i  R Si 
 The following circuit shows a cascade circuit with n-channel MOSFETs. Transistor M1
is connected in a common-source configuration and M2 is connected in a common-gate
configuration. The advantage of this type of circuit is a higher frequency response.
  The small-signal equivalent circuit is shown below. Transistor M1 supplies the source
current of M2 with the signal current (gmVi). Transistor M2 acts as a current follower and
passes this current on to its drain terminal.

 The output voltage

Vo  g m1Vgs1R D
 Since Vgs1  Vi , the small-signal voltage gain is
Vo
Av   g m1RD
Vi

BASIC JFET AMPLIFIERS

 The following shows a JFET circuit with a time-varying signal applied to the gate. The
instantaneous gate-to-source voltage is
vGS  VGS  vi  VGS  vgs
Where vgs is the small-signal gate-to-source voltage.
 Assuming he transistor is biased in the saturation region, the instantaneous current is
2
 v 
iD  IDSS 1  GS 
 VP 
Where IDSS is the saturation current and VP is the pinchoff voltage.
 Therefore,
2
 V   v gs  
iD  IDSS 1  GS    
 VP   VP  
 If we expand the square term, we have
2 2
 V   V   vgs   vgs 
iD  IDSS 1  GS   2IDSS 1  GS     IDSS  
 VP   VP   VP   VP 
The first term is the dc or quiescent drain current IDQ, the second term is the time-
varying drain current component, which is linearly related to the signal voltage v gs, and
the third term is proportional to the square of the signal voltage.
 The third term produces a nonlinear distortion in the output current. To minimize this
distortion, we will usually impose the following condition
vgs  V 
2 1  GS 
VP  VP 
Above equation represents the small-signal condition that must be satisfied for JFET
amplifiers to be linear.
 Neglecting the term v2gs , we can write
iD  IDQ  id
Where the time varying signal current is
2IDSS  VGS 
id  1  v
 VP   VP  gs
Since VP is negative for n-channel JFETs, the transconductance is positive.
 A relationship that applies to both n-channel and p-channel JFET is
2IDSS  VGS 
gm  1  
VP  VP 
 We can also obtain transconductance from
id
gm 
vGS vgs  VGSQ

 Since the transconductance is directly proportional to the saturation current I DSS, the
transconductance is also a function of the width-to-length ratio of the transistor.
 Since we are looking into a reverse bias pn junction, we assume that the input gate
current ig is zero, which means that the small-signal input resistance is infinite.
 The equation of iD can be expanded to take into account the finite output resistance of
a JFET biased in the saturation region. The equation becomes
2
 v 
iD  IDSS 1  GS  1  λvDS 
 VP 
 The small-signal output resistance is
  i 
r0   D 
 v DS  v
GS constant
 Therefore,
1
  VGS  
2

ro   λIDSS 1   
  VP  

Or,
1
ro 
λIDQ
 The small-signal equivalent circuit of the n-channel JFET, shown below, is exactly the
same as that of the n-channel MOSFET. The small-signal equivalent circuit of the p-
channel JFET is also is also the same as that of the p-channel MOSFET. However, the
polarity of the controlling gate-to-source voltage and the direction of the dependent
source are reversed from those of the n-channel device.

 Since the small-signal equivalent circuit of the JFET is the same as that of the MOSFET,
the small-signal analyses of the two types of circuits are identical.

Numerical:

1. Determine the small-signal voltage gain of the following JFET amplifier. Consider the
transistor parameters IDSS = 12 mA, VP = -4 V, and λ =0.008 V-1.
Solution:
The dc quiescent gate-to-source voltage is determined from
2
 R2   R2   VGSQ 
vGSQ   VDD  IDQRS    VDD  IDSSRS 1  
 R1  R2   R1  R2   VP 

2
 180 kΩ   VGSQ 
Or, vGSQ    20 V   12 mA  2.7 kΩ  1  
 420 kΩ  180 kΩ    4 V  
2
Or, 2.025VGSQ  17.2vGSQ  26.4  0

The appropriate solution is

VGSQ  2.01 V

The Quiescent drain current is

2
 2.01 V    2.97 mA
2
 VGSQ  
IDQ  IDSS 1    12 mA  1  
 VP    4 V  
The small-signal parameters are then
2
2I  V  2 12 mA    2.01 V    2.98 mA/V
gm  DSS 1  GS   1  
 VP   VP  4 V    4 V  
And

1 1
ro    42.1 kΩ
λIDQ  
0.008 V  2.97 mA 
-1

The small-signal equivalent circuit is shown below.

Since VGS = vi, the small-signal voltage gain is

Vo
Av   g m  ro RD RL     2.98 mA/V  42.1 kΩ 2.7 kΩ 4 kΩ   4.62
Vi
2. For a source-follower circuit, shown below, the transistor parameters are: IDSS = 12 mA,
VP = -4 V, and λ = 0.01 V-1. Determine RS and IDQ such that the small-signal voltage gain
is at least 0.9. Pick a nominal transconductance value of gm = 2 mA/V.

Solution:
The small-signal circuit is shown below.

The output voltage is

Vo  g m Vgs  R S RL ro 
Also
Vi  Vgs  Vo
Or, Vgs  Vi  Vo
Therefore, the output voltage is
Vo  g m  Vi  Vo  R S R L ro 
The small-signal voltage gain becomes
Vo g m  R S R L ro 
Av  
Vi 1  g m  R S R L ro 
As a first approximation, assume ro is sufficiently large for the effect of ro to be neglected.
The transconductance is
 2IDSS  Vgs  2 12 mA   Vgs 
gm  1   1  
 VP   VP   4V    4V  
If we pick a nominal transconductance value of gm = 2 mA/V, then VGS = -2.67 V and
the quiescent drain current is
2
 2.67 V    1.33 mA
2
 Vgs  
IDQ  IDSS 1    12 mA  1  
 VP    4V  
The value of RS is then determined from
Vgs  VSS   2.67 V    10 V 
RS    9.53 kΩ
IDQ 1.33 mA
Also the value of ro is
1 1
ro    75.2 kΩ
λIDQ  
0.01 V 1.33 mA 
-1

The small-signal voltage gain, including the effect of r o is

g m RS RL ro   2 mA/V  9.53 kΩ 10 kΩ 75.2 kΩ   0.902
Av  
1  g m RS RL ro  1   2 mA/V  9.53 kΩ 10 kΩ 75.2 kΩ 