Laboratory Manual EES-07310: MP Based Embedded Systems

LABORATORY SESSION # 7
PWM Generation using STM32F100xx Timer

7.1 OBJECTIVES

To generate PWM signal with STM32F100RB Timers in PWM mode 1.

7.2 EQUIPMENT & MATERIAL REQUIRED

- Keil µVision 4 – IDE

- GCC C Compiler
- STM32 ST Link Utility
- STM32F100RB Discovery Board
- STM32F100xx USB Data Cable
- STM32F100xx Trainer Board
- Oscilloscope and it’s Connecting Leads
- Connecting Cables

7.3 INTRODUCTION & THEORY

Pulse Width Modulation mode allows you to generate a signal with a frequency
determined by the value of the TIMx_ARR register and a duty cycle determined by the
value of the TIMx_CCRx register. The PWM mode can be selected independently on each
channel (one PWM per OCx output) by writing ‘110’ (PWM mode 1) or ‘111’ (PWM mode
2) in the OCxM bits in the TIMx_CCMRx register.
You must enable the corresponding preload register by setting the OCxPE bit in the
TIMx_CCMRx register, and eventually the auto-reload preload register (in upcounting or
center-aligned modes) by setting the ARPE bit in the TIMx_CR1 register.
As the preload registers are transferred to the shadow registers only when an update
eventoccurs, before starting the counter, you have to initialize all the registers by setting
the UG bit in the TIMx_EGR register. OCx polarity is software programmable using the
CCxP bit in the TIMx_CCER register. It can be programmed as active high or active low.
OCx output is enabled by a combination of the CCxE, CCxNE, MOE, OSSI and OSSR bits
(TIMx_CCER and TIMx_BDTR registers).
Refer to the TIMx_CCER register description for more details. In PWM mode (1 or
2), TIMx_CNT and TIMx_CCRx are always compared to determine whether TIMx_CCRx
≤ TIMx_CNT or TIMx_CNT ≤ TIMx_CCRx (depending on the direction of the counter).
The timer is able to generate PWM in edge-aligned mode or center-aligned mode depending
on the CMS bits in the TIMx_CR1 register.
Laboratory Manual EES-07310: MP Based Embedded Systems

7.4 PRE-LAB PREPARATIONS

Students should know about:

- Timers peripherals
- Basics of Pulse Width Modulation (PWM) signal
- Timers’ PWM modes

7.5 PROCEDURE

- Create new project with the name ‘Lab7’, following the steps in Lab Session 1 including
two C and two H files with the names ‘main.c’, ‘pwm.c’, ‘main.h’ and ‘pwm.h’.
- Write the codes in each file as following:

pwm.c
#include "main.h"
#include "PWM.h"

void PWM_Init(void)
{
RCC_APB2ENR |= 0x00000804; /*Enable clock of Port A + Timer 1 PA8
is connected to CH1 of TIM1*/

GPIOA_CRH &= 0xFFFFFFF0; //Clear previous config for PA8

GPIOA_CRH |= 0x00000009;

TIM1_CR1 = 0x0080; //Auto Preload Enabled

TIM1_CNT = 0; //Initialize counter from 0
TIM1_PSC = 7; //Divide 8MHz into 0.1MHz clock (1µs)
TIM1_ARR = 20000-1; /*50Hz-100 counts after every 1µs increase 1
in the counter (counts x resolution = 1/PWM frequency)*/
TIM1_CCMR1 = 0x0068; /*output compare 1 (preload enabled, PWM
mode 1 enabled & configured as output)*/
TIM1_CCER = 0x0001; /*Signal is output on the corresponding
pin*/
TIM1_EGR = 0x0001; /*Reinitialize the counter & gen updates of
the registers*/
TIM1_BDTR = 0x8000; //MOE – Main output enabled
TIM1_CR1 |= 1; //Timer starts – counter enabled

Void Duty_Cycle(void)
{
TIM1_CCR1 = 10000; /*Capture/Compare register for channel 1;
defined duty cycle 50%. Similarly we can have 4 different duty cycles by
using CCR1 to CCR4 (frequency will be same)*/
}
Laboratory Manual EES-07310: MP Based Embedded Systems

pwm.h
#ifndef _PWM_H_
#define _PWM_H_

void PWM_Init(void); //declaring functions in H file

Void Duty_Cycle(void);

#endif

main.c
#include "main.h"
#include "PWM.h"

... //SystemInit, Cyclic_Start and Cyclic_Wait functions

int main(void)
{
PWM_Init();
Cyclic_Start(10);
while(1)
{
Duty_Cycle();
Cyclic_Wait();
}
return(1);
}

main.h
#ifndef _MAIN_H
#define _MAIN_H

#define RCC_APB2ENR ( * ((volatile unsigned long*) 0x40021018))

#define RCC_APB1ENR ( * ((volatile unsigned long*) 0x4002101C))
#define GPIOA_CRL ( * ((volatile unsigned long*) 0x40010800))
...
#define TIM2_CR1 ( * ((volatile unsigned long*) 0x40000000))
#define TIM2_CNT ( * ((volatile unsigned long*) 0x40000024))
...
#endif

- Complete the ‘main.c’ and ‘main.h’ files.

- Successfully create the HEX file.
- Start the debugger session by opening Port A and Timer 2 peripheral.
- Burn the HEX file in the controller and check the output PWM waveform with 50% duty
cycle on oscilloscope.
- The physical output PWM can be obtained from the headers on the trainer board as shown
in Figure 8-1. First 3 pins are connected with TIM1_CH1, CH2 and CH3.
Laboratory Manual EES-07310: MP Based Embedded Systems

Figure 7- 1: PWM headers on trainer board

7.6 OBSERVATIONS & RESULTS

Students are required to provide the following components in their lab reports.
- Complete software code developed
- HEX file created successfully in Keil µVision 4
- Software tested in Debugger
- Software tested on the hardware
- Waveform of configured pin generated on oscilloscope

7.7 LEARNING OUTCOMES

By the end of this lab, students should be able to:

- Generate PWM with certain frequency and duty cycle
- Design program for the configuration of Timers in PWM mode 1
- Generate waveform of the PWM on oscilloscope

7.8 EXERCISE QUESTIONS

- Generate PWMs with different duty cycles (10%, 20%, 30% … 90%).
- Re-write the program to generate a PWM with variable duty cycle; the duty cycle should
automatically change after an interval of 3s.