This Study Resource Was: Complex Engineering Design

Complex Engineering Design
EEE-241 DIGITAL LOGIC DESIGN
submitted by:
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ABDUL REHMAN AFZAL FA19-BEE-030
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M.NAZAHAT ALI FA19-BEE-033
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M.ZAIN DABEER FA19-BEE-036
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Submitted to:
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Mr. Waqar Tahir
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Department of Electrical & Computer

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Engineering COMSATS University

Islamabad, Sahiwal Campus
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AUGUST 2020
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STOP WATCH USING JK FLIPFLOP
August 2020
1 Project discription
A stopwatch is a handheld timepiece
designed to measure the amount of time that elapses between its activation and
deactivation. A large digital version of a stopwatch designed for viewing at a
distance, as in a sports stadium, is called a stop clock. In manual timing, the clock
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is started and stopped by a person pressing a button.
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2 Introduction
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The digital stopwatch we designed is a time-keeping
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device that is meant to measure the time elapsed from the start to end of any
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event. The stopwatch has several different functions including pause (which
represents both start and stop), reset, write to the LCD, and is able to clear the
hundredth of a second output. We used the JK flip flop and seven segment
display. The jk flipflop was used to implement our digital stopwatch, and seven
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segment display was used to display the counter time and the elapsed time. The
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computing language that we used to write the program is VHDL, which works
well to program the FPGA we used. In the stopwatch we use jk flip flop and two
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push buttons to allow for user interactions. The write to seven segment will
display the elapsed time on the LCD when activated. When deactivated the LCD
will show the running time. When the pause switch is activated, the stopwatch
will stop running. When the last function reset is activated, all digits change to
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zeros. We also added the hundredth second (HTSeconds) function that when
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activated by the push-button causes the rightmost digit on the 7 segments to

display nothing.
This article describes the principle, design and operation of a digital stopwatch
circuit. A digital stopwatch can be a circuit displaying the actual time in minutes,
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hours and seconds or a circuit displaying the number of clock pulses. Here we
design the second type wherein the circuit displays count from 0 to 59,
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representing a 60 second time interval. In other words here the circuit displays
the time in seconds only. This is a simple circuit consisting of a 555 timer to
produce the clock pulses and two counter ICs to carry out the counting
operation.
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3 Block diagram of project
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FIGURE 1-Block diagram of digital stopwatch using j k flipflop.
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Components details
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4.1 JK FLIPFLOP
It also has two input units like other sequential circuits. The set input of JK flip
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flop circuit is known as ‘J’ and the reset input of it is known as ‘K’ input. There
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are many flip-flops design which are currently being used, but the most common
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one which is widely used is JK flip flop circuit. It is also a sequential circuit.
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FIGURE 2-J K flip flop
4.2 IC 7447
The 7447 chip is used to drive 7 segment display. You must use the 7447 with a
common anode 7-segment display. The input to the 7447 is a binary number
DCBA where D is 8s, C is 4s, B is 2s and A is 1s. The inputs DCBA often come from
a binary counter
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FIGURE 3- 7447 seven segment display

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4.3 NAND GATE

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A NAND gate (sometimes referred to by its extended name, Negated AND gate) is
a digital logic gate with two or more inputs and one output with behavior that is
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the opposite of an AND gate.
4.4 BLUE SEVEN SEGMENT DISPLAY

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A seven segment display (also written as 7-Segment Display) is an electronic

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display device which is used to display numerical characters from 0 to 9 or some

special characters. There are seven LEDs present in one unit of the seven
segment whose combination is used to make numeral or special characters
according to the use. One or more such units are combined to display bigger
numbers. This kind of display is generally used in digitals clocks , calculators
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,wristwatches and many more electronics devices.
FIGURE 4- blue seven segment display.
4.5 GROUND
In electrical engineering, ground or earth is the reference point in an electrical
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circuit from which voltages are measured, a common return path for electric
current, or a direct physical connection to the earth . Electrical circuits may be
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connected to ground (earth) for several reasons.
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4.6 D CLOCK (WAVE)
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A clock signal is produced by a clock generator. Although more complex
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arrangements are used, the most common clock signal is in the form of a square
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wave with a 50
5 Circuit diagram of the project

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FIGURE 5- Circuit diagram of J K stopwatch.
5.0.1 On BREADBOARD
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FIGURE 6- hardware of digital stopwatch.
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6 Working
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1: This digital stopwatch can count nine minutes and 59.9 seconds.
2: The circuit consists of a 555 a stable multi vibrator.
3: It generates 10 pulses in one second. We can enable or disable IC 555 by
applying a high or low voltage to pin 4 of 555. This is done by IC 7476.
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4:7476 is a JK flip-flop. Its J and K input are given high level. Therefore this flip-
flop toggles at each trailing edge of the clock pulse. Here clock pulses are given
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by push-to-on switch S1.

5: IC 7490 counts the pulses of a stable multi vibrator. It counts up to 9 (1001).
6: 6: When the first counter reaches nine, second counter starts counting,
because it gets a trailing edge when first display goes from 9 to 0. So it reaches
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one second. The third display begins its counting as the second display changes
from 9 to 0. Then the display counts 10 seconds.
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7: When the count of the third display reaches 6, both input terminals of NAND
gate A of IC 7400 becomes high. So its output becomes low. This output appears
as a trailing edge for the fourth display and it starts counting. Then output of the
NAND gate gets inverted. C now becomes high. This is applied to RESET pin of
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7490. Therefore all counters except 4 reset to 0. The display shows 1.000. i.e. 1
minute and 0 seconds. IC 7447 is used to convert BCD to 7-segment form.
7 Analysis
In this project we analyes that the term digital in electronics represents the data
generation, processing or storing in the form of two states. The two states can be
represented as HIGH or LOW, positive or non-positive, set or reset which is
ultimately binary. The high is 1 and low is 0 and hence the digital technology is
expressed as series of 0’s and 1’s. we use 6 seven segment display to show the
counting of the stopwatch.
8 Conclusion
In this project, we gained a lot of knowledge and experience working with a jk
digital stopwatch. We learned how to connect a sevensegment display to an IC
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7447 and develop protocol for the two to interact. Furthermore, we learned
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more about the fundamental principles of digitallogic systems. Our group
members have all improved in several areas such as building a structural data
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path for a digital system and understanding more about state machine. Our
project was a great real-life experience in building a software/hardware co-
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design and our stopwatch could be used regularly in sports, experiments, etc.
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9 Task distribution table
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10 Reference
1- VHDL Coding Tutorial- Daniel Llamocca http://www.secs.oakland.edu/ llamocca/VH DLforFPGAs.html.
2- Intro to Digital Design- Darrin M. Hanna http://www.digilentinc.com/data/text
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ntrodigitaldesign−digilent−vhdlonline.pdf
3−AnIntroductiontoSoftwareandHardwareInterfacing2ndEditi Han – WayHuanaa.
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Complex Engineering Design

EEE-241 DIGITAL LOGIC DESIGN

Department of Electrical & Computer

Engineering COMSATS University

activated by the push-button causes the rightmost digit on the 7 segments to

FIGURE 2-J K flip flop

FIGURE 3- 7447 seven segment display

4.3 NAND GATE

the opposite of an AND gate.

4.4 BLUE SEVEN SEGMENT DISPLAY

A seven segment display (also written as 7-Segment Display) is an electronic

display device which is used to display numerical characters from 0 to 9 or some

,wristwatches and many more electronics devices.

5 Circuit diagram of the project

FIGURE 5- Circuit diagram of J K stopwatch.

by push-to-on switch S1.

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