Tripoli University

Faculty of Engineering
Computer Engineering Department

Course: Digital systems (EC381)

LAB 3 Report

Mohammed Altoumi
ID: 022171408

Instructor:
Dr.Yusra Mohammed Maatug
Lab Date: 26/04/2020
Experiment 1
Construct 4-to-16 Decoder from 3-to-8 decoder (74LS138) and extra gates if needed.
1.1 deriving the truth table.

ENABLE A B C OUTPUT
0 0 0 0 A0
0 0 0 1 A1
0 0 1 0 A2
0 0 1 1 A3
0 1 0 0 A4
0 1 0 1 A5
0 1 1 0 A6
0 1 1 1 A7
1 0 0 0 A8
1 0 0 1 A9
1 0 1 0 A10
1 0 1 1 A11
1 1 0 0 A12
1 1 0 1 A13
1 1 1 0 A14
1 1 1 1 A15
TABLE 1 (Truth table for experiment 1)

1.2 List of components that we will use:

VCC 1
GROUND 1
PROBE 16
SWITCH 4
ENABLE 1
3-8 DECODER (74138) 2
OR (7404) 1
Table 2 List of the circuit components
1.3 Implementation:
 The design was implemented to build one 4-16 DECODER from two 3-8 DECODER, the main idea
is to add an extra input (ENABLE) works like the fourth input for 4-16 DECODER and connected it
with in one of 3-8 DECIDERS with a value of one to make it work and the other with a value of
zero by using NOT ic in order not to work when the other does.
 All the ic`s are connected to VCC, GROUND source
 Connect the three inputs (ABC) to both 3-8 DECODER ic.
 connect every output with probe to collect the results.

1.4 Simulation Results:

 Because the decoder designed with NAND implementation the result should be
reversed.

Figure 1 (Circuit Implementation using EWB for A=0, B=0, C=0 and E=0)

A B C ENABLE F
0 0 0 0 A8
 Figure 2 (Circuit Implementation using EWB for A=0, B=1, C=0 and E=1)

A B C ENABLE F
0 1 0 1 A2
 Figure 3 (Circuit Implementation using EWB for A=1, B=0, C=1 and E=1)

A B C ENABLE F
1 0 1 1 A5

Figure 4 (Circuit Implementation using EWB for A=1, B=1, C=1 and E=1)

A B C ENABLE F
1 1 1 1 A7

Experiment 2
Design a combinational circuit that has three inputs (A, B, C) and one output. The output is one
when the number of ones in the input is odd, and zero otherwise (Odd function).
Design using:
1. 3 to 8 decoder (74LS138) and NAND gate (74LS20).
2.1.1 deriving the truth table:
 A B
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
C F
0 0
1 1
0 1
1 0
0 1
1 0
0 0
1 1

TABLE 3 (Truth table for experiment 2-1)

 From the truth table we can derive the output equation:

F =Σ(1, 2, 4, 7)
F = A`B`C + A`BC` + AB`C` +ABC

2.1.2 List of components that we will use:

VCC 1
GROUND 1
PROBE 1
SWITCH 3
3-8 DECODER (74138) 1
NAND (7420) 1

Table 4 List of the circuit components

2.1.3 Implementation:
 Because of the NAND 3-8 DECODER NAND ic is used.
 Connect VCC and GROUND source for the whole elements.
 Connect a probe to test the circuit.

2.1.4 Simulation Results:

 Since the experiment result set to give just an odd number the probe will work if the
input is an odd number.

Figure 5 (Circuit Implementation using EWB for A=1, B=0, C=0)

A B C F
1 0 0 1
Figure 6 (Circuit Implementation using EWB for A=1, B=1, C=1)

A B C F
1 1 1 1

Figure 7 (Circuit Implementation using EWB for A=1, B=0, C=1)

A B C F
 1 0 1 0

2. 4 to 1 Multiplexer (74LS153)
2.2.1 deriving the truth table:

A B
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
TABLE 5 (Truth table for experiment 2-2)
C F
0 0
1 1
0 1
1 0
0 1
1 0
0 0
1 1

2.2.2 List of components that we will use:

VCC 1
GROUND 1
PROBE 1
SWITCH 1
4-1 MUX (74153) 1
NOT (7404) 1
Table 6 List of the circuit components

2.2.3 Implementation:
  4 INPUTS means 4 regions (A0A1A2A3), By treating A, B as selector finds that:
A0 = A3 = C, A1 = A2 =C`

 Connect VCC and GROUND source for the whole elements.

 Add NOT ic to make c`.
 Connect a probe to test the circuit.

2.1.4 Simulation Results:

Figure 8 (Circuit Implementation using EWB for A=0, B=0, C=1)

A B C F
0 0 1 1
 Figure 9 (Circuit Implementation using EWB for A=1, B=0, C=1)

A B C F
1 0 1 0
 Figure 10 (Circuit Implementation using EWB for A=0, B=1, C=0)

A B C F
0 1 0 1

3- A majority circuit is a combinational circuit whose output is equal to 1 if the input variables
have more 1’s than 0’s. Design a 3-input majority circuit using:
1- 3 to 8 decoder (74LS138) and NAND gate (74LS20).

3.1.1 deriving the truth table:

A B
0 0
0 0
0 1
0 1
1 0
1 0
C F
0 0
1 0
0 0
1 1
0 0
1 1
 1 1 0 1
1 1 1 1
TABLE 7 (Truth table for experiment 3-1)

 From the truth table we can derive the output equation:

F =Σ(3, 5, 6, 7)
F = A`BC + AB`C + ABC` +ABC

3.1.2 List of components that we will use:

VCC 1
GROUND 1
PROBE 1
SWITCH 3
3-8 DECODER (74138) 1
NAND (7420) 1
Table 8 List of the circuit components

3.1.3 Implementation:
 Because of the NAND 3-8 DECODER NAND ic is used.
 Connect VCC and GROUND source for the whole elements.
 Connect a probe to test the circuit.

3.1.4 Simulation Results:

 Since the experiment result set to give 1 when the we have 1`s more than 0`s the probe
should light when at least two of the inputs is 1.
Figure 11 (Circuit Implementation using EWB for A=1, B=0, C=1)

A B C F
1 0 1 1

Figure 12 (Circuit Implementation using EWB for A=0, B=0, C=1)

A B C F
0 0 1 0
 Figure 13 (Circuit Implementation using EWB for A=1, B=1, C=1)

A B C F
1 1 1 1

2- 4 to 1 Multiplexer (74LS153)

3.2.1 deriving the truth table:

A B
0 0
0 0
0 1
0 1
1 0
1 0
C F
0 0
1 0
0 0
1 1
0 0
1 1
 1 1 0 1
1 1 1 1
TABLE 9 (Truth table for experiment 3-2)

3.2.2 List of components that we will use:

VCC 1
GROUND 1
PROBE 1
SWITCH 1
4-1 MUX (74153) 1
NOT (7404) 1
Table 10 List of the circuit components

2.2.3 Implementation:

 4 INPUTS means 4 regions (A0A1A2A3), By treating A, B as selector finds that:

A0 = GROUND, A1 = A2 =C, A3 = VCC

 Connect VCC and GROUND source for the whole elements.

 Add NOT ic to make c`.
 Connect a probe to test the circuit.
Figure 14 (Circuit Implementation using EWB for A=1, B=0, C=1)

A B C F
1 0 1 1
Figure 15 (Circuit Implementation using EWB for A=1, B=0, C=0)

A B C F
1 0 0 0

Figure 16 (Circuit Implementation using EWB for A=1, B=1, C=1)

A B C F
1 1 1 1