Assignment No-1

OBJECTIVES:
To understand the working of full adder and full subtractor using
basic gates and universal gates.

PROBLEM STATEMENT:

Realize Full Adder and Subtractor using a) Basic Gates and b)

Universal Gates

OUTCOMES:
Student will be able to design and implement combinational digital
circuit as per specification.

INSTRUMENTS REQUIRED:

Digital learning kit, patch cords, power cord, ICs.

IC REQUIRED:

7486, 7432, 7408,7404,7400,7402.

THEORY:
1. Binary Adder

Digital computers perform variety of information tasks. Among the

functions encountered are the various arithmetic operations. The
most basic arithmetic operation is the addition of two binary digits.
This simple addition consists of four possible elementary operations.
0 + 0 = 0, 0 + 1 = 1, 1 + 0 = 1, 1 + 1 = 10. The first three operations
produce sum of one digit, but when the both augends and addend
bits are equal 1, the binary sum consists of two digits. The higher
significant bit of the result is called carry .When the augend and
addend number contains more significant digits, the carry obtained
from the addition of the two bits is called half adder. One that
performs the addition of three bits (two significant bits and a
previous carry) is called half adder. The name of circuits from the
fact that two half adders can be employed to implement a full adder

A Full Adder Circuit

The main difference between the Full Adder and the previous Half
Adder is that a full adder has three inputs. The same two single bit
data inputs A and B as before plus an additional Carry-in (C-in)
input to receive the carry from a previous stage as shown below
Full Adder Block Diagram

Then the full adder is a logical circuit that performs an addition

operation on three binary digits and just like the half adder, it also
generates a carry out to the next addition column. Then a Carry-in is
a possible carry from a less significant digit, while a Carry-out
represents a carry to a more significant digit.

In many ways, the full adder can be thought of as two half adders
connected together, with the first half adder passing its carry to the
second half adder as shown.

Full Adder Logic Diagram

As the full adder circuit above is basically two half adders connected
together, the truth table for the full adder includes an additional
column to take into account the Carry-in, CIN input as well as the
summed output, S and the Carry-out, COUT bit.
Full Adder Truth Table with Carry

K-Map
Circuit Diagram

Implementing Full Adder using NAND only

Circuit Diagram

Implementing Full Adder using NOR only

Circuit Diagram

Full Subtractor

Full subtractor performs subtraction of two bits, one is minuend and

other is subtrahend. In full subtractor  ‘1’ is borrowed by the
previous adjacent lower minuend bit.  Hence there are three bits are
considered at the input of a full subtractor.  There are two outputs,
that are DIFFERENCE output D and BORROW output Bo. The
BORROW output indicates`that the minuend bit requires borrow ‘1’
from the next minuend bit. Figure shows the truth table of a full
subtractor. The K-maps for the two outputs are shown in figure.  If
we compare DIFFERENCE output D and BORROW output Bo with
full adder`it can be seen that the DIFFERENCE output D is the same
as that for the SUM output.  Further, the BORROW output Bo is
similar to  CARRY-OUT. In the case of a half-subtractor, A input is
complemented similar things are carried out in full subtractor.

Truth Table and K-Map Equations

Equations for Full Subtractor

Circuit Diagram

Subtractor using NAND

Full Subtractor using NOR

Conclusion

Full Adder and subtractor is verified by using the digital trainer kit