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Computer System Architecture Assignment: Submitted To:-Submitted By:-Mayank Sharma Roll No.:-19hcs4034
Computer System Architecture Assignment: Submitted To:-Submitted By:-Mayank Sharma Roll No.:-19hcs4034
ARCHITECTURE
ASSIGNMENT
Submitted to:-DR.ANUJA SONI mam
Submitted by:-Mayank Sharma
Roll no.:-19hcs4034
In this presentation, we will create text-file as well as its machine
using CPU SIMULATOR.
So first we learn a little about CPU SIMULATOR…
The above four steps are performed during the execution of every
program. These are the basic steps of Instruction cycle.
The registers use in CPU SIMULATOR are given in table below along with their symbol, size and
function.
*(size may vary in different
REGISTER Computers,
NUMBER here we size
OF BITS of memory
REGITER is 4096 X 16)
NAME FUNCTION
SYMBOL
DR 16 DATA REGISTER HOLD MEMORY
OPERAND
AR 12 ADDRESS REGISTER HOLD ADDRESS FOR
MEMORY
AC 16 ACCUMULATOR PROCESSOR REGISTER
REGISTER
IR 16 INSTRUCTION HOLDS INSTRUCTION
REGISTER CODE
PC 12 PROGRAM REGISTER HOLDS ADDRESS OF
INSTRUCTIONS
TR 16 TEMPORARY REGISTER HOLDS TEMPORARY
DATA
INPR 8 INPUT REGISTER HOLD INPUT
CHAHRACTER
OUTR 8 OUTPUT REGISTER HOLD OUTPUT
The given table represent the path of transfer of information from one
Register to another known as Common Bus System.
LD represents Load(Load value in register), INR represents Increment
(Increment in value of register), CLR represents Clear(Clear value to
0).
❖ When data is transfer from memory to register, then it require-
❑ enable the Read input of memory.
❑ Place the content of memory onto the bus by making some value
of
S2S1S0.
❑ Transfer
❖ Incrementthe
ofcontent
registerof
is the bus
done bytoenabling
the register by enabling
the INR input ofits LD.
register.
❖ Register is clear to 0 by enabling CLR input of register.
Input and Output path between various registers and memory shown
in
given Figure.
FETCH AND
DECODE
Firstly, the program counter PC is loaded with the address of the first instruction in the program. The
sequence
counter is cleared to 0,providing a timing signal T0, which is incremented by one.
T0: P
AR
T1: IR CM[AR], PC PC+1
T2: DO…..D7 DECODE IR(12-14), AR IR(0-11), I IR(15)
Since, only AR is connected to address input of memory, so address transfer from PC to AR during T0.
The instruction read from memory is placed in IR and PC is also incremented by 1 to hold address of next
instruction during T1.At time T2, the operation code in IR is decoded, the indirect bit is transferred to flip
flop I, and address part to AR.
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ILLUSTRATI During T2: Decoding of Instruction Format.
--------
ON
I OPCODE ADDRESS OF
INSTRUCTION
15 14…………………….12 11…………………………………………………………..0 (bits)
If ( I=0, represent Direct Address, requires two references to memory)
If ( I=1, represent Indirect Address, requires three references to
memory)
OPCODE represent the required operation to be perform.
If (OPCODE = 000 through 110 AND I = 0/1), then it is known as Memory- reference
instruction.
I OPCODE ADDRESS OF
INSTRUCTION
15 14…………………….12 11…………………………………………………………..0 (bits
)
If (OPCODE = 111 AND I = 0), then it is known as Register-reference
instruction.
I OPCODE REGISTER
OPERATION
15 14…………………….12 11…………………………………………………………..0 (bits
)
If (OPCODE =111 AND I = 1), then it is known as Input-Output
instruction.
I OPCODE INPUT-OUTPUT
OPERATION
15 14…………………….12 11…………………………………………………………..0 (bits
)
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--------
DETERMINING INSTRUCTION TYPE AND
EXECUTION
--
(viii) Run Program:
INPUT:
OUTPU
T:
After saving both text-file and Machine. We assemble and load the program under execution option
for converting the instructions into machine language i.e., into 0 and 1 and run the program for giving
input and perform the operation.
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--------
Illustration of above program output:-
Here, we are taking one input i.e., 40.
It gives output 70 by adding 40 with 30(operand stored in Memory)
i.e., 40+30=70.
Hence, program is working perfectly.
---------------------------------------------------------------------------------------------------------------------------------------------------
----------
DEBUG
MODE:
We use debug mode(under execute option) for detecting error, by using debug mode we can run program’s
instructions or micro-instructions step by step for understanding the internal working of machine by
examining the transferring of data between different registers and we can detect error easily.
Debug Mode
Now, let us see second version addition program which is slightly different from first
one
This program will add two user entered numbers. The program take two inputs.
Majorly, Machine instructions will be same except some modifications as we
create one more register TR to hold one operand temporarily from AC, which
later transfer data to DR for arithmetic operation.
(i) Creating Text-File
(ii) Create RAM and
Registers
-------------------------------------------------------------------------
(Performing Addition)
(vi) Indexing
After Saving Text-file and Machine:
(vii) Assemble & load
Program
(viii) Run Program
INPU
T
OUTPU
T
THANK YOU!!
FOR YOUR ATTENTION