Welcome to part seven of this series of training videos.

Now, electric vehicles

need systems to convert AC power into DC for storage in high voltage and low
voltage battery systems and to convert the stored energy back to AC to drive the
motors. We've seen the overall system block diagram and outlined how the Power
Factor Corrector and Phase-Shifted Full Bridge stages operate. Now we're going to
examine how to design the PFC and PSFB stages.

The design uses an interleaved CCM PFC stage control by a UCC28070-Q1 to perform
the initial AC to DC conversion. The phase shifted full bridge topology, controlled
by the UCC28951-Q1, is chosen for the DC-DC stage. This stage achieves high
efficiency at high power levels. It provides input to output isolation and an
output suitable for battery charging. Other devices are used to perform ancillary
functions, references, current sensing, and op-amps, for example.

Texas Instruments offers a wide variety of devices for use in hybrid EV

applications in addition to the two controllers already mentioned. A few examples--
the UCC21520 8kV multi-channel isolated gate driver, the Allen 4132 reference with
0.05% accuracy, INA 520 and INA 199 current sense amplifiers, et cetera, et cetera.

So here are some typical specifications for two battery charger applications, a 12
volt lead acid battery charger at one kilowatt and a 400 volt lithium ion battery
charger at 3.3 kilowatts. The input is an AC line connection with a voltage in the
range of 85 to 264 volts. These are typical specifications, and of course, real
world specifications may differ in detail. But the overall design approach will
remain more or less unchanged.

So here is a simplified schematic showing how an interleaved CCM PFC stage can be
designed using UCC28070-Q1. The input circuit includes a fuse and inrush limiting,
NTC. The NTC is necessary in order to limit the initial charging current as C out
charges are from 0 volts to the peak of line voltage. The NTC dissipates a lot of
heat during operation, getting very hot in the process, and this is a waste of
energy. And often, a more sophisticated inrush current limiting circuit is used.
These use a relay or other switch to bypass the resistance, once the inrush
transient has passed.

An input filter is needed to reduce the EMI generated by the power stages to
acceptable levels. The capacitors marked CX and CY must have appropriate safety
agency approvals for use in this part of the circuit. A bridge rectifier is used
here to convert the alternating line voltage into a unipolar voltage, which is
applied to the input of the PFC stage.

The PFC stage is an interleaved CCM boost PFC controlled by UCC28070-Q1. This
device uses resistive potential dividers to sense the boost stage output voltage at
VSENSE and the input line voltage at VINAC. The MOSFET current is sensed using
current transformers in the drain circuits of the MOSFETs. It is possible to use
resistive sensing in the MOSFET source, but the high currents in the circuit make
this difficult. Also, the UCC28070-Q1 requires a consent signal in the range of 0
to 3 volts, and this is not possible from a current sensing resistor, unless an
additional amplifier is used.

An external MOSFET driver, type UCC27524A1-Q1 is used to drive the PFC stage
MOSFETs. Here's a block diagram showing how a Phase-Shift Full Bridge battery
charger can be designed. The power train is controlled by a UCC28951-Q1 controller,
and a microcontroller provides system supervision functions. For example, MOSFET
and battery temperature monitoring, output voltage temperature compensation, float
level settings, and top up charge controls.

An isolation amplifier monitors the input voltage, and its output may be used by
the microcontroller to provide an input undervoltage lockout. The current
transformer provides the current sensing needed for peak current mode control. QA,
QB, QC, and QD are the four primary side switches, and QE and QF are the
synchronous rectifiers in the secondary.

Isolated drivers are used to drive the primary side devices. Low-side MOSFET
drivers are then used to drive the secondary side SRs. Precision references are
needed to achieve the tight output voltage tolerances needed for battery charging,
especially for lithium ion battery chargers.

So I showed in part two how the CI-CV output regulation characteristic is achieved.
But I want to refresh your memory on this important aspect of the DC-DC stage of an
on-board charger. We know that the charger has to switch automatically between CV
and CI regulation. This is done by having to error amplifiers, one comparing the
output current against the constant current regulation set point and the other
comparing the output voltage against the constant voltage regulation set point.

If the system is in CI mode, the voltage error amplifier is saturated high because
VO is below the voltage regulation set point. If the system is in CV mode, the
current error amplifier saturates high because the current is below the current
regulation set point. The outputs for the two error amplifiers are diode ord, and
the lower of the two errors is fed into the controller. An external LM-4132-Q1
reference is used because the onboard reference at the UCC28951-Q1 may not be
accurate enough for lithium ion battery charging.

Output voltage is controlled for temperature compensation at the battery voltage

and for setting the float voltage in the lead acid battery charger may be
accomplished by a digital potentiometer. A TPL0401A-10-Q1 device, for example,
controlled by an an external microcontroller over an I2C bus. Various auxiliary
power supply rails are needed. And these are supplied by some low-power flyback
PSUs.

The secondary bias rails are provided by a small flyback PSU. Here, I'm showing you
a design using the UCC28700-Q1 primary side regulator. This would normally provide
a 12-volt output at a low current, less than 500 milliamps or so.

And this device allows a low cost design, a simple, low cost transformer, and a
small overall design. TI provides design tools, webench support, reference designs,
and evaluation modules to use with this part.

We can use the same device for the primary bias flyback. The main difference is
that only functional insulation is needed in the transformer rather than the safety
critical reinforced insulation needed for the secondary bias.

The primary and secondary bias supplies could be generated by a single flyback
converter with multiple secondary windings. Cross regulation and low transient
defects may make a second stage of regulation necessary using an LDO, for example.
So the overall cost may not be reduced if this is done.

An alternative flyback controller is the UCC28C4x-Q1. As with the UCC28700-Q1 shown

earlier, this device can be used to generate either primary or secondary bias
rails. It also can be used with primary side regulation to eliminate the need for
an optocoupler.

The main difference between the two devices is that the UCC28C4x-Q1 operates at a
fixed frequency. This allows the possibility of synchronizing its operation to that
of the other power stages in the system.

Now up until now we have assumed that a full wave rectifier with a center tapped
secondary and synchronous rectifier is used. In fact, there are a few alternative
rectifier circuits that can be used, and the choice depends on the output voltage
at current levels.

At 400 volts out, diodes, especially silicon carbide ones, are a simple solution.
There are full wave or bridge options as well, and these give you a trade-off of
rectifier losses and transformer secondary complexity.

For 12-volt outputs, synchronous rectifiers are a good option at 12 volts. Body
diode reverse recovery losses, though, can be significant. Options to go for full
wave with center tap or full bridge with a single secondary winding exist.

As always with current MOSFET driver, of course, such as the UCC27424-Q1 shown
here, Schottky diodes may in fact be an option at 12-volt output. The losses due to
the forward voltage drop are higher, but easier drive and no reverse recovery
problems.

And a current doubler secondary with synchronous rectification is a good option. It

uses a single winding in the transformer and splits the current between the two
inductors.

Now we're going to have a brief look at some of these alternatives. This is the
full wave rectifier with a center tap secondary. MOSFETs are used at synchronous
rectifiers. The UCC27424-Q1 is a dual non-inverting MOSFET driver with a four-amp
drive capability.

The MOSFETs see a voltage stress of two times the input voltage times the
transformer turns ratio. And we must increase this a little bit more to allow for
switching spikes and derating margins. But we should be able to use 30-volt devices
for a 12-volt output.

Reverse recovery losses in synchronous rectifiers can be significant. These losses

must be minimized by careful selection of the SR device and switching timing.

The center tap secondary means that half of the secondary winding is idle at a
given time. And the transformer winding structures must be designed carefully to
minimize proximity losses, including losses in the idle half.

This is a current doubler output circuit shown here with Schottky rectifiers. This
topology is well suited to high current low voltage outputs. It does require
current mode control to force equal currents into two output inductors. And the
advantage of this topology is that there is a significant amount of ripple current
cancellation in Cout.

A single winding in the transformer secondary simplifies its design and makes best
use of the transformer winding window. A disadvantage is that two output inductors
are needed. But each inductor carries half the output current, which means it can
be made lighter. Electrically, this is by far the simplest option.

Now this is a current doubler shown with synchronous rectifiers. And it has much in
common with the earlier diode rectified current doubler circuit. As before, the
MOSFET see two times Vin times the transformer turns ratio. And the design module
will have to be added to this.

Reverse recovery losses in synchronous rectifiers can be significant. And MOSFETs

need to be chosen carefully. The SRs are ground referenced, which allows the use of
a simple driver like the UCC27424-Q1.

Depending on the current levels, the designer may need to parallel several MOSFETs.
If you do this, then use separate gate drivers or separate gate drive resistors. It
also needs careful layout to avoid destructive high frequency oscillations, but it
can be done.

So this is a four-way rectified secondary. The transformer secondary has a single

winding and uses a single output inductor. The transformer secondary current is
highest in this configuration, but the voltage stresses in the SR are half of those
in the current doubler circuit.

The main disadvantage of this configuration is that four SRs are required. In
addition, two high-side and two low-side SR drivers are needed. In fact, this
circuit is rarely used, except of course in bidirectional converters, which are
really outside the scope of this presentation.

Silicon carbide diodes are the simplest solution for a 400-volt output. Either a
full wave rectifier as shown at the top right or a full bridge rectifier can be
used, with the normal trade-offs of reverse recovery stresses, transformer
complexity, and losses due to the forward voltage drops in the diodes.

Silicon carbide diodes have a complex Vf versus temperature characteristic. It's

positive when the current is highest but negative at lower currents. This makes
current sharing by parallel in the diodes possible.

The charger has to switch between constant voltage and constant current regulation,
like the typical characteristics shown at the bottom left. I have explained earlier
in this video how this characteristic is achieved by using two error amplifiers,
one for the output current and the other for the output voltage. Here, I'm showing
an external high position, LM4132-Q1 reference because the onboard reference at the
UCC28951-Q1 may not be accurate enough, especially for lithium ion charging
applications.

The upper current is sensed by an INA199-Q1 or INA250-Q1 device, which feeds its
output into the current error amplifier. Output voltage control for temperature
compensation at the battery voltage and for setting the float voltage in the lead
acid battery charger is accomplished by a digital potentiometer, controlled by an
external microcontroller over an I2C bus. And the TPN04018-10-Q1 device shown here
is a single-channel digital potentiometer with 128 wiper positions.

The phase shift full bridge in this design is controlled in peak current mode. This
means that the error signal from either the voltage or current error amplifiers is
set at current demand level for the inner PWM loop.

We use a current transformer in the input power rail to sense the input current.
And the inner current loop compares the current sense signal to the demand from the
error amplifier to control the current in the usual way.

The input current is normally sensed by a current transformer located in the HV bus
as shown above. In this location, it senses the full bridge current. It'll also
detect any shoot-through currents in the bridge. Peak current mode control in an
UCC28951-Q1 to provide cycle-by-cycle control of the peak current in the primary
switches and prevents transformer saturation due to unbalanced primary currents.

Of course, we cannot use the primary current sense signal for constant current
regulation because the primary current is a function of the input voltage. And
there is no fixed relation between primary and secondary current. This is why we
need the current error amplifier to set a demand level for the control loop and so
regulate the output current.

This is a system level diagram of a high-power on-board charger using a three-phase

line supply for increased power. The AC input feeds into multiple PFC stages and
multiple phase shift full bridge DC/DC stages in parallel.

Looking closer, we can see that it uses the power stages and controller that we
have been discussing so far as building blocks. It arranges them in parallel, each
block carrying part of the power. This approach allows a system designer to achieve
even higher power levels that could be obtained from a single-phase, single DC/DC
stage design.

And here is a simplified version of the previous diagram. It's clear that this
system uses a PFC stage on each of the line phases. And each of these stages uses
an interleaved PFC controller to generate an intermediate DC bus.

In this system, phase is used to mean two completely separate things, and it's
necessary to be extremely clear about which meaning is intended when discussing
systems like these. I tend to use the term line phase or mains phase when I mean
the voltage applied to the input of the system, labelled VAC above.

I use PFC phase or controller phase if I'm talking about the interleaved phases of
the boost PFC stages. I'm not aware of any better terminology than this. But the
main thing is to be careful and make sure that the correct meaning has been
understood.

I've shown sync lines between the PFC controllers. This helps reduce system noise
and audible noise due to beat frequencies between the stages. The DC/DC stages
should also be synchronized to each other and possibly to the PFC stages as well.

One final thing, which is necessary, is to force current sharing across the three
DC/DC converters. This is necessary so that the currents in the three line phases
are balanced.

Parallel operation is a very useful system level technique, and it is almost

trivially easy in the phase shift full bridge. So paralleling gives the system
level reliability, availability, and lifetime benefits already mentioned.

In addition to these benefits, it also allows for a flexible system to be built up

with the possibility of adding extra power stages. Current sharing improves
transient performance in the case of a larger failure, and also increases system
level liability and lifetime because the individual modules in the current share
system are not run at full power.

Paralleling of the PFC stages has many of the same benefits as paralleling the
DC/DC stages. The diagram shown here is taken from the UCC28070-Q1 data sheet and
shows how two UCC28070-Q1 devices can control four PFC stages.

Synchronization is used for two purposes here. First, it reduces system level noise
and audible beat frequencies. Secondly, it reduces the switching frequency ripple
in the output capacitors.

So this is the end of part 7. And the next and final video in this training series
is part 8, which deals with important considerations for MOSFET gate drivers and
includes some references.