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Center for Advanced Studies in Engineering, Islamabad

EE212L Electric Circuit Analysis II (3rd Semester)

Center for Advanced Studies in Engineering, Islamabad


Electronics Lab

Electric Circuit Analysis II

EXPERIMENT NO 11: Study of Transient’s response of First Order RC and RL


circuits with sinusoidal forcing function (using Multisim Electronics Workbench)

Name of Student: ……………………………………………………..

Roll No.: ……………………………………………………………….

Class Section: …………………………………………………………

Date of Experiment: ………………………………………………….

Report submitted on: …………………………………………………

Marks obtained: …………………………………

Instructor’s Signature: …………………………..

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
1/8
Center for Advanced Studies in Engineering, Islamabad
EE212L Electric Circuit Analysis II (3rd Semester)

EXPERIMENT NO 11: Study of Transient’s response of First Order RC and RL


circuits with sinusoidal forcing function (using Multisim Electronics Workbench)

1. Objectives

To perform a transient analysis of RC & RL series circuits using Multisim Electronic


Workbench.

2. Background Information

Response to an AC forcing function:

The complete response of first order RC and RL circuits with AC forcing function is given by

Xm Xm
Y (t )=(Y (0)− 2
)e−t /τ + cos( ωτ−tan−1 ωτ )
1+(ωτ ) 2
√ 1+(ωτ )
The above equation shows that the response to an forcing function consists of two components,
namely, the exponentially decaying component, called the transient component and an AC
component called the AC steady state component, because this is the value to which the complete
response will settle once the transient component has died out. We emphasize this by writing.

y (t )= y xsient + y ss

Where

xm
y xsient=( y (0 )− 2
e−t /τ
1+(ωτ )
y ss = y in cos(ωτ +Φ)
x
y m= m
√ 1+(ωτ )2
φ=−tan−1 ωτ

y
The quantities m and Φ are called respectively ,the amplitude and the phase angle of the
steady-state component.

3. Simulation

This experiment consists of three parts.

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
2/8
Center for Advanced Studies in Engineering, Islamabad
EE212L Electric Circuit Analysis II (3rd Semester)
Part-I: Transient’s response of Series RC circuit.

Material required

Sinusoidal voltage source --------1

Capacitor, 1 μ F ---------1

Inductor, 5mH ------------1

Resistor,

1K -------------1

10 ---------------1

Procedure

1. Build the circuit of Fig 3.1on Multisim Electronics Workbench. Note the node numbers by
a. Selecting options from main menu.
b. Go to Preferences and check Show node names.
2. Run the Transient Analysis. The procedure is given as:
a. Select Simulate on Main Menu
b. Select Analysis
c. Select Transient Analysis
d. Select Analysis Parameters
 Initial Conditions Set to zero
 Start time 0 s
 End time 0.005 sec
e. Select Output Variables
Select node 2 (left box, this is the node for capacitor voltage,

You might have different node number for capacitor voltage)

f. Select Simulate

3. Observe the waveform and attach its graph as Fig 3.3.


4. Measure the phase angle ( Φ ) between input voltage Vi(t) and capacitor voltage Vc(t) and
record it below.
Φ =____________degree

5. Reverse the order of the components to observe the voltage across the resistor (VR) and
repeat steps 3 and 4. Sketch the resulting waveform of VR on a graph and attach it as Fig.
3.4.
6. Measure the phase angle ( Φ ) between input voltage Vi(t) and VR(t) and record it below.

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
3/8
Center for Advanced Studies in Engineering, Islamabad
EE212L Electric Circuit Analysis II (3rd Semester)
Φ =____________degree

Part-II: Transient’s response of Series RL circuit.

Procedure

1. Build the circuit of Fig 3.2 on Multisim Electronics Workbench. Note the node
numbers by
a. Selecting options from main menu.
b. Go to Preferences and check Show node names.
2. Run the Transient Analysis. The procedure is given as:
c. Select Simulate on Main Menu
d. Select Analysis
e. Select Transient Analysis
f. Select Analysis Parameters
 Initial Conditions Set to zero
 Start time 0 s
 End time 0.0025 sec
g. Select Output Variables
Select node 2 (left box, this is the node for inductor voltage,

you might have different node number for inductor voltage)

h. Select Simulate
3. Observe and sketch the waveform on a graph and attach it as Fig 3.5.
4. Measure the phase angle ( Φ ) between input voltage Vi(t) and capacitor voltage VL(t)
and record it below.
Φ =____________degree

5. Reverse the order of the components to observe the voltage across the resistor (VR) and
repeat steps 3 and 4. Sketch the resulting waveform of VR on a graph and attach it as
Fig. 3.6.
6. Measure the phase angle ( Φ ) between input voltage Vi(t) and VR(t) and record it
below.
Φ =____________degree

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
4/8
Center for Advanced Studies in Engineering, Islamabad
EE212L Electric Circuit Analysis II (3rd Semester)
R1
R1
4
1kOhm 1 10 Ohm
3 V1
3 V1
10 V L1
10 V C1 1kHz 5mH
1kHz 1uF
0Deg 0Deg

0 0

Fig. 3.1 Fig. 3.2

Attach your graph Here Attach your graph Here


Fig 3.3 Fig 3.4

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
5/8
Center for Advanced Studies in Engineering, Islamabad
EE212L Electric Circuit Analysis II (3rd Semester)

Attach your graph Here Attach your graph Here


Fig 3.5 Fig 3.6

4. Questions

Sketch the inductor current IL(t) for the circuit of Fig. 3.2 in space provided below.

Attach your graph Here


Fig 3.7

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
6/8
Center for Advanced Studies in Engineering, Islamabad
EE212L Electric Circuit Analysis II (3rd Semester)

Lab #11 Marks Details:


# Qualities & Criteria 0 < Poor <=40 40< Satisfactory <= 70 70 < Good <= 90 90< Excellent <=100
ER1 Task Completion No Tasks were completed/ Some tasks were Few tasks were left to All tasks completed in
minimal effort shown completed. Could not be completed. due time. All goals
justify the reasons for Provided acceptable achieved.
uncompleted tasks and justification for the
goals. uncompleted tasks and
goals.
ER2 Neat and Clean Components are wired but Most of the wires are Few but not all All components are
circuit didn’t ensure neatness and untidy with jumbled up components are wired wired in a neat, clean
constructions cleanliness at all /minimal connections in a neat, clean and and safe manner
effort shown safe manner
ER6 Troubleshooting Unable to identify the Able to identify the Able to identify the Is able to identify the
fault / minimal effort fault but unable to fault but partially fault and able to make
shown remove it removes it necessary steps and
actions to correct it
ER9 Results and Plots Unable to produce any Inaccurate plots and Correct plots without Good presentation of
plots or results /minimal results any necessary the correct plots with
efforts shown identifying features proper labels, captions
such as labels, captions & visibility
& visibility
RR1 Format/Layout & Follows poorly the Follows, for some part, Follows, for most part, Closely follows all the
Organization requirement related to all the requirements all the requirements requirements related to
format and layout. The related to format and related to format and format and layout.
report is disorganized to layout. The layout. The Written work is well
the extent that it prevents organization is unclear organization is organized and easy to
understanding of he generally good, but understand
content some parts seem out of
place

RR2 Content/Informati The report is not objective The report is objective The report is objective The report is objective
on based and addresses the based and for some part based and for most based and addresses
issues referred in the addresses the issues part addresses the the issues referred in
proposed topic poorly. referred in the proposed issues referred in the the proposed topic with
The provided information topic with an acceptable proposed topic with an in depth analysis and
& results is not coherent engineering/theoretical acceptable reasoning. The
rather irrelevant. Little analysis. The provided engineering/theoretical provided information
engineering/theoretical information & results analysis and reasoning. & results is necessary,
analysis is presented for some parts is The provided relevant and sufficient
necessary and sufficient information & results to discuss these issues.
to discuss these issues for most part is The details are easily
necessary and understood at peer
sufficient to discuss level.
these issues
TR1 Effort & Attitude Little or no evidence of Minimal effort if any. Completed all agreed Extraordinary effort
effort shown. Negative, Some interest shown in tasks; competent, but demonstrated.
absent minded, withdrawn the project not extraordinary. Exceptionally positive
Positive and /or and/ or constructive
constructive attitude attitude

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
7/8
Center for Advanced Studies in Engineering, Islamabad
EE212L Electric Circuit Analysis II (3rd Semester)

Lab #10: Marks distribution:

ER1 ER2 ER6 ER9 RR1 RR2 TR1

Task 20 Points 10 Points 10 Points 20 Points 20 Points 10 points 10 Points

Lab #11: Marks obtained:

ER1 ER2 ER6 ER9 RR1 RR2 TR1

Task

Marks obtained: …………………………………

Instructor’s Signature: …………………………..

Experiment No.11: Study of Transient’s response of First Order RC and RL circuits with sinusoidal
forcing function (using Multisim Electronics Workbench)
8/8

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