5 4 3 2 1

Project Namel: Gambit MLK MT

PCB Number: 17529
PCBA Ver.: A00
SCH Ver.: A00
Project Code : 3PD0A2010001 Vinafix.com
D PCB Size: 257.4 x 244mm, 1.6mm, 4 Layers D

PAGE TITLE PAGE TITLE Jumper Setting

01 Cover Page 56 HDMI
02 Block Diagram 57 (R) Pin 1-2 With Jumper to ME Disable
03 CPU_(PCIE/DMI) 58 (R) JMP1 Pin 3-4 Without Jumper to Clear Password
04 CPU_(THERMAL/CLOCK/PM/CFG) 59 Display switch_(RTD2166)
05 CPU_(DDR_CHA) 60 HDD/ODD Pin 5-6 With Jumper to Clear CMOS
06 CPU_(DDR_CHB) 61 (R) DB1 PD 1K PD 1K to GND for Debug, All Power-On
07 CPU_(DDI/EDP) 62 Mini card-NGFF SSD
08 CPU_(CPU Power) 63 Mini card-NGFF WLAN
09 CPU_(VSS) 64 PWR BTM/LED BOM Configuration Power sates
10 CPU Power CAP 65 (R)
11 DDR DIMM_1 66 (R) Name G3 DSW S5 S4 S3 S0
12 DDR DIMM_2 67 (R)
(R_): Unmount
13 (R) 68 LPC Debug Port (X_): Debug +12V V_12P0_A O O O O O
14 (R) 69 (R) (GAM_): Gambit MLK MT +12V O
15 PCH_(SPI/UART/I2C ) 70 (R)
16 PCH_(DMI/PCI-E/USB) 71 (R) (EAG_): Eagle MT V_12V_CPU_S0 O O O O O
-12V O
C
17 PCH_(PCI-E/SATA) 72 (R) (TPM_): TPM function -12V
5V_S0 O
C

18 PCH_(CLOCK/CL) 73 (R) (NONTPM_): non-TPM function USBVCC12

19 PCH_(USB/ESPI) 74 (R) USBVCC34 O O O O
20 PCH_(GPIO/SMBUS/IHDA/JTAG) 75 (R) +5V USBVCC78
21 PCH_(POWER1) 76 (R) 5V_S5
22 PCH_(VSS) 77 (R) V_5_CODEC O O O O O
23 PCH_(Strap Pin) 78 (R) 3P3V_S0
24 SIO_(SCH5553) 79 (R) 3P3V_AUD_S0 O
25 Flash&RTC 80 (R) 3P3V_SB
26 Thermal&FAN 81 (R) 3P3V_SPI
27 Audio Codec_(ALC3820) 82 (R) 3.3V 3P3V_LAN O O O O
28 (R) 83 (R) 3P3V_M2VAUX
29 Audio IO_(Front) 84 (R) 3P3V_PCIVAUX
30 Audio IO_(Rear) 85 (R) 3P3V_S5 O O O O O
31 LAN_(RTL8111H) 86 (R) 3P0V_BAT_VREG
32 RJ45&Transformer 87 (R) VBAT1
VBAT O O O O O O
33 Card Reader_(RTS5170) 88 (R) VBAT2
34 (R) 89 (R) +VCCPLL_OC
VDDQ O
35 (R) 90 (R) V_SM
B O O B
36 (R) 91 TPM V_SM_VTT
37 (R) 92 PCI_SLOT DIMM O
V_VPP
38 USB30_(Front) 93 PCIeX16 V1P0_PCH_SB
39 USB20_(Rear) 94 PCIeX1 +V1P0A_VCCAPLL
40 Power Plane EN Sequence 95 PCI Bridge_(IT8893E) +V1P0A_VCCF24_1P0
41 (R) 96 (R) PCH +V1P0A_VCCAMPHYPLL O O O O
42 Switch power 97 (R) V_CPU_ST_PLL
43 ATX 98 (R) V_CPU_CORE
44 VCORE & V_GT(NCP81220) 99 XDP&ITP V_CPU_GT
45 VCORE OUTPUT(NCP81258) 100 (R) V_CPU_IO
CPU O
46 V_GT OUTPUT(NCP81258) 101 (R) V_CPU_SA
47 VCCSA_(RT8237C) 102 Power Sequence +VCCFUSEPRG
48 VCCIO_(APL5611A) 103 Power Block Diagram
49 5V_S5/3D3V_S5_(RT6575D) 104 Power Good & Reset Diagram
50 DDR_PWR (RT8231A) 105 Clock Diagram
51 PCH_1D0V_(RT8237C) 106 Reset Flow Chart
52 DDR_2D5V_VPP_(APL5930K) 107 Change Histroy
53 MINUS 12V_(NCP3063)
A 54 (R) A

55 (R)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Cover Page
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 1 of 107
5 4 3 2 1
 5 4 3 2 1

ATX-8PIN CONN
PCB BOARD SIZE Channel A
257.4mm X 244mm PCIE X16 SLOT PCI EXPRESS Gen3 INTEL CPU 64 bit
Coffee Lake-S DDR4 UDIMM *1
4 Layer Vinafix.com (65W 6C + GT2) 2666MHz/2400MHz

D CPU-4PIN CONN D

SKT H4 LGA1151 Channel B

HDMI PORT v1.4 DDI1 64 bit
42.5 mm x 42.5 mm
2666MHz/2400MHz DDR4 UDIMM *1

eDP to VGA eDP(1.4)

D-SUB PORT
Realtek RTD2166
VR
(Vcore 4 Phase + VGT 2 Phase)

DMI
C C

SATA 3.0 Realtek

(Port 0) SATA3.0 PCIE Interface RJ45 Conn.
RTL8111H
INTEL PCH
SATA 2.0 Cannon Lake
(Port 1) SATA2.0 PCH-B360 PCI Bridge
PCIE Interface PCI SLOT
ITE IT8893E
SATA 2.0 FCBGA 837PIN
(Port 2) SATA2.0
23 mm x 23 mm PCIE Gen2 Interface PCIE X1 SLOT
SATA 2.0 SATA2.0
(Port 3)
PCIE Gen2 Interface PCIE X1 SLOT
Front USB 3.0*2 USB3.0

PCIE Interface NGFF Conn.

Rear USB 2.0*2 USB2.0 for SSD
(RJ45 USB Conn.)

B
Rear USB 2.0*2 PCIE Interface B
USB2.0
(DUAL USB Conn.)
USB2.0 NGFF Conn.
for WLAN
Realtek USB2.0 CNVi
3 in 1 Card reader
RTS5170
SPI BUS SPI Flash ROM
Rear AUDIO (32MB)
Line - In
Line - Out HDA CODEC
Mic - In HDA Nuvoton TPM
Realtek
NPCT750
ALC3820
Front AUDIO
CTIA (Apple)
Standard Headset
LPC BUS SIO CPU FAN CNTL CPU 1X4 FAN
32.768KHz SMSC SCH5553
32.768KHz

A
24MHz Debug Conn. A
24MHz

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Block Diagram
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 2 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

CPU1C 3 OF 12

Lake-S

PEG_RX_CPU_P0 B8 A5 PEG_TX_CPU_P0
93 PEG_RX_CPU_P0 PEG_RX_CPU_N0 PEG_RXP_0 PEG_TXP_0 PEG_TX_CPU_N0 PEG_TX_CPU_P0 93
93 PEG_RX_CPU_N0 B7 A6 PEG_TX_CPU_N0 93
PEG_RXN_0 PEG_TXN_0
PEG_RX_CPU_P1 C7 B4 PEG_TX_CPU_P1
93 PEG_RX_CPU_P1 PEG_RX_CPU_N1 PEG_RXP_1 PEG_TXP_1 PEG_TX_CPU_N1 PEG_TX_CPU_P1 93
93 PEG_RX_CPU_N1 C6 B5 PEG_TX_CPU_N1 93
PEG_RXN_1 PEG_TXN_1
PEG_RX_CPU_P2 D6 C3 PEG_TX_CPU_P2
93 PEG_RX_CPU_P2 PEG_RX_CPU_N2 PEG_RXP_2 PEG_TXP_2 PEG_TX_CPU_N2 PEG_TX_CPU_P2 93
D5 C4
93 PEG_RX_CPU_N2 PEG_RXN_2 PEG_TXN_2 PEG_TX_CPU_N2 93
PEG_RX_CPU_P3 E5 D2 PEG_TX_CPU_P3
93 PEG_RX_CPU_P3 PEG_RX_CPU_N3 PEG_RXP_3 PEG_TXP_3 PEG_TX_CPU_N3 PEG_TX_CPU_P3 93
E4 D3
93 PEG_RX_CPU_N3 PEG_RXN_3 PEG_TXN_3 PEG_TX_CPU_N3 93
PEG_RX_CPU_P4 F6 E1 PEG_TX_CPU_P4
93
93
PEG_RX_CPU_P4
PEG_RX_CPU_N4
PEG_RX_CPU_N4 F5 PEG_RXP_4
PEG_RXN_4
PEG_TXP_4
PEG_TXN_4
E2 PEG_TX_CPU_N4 PEG_TX_CPU_P4
PEG_TX_CPU_N4
93
93 SKYLAKE SOCKET
PEG_RX_CPU_P5 G5 F2 PEG_TX_CPU_P5
93 PEG_RX_CPU_P5 PEG_RX_CPU_N5 PEG_RXP_5 PEG_TXP_5 PEG_TX_CPU_N5 PEG_TX_CPU_P5 93
93 PEG_RX_CPU_N5 G4 F3 PEG_TX_CPU_N5 93 SKT301 SKT302
PEG_RXN_5 PEG_TXN_5
PEG_RX_CPU_P6 H6 G1 PEG_TX_CPU_P6
93 PEG_RX_CPU_P6 PEG_RX_CPU_N6 PEG_RXP_6 PEG_TXP_6 PEG_TX_CPU_N6 PEG_TX_CPU_P6 93
C 93 PEG_RX_CPU_N6 H5 G2 PEG_TX_CPU_N6 93 C
PEG_RXN_6 PEG_TXN_6
PEG_RX_CPU_P7 J5 H2 PEG_TX_CPU_P7
93 PEG_RX_CPU_P7 PEG_RX_CPU_N7 PEG_RXP_7 PEG_TXP_7 PEG_TX_CPU_N7 PEG_TX_CPU_P7 93
J4 H3
93 PEG_RX_CPU_N7 PEG_RXN_7 PEG_TXN_7 PEG_TX_CPU_N7 93
PEG_RX_CPU_P8 K6 J1 PEG_TX_CPU_P8
93 PEG_RX_CPU_P8 PEG_RX_CPU_N8 PEG_RXP_8 PEG_TXP_8 PEG_TX_CPU_N8 PEG_TX_CPU_P8 93
K5 J2
93 PEG_RX_CPU_N8 PEG_RXN_8 PEG_TXN_8 PEG_TX_CPU_N8 93
PEG_RX_CPU_P9 L5 K2 PEG_TX_CPU_P9
93 PEG_RX_CPU_P9 PEG_RX_CPU_N9 PEG_RXP_9 PEG_TXP_9 PEG_TX_CPU_N9 PEG_TX_CPU_P9 93
L4 K3
93 PEG_RX_CPU_N9 PEG_RXN_9 PEG_TXN_9 PEG_TX_CPU_N9 93
PEG_RX_CPU_P10 M6 L1 PEG_TX_CPU_P10
93 PEG_RX_CPU_P10 PEG_RX_CPU_N10 PEG_RXP_10 PEG_TXP_10 PEG_TX_CPU_N10 PEG_TX_CPU_P10 93
93 PEG_RX_CPU_N10 M5 L2 PEG_TX_CPU_N10 93 Load Plate
PEG_RXN_10 PEG_TXN_10 (22.78003.021) Back Plate
PEG_RX_CPU_P11 N5 M2 PEG_TX_CPU_P11 (22.78006.031)
93 PEG_RX_CPU_P11 PEG_RX_CPU_N11 PEG_RXP_11 PEG_TXP_11 PEG_TX_CPU_N11 PEG_TX_CPU_P11 93
93 PEG_RX_CPU_N11 N4 M3 PEG_TX_CPU_N11 93
PEG_RXN_11 PEG_TXN_11
SKT303
PEG_RX_CPU_P12 P6 N1 PEG_TX_CPU_P12
93 PEG_RX_CPU_P12 PEG_RX_CPU_N12 PEG_RXP_12 PEG_TXP_12 PEG_TX_CPU_N12 PEG_TX_CPU_P12 93
P5 N2
93 PEG_RX_CPU_N12 PEG_RXN_12 PEG_TXN_12 PEG_TX_CPU_N12 93
PEG_RX_CPU_P13 R5 P2 PEG_TX_CPU_P13
93 PEG_RX_CPU_P13 PEG_RX_CPU_N13 PEG_RXP_13 PEG_TXP_13 PEG_TX_CPU_N13 PEG_TX_CPU_P13 93
R4 P3
93 PEG_RX_CPU_N13 PEG_RXN_13 PEG_TXN_13 PEG_TX_CPU_N13 93
PEG_RX_CPU_P14 T6 R2 PEG_TX_CPU_P14
93 PEG_RX_CPU_P14 PEG_RX_CPU_N14 PEG_RXP_14 PEG_TXP_14 PEG_TX_CPU_N14 PEG_TX_CPU_P14 93
T5 R1
93 PEG_RX_CPU_N14 PEG_RXN_14 PEG_TXN_14 PEG_TX_CPU_N14 93
PEG_RX_CPU_P15 U5 T2 PEG_TX_CPU_P15
93 PEG_RX_CPU_P15 PEG_RX_CPU_N15 PEG_RXP_15 PEG_TXP_15 PEG_TX_CPU_N15 PEG_TX_CPU_P15 93
93 PEG_RX_CPU_N15 U4 T3 PEG_TX_CPU_N15 93
PEG_RXN_15 PEG_TXN_15

PEG_RCOMP_CPU L7
PEG_RCOMP
ILMCOVER
(22.78005.281)
20171102 ILMCOVER change to 22.78005.281

DMI_RX_CPU_P0 Y3 AC2 DMI_TX_CPU_P0

16 DMI_RX_CPU_P0 DMI_RX_CPU_N0 DMI_RXP_0 DMI_TXP_0 DMI_TX_CPU_N0 DMI_TX_CPU_P0 16
Y4 AC1
16 DMI_RX_CPU_N0 DMI_RXN_0 DMI_TXN_0 DMI_TX_CPU_N0 16
B DMI_RX_CPU_P1 DMI_TX_CPU_P1 B
AA4 AD3
16 DMI_RX_CPU_P1 DMI_RX_CPU_N1 DMI_RXP_1 DMI_TXP_1 DMI_TX_CPU_N1 DMI_TX_CPU_P1 16
AA5 AD2
16 DMI_RX_CPU_N1 DMI_RXN_1 DMI_TXN_1 DMI_TX_CPU_N1 16
DMI_RX_CPU_P2 AB4 AE2 DMI_TX_CPU_P2
16 DMI_RX_CPU_P2 DMI_RX_CPU_N2 DMI_RXP_2 DMI_TXP_2 DMI_TX_CPU_N2 DMI_TX_CPU_P2 16
16 DMI_RX_CPU_N2 AB3 AE1 DMI_TX_CPU_N2 16
DMI_RXN_2 DMI_TXN_2
DMI_RX_CPU_P3 AC4 AF2 DMI_TX_CPU_P3
16 DMI_RX_CPU_P3 DMI_RX_CPU_N3 DMI_RXP_3 DMI_TXP_3 DMI_TX_CPU_N3 DMI_TX_CPU_P3 16
16 DMI_RX_CPU_N3 AC5 AF3 DMI_TX_CPU_N3 16
DMI_RXN_3 DMI_TXN_3

SKYLAKE-1,SKL-S,LAKE-S,CFL-S

0D95V_CPU_VCCIO
R301 24D9R2F-L-GP
1 2 PEG_RCOMP_CPU

0D95V_CPU_VCCIO 0D95V_CPU_VCCIO
1

C301 C302
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
2

A 1D05V_CPU_SA 1D05V_CPU_SA A
1

C304 C305
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_(PCIE/DMI)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 3 of 107
5 4 3 2 1
 5 4 3 2 1

PLACE NEAR CPU

R401 56D2R2F-GP
V_CPU_ST_PLL 1 2

R403
1
100R2F-L1-GP-U
2
Vinafix.com H_TDO
R402
1
100R2F-L1-GP-U
2 V_CPU_ST_PLL
CPU1E 5 OF 12
D D

R404 1KR2F-3-GP PCH_CPU_BCLK_DP W5 Lake-S H15 SKL_PCUDEBUG_0

18 PCH_CPU_BCLK_DP PCH_CPU_BCLK_DN BCLKP CFG_0 SKL_PCUDEBUG_1
20170417 1 2 W4 F15
add R2422 18 PCH_CPU_BCLK_DN BCLKN CFG_1 F16 SKL_PCUDEBUG_2
PCH_CPU_PCIBCLK_DP W1 CFG_2 H16 SKL_PCUDEBUG_3
18 PCH_CPU_PCIBCLK_DP PCH_CPU_PCIBCLK_DN PCI_BCLKP CFG_3 SKL_PCUDEBUG_4
W2 F19
18 PCH_CPU_PCIBCLK_DN PCI_BCLKN CFG_4 H18 SKL_PCUDEBUG_5
R405 220R2F-GP PCH_CPU_NSSC_CLK_DP K9 CFG_5 G21 SKL_PCUDEBUG_6
VIDALERT#_CPU_R 1 2 VIDALERT#_CPU 18 PCH_CPU_NSSC_CLK_DP PCH_CPU_NSSC_CLK_DN J9 CLK24P CFG_6 H20 SKL_PCUDEBUG_7
44 VIDALERT#_CPU_R 18 PCH_CPU_NSSC_CLK_DN CLK24N CFG_7 SKL_PCUDEBUG_8
G16
CFG_8 E16 SKL_PCUDEBUG_9
R407 0R0402-PAD-2-GP CFG_9 F17 SKL_PCUDEBUG_10
VIDSCK_CPU_R 1 2 VIDSCK_CPU CFG_10 H17 SKL_PCUDEBUG_11
44 VIDSCK_CPU_R CFG_11 SKL_PCUDEBUG_12
G20
CFG_12 F20 SKL_PCUDEBUG_13
R408 0R0402-PAD-2-GP CFG_13 F21 SKL_PCUDEBUG_14
VIDSOUT_CPU_R 1 2 VIDSOUT_CPU VIDALERT#_CPU E39 CFG_14 H19 SKL_PCUDEBUG_15
44 VIDSOUT_CPU_R VIDSCK_CPU VIDALERT# CFG_15 For ITH/DCI debug
E38
VIDSOUT_CPU E40 VIDSCK F14 SKL_PCUSTB_0_DP
PROCHOT#_CPU VIDSOUT CFG_17 SKL_PCUSTB_0_DN SKL_PCUSTB_0_DP 99
R409 499R2F-2-GP C39 E14 R410 0R0402-PAD-2-GP
PROCHOT#_CPU_R PROCHOT# CFG_16 SKL_PCUSTB_0_DN 99
1 2 PROCHOT#_CPU F18 SKL_PCUSTB_1_DP H_TDO 1 2 PCH_JTAG_TDO
24,44 PROCHOT#_CPU_R SM_PGCNTL CFG_19 SKL_PCUSTB_1_DN SKL_PCUSTB_1_DP 99 PCH_JTAG_TDO 20
AC36 G18
H_SKTOCC_CPU DDR_VTT_CNTL CFG_18 SKL_PCUSTB_1_DN 99
AC38
24 H_SKTOCC_CPU SKTOCC# D16 BPM_CPU_N0 R411 0R0402-PAD-2-GP
BPM#_0 BPM_CPU_N1 BPM_CPU_N0 99 H_TDI
3D3V_SB D17 1 2 PCH_JTAG_TDI PCH_JTAG_TDI 20
BPM#_1 BPM_CPU_N2 BPM_CPU_N1 99
G14 1 TP401
3D3V_SB VCCST_GD_CPU U2 BPM#_2 H14 BPM_CPU_N3 1 TP402
VCCST_PWRGD BPM#_3 R412 0R0402-PAD-2-GP
1

H_PWRGD F8 H_TMS 1 2 PCH_JTAG_TMS

20,99 H_PWRGD PLTRST_CPU_N PROCPWRGD H_TDO PCH_JTAG_TMS 20
R413 E7 H13 H_TDO 99
17,99 PLTRST_CPU_N
1

10KR2J-3-GP PM_SYNC_CPU E8 RESET# PROC_TDO G12 H_TDI

17 PM_SYNC_CPU PM_DOWN_CPU PM_SYNC PROC_TDI H_TMS H_TDI 99
R414 D8 F13
PECI_CPU PM_DOWN PROC_TMS H_TCK H_TMS 99
100KR2J-1-GP G7 F11 H_TCK 20,99
2

24 PECI_CPU THERMTRIP#_CPU D11 PECI PROC_TCK

U401
DDR_VTT_CNTL_GATE 6 1 17 THERMTRIP#_CPU THERMTRIP# F12 H_TRST_N R415 51R2F-2-GP
H_TRST_N 99
2

R416 10KR2J-3-GP PROC_TRST# B9 H_PREQ_N H_TCK 1 2

DDR_VTT_CNTL_R PROC_PREQ# H_PREQ_N 99
5 2 1 2 SM_PGCNTL SKL_CNL_N AB36 B10 H_PRDY_N
PROC_SELECT# PROC_PRDY# H_PRDY_N 99
C C
4 3 DDR_VTT_CNTL_CPU TP403 1 CATERR#_CPU D13 R417 0R0402-PAD-2-GP
DDR_VTT_CNTL_CPU 40 CATERR# TPEV_CFG_RCOMP H_TRST_N
M11 1 2 H_TRST_N_R H_TRST_N_R 22
MMDT3904-2-GP CFG_RCOMP

R418 49D9R2F-GP
TPEV_CFG_RCOMP 1 2
SKYLAKE-1,SKL-S,LAKE-S,CFL-S

R419 6K04R2F-GP
VCCST_GD_DRIVER 1 2 VCCST_GD_CPU
40,99 VCCST_GD_DRIVER
1

R420
2K8R2F-GP
2

For EMI
H_PWRGD
C402 SCD1U16V2KX-L-GP
1 2
(R_)
R421 20R2F-GP
PM_DOWN_PCH 1 2 PM_DOWN_CPU
17 PM_DOWN_PCH
C403 SCD1U16V2KX-L-GP
R422 10KR2J-3-GP PLTRST_CPU_N 1 2
1 2 SKL_CNL_N (R_)
0D95V_CPU_VCCIO
(R_)

SKL_PCUDEBUG_0
SKL_PCUDEBUG_0 99

R423 1KR2J-1-GP
SKL_PCUDEBUG_0 1 TP404 SKL_PCUDEBUG_3 1 2 XDP_PCUDEBUG_3
SKL_PCUDEBUG_1 XDP_PCUDEBUG_3 99
1 TP405
SKL_PCUDEBUG_2 1 TP406
B SKL_PCUDEBUG_3 B
1 TP407 R424 1KR2J-1-GP
SKL_PCUDEBUG_4 SKL_PCUDEBUG_4 1 2
SKL_PCUDEBUG_5 1 TP408
SKL_PCUDEBUG_6 1 TP409
SKL_PCUDEBUG_7 1 TP410
SKL_PCUDEBUG_8 1 TP411 0D95V_CPU_VCCIO
SKL_PCUDEBUG_9 R425 1KR2J-1-GP
SKL_PCUDEBUG_10 1 TP412 SKL_PCUDEBUG_9 1 2
SKL_PCUDEBUG_11 1 TP413 (R_)
SKL_PCUDEBUG_12 1 TP414
SKL_PCUDEBUG_13 1 TP415 R426 1KR2J-1-GP
SKL_PCUDEBUG_14 SKL_PCUDEBUG_14 1 2
SKL_PCUDEBUG_15 1 TP416 (R_)

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_(THERMAL/CLOCK/PM/CFG)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 4 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

CPU1A 1 OF 12
11 M_A_DQ[0..63] M_A_DQ5 M_A_CLK0
AE38 Lake-S AW18
M_A_DQ1 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKP_0 M_A_CLK#0 M_A_CLK0 11
AE37 AV18
M_A_DQ2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0 M_A_CLK1 M_A_CLK#0 11
AG38 AW17 M_A_CLK1 11
M_A_DQ3 AG37 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_1 AY17 M_A_CLK#1
M_A_DQ4 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1 M_A_CLK#1 11
AE39 AW16
M_A_DQ0 AE40 DDR0_DQ_4/DDR0_DQ_4 DDR0_CKP_2 AV16
M_A_DQ6 AG39 DDR0_DQ_5/DDR0_DQ_5 DDR0_CKN_2 AT16
M_A_DQ7 AG40 DDR0_DQ_6/DDR0_DQ_6 DDR0_CKP_3 AU16
M_A_DQ13 AJ38 DDR0_DQ_7/DDR0_DQ_7 DDR0_CKN_3
M_A_DQ9 AJ37 DDR0_DQ_8/DDR0_DQ_8 AY24 M_A_CKE0
M_A_DQ10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_0 M_A_CKE1 M_A_CKE0 11
AL38 AW24
M_A_DQ11 DDR0_DQ_10/DDR0_DQ_10 DDR0_CKE_1 M_A_CKE1 11
AL37 AV24
M_A_DQ8 AJ40 DDR0_DQ_11/DDR0_DQ_11 DDR0_CKE_2 AV25
M_A_DQ12 AJ39 DDR0_DQ_12/DDR0_DQ_12 DDR0_CKE_3
M_A_DQ14 AL39 DDR0_DQ_13/DDR0_DQ_13 AW12 M_A_CS#0
M_A_DQ15 DDR0_DQ_14/DDR0_DQ_14 DDR0_CS#_0 M_A_CS#1 M_A_CS#0 11
AL40 AU11
M_A_DQ21 DDR0_DQ_15/DDR0_DQ_15 DDR0_CS#_1 M_A_CS#1 11
AN38 AV13
M_A_DQ16 AN40 DDR0_DQ_16/DDR0_DQ_32 DDR0_CS#_2 AV10
M_A_DQ18 AR38 DDR0_DQ_17/DDR0_DQ_33 DDR0_CS#_3
M_A_DQ19 AR37 DDR0_DQ_18/DDR0_DQ_34 AW11 M_A_ODT0
M_A_DQ20 DDR0_DQ_19/DDR0_DQ_35 DDR0_ODT_0 M_A_ODT1 M_A_ODT0 11
AN39 AU14
M_A_DQ17 DDR0_DQ_20/DDR0_DQ_36 DDR0_ODT_1 M_A_ODT1 11
AN37 AU12
M_A_DQ22 AR39 DDR0_DQ_21/DDR0_DQ_37 DDR0_ODT_2 AY10
M_A_DQ23 AR40 DDR0_DQ_22/DDR0_DQ_38 DDR0_ODT_3
M_A_DQ25 AW37 DDR0_DQ_23/DDR0_DQ_39 AY13 M_A_BS0
M_A_DQ28 DDR0_DQ_24/DDR0_DQ_40 DDR0_BA_0 M_A_BS1 M_A_BS0 11
AU38 AV15
M_A_DQ27 DDR0_DQ_25/DDR0_DQ_41 DDR0_BA_1 M_A_BG0 M_A_BS1 11
AV35 AW23
M_A_DQ31 DDR0_DQ_26/DDR0_DQ_42 DDR0_BG_0 M_A_BG0 11
C AW35 C
M_A_DQ29 AU37 DDR0_DQ_27/DDR0_DQ_43 AW13 M_A_A16
M_A_DQ24 DDR0_DQ_28/DDR0_DQ_44 DDR0_MA_16 M_A_A14 M_A_A16 11
AV37 AV14 M_A_A14 11
M_A_DQ30 AT35 DDR0_DQ_29/DDR0_DQ_45 DDR0_MA_14 AY11 M_A_A15
M_A_DQ26 DDR0_DQ_30/DDR0_DQ_46 DDR0_MA_15 M_A_A15 11
AU35
M_A_DQ32 AY8 DDR0_DQ_31/DDR0_DQ_47 AW15 M_A_A0
M_A_DQ36 DDR0_DQ_32/DDR1_DQ_0 DDR0_MA_0 M_A_A1 M_A_A0 11
AW8 AU18
M_A_DQ34 DDR0_DQ_33/DDR1_DQ_1 DDR0_MA_1 M_A_A2 M_A_A1 11
AV6 AU17 M_A_A2 11
M_A_DQ35 AU6 DDR0_DQ_34/DDR1_DQ_2 DDR0_MA_2 AV19 M_A_A3
M_A_DQ33 DDR0_DQ_35/DDR1_DQ_3 DDR0_MA_3 M_A_A4 M_A_A3 11
AU8 AT19
M_A_DQ37 DDR0_DQ_36/DDR1_DQ_4 DDR0_MA_4 M_A_A5 M_A_A4 11
AV8 AU20 M_A_A5 11
M_A_DQ39 AW6 DDR0_DQ_37/DDR1_DQ_5 DDR0_MA_5 AV20 M_A_A6
M_A_DQ38 DDR0_DQ_38/DDR1_DQ_6 DDR0_MA_6 M_A_A7 M_A_A6 11
AY6 AU21 M_A_A7 11
M_A_DQ44 AY4 DDR0_DQ_39/DDR1_DQ_7 DDR0_MA_7 AT20 M_A_A8
M_A_DQ40 DDR0_DQ_40/DDR1_DQ_8 DDR0_MA_8 M_A_A9 M_A_A8 11
AV4 AT22
M_A_DQ47 DDR0_DQ_41/DDR1_DQ_9 DDR0_MA_9 M_A_A10 M_A_A9 11
AT1 AY14 M_A_A10 11
M_A_DQ43 AT2 DDR0_DQ_42/DDR1_DQ_10 DDR0_MA_10 AU22 M_A_A11
M_A_DQ41 DDR0_DQ_43/DDR1_DQ_11 DDR0_MA_11 M_A_A12 M_A_A11 11
AV3 AV22 M_A_A12 11
M_A_DQ45 AW4 DDR0_DQ_44/DDR1_DQ_12 DDR0_MA_12 AV12 M_A_A13
M_A_DQ46 DDR0_DQ_45/DDR1_DQ_13 DDR0_MA_13 M_A_BG1 M_A_A13 11
AT4 AV23
M_A_DQ42 DDR0_DQ_46/DDR1_DQ_14 DDR0_BG_1 M_A_ACT# M_A_BG1 11
AT3 AU24 M_A_ACT# 11
M_A_DQ49 AP2 DDR0_DQ_47/DDR1_DQ_15 DDR0_ACT#
M_A_DQ54 AM4 DDR0_DQ_48/DDR1_DQ_32 AY15 M_A_PARITY
M_A_DQ53 DDR0_DQ_49/DDR1_DQ_33 DDR0_PAR M_A_ALERT# M_A_PARITY 11
AP3 AT23
M_A_DQ50 DDR0_DQ_50/DDR1_DQ_34 DDR0_ALERT# M_A_ALERT# 11
AM3
M_A_DQ52 AP4 DDR0_DQ_51/DDR1_DQ_35
M_A_DQ51 AM2 DDR0_DQ_52/DDR1_DQ_36 AF39 M_A_DQS_DN0
M_A_DQ48 DDR0_DQ_53/DDR1_DQ_37 DDR0_DQSN_0/DDR0_DQSN_0 M_A_DQS_DN1 M_A_DQS_DN0 11
AP1 AK39 M_A_DQS_DN1 11
M_A_DQ55 AM1 DDR0_DQ_54/DDR1_DQ_38 DDR0_DQSN_1/DDR0_DQSN_1 AP39 M_A_DQS_DN2
M_A_DQ61 DDR0_DQ_55/DDR1_DQ_39 DDR0_DQSN_2/DDR0_DQSN_4 M_A_DQS_DN3 M_A_DQS_DN2 11
AK3 AU36
M_A_DQ63 DDR0_DQ_56/DDR1_DQ_40 DDR0_DQSN_3/DDR0_DQSN_5 M_A_DQS_DN4 M_A_DQS_DN3 11
AH1 AW7 M_A_DQS_DN4 11
M_A_DQ60 AK4 DDR0_DQ_57/DDR1_DQ_41 DDR0_DQSN_4/DDR1_DQSN_0 AU3 M_A_DQS_DN5
M_A_DQ59 DDR0_DQ_58/DDR1_DQ_42 DDR0_DQSN_5/DDR1_DQSN_1 M_A_DQS_DN6 M_A_DQS_DN5 11
AH2 AN3 M_A_DQS_DN6 11
M_A_DQ62 AH4 DDR0_DQ_59/DDR1_DQ_43 DDR0_DQSN_6/DDR1_DQSN_4 AJ3 M_A_DQS_DN7
M_A_DQ57 DDR0_DQ_60/DDR1_DQ_44 DDR0_DQSN_7/DDR1_DQSN_5 M_A_DQS_DN7 11
AK2
M_A_DQ58 AH3 DDR0_DQ_61/DDR1_DQ_45 AF38 M_A_DQS_DP0
M_A_DQ56 DDR0_DQ_62/DDR1_DQ_46 DDR0_DQSP_0/DDR0_DQSP_0 M_A_DQS_DP1 M_A_DQS_DP0 11
AK1 AK38
DDR0_DQ_63/DDR1_DQ_47 DDR0_DQSP_1/DDR0_DQSP_1 M_A_DQS_DP2 M_A_DQS_DP1 11
AP38 M_A_DQS_DP2 11
B
AU33 DDR0_DQSP_2/DDR0_DQSP_4 AV36 M_A_DQS_DP3 B
DDR0_ECC_0 DDR0_DQSP_3/DDR0_DQSP_5 M_A_DQS_DP4 M_A_DQS_DP3 11
AT33 AV7
DDR0_ECC_1 DDR0_DQSP_4/DDR1_DQSP_0 M_A_DQS_DP5 M_A_DQS_DP4 11
AW33 AU2 M_A_DQS_DP5 11
AV31 DDR0_ECC_2 DDR0_DQSP_5/DDR1_DQSP_1 AN2 M_A_DQS_DP6
DDR0_ECC_3 DDR0_DQSP_6/DDR1_DQSP_4 M_A_DQS_DP7 M_A_DQS_DP6 11
AU31 AJ2 M_A_DQS_DP7 11
AV33 DDR0_ECC_4 DDR0_DQSP_7/DDR1_DQSP_5
AW31 DDR0_ECC_5 AV32
AY31 DDR0_ECC_6 DDR0_DQSP_8/DDR0_DQSP_8 AU32
DDR0_ECC_7 DDR0_DQSN_8/DDR0_DQSN_8

DDR CHANNEL A

SKYLAKE-1,SKL-S,LAKE-S,CFL-S

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_(DDR_CHA)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 5 of 107
5 4 3 2 1
 5 4 3 2 1

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D D

CPU1B 2 OF 12

12 M_B_DQ[0..63] M_B_DQ4 M_B_CLK0

AD34 Lake-S AM20
M_B_DQ5 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKP_0 M_B_CLK#0 M_B_CLK0 12
AD35 AM21 M_B_CLK#0 12
M_B_DQ7 AG35 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKN_0 AP22 M_B_CLK1
M_B_DQ3 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKP_1 M_B_CLK#1 M_B_CLK1 12
AH35 AP21 M_B_CLK#1 12
M_B_DQ1 AE35 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKN_1 AN20
M_B_DQ0 AE34 DDR1_DQ_4/DDR0_DQ_20 DDR1_CKP_2 AN21
M_B_DQ6 AG34 DDR1_DQ_5/DDR0_DQ_21 DDR1_CKN_2 AP19
M_B_DQ2 AH34 DDR1_DQ_6/DDR0_DQ_22 DDR1_CKP_3 AP20
M_B_DQ13 AK35 DDR1_DQ_7/DDR0_DQ_23 DDR1_CKN_3
M_B_DQ9 AL35 DDR1_DQ_8/DDR0_DQ_24 AY29 M_B_CKE0
M_B_DQ14 DDR1_DQ_9/DDR0_DQ_25 DDR1_CKE_0 M_B_CKE1 M_B_CKE0 12
AK32 AV29
M_B_DQ15 DDR1_DQ_10/DDR0_DQ_26 DDR1_CKE_1 M_B_CKE1 12
AL32 AW29
M_B_DQ12 AK34 DDR1_DQ_11/DDR0_DQ_27 DDR1_CKE_2 AU29
M_B_DQ8 AL34 DDR1_DQ_12/DDR0_DQ_28 DDR1_CKE_3
M_B_DQ10 AK31 DDR1_DQ_13/DDR0_DQ_29 AP17 M_B_CS#0
M_B_DQ11 DDR1_DQ_14/DDR0_DQ_30 DDR1_CS#_0 M_B_CS#1 M_B_CS#0 12
AL31 AN15
M_B_DQ16 DDR1_DQ_15/DDR0_DQ_31 DDR1_CS#_1 M_B_CS#1 12
AP35 AN17
M_B_DQ20 AN35 DDR1_DQ_16/DDR0_DQ_48 DDR1_CS#_2 AM15
M_B_DQ22 AN32 DDR1_DQ_17/DDR0_DQ_49 DDR1_CS#_3
M_B_DQ23 AP32 DDR1_DQ_18/DDR0_DQ_50 AM16 M_B_ODT0
M_B_DQ17 DDR1_DQ_19/DDR0_DQ_51 DDR1_ODT_0 M_B_ODT1 M_B_ODT0 12
AN34 AL16
M_B_DQ21 DDR1_DQ_20/DDR0_DQ_52 DDR1_ODT_1 M_B_ODT1 12
AP34 AP15
M_B_DQ18 AN31 DDR1_DQ_21/DDR0_DQ_53 DDR1_ODT_2 AL15
M_B_DQ19 AP31 DDR1_DQ_22/DDR0_DQ_54 DDR1_ODT_3
M_B_DQ28 AL29 DDR1_DQ_23/DDR0_DQ_55 AN18 M_B_A16
M_B_DQ24 DDR1_DQ_24/DDR0_DQ_56 DDR1_MA_16 M_B_A14 M_B_A16 12
AM29 AL17
M_B_DQ30 DDR1_DQ_25/DDR0_DQ_57 DDR1_MA_14 M_B_A15 M_B_A14 12
AP29 AP16 M_B_A15 12
M_B_DQ26 AR29 DDR1_DQ_26/DDR0_DQ_58 DDR1_MA_15
M_B_DQ25 DDR1_DQ_27/DDR0_DQ_59 M_B_BS0
For DDR4 Modify
AM28 AL18 M_B_BS0 12
M_B_DQ29 AL28 DDR1_DQ_28/DDR0_DQ_60 DDR1_BA_0 AM18 M_B_BS1
M_B_DQ27 DDR1_DQ_29/DDR0_DQ_61 DDR1_BA_1 M_B_BG0 M_B_BS1 12
AR28 AW28
M_B_DQ31 DDR1_DQ_30/DDR0_DQ_62 DDR1_BG_0 M_B_BG0 12
C AP28 C
M_B_DQ32 AR12 DDR1_DQ_31/DDR0_DQ_63 AL19 M_B_A0
M_B_DQ33 DDR1_DQ_32/DDR1_DQ_16 DDR1_MA_0 M_B_A1 M_B_A0 12
AP12 AL22 M_B_A1 12
M_B_DQ38 AM13 DDR1_DQ_33/DDR1_DQ_17 DDR1_MA_1 AM22 M_B_A2
M_B_DQ34 DDR1_DQ_34/DDR1_DQ_18 DDR1_MA_2 M_B_A3 M_B_A2 12
AL13 AM23
M_B_DQ36 DDR1_DQ_35/DDR1_DQ_19 DDR1_MA_3 M_B_A4 M_B_A3 12
AR13 AP23 M_B_A4 12
M_B_DQ37 AP13 DDR1_DQ_36/DDR1_DQ_20 DDR1_MA_4 AL23 M_B_A5
M_B_DQ39 DDR1_DQ_37/DDR1_DQ_21 DDR1_MA_5 M_B_A6 M_B_A5 12
AM12 AW26 M_B_A6 12
M_B_DQ35 AL12 DDR1_DQ_38/DDR1_DQ_22 DDR1_MA_6 AY26 M_B_A7
M_B_DQ44 DDR1_DQ_39/DDR1_DQ_23 DDR1_MA_7 M_B_A8 M_B_A7 12
AP10 AU26
M_B_DQ45 DDR1_DQ_40/DDR1_DQ_24 DDR1_MA_8 M_B_A9 M_B_A8 12
AR10 AW27 M_B_A9 12
M_B_DQ46 AR7 DDR1_DQ_41/DDR1_DQ_25 DDR1_MA_9 AP18 M_B_A10
M_B_DQ42 DDR1_DQ_42/DDR1_DQ_26 DDR1_MA_10 M_B_A11 M_B_A10 12
AP7 AU27 M_B_A11 12
M_B_DQ41 AR9 DDR1_DQ_43/DDR1_DQ_27 DDR1_MA_11 AV27 M_B_A12
M_B_DQ40 DDR1_DQ_44/DDR1_DQ_28 DDR1_MA_12 M_B_A13 M_B_A12 12
AP9 AR15
M_B_DQ47 DDR1_DQ_45/DDR1_DQ_29 DDR1_MA_13 M_B_BG1 M_B_A13 12
AR6 AY28 M_B_BG1 12
M_B_DQ43 AP6 DDR1_DQ_46/DDR1_DQ_30 DDR1_BG_1 AU28 M_B_ACT#
M_B_DQ52 DDR1_DQ_47/DDR1_DQ_31 DDR1_ACT# M_B_ACT# 12
AM10 For DDR4 Modify
M_B_DQ53 AL10 DDR1_DQ_48/DDR1_DQ_48 AL20 M_B_PARITY
M_B_DQ55 DDR1_DQ_49/DDR1_DQ_49 DDR1_PAR M_B_ALERT# M_B_PARITY 12
AM7 AY25
M_B_DQ51 DDR1_DQ_50/DDR1_DQ_50 DDR1_ALERT# M_B_ALERT# 12
AL7
M_B_DQ48 AM9 DDR1_DQ_51/DDR1_DQ_51
M_B_DQ49 AL9 DDR1_DQ_52/DDR1_DQ_52 AF34 M_B_DQS_DN0
M_B_DQ54 DDR1_DQ_53/DDR1_DQ_53 DDR1_DQSN_0/DDR0_DQSN_2 M_B_DQS_DN1 M_B_DQS_DN0 12
AM6 AK33
M_B_DQ50 DDR1_DQ_54/DDR1_DQ_54 DDR1_DQSN_1/DDR0_DQSN_3 M_B_DQS_DN2 M_B_DQS_DN1 12
AL6 AN33
M_B_DQ61 DDR1_DQ_55/DDR1_DQ_55 DDR1_DQSN_2/DDR0_DQSN_6 M_B_DQS_DN3 M_B_DQS_DN2 12
AJ6 AN29 M_B_DQS_DN3 12
M_B_DQ56 AJ7 DDR1_DQ_56/DDR1_DQ_56 DDR1_DQSN_3/DDR0_DQSN_7 AN13 M_B_DQS_DN4
M_B_DQ63 DDR1_DQ_57/DDR1_DQ_57 DDR1_DQSN_4/DDR1_DQSN_2 M_B_DQS_DN5 M_B_DQS_DN4 12
AE6 AR8 M_B_DQS_DN5 12
M_B_DQ58 AF7 DDR1_DQ_58/DDR1_DQ_58 DDR1_DQSN_5/DDR1_DQSN_3 AM8 M_B_DQS_DN6
M_B_DQ60 DDR1_DQ_59/DDR1_DQ_59 DDR1_DQSN_6/DDR1_DQSN_6 M_B_DQS_DN7 M_B_DQS_DN6 12
AH7 AG6
M_B_DQ57 DDR1_DQ_60/DDR1_DQ_60 DDR1_DQSN_7/DDR1_DQSN_7 M_B_DQS_DN7 12
AH6
M_B_DQ59 AE7 DDR1_DQ_61/DDR1_DQ_61 AF35 M_B_DQS_DP0
M_B_DQ62 DDR1_DQ_62/DDR1_DQ_62 DDR1_DQSP_0/DDR0_DQSP_2 M_B_DQS_DP1 M_B_DQS_DP0 12
AF6 AL33 M_B_DQS_DP1 12
DDR1_DQ_63/DDR1_DQ_63 DDR1_DQSP_1/DDR0_DQSP_3 AP33 M_B_DQS_DP2
DDR1_DQSP_2/DDR0_DQSP_6 M_B_DQS_DP3 M_B_DQS_DP2 12
AR25 AN28
DDR1_ECC_0 DDR1_DQSP_3/DDR0_DQSP_7 M_B_DQS_DP4 M_B_DQS_DP3 12
AR26 AN12 M_B_DQS_DP4 12
AM26 DDR1_ECC_1 DDR1_DQSP_4/DDR1_DQSP_2 AP8 M_B_DQS_DP5
DDR1_ECC_2 DDR1_DQSP_5/DDR1_DQSP_3 M_B_DQS_DP6 M_B_DQS_DP5 12
AM25 AL8 M_B_DQS_DP6 12
B
AP26 DDR1_ECC_3 DDR1_DQSP_6/DDR1_DQSP_6 AG7 M_B_DQS_DP7 B
DDR1_ECC_4 DDR1_DQSP_7/DDR1_DQSP_7 M_B_DQS_DP7 12
AP25 R601 2R2F-GP
AL25 DDR1_ECC_5 AN25 V_SM_VREF_CNT 1 2 DIMM_CA_VREF_A
DDR1_ECC_6 DDR1_DQSP_8/DDR1_DQSP_8 DIMM_CA_VREF_A 11
AL26 AN26
DDR1_ECC_7 DDR1_DQSN_8/DDR1_DQSN_8

1
C601 C602
DDR CHANNEL B SCD1U16V2KX-3DLGP SCD022U16V2KX-3DLGP

2
AB40 V_SM_VREF_CNT DIMM_CA_CPU_VREF_RC
DDR_VREF_CA AC40 M_VREF_DQ_DIM0 1 TP601

1
DDR0_VREF_DQ AC39 M_VREF_DQ_DIM1
DDR1_VREF_DQ M_VREF_DQ_DIM1 12
R602
SKYLAKE-1,SKL-S,LAKE-S,CFL-S 24D9R2F-L-GP

2
C603 SCD1U16V2KX-3DLGP
M_VREF_DQ_DIM1 1 2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_(DDR_CHB)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 6 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

CPU1D 4 OF 12

HDMI_DATA_CPU_P0 C21 Lake-S E10

56 HDMI_DATA_CPU_P0 HDMI_DATA_CPU_N0 D21 DDI1_TXP_0 EDP_TXP_0 D10
56 HDMI_DATA_CPU_N0 HDMI_DATA_CPU_P1 D22 DDI1_TXN_0 EDP_TXN_0 D9
56 HDMI_DATA_CPU_P1 HDMI_DATA_CPU_N1 E22 DDI1_TXP_1 EDP_TXP_1 C9
56 HDMI_DATA_CPU_N1 HDMI_DATA_CPU_P2 B23 DDI1_TXN_1 EDP_TXN_1 H10 DDI_VGA_DATA_CPU_N2
56 HDMI_DATA_CPU_P2 HDMI_DATA_CPU_N2 A23 DDI1_TXP_2 EDP_TXN_2 G10 DDI_VGA_DATA_CPU_P2 DDI_VGA_DATA_CPU_N2 59
C C
56 HDMI_DATA_CPU_N2 HDMI_DATA_CPU_P3 C23 DDI1_TXN_2 EDP_TXP_2 G9 DDI_VGA_DATA_CPU_N3 DDI_VGA_DATA_CPU_P2 59
56 HDMI_DATA_CPU_P3 HDMI_DATA_CPU_N3 D23 DDI1_TXP_3 EDP_TXN_3 F9 DDI_VGA_DATA_CPU_P3 DDI_VGA_DATA_CPU_N3 59
56 HDMI_DATA_CPU_N3 DDI1_TXN_3 EDP_TXP_3 DDI_VGA_DATA_CPU_P3 59
B13 D12 DP_AUX_CPU_P
DDI1_AUXP EDP_AUXP DP_AUX_CPU_N DP_AUX_CPU_P 59
C13 E12
DDI1_AUXN EDP_AUXN DP_AUX_CPU_N 59
B18
A18 DDI2_TXP_0
D18 DDI2_TXN_0 D14 DISP_UTIL_CPU 1 TP701
E18 DDI2_TXP_1 EDP_DISP_UTIL
C19 DDI2_TXN_1
D19 DDI2_TXP_2 M9 FDI_COMP
D20 DDI2_TXN_2 DISP_RCOMP
E20 DDI2_TXP_3
DDI2_TXN_3 0D95V_CPU_VCCIO
A12 R701 24D9R2F-L-GP
B12 DDI2_AUXP FDI_COMP 1 2
DDI2_AUXN
B14
A14 DDI3_TXP_0 R702 20R2J-3-GP
C15 DDI3_TXN_0 AUD_AZACPU_SDI 1 2 AUD_AZACPU_SDI_R
B15 DDI3_TXP_1 AUD_AZACPU_SDI_R 20
B16 DDI3_TXN_1
A16 DDI3_TXP_2
C17 DDI3_TXN_2
B17 DDI3_TXP_3
DDI3_TXN_3 V3 AUD_AZACPU_SCLK
PROC_AUDIO_CLK AUD_AZACPU_SDO AUD_AZACPU_SCLK 20
B11 V2
C11 DDI3_AUXP PROC_AUDIO_SDI U1 AUD_AZACPU_SDI AUD_AZACPU_SDO 20
DDI3_AUXN PROC_AUDIO_SDO

SKYLAKE-1,SKL-S,LAKE-S,CFL-S

B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_(DDI/EDP)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 7 of 107
5 4 3 2 1
 5 4 3 2 1

CPU1G 7 OF 12 CPU1H 8 OF 12 CPU1I 9 OF 12

A25 Lake-S H32 AA34 Lake-S AA7 Lake-S AT18

1V_CPU_CORE VCC1 VCC90 1V_CPU_CORE 1V_CPU_GT VCCGT1 1D05V_CPU_SA VCCSA2 VDDQ1 1D2V_SM_S3
A26 J21 AA35 AB6 AT21
A27 VCC2 VCC93 F32 AA36 VCCGT2 AB7 VCCSA3 VDDQ2 AU13
A28 VCC3 VCC68 F33 AA37 VCCGT3 AB8 VCCSA4 VDDQ3 AU15
A29 VCC4 VCC69 F34 AA38 VCCGT4 AC7 VCCSA5 VDDQ4 AU19

Vinafix.com
A30 VCC5 VCC70 G23 AB33 VCCGT5 AC8 VCCSA6 VDDQ5 AU23
B25 VCC6 VCC73 G24 AB34 VCCGT6 N7 VCCSA7 VDDQ6 AV11
B27 VCC24 VCC74 G25 G36 VCCGT7 P7 VCCSA8 VDDQ7 AV17
B29 VCC25 VCC75 G26 G37 VCCGT8 R7 VCCSA9 VDDQ8 AV21
B31 VCC26 VCC76 G27 G38 VCCGT9 T7 VCCSA10 VDDQ9 AW10
D
B32 VCC27 VCC77 G28 G39 VCCGT10 U7 VCCSA11 VDDQ10 AW14 D
B33 VCC28 VCC78 G29 G40 VCCGT11 Y6 VCCSA12 VDDQ11 AW25
B34 VCC29 VCC79 J22 H36 VCCGT12 Y7 VCCSA15 VDDQ12 AY12
B35 VCC30 VCC94 J23 H38 VCCGT13 Y8 VCCSA16 VDDQ13 AY16
B36 VCC31 VCC95 J24 H40 VCCGT14 W7 VCCSA17 VDDQ14 AY18
B37 VCC32 VCC96 J25 J36 VCCGT15 V7 VCCSA14 VDDQ15 AY23
C25 VCC33 VCC97 J26 J37 VCCGT16 AA6 VCCSA13 VDDQ16 R801 0R0402-PAD-2-GP
C26 VCC34 VCC98 J27 J38 VCCGT17 VCCSA1 AJ9 VCCPLL_OC_R 1 2
VCC35 VCC99 VCCGT18 VCCPLL_OC 1D2V_SM_S3
C27 J28 J39
C28 VCC36 VCC100 J29 J40 VCCGT19 AK11
VCC37 VCC101 VCCGT20 0D95V_CPU_VCCIO VCCIO2
C29 J30 K36 AK14
C30 VCC38 VCC102 J31 K38 VCCGT21 AK24 VCCIO3
C32 VCC39 VCC103 K16 K40 VCCGT22 AJ23 VCCIO4
C34 VCC40 VCC106 K18 L34 VCCGT23 M8 VCCIO1
C36 VCC41 VCC107 K20 L35 VCCGT24 P8 VCCIO5
D25 VCC42 VCC108 K21 L36 VCCGT25 T8 VCCIO6
D27 VCC43 VCC109 K23 L37 VCCGT26 U8 VCCIO7 C801 SC1U10V2KX-1DLGP
D29 VCC44 VCC110 K25 L38 VCCGT27 W8 VCCIO8 VCCPLL_OC_R 1 2
D31 VCC45 VCC111 K27 L39 VCCGT28 VCCIO9
D32 VCC46 VCC112 K29 L40 VCCGT29
D33 VCC47 VCC113 K31 M33 VCCGT30 20170414
D34 VCC48 VCC114 L14 M34 VCCGT31 V5 follow CPU EDS change to mount 1x 1uF 0402
VCC49 VCC117 VCCGT32 V_CPU_ST_PLL VCCST1
D35 L15 M36 V6
D36 VCC50 VCC118 L16 M38 VCCGT33 VCCST2
E24 VCC51 VCC119 L17 M40 VCCGT34 V4
E25 VCC52 VCC120 L18 N34 VCCGT35 VCCPLL
E26 VCC53 VCC121 L19 N35 VCCGT36
E27 VCC54 VCC122 L20 N36 VCCGT37
E28 VCC55 VCC123 L21 N37 VCCGT38
E29 VCC56 VCC124 L22 N38 VCCGT39
E30 VCC57 VCC125 L23 N39 VCCGT40
E32 VCC58 VCC126 L24 N40 VCCGT41
E34 VCC59 VCC127 L25 P33 VCCGT42
E36 VCC60 VCC128 L26 P34 VCCGT43 AD5 VCCSA_SENSE
VCC61 VCC129 VCCGT44 VCCSA_SENSE VCCIO_SENSE VCCSA_SENSE 47
F23 L27 P36 AF4
VCC62 VCC130 VCCGT45 VCCIO_SENSE VSS_SA_IO_SENSE VCCIO_SENSE 48
F24 L28 P38 AE4
F25 VCC63 VCC131 L29 P40 VCCGT46 VSS_SAIO_SENSE VSS_SA_IO_SENSE 47
F27 VCC64 VCC132 L30 R34 VCCGT47
C C
F29 VCC65 VCC133 M13 R35 VCCGT48
F31 VCC66 VCC136 M14 R36 VCCGT49
G30 VCC67 VCC137 M16 R37 VCCGT50
G32 VCC80 VCC138 M18 R38 VCCGT51
H22 VCC81 VCC139 M20 R39 VCCGT52
H23 VCC84 VCC140 M22 R40 VCCGT53
H25 VCC85 VCC141 M24 T33 VCCGT54 SKYLAKE-1,SKL-S,LAKE-S,CFL-S
H27 VCC86 VCC142 M26 T34 VCCGT55
H29 VCC87 VCC143 M28 T36 VCCGT56
H31 VCC88 VCC144 M30 T38 VCCGT57
AJ11 VCC89 VCC145 AJ12 T40 VCCGT58
AJ13 VCC7 VCC8 AJ14 U34 VCCGT59
AJ15 VCC9 VCC10 AJ16 U35 VCCGT60
AJ17 VCC11 VCC12 AJ18 U36 VCCGT61
AJ19 VCC13 VCC14 AJ20 U37 VCCGT62
AJ21 VCC15 VCC16 U38 VCCGT63
VCC17 U39 VCCGT64
M32 AJ29 U40 VCCGT65
L31 VCC146 VCC22 AK21 V33 VCCGT66
K32 VCC134 VCC23 F35 V34 VCCGT67
J33 VCC115 VCC71 F37 V36 VCCGT68
H33 VCC104 VCC72 G35 V38 VCCGT69
G34 VCC91 VCC83 H34 V40 VCCGT70
AJ25 VCC82 VCC92 J35 W34 VCCGT71
AJ26 VCC18 VCC105 K34 W35 VCCGT72
AJ27 VCC19 VCC116 L33 W36 VCCGT73
AJ28 VCC20 VCC135 W37 VCCGT74
VCC21 W38 VCCGT75 F39 VCCGT_VCC_SEN
Y33 VCCGT76 VCCGT_SENSE F38 VCCGT_VSS_SEN VCCGT_VCC_SEN 44
VCCGT77 VSSGT_SENSE VCCGT_VSS_SEN 44
Y34
Y36 VCCGT78
C38 VCORE_VCC_SEN Y38 VCCGT79
VCC_SENSE VCORE_VSS_SEN VCORE_VCC_SEN 44 VCCGT80
D38
VSS_SENSE VCORE_VSS_SEN 44

SKYLAKE-1,SKL-S,LAKE-S,CFL-S SKYLAKE-1,SKL-S,LAKE-S,CFL-S
B B

R802 49D9R2F-GP
VCORE_VCC_SEN 1 2 VCORE_VSS_SEN
(R_)

1V_PCH_SB V_CPU_ST_PLL
12V_S5 R803 0R3J-0-U-GP
1 2
(R_)
1

R804

D
47KR2J-2-GP
Q801
R805 10KR2J-3-GP AO3418L-GP
2

1 2 SLP_S4_N_SFR_G G (084.03404.0031)
1

S
1

R806 C802 C803

100KR2J-1-GP SCD1U25V2KX-1-DL-GP SCD1U16V2KX-L-GP
12V_S5 (R_) V_CPU_ST_PLL
2

2
2
1

1
R807 R808 C804 C805
100KR2J-1-GP Q802 4K7R2J-2-GP SC10U25V5KX-DL-GP SCD1U16V2KX-3DLGP
4 3 SLP_S4_N_SFR_2 (R_)

2
R809 0R0402-PAD-2-GP
2

2
SLP_S4_N_SFR_1 5 2 SLP_S4_N_SFR 1 2 SLP_S4_N
SLP_S4_N 20,24,32,38,39,40,99
A A
1

6 1
1

R810 C806
100KR2J-1-GP 2N7002KDW-1-GP SCD1U16V2KX-L-GP
(R_) (R_)
2
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_(CPU Power)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 8 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

CPU1K 11 OF 12
CPU1F 6 OF 12 CPU1L 12 OF 12
AR24 Lake-S C37 Lake-S
A11 Lake-S AK29 AR27 VSS VSS C5 K39 AJ24
A13 VSS VSS AK30 AR3 VSS VSS C8 K4 VSS VSS AJ30
A15 VSS VSS AK36 AR30 VSS VSS C10 K7 VSS VSS AK22
A17 VSS VSS AK37 AR31 VSS VSS D24 L13 VSS VSS AK27
A24 VSS VSS AK40 AR32 VSS VSS D26 L3 VSS VSS AR22
A7 VSS VSS AK5 AR33 VSS VSS D28 L32 VSS VSS AR23
AA3 VSS VSS AK6 AR34 VSS VSS D30 L6 VSS VSS AT15
AA33 VSS VSS AK7 AR35 VSS VSS D37 L9 VSS VSS AU39 CPU1J 10 OF 12
AA8 VSS VSS AK8 AR36 VSS VSS D39 M1 VSS VSS AU40
AB39 VSS VSS AK9 AR4 VSS VSS D4 M10 VSS VSS AV39 J8 Lake-S AC37 TP_CPU1_AC37 1 TP901
AB5 VSS VSS AL1 AR5 VSS VSS D7 M12 VSS VSS AW38 J7 RSVD_TP2 RSVD4 AB35 TP_CPU1_AB35 1 TP902
AC3 VSS VSS AL11 AT10 VSS VSS E11 M15 VSS VSS F36 TP903 1 TP_CPU1_L8 L8 RSVD_TP1 RSVD1 AB37 TP_CPU1_AB37 1 TP904
AC33 VSS VSS AL14 AT11 VSS VSS E13 M17 VSS VSS H11 K8 IST_TRIG RSVD2 AB38 TP_CPU1_AB38 1 TP905
AC34 VSS VSS AL2 AT12 VSS VSS E15 M19 VSS VSS H12 RSVD_TP3 RSVD3 AJ22 TP_CPU1_AJ22 1 TP906
AC35 VSS VSS AL21 AT13 VSS VSS E17 M21 VSS VSS AV1 RSVD5 D15 TP_CPU1_D15 1 TP907
AC6 VSS VSS AL24 AT14 VSS VSS E19 M23 VSS AW2 RSVD8 RSVD12 K11
AD1 VSS VSS AL27 AT17 VSS VSS E21 M25 VSS RSVD9 RSVD21
AD33 VSS VSS AL3 AT24 VSS VSS E23 M27 VSS H8
AD36 VSS VSS AL30 AT25 VSS VSS E3 M29 VSS RSVD13
AD37 VSS VSS AL36 AT26 VSS VSS E31 M35 VSS K10
AD38 VSS VSS AL4 AT27 VSS VSS E33 M37 VSS L10 RSVD20
AD39 VSS VSS AL5 AT28 VSS VSS E35 M39 VSS RSVD24
AD4 VSS VSS AM11 AT29 VSS VSS E37 M4 VSS J17
AD40 VSS VSS AM14 AT30 VSS VSS E6 M7 VSS B39 RSVD18
AD6 VSS VSS AM17 AT31 VSS VSS E9 N3 VSS C40 RSVD10 J15
AD7 VSS VSS AM19 AT32 VSS VSS F1 N33 VSS J19 RSVD11 RSVD17 J14
AD8 VSS VSS AM24 AT34 VSS VSS F10 N6 VSS RSVD19 RSVD16
AE3 VSS VSS AM27 AT36 VSS VSS F22 N8 VSS CPU1_G8 G8 AU9
AE33 VSS VSS AM30 AT37 VSS VSS F26 P1 VSS CPU1_AY3 AY3 VSS_G8 RSVD7 AU10
AE36 VSS VSS AM31 AT38 VSS VSS F28 P35 VSS VSS_AY3 RSVD6
AE5 VSS VSS AM32 AT39 VSS VSS F30 P37 VSS PROC_TRIGIN_CPU D1
C C
AE8 VSS VSS AM33 AT40 VSS VSS F4 P39 VSS 22 PROC_TRIGIN_CPU PROC_TRIGOUT_CPU B3 PROC_TRIGIN J13
AF1 VSS VSS AM34 AT5 VSS VSS F40 P4 VSS PROC_TRIGOUT RSVD15 K13
AF33 VSS VSS AM35 AT6 VSS VSS F7 R3 VSS L12 RSVD23 J11
AF36 VSS VSS AM36 AT7 VSS VSS G11 R33 VSS K12 RSVD25 RSVD14
AF37 VSS VSS AM37 AT8 VSS VSS G13 R6 VSS RSVD22
AF40 VSS VSS AM38 AT9 VSS VSS G15 R8 VSS
AF5 VSS VSS AM39 AU1 VSS VSS G17 T1 VSS
AF8 VSS VSS AM40 AU25 VSS VSS G19 T35 VSS
AG1 VSS VSS AM5 AU30 VSS VSS G22 T37 VSS SKYLAKE-1,SKL-S,LAKE-S,CFL-S
AG2 VSS VSS AN1 AU34 VSS VSS G3 T39 VSS
AG3 VSS VSS AN10 AU4 VSS VSS G31 T4 VSS
AG33 VSS VSS AN11 AU5 VSS VSS G33 U3 VSS
AG36 VSS VSS AN14 AU7 VSS VSS G6 U33 VSS
AG4 VSS VSS AN16 AV2 VSS VSS H1 U6 VSS
AG5 VSS VSS AN19 AV26 VSS VSS H21 V1 VSS
AG8 VSS VSS AN22 AV28 VSS VSS H24 V35 VSS
AH33 VSS VSS AN23 AV30 VSS VSS H26 V37 VSS
AH36 VSS VSS AN24 AV34 VSS VSS H28 V39 VSS
AH37 VSS VSS AN27 AV38 VSS VSS H30 V8 VSS
AH38 VSS VSS AN30 AV5 VSS VSS H35 W3 VSS
AH39 VSS VSS AN36 AV9 VSS VSS H37 W33 VSS R901 20R2F-GP
AH40 VSS VSS AN4 AW3 VSS VSS H39 W6 VSS PROC_TRIGOUT_PCH 1 2 PROC_TRIGOUT_CPU
AH5 VSS VSS AN5 AW30 VSS VSS H4 Y35 VSS 22 PROC_TRIGOUT_PCH
AH8 VSS VSS AN6 AW32 VSS VSS H7 Y37 VSS
AJ1 VSS VSS AN7 AW34 VSS VSS H9 Y5 VSS
AJ31 VSS VSS AN8 AW36 VSS VSS J10 VSS
AJ32 VSS VSS AN9 AW5 VSS VSS J12 A4 R902 0R0402-PAD-2-GP
AJ33 VSS VSS AP11 AW9 VSS VSS L11 B38 VSS_NCTF_A4 1 2 CPU1_G8
AJ34 VSS VSS AP14 AY27 VSS VSS J16 C2 VSS_NCTF_B38
AJ35 VSS VSS AP24 AY30 VSS VSS J18 D40 VSS_NCTF_C2
AJ36 VSS VSS AP27 AY5 VSS VSS J20 VSS_NCTF_D40
AJ4 VSS VSS AP30 AY7 VSS VSS J3
AJ5 VSS VSS AP36 AY9 VSS VSS J32 SKYLAKE-1,SKL-S,LAKE-S,CFL-S
AJ8 VSS VSS AP37 B24 VSS VSS J34 R903 0R0402-PAD-2-GP
AK10 VSS VSS AP40 B26 VSS VSS J6 1 2 CPU1_AY3
AK12 VSS VSS AP5 B28 VSS VSS K1
AK13 VSS VSS AR1 B30 VSS VSS K14
B
AK15 VSS VSS AR11 B6 VSS VSS K15 B
AK16 VSS VSS AR14 C12 VSS VSS K17
AK17 VSS VSS AR16 C14 VSS VSS K19
AK18 VSS VSS AR17 C16 VSS VSS K22 R902 & R903 corret to Short PAD by bob 20170823
AK19 VSS VSS AR18 C18 VSS VSS K24
AK20 VSS VSS AR19 C20 VSS VSS K26
AK23 VSS VSS AR2 C22 VSS VSS K28
AK25 VSS VSS AR20 C24 VSS VSS K30
AK26 VSS VSS AR21 C31 VSS VSS K33
AK28 VSS VSS C33 VSS VSS K35
VSS C35 VSS VSS K37
VSS VSS
SKYLAKE-1,SKL-S,LAKE-S,CFL-S
SKYLAKE-1,SKL-S,LAKE-S,CFL-S

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_(VSS)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 9 of 107
5 4 3 2 1
 5 4 3 2 1

PLACE ALL 0805 CAPS ON TOP SIDE OF CPU CAVITY 1V_CPU_CORE PLACE ALL 0603 CAPS 1V_CPU_CORE

1V_CPU_CORE
ON TOP SIDE OF CPU CAVITY

1
C1001 C1002 C1004 C1005
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
1

1
C1007 C1008 C1009 C1010 C1011 C1012 (R_) (R_)

2
SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP
Vinafix.com
SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP 20170414
follow PDG change to mount 6x 22uF 0603
2

2
20170523 20170523
follow Tahoe MT MLK A00 22uF 0603*2pcs follow Tahoe MT MLK A00 unmount 22uF 0805*3pcs
D D

1V_CPU_CORE
PLACE ALL 0805 CAPS AT TOP SOCKET EDGE
1

1
C1013 C1014 C1015 C1016 C1017 C1018
SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP
2

1
C1019 C1020 C1021 C1022
SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP
(R_) (R_) (R_) (R_)

2
20170414
follow PDG change to mount 12x 22uF 0805 20170414
follow PDG change to mount 5X 22uF 0805
20170523
follow Tahoe MT MLK A00 unmount 22uF 0805*5pcs

PLACE CAPS FOR DIMM PLACE CAPS IN SOCKET EDGE TOP

1D2V_SM_S3 1D2V_SM_S3
VCCST/VCCSTG
PLACE CAPS AT TOP SOCKET EDGE
V_CPU_ST_PLL
1

1
C1024 C1025 C1026 C1027 C1028 C1029 C1030 C1031
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP
(R_) (R_) (R_) (R_)
2

1
C1032 C1033
SC22U6D3V5MX-2DLGP SC1U10V2KX-1DLGP

2
C 20170414 C
follow PDG change to mount 4x 47uF 0805

Follow D9 22uF*7 2017/08/23 CRB:1*22U

0805,1*1U 0402
PLACE CAPS ON TOP SIDE 20170414
SOCKET CAVITY follow CPU EDS change to mount 8x 47uF 0805
20170523
1V_CPU_GT 20170410 Follow Tahoe MT MLK A00 22uF 0805*7pcs + unmont 2pcs 20170410
change to 47U for Edison's feedback change to 47U for Edison's feedback
1

1
PC1034 PC1035 PC1036 PC1037 PC1038 PC1039 PC1040 PC1041 PC1068
SC22U6D3V5MX-2DLGP SC47U6D3V5MX-1DL-GP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SC47U6D3V5MX-1DL-GP SC22U6D3V5MX-2DLGP
(R_) (R_)
2

2
PLACE CAPS
AT SOCKET EDGE ON TOP
1

PC1042 PC1043 PC1044 PC1045

SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP
(R_) (R_) (R_) (R_)
2

B B

20170414
follow PDG change to mount 4x 47uF 0805
20170523
follow Tahoe MT MLK A00 unmount 22uF 0805*4pcs

PLACE CAPS ON TOP SIDE PLACE CAPS AT TOP SOCKET EDGE

SOCKET CAVITY PLACE CAPS ON TOP SIDE
1D05V_CPU_SA
0D95V_CPU_VCCIO SOCKET CAVITY
1

1
PC1046 PC1047 PC1048 PC1049
1

PC1050 PC1051 PC1052 PC1053 SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP

SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP SC47U6D3V5MX-1DL-GP
2

2
2

20170414
follow PDG change to mount 4x 22uF 0603 20170414
20170523 follow PDG change to mount 2x 22uF 0603 20170414
follow Tahoe MT MLK A00 47uF 0805*4pcs follow PDG change to mount 5x 22uF 0603, 1x 22uF 0805
20170523
follow Tahoe MT MLK A00 22uF 0603*4pcs

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU Power CAP
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 10 of 107
5 4 3 2 1
 5 4 3 2 1

DIMM1:
SA0: 0, SA1: 0
DIMM1A
Write Address: 0xA0 205
Read Address: 0xA1 227 RFU#205 NP3
230 RFU#227 NP3 NP2
144 RFU#230 NP2 NP1
RFU#144 NP1 DIMM1C
M_A_DQ[0..63] 5

12,24,59,99 SMB_CLK_MAIN
DIMM_CA_VREF_A_L

SMB_CLK_MAIN
SMB_DATA_MAIN
146

141
285
VREFCA

SCL
Vinafix.com
DQ0
DQ1
DQ2
5
150
12
157
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
2
4
6
9
VSS
VSS
VSS
VSS
VSS
VSS
147
149
151
154
12,24,59,99 SMB_DATA_MAIN SDA DQ3 M_A_DQ4 VSS VSS
139 3 11 156
D
140 SA0 DQ4 148 M_A_DQ5 13 VSS VSS 158 DIMM1D
D
238 SA1 DQ5 10 M_A_DQ6 15 VSS VSS 160 59
SA2 DQ6 M_A_DQ7 VSS VSS 1D2V_SM_S3 VDD
3D3V_S0 284 155 DIMM1B 17 162 61
VDDSPD DQ7 16 M_A_DQ8 20 VSS VSS 165 64 VDD
M_A_ACT# 62 DQ8 161 M_A_DQ9 152 M_A_DQS_DN0 22 VSS VSS 167 67 VDD
5 M_A_ACT# M_A_ALERT# ACT# DQ9 M_A_DQ10 DQS0# M_A_DQS_DP0 M_A_DQS_DN0 5 VSS VSS VDD
208 23 153 24 169 70
5 M_A_ALERT# DIMM1_EVENT_N ALERT# DQ10 M_A_DQ11 DQS0 M_A_DQS_DN1 M_A_DQS_DP0 5 VSS VSS VDD
78 168 163 26 171 73
SM_DRAMRST# EVENT# DQ11 M_A_DQ12 DQS1# M_A_DQS_DP1 M_A_DQS_DN1 5 VSS VSS VDD
12,20 SM_DRAMRST# 58 14 164 M_A_DQS_DP1 5 28 173 76
M_A_PARITY 222 RESET# DQ12 159 M_A_DQ13 DQS1 174 M_A_DQS_DN2 31 VSS VSS 176 80 VDD
5 M_A_PARITY PAR DQ13 M_A_DQ14 DQS2# M_A_DQS_DP2 M_A_DQS_DN2 5 VSS VSS VDD
21 175 M_A_DQS_DP2 5 33 178 83
49 DQ14 166 M_A_DQ15 DQS2 185 M_A_DQS_DN3 35 VSS VSS 180 85 VDD
CB0 DQ15 M_A_DQ16 DQS3# M_A_DQS_DP3 M_A_DQS_DN3 5 VSS VSS VDD
194 27 186 37 182 88
CB1 DQ16 M_A_DQ17 DQS3 M_A_DQS_DN4 M_A_DQS_DP3 5 VSS VSS VDD
R1101 240R2F-1-GP 56 172 244 M_A_DQS_DN4 5 39 184 90
1 2 DIMM1_EVENT_N 201 CB2 DQ17 34 M_A_DQ18 DQS4# 245 M_A_DQS_DP4 42 VSS VSS 187 92 VDD
1D2V_SM_S3 CB3 DQ18 M_A_DQ19 DQS4 M_A_DQS_DN5 M_A_DQS_DP4 5 VSS VSS VDD
47 179 255 M_A_DQS_DN5 5 44 189 204
192 CB4 DQ19 25 M_A_DQ20 DQS5# 256 M_A_DQS_DP5 46 VSS VSS 191 206 VDD
CB5 DQ20 M_A_DQ21 DQS5 M_A_DQS_DN6 M_A_DQS_DP5 5 VSS VSS VDD
54 170 266 48 193 209
CB6 DQ21 M_A_DQ22 DQS6# M_A_DQS_DP6 M_A_DQS_DN6 5 VSS VSS VDD
199 32 267 M_A_DQS_DP6 5 50 195 212
CB7 DQ22 177 M_A_DQ23 DQS6 277 M_A_DQS_DN7 53 VSS VSS 198 215 VDD
M_A_ODT0 DQ23 M_A_DQ24 DQS7# M_A_DQS_DP7 M_A_DQS_DN7 5 VSS VSS VDD
5 M_A_ODT0 87 38 278 M_A_DQS_DP7 5 55 200 217
M_A_ODT1 91 ODT0 DQ24 183 M_A_DQ25 DQS7 196 57 VSS VSS 202 220 VDD
5 M_A_ODT1 ODT1 DQ25 M_A_DQ26 DQS8# VSS VSS VDD
45 197 94 239 223
M_A_CKE0 60 DQ26 190 M_A_DQ27 DQS8 8 96 VSS VSS 241 226 VDD
5 M_A_CKE0 M_A_CKE1 CKE0 DQ27 M_A_DQ28 DQS9# VSS VSS VDD
203 36 7 98 243 229
5 M_A_CKE1 CKE1 DQ28 M_A_DQ29 DQS9 VSS VSS VDD
181 19 101 246 231
M_A_CS#0 84 DQ29 43 M_A_DQ30 DQS10# 18 103 VSS VSS 248 233 VDD
5 M_A_CS#0 M_A_CS#1 S0# DQ30 M_A_DQ31 DQS10 VSS VSS VDD
89 188 30 105 250 236
5 M_A_CS#1 S1# DQ31 M_A_DQ32 DQS11# VSS VSS VDD
93 97 29 107 252
237 S2#_C0 DQ32 242 M_A_DQ33 DQS11 41 109 VSS VSS 254 77
S3#_C1 DQ33 M_A_DQ34 DQS12# VSS VSS 0D675V_VTT_S0 VTT
235 104 40 112 257 221
C2 DQ34 249 M_A_DQ35 DQS12 100 114 VSS VSS 259 VTT
M_A_CLK#0 75 DQ35 95 M_A_DQ36 DQS13# 99 116 VSS VSS 261 142
5 M_A_CLK#0 M_A_CLK0 CK0# DQ36 M_A_DQ37 DQS13 VSS VSS VPP
5 M_A_CLK0 74 240 111 118 263 143
M_A_CLK#1 219 CK0 DQ37 102 M_A_DQ38 DQS14# 110 120 VSS VSS 265 286 VPP
5 M_A_CLK#1 M_A_CLK1 CK1# DQ38 M_A_DQ39 DQS14 VSS VSS VPP TP_DIMM1_PIN1
5 M_A_CLK1 218 247 122 123 268 287 1
CK1 DQ39 108 M_A_DQ40 DQS15# 121 125 VSS VSS 270 288 VPP 12V 145
2D5V_VPP_S3

1
M_A_BG0 63 DQ40 253 M_A_DQ41 DQS15 133 127 VSS VSS 272 VPP 12V
5 M_A_BG0 M_A_BG1 BG0 DQ41 M_A_DQ42 DQS16# VSS VSS
C 5 M_A_BG1 207 115 132 129 274 4/4 R1102 C
M_A_BS0 81 BG1 DQ42 260 M_A_DQ43 DQS16 52 131 VSS VSS 276 DIMM288_DDR4 0R2J-2-GP
5 M_A_BS0 M_A_BS1 BA0 DQ43 M_A_DQ44 DQS17# VSS VSS
5 M_A_BS1 224 106 51 1D2V_SM_S3 134 279 (R_)
BA1 DQ44 251 M_A_DQ45 DQS17 136 VSS VSS 281
4 OF 4

2
M_A_A0 79 DQ45 113 M_A_DQ46 2/4 138 VSS VSS 283 DDR4-288P-82-GP TP_DIMM1_PIN145
5 M_A_A0 M_A_A1 A0 DQ46 M_A_DQ47 VSS VSS
5 M_A_A1 72 258 DIMM288_DDR4
(022.10010.0A61)
M_A_A2 216 A1 DQ47 119 M_A_DQ48 3/4
5 M_A_A2 M_A_A3 A2 DQ48 M_A_DQ49 2 OF 4
5 M_A_A3 71 264 DIMM288_DDR4
M_A_A4 214 A3 DQ49 126 M_A_DQ50 DDR4-288P-82-GP
5 M_A_A4 M_A_A5 A4 DQ50 M_A_DQ51 3 OF 4
213 271 (022.10010.0A61) DDR4-288P-82-GP
5 M_A_A5 M_A_A6 A5 DQ51 M_A_DQ52
5 M_A_A6 69 117 (022.10010.0A61)
M_A_A7 211 A6 DQ52 262 M_A_DQ53
5 M_A_A7 M_A_A8 A7 DQ53 M_A_DQ54
5 M_A_A8 68 124
M_A_A9 66 A8 DQ54 269 M_A_DQ55
5 M_A_A9 M_A_A10 A9 DQ55 M_A_DQ56
225 130
5 M_A_A10 M_A_A11 A10 DQ56 M_A_DQ57
5 M_A_A11 210 275
M_A_A12 65 A11 DQ57 137 M_A_DQ58
5 M_A_A12 M_A_A13 A12 DQ58 M_A_DQ59
5 M_A_A13 232 282
M_A_A14 228 A13 DQ59 128 M_A_DQ60
5 M_A_A14 M_A_A15 A14_WE# DQ60 M_A_DQ61
86 273
5 M_A_A15 M_A_A16 A15_CAS# DQ61 M_A_DQ62
5 M_A_A16 82 135
234 A16_RAS# DQ62 280 M_A_DQ63
A17 DQ63
1/4 1D2V_SM_S3
DIMM288_DDR4 1D2V_SM_S3
1 OF 4
DDR4-288P-82-GP
(022.10010.0A61)

1
TC1101 C1101 C1102
E820U2D5VM-6-GP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
(R_)

2
B DIMM VREF DQ A (To DIMM/CPU) B

2D5V_VPP_S3

1
C1103 C1104
Del for DDR4 Modify Del C82, C83 SCD1U16V2KX-L-GP SCD1U16V2KX-L-GP
(R_) (R_)

2
For DDR4 Modify

1D2V_SM_S3

DIMM VREF CA A (To DIMM)

1

1D2V_SM_S3 3D3V_S0
1

R1103 C1105
1KR2F-3-GP SCD1U16V2KX-3DLGP
1
2

R1104
2

1
470R2J-2-GP C1109 C1110
SCD1U16V2KX-3DLGP SC2D2U6D3V2MX-DL-GP
R1105 0R0402-PAD-2-GP
2

2
DIMM_CA_VREF_A 1 2 DIMM_CA_VREF_A_L SM_DRAMRST#
6 DIMM_CA_VREF_A
1

R1106 C1106 C1107 C1108

1KR2F-3-GP SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP SCD1U16V2KX-L-GP
A (R_) A
2

20170410
2

change to 47U for Edison's and Alan's feedback

20170412
correct the capacitance to 4D7U for Alan's feedback

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR DIMM_1
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 11 of 107
5 4 3 2 1
 5 4 3 2 1

DIMM2:
SA0: 0, SA1: 1 DIMM2A
205
Write Address: 0xA4 227 RFU#205 NP3
Read Address: 0xA5 230 RFU#227 NP3 NP2
144 RFU#230 NP2 NP1

Vinafix.com
RFU#144 NP1
DIMM_CA_VREF_B_L M_B_DQ0 M_B_DQ[0..63] 6
146 5 DIMM2C
VREFCA DQ0 150 M_B_DQ1 2 147
141 DQ1 12 M_B_DQ2 4 VSS VSS 149
11,24,59,99 SMB_CLK_MAIN SCL DQ2 M_B_DQ3 VSS VSS
285 157 6 151
D 11,24,59,99 SMB_DATA_MAIN SDA DQ3 M_B_DQ4 VSS VSS D
139 3 DIMM2B 9 154
140 SA0 DQ4 148 M_B_DQ5 11 VSS VSS 156 DIMM2D
238 SA1 DQ5 10 M_B_DQ6 152 M_B_DQS_DN0 13 VSS VSS 158 59
SA2 DQ6 M_B_DQ7 DQS0# M_B_DQS_DP0 M_B_DQS_DN0 6 VSS VSS 1D2V_SM_S3 VDD
284 155 153 15 160 61
3D3V_S0 VDDSPD DQ7 M_B_DQ8 DQS0 M_B_DQS_DN1 M_B_DQS_DP0 6 VSS VSS VDD
16 163 M_B_DQS_DN1 6 17 162 64
M_B_ACT# 62 DQ8 161 M_B_DQ9 DQS1# 164 M_B_DQS_DP1 20 VSS VSS 165 67 VDD
6 M_B_ACT# M_B_ALERT# ACT# DQ9 M_B_DQ10 DQS1 M_B_DQS_DN2 M_B_DQS_DP1 6 VSS VSS VDD
208 23 174 22 167 70
6 M_B_ALERT# DIMM2_EVENT_N ALERT# DQ10 M_B_DQ11 DQS2# M_B_DQS_DP2 M_B_DQS_DN2 6 VSS VSS VDD
78 168 175 M_B_DQS_DP2 6 24 169 73
SM_DRAMRST# 58 EVENT# DQ11 14 M_B_DQ12 DQS2 185 M_B_DQS_DN3 26 VSS VSS 171 76 VDD
11,20 SM_DRAMRST# M_B_PARITY RESET# DQ12 M_B_DQ13 DQS3# M_B_DQS_DP3 M_B_DQS_DN3 6 VSS VSS VDD
6 M_B_PARITY 222 159 186 M_B_DQS_DP3 6 28 173 80
PAR DQ13 21 M_B_DQ14 DQS3 244 M_B_DQS_DN4 31 VSS VSS 176 83 VDD
DQ14 M_B_DQ15 DQS4# M_B_DQS_DP4 M_B_DQS_DN4 6 VSS VSS VDD
49 166 245 33 178 85
CB0 DQ15 M_B_DQ16 DQS4 M_B_DQS_DN5 M_B_DQS_DP4 6 VSS VSS VDD
194 27 255 M_B_DQS_DN5 6 35 180 88
R1201 240R2F-1-GP 56 CB1 DQ16 172 M_B_DQ17 DQS5# 256 M_B_DQS_DP5 37 VSS VSS 182 90 VDD
CB2 DQ17 DQS5 M_B_DQS_DP5 6 VSS VSS VDD
1D2V_SM_S3 1 2 DIMM2_EVENT_N 201 34 M_B_DQ18 266 M_B_DQS_DN6
M_B_DQS_DN6 6 39 184 92
47 CB3 DQ18 179 M_B_DQ19 DQS6# 267 M_B_DQS_DP6 42 VSS VSS 187 204 VDD
CB4 DQ19 M_B_DQ20 DQS6 M_B_DQS_DN7 M_B_DQS_DP6 6 VSS VSS VDD
192 25 277 44 189 206
CB5 DQ20 M_B_DQ21 DQS7# M_B_DQS_DP7 M_B_DQS_DN7 6 VSS VSS VDD
54 170 278 M_B_DQS_DP7 6 46 191 209
199 CB6 DQ21 32 M_B_DQ22 DQS7 196 48 VSS VSS 193 212 VDD
CB7 DQ22 177 M_B_DQ23 DQS8# 197 50 VSS VSS 195 215 VDD
M_B_ODT0 87 DQ23 38 M_B_DQ24 DQS8 8 53 VSS VSS 198 217 VDD
6 M_B_ODT0 M_B_ODT1 ODT0 DQ24 M_B_DQ25 DQS9# VSS VSS VDD
91 183 7 55 200 220
6 M_B_ODT1 ODT1 DQ25 M_B_DQ26 DQS9 VSS VSS VDD
45 19 57 202 223
M_B_CKE0 60 DQ26 190 M_B_DQ27 DQS10# 18 94 VSS VSS 239 226 VDD
6 M_B_CKE0 M_B_CKE1 CKE0 DQ27 M_B_DQ28 DQS10 VSS VSS VDD
6 M_B_CKE1 203 36 30 96 241 229
CKE1 DQ28 181 M_B_DQ29 DQS11# 29 98 VSS VSS 243 231 VDD
M_B_CS#0 84 DQ29 43 M_B_DQ30 DQS11 41 101 VSS VSS 246 233 VDD
6 M_B_CS#0 M_B_CS#1 S0# DQ30 M_B_DQ31 DQS12# VSS VSS VDD
6 M_B_CS#1 89 188 40 103 248 236
93 S1# DQ31 97 M_B_DQ32 DQS12 100 105 VSS VSS 250 VDD
237 S2#_C0 DQ32 242 M_B_DQ33 DQS13# 99 107 VSS VSS 252 77
S3#_C1 DQ33 M_B_DQ34 DQS13 VSS VSS 0D675V_VTT_S0 VTT
235 104 111 109 254 221
C2 DQ34 249 M_B_DQ35 DQS14# 110 112 VSS VSS 257 VTT
M_B_CLK#0 75 DQ35 95 M_B_DQ36 DQS14 122 114 VSS VSS 259 142
6 M_B_CLK#0 M_B_CLK0 CK0# DQ36 M_B_DQ37 DQS15# VSS VSS VPP
74 240 121 116 261 143
6 M_B_CLK0 M_B_CLK#1 CK0 DQ37 M_B_DQ38 DQS15 VSS VSS VPP
6 M_B_CLK#1 219 102 133 118 263 286
M_B_CLK1 218 CK1# DQ38 247 M_B_DQ39 DQS16# 132 120 VSS VSS 265 287 VPP 1 TP_DIMM2_PIN1
6 M_B_CLK1 CK1 DQ39 M_B_DQ40 DQS16 VSS VSS VPP 12V
108 52 123 268 288 145
DQ40 DQS17# VSS VSS 2D5V_VPP_S3 VPP 12V

1
C M_B_BG0 63 253 M_B_DQ41 51 125 270 C
6 M_B_BG0 M_B_BG1 BG0 DQ41 M_B_DQ42 DQS17 1D2V_SM_S3 VSS VSS
207 115 127 272 4/4 R1202
6 M_B_BG1 M_B_BS0 BG1 DQ42 M_B_DQ43 VSS VSS
6 M_B_BS0 81 260 2/4 129 274 DIMM288_DDR4 0R2J-2-GP
M_B_BS1 224 BA0 DQ43 106 M_B_DQ44 DIMM288_DDR4 131 VSS VSS 276 (R_)
6 M_B_BS1 BA1 DQ44 M_B_DQ45 VSS VSS 4 OF 4
251 134 279

2
M_B_A0 79 DQ45 113 M_B_DQ46 2 OF 4
136 VSS VSS 281 DDR4-288P-82-GP TP_DIMM2_PIN145
6 M_B_A0 M_B_A1 A0 DQ46 M_B_DQ47 VSS VSS
72 258 DDR4-288P-82-GP 138 283 (022.10010.0A61)
6 M_B_A1 M_B_A2 A1 DQ47 M_B_DQ48 VSS VSS
6 M_B_A2 216 119 (022.10010.0A61)
M_B_A3 71 A2 DQ48 264 M_B_DQ49 3/4
6 M_B_A3 M_B_A4 A3 DQ49 M_B_DQ50
214 126 DIMM288_DDR4
6 M_B_A4 M_B_A5 A4 DQ50 M_B_DQ51
6 M_B_A5 213 271
M_B_A6 69 A5 DQ51 117 M_B_DQ52 DDR4-288P-82-GP
3 OF 4
6 M_B_A6 M_B_A7 A6 DQ52 M_B_DQ53
6 M_B_A7 211 262 (022.10010.0A61)
M_B_A8 68 A7 DQ53 124 M_B_DQ54
6 M_B_A8 M_B_A9 A8 DQ54 M_B_DQ55
66 269
6 M_B_A9 M_B_A10 A9 DQ55 M_B_DQ56
6 M_B_A10 225 130
M_B_A11 210 A10 DQ56 275 M_B_DQ57
6 M_B_A11 M_B_A12 A11 DQ57 M_B_DQ58
6 M_B_A12 65 137
M_B_A13 232 A12 DQ58 282 M_B_DQ59
6 M_B_A13 M_B_A14 A13 DQ59 M_B_DQ60
228 128
6 M_B_A14 M_B_A15 A14_WE# DQ60 M_B_DQ61
6 M_B_A15 86 273
M_B_A16 82 A15_CAS# DQ61 135 M_B_DQ62
6 M_B_A16 A16_RAS# DQ62 M_B_DQ63
234 280
A17 DQ63
1/4
DIMM288_DDR4

DDR4-288P-82-GP
1 OF 4 1D2V_SM_S3 1D2V_SM_S3 customer require add 4 cap by bob 20170815
(022.10010.0A61)

1
C1201 C1202 C1203 C1212 C1213 C1214 C1215
SCD1U16V2KX-L-GP SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SCD1U16V2KX-L-GP SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
(R_)
DIMM VREF DQ B (To DIMM/CPU)

2
B B

Del for DDR4 Modify

0D675V_VTT_S0 2D5V_VPP_S3 20170410
change to mounted for Edison's feedback

1
C1204 C1205 C1206 C1207
SC4D7U6D3V3KX-DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP

2
For DDR4 Modify

3D3V_S0
1D2V_SM_S3
DIMM VREF CA B (To DIMM)
1

1
C1216 C1217
1

R1203 C1208 SCD1U16V2KX-3DLGP SC2D2U6D3V2MX-DL-GP

1KR2F-3-GP SCD1U16V2KX-3DLGP

2
2
2

R1204 2R2F-GP R1205 0R0402-PAD-2-GP

M_VREF_DQ_DIM1 1 2 DIMM_CA_VREF_B 1 2 DIMM_CA_VREF_B_L
6 M_VREF_DQ_DIM1
1
1

A C1209 R1206 C1210 C1211 A

SCD022U16V2KX-3DLGP 1KR2F-3-GP SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP
2

20170410
2

DIMM_DQ_CPU_VREF_B_RC change to 47U for Edison's and Alan's feedback

20170412
1

correct the capacitance to 4D7U for Alan's feedback

R1207
24D9R2F-L-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

Title
DDR DIMM_2
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 12 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 13 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 14 of 107
5 4 3 2 1
 5 4 3 2 1

TP1501 1 TP_VSS_AL37

20170406
USB charger function is removed 20170519
net CHAR_EN @ pin Y47 remove test point for layout
net PCH_CHAR_CTL3 @ pin AA45 is removed

Vinafix.com 92 PCH_PME_N
PCH_PME_N BE36
SB1A
GPP_A11/PME#/SD_VDD2_PWR_EN#
1 OF 13
GPP_B13/PLTRST#
AV29 PLTRST#_PCH

R15
D
R13 RSVD2 Y47 20170515 D
RSVD1 GPP_K16/GSXCLK Y46 remove the net L_BAR_DET_N 3D3V_SB
GPP_K12/GSXDOUT Y48 VGA_CABLE_DET_N
GPP_K13/GSXSLOAD VGA_CABLE_DET_N 59
W46
TP_VSS_AL37 AL37 GPP_K14/GSXDIN AA45 20170515
AN35 VSS GPP_K15/GSXSRESET# remove the net L_BAR_DET_N
TP R1502 10KR2J-3-GP
SPI_SI_PCH AU41 AL47 WAKE_M2_SSD_N VGA_CABLE_DET_N 1 2
23,25,91,99 SPI_SI_PCH SPI_SO_PCH SPI0_MOSI GPP_E3/CPU_GP0 WAKE_M2_SSD_N 62
BA45 AM45 20170519
23,25,91 SPI_SO_PCH SPI_CS_PCH_N0 SPI0_MISO GPP_E7/CPU_GP1 ME_CNTL remove test point for layout
25 SPI_CS_PCH_N0 AY47 BF32 ME_CNTL 20
SPI_CLK_PCH AW47 SPI0_CS0# GPP_B3/CPU_GP2 BC33 R1503 8K2R2F-1-GP
25,91 SPI_CLK_PCH SPI0_CLK GPP_B4/CPU_GP3 WAKE_M2_SSD_N
AW48 1 2
20170406 SPI0_CS1# AE44 20170519 20170418
change to single 32MB SPI ROM SPI_WP_PCH AY48 GPP_H18/SML4ALERT# AJ46 remove test point for layout mount R57 8K2R to follow D9 Bison
remove SPI_CS_PCH_N2 23,25 SPI_WP_PCH SPI_HOLD_PCH SPI0_IO2 GPP_H17/SML4DATA
23,25 SPI_HOLD_PCH BA46 AE43 R1504 33R2J-2-GP
change SPI_CS_PCH_N1 to TPM SPI_CS_PCH_N2 AT40 SPI0_IO3 GPP_H16/SML4CLK AC47 GPP_H_15 PLTRST#_PCH 1 2 PLTRST#_SIO
20170605 91 SPI_CS_PCH_N2 SPI0_CS2# GPP_H15/SML3ALERT# GPP_H_15 23 PLTRST#_SIO 24
according to PDG, change SPI_CS_PCH_N2 to TPM BE19 AD48 20170410
BF19 GPP_D1/SPI1_CLK/SBK1_BK1 GPP_H14/SML3DATA AF47 add 33R series resistor for Edison's & Alan's feedback
remove SPI_CS_PCH_N1 GPP_D0/SPI1_CS#/SBK0_BK0 GPP_H13/SML3CLK
BF18 AB47 GPP_H_12
GPP_D3/SPI1_MOSI/SBK3_BK3 GPP_H12/SML2ALERT# GPP_H_12 23
BE18 AD47
BC17 GPP_D2/SPI1_MISO/SBK2_BK2 GPP_H11/SML2DATA AE48
BD17 GPP_D22/SPI1_IO3 GPP_H10/SML2CLK BB44 PCH_INTRUDER_N
GPP_D21/SPI1_IO2 INTRUDER#
CANON-LAKE-GP
(071.CANNO.0D0U)

SB1K 11 OF 13
LPSS_GSPI1_MOSI BA26 BA20
3D3V_S0 23 LPSS_GSPI1_MOSI GPP_B22/GSPI1_MOSI GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
BD30 BB20
R1505 10KR2J-3-GP AU26 GPP_B21/GSPI1_MISO GPP_D10/ISH_SPI_CLK/GSPI2_CLK BB16
1 2 PCIE_SLOT4_PRSNT_N AW26 GPP_B20/GSPI1_CLK GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO AN18
LPSS_GSPI0_MOSI BE30 GPP_B19/GSPI1_CS0# GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI 20170407
23 LPSS_GSPI0_MOSI GPP_B18/GSPI0_MOSI SDD change to 3D3V_S0
C BD29 BF14 C
R1506 10KR2J-3-GP PCIE_SLOT4_PRSNT_N BF29 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#/CNV_WCEN AR18 net PCH_SSD_PWR_EN @ pin BB20 is removed
94 PCIE_SLOT4_PRSNT_N GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN
1 2 PCIE_SLOT1_PRSNT_N 94 PCIE_SLOT1_PRSNT_N
PCIE_SLOT1_PRSNT_N BB26 BF17
GPP_B15/GSPI0_CS0# GPP_D14/ISH_UART0_TXD/I2C2_SCL BE17
TP1504 1 UART0_TX BB24 GPP_D13/ISH_UART0_RXD/I2C2_SDA
TP1505 1 UART0_RX BE23 GPP_C9/UART0_TXD
AP24 GPP_C8/UART0_RXD
BA24 GPP_C11/UART0_CTS#
GPP_C10/UART0_RTS#
BD21 AG45
AW24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL AH46
AP21 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA
AU24 GPP_C13/UART1_TXD/ISH_UART1_TXD AH47
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL AH48
LPC_PME_N AV21 GPP_H21/ISH_I2C1_SDA
24 LPC_PME_N GPP_C23/UART2_CTS#
AW21
BE20 GPP_C22/UART2_RTS#
BD20 GPP_C21/UART2_TXD AV34
GPP_C20/UART2_RXD GPP_A23/ISH_GP5 AW32
BE21 GPP_A22/ISH_GP4 BA33 3P0V_BAT_VREG
BF21 GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 BE34 FORM_FAC_ID_3 R1507 1MR2J-1-GP
GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 FORM_FAC_ID_2 FORM_FAC_ID_3 64 PCH_INTRUDER_N
BC22 BD34 1 2
GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 FORM_FAC_ID_1 FORM_FAC_ID_2 64
BF23 BF35 FORM_FAC_ID_1 64
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BD38 FORM_FAC_ID_0
3D3V_SB GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7 FORM_FAC_ID_0 64
BE15
R1508 10KR2J-3-GP BE14 GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
1 2 PCH_PME_N GPP_D23/ISH_I2C2_SCL/I2C3_SCL
CANON-LAKE-GP
(071.CANNO.0D0U)
R1509 10KR2J-3-GP
1 2 H_SKTOCC_N

20170413
change to on board power switch 20170413
remove the net FP_CBL_DET @ pin BF8 change to on board power switch SB1M 13 OF 13
20170420 remove the net FP_CBL_DET @ pin BF8 BD4 CNV_WR_CLK_DN
add the net FP_CBL_DET back for SFF 20170420 CNV_WR_CLKN CNV_WR_CLK_DP CNV_WR_CLK_DN 63
R1511 47KR2J-2-GP AW13 BE3 CNV_WR_CLK_DP 63
B add the net FP_CBL_DET back for SFF GPP_G0/SD_CMD CNV_WR_CLKP B
1 2 GPP_J1 BE9
BF8 GPP_G1/SD_D0 BB3 CNV_WR_0_DN R1515 100KR2J-1-GP
GPP_G2/SD_D1 CNV_WR_D0N CNV_WR_0_DP CNV_WR_0_DN 63 SPI_CLK_PCH
BF9 BB4 CNV_WR_0_DP 63 1 2
BG8 GPP_G3/SD_D2 CNV_WR_D0P BA3 CNV_WR_1_DN (R_)
GPP_G4/SD_D3 CNV_WR_D1N CNV_WR_1_DP CNV_WR_1_DN 63
BE8 BA2 CNV_WR_1_DP 63
BD8 GPP_G5/SD_CD# CNV_WR_D1P
AV13 GPP_G6/SD_CLK BC5 CNV_WT_CLK_DN R1516 100KR2J-1-GP
GPP_G7/SD_WP CNV_WT_CLKN CNV_WT_CLK_DP CNV_WT_CLK_DN 63 PLTRST#_PCH
BB6 CNV_WT_CLK_DP 63 1 2
H_SKTOCC_N AP3 CNV_WT_CLKP (R_)
24 H_SKTOCC_N GPP_I11/M2_SKT2_CFG0 CNV_WT_0_DN
AP2 BE6 CNV_WT_0_DN 63
AN4 GPP_I12/M2_SKT2_CFG1 CNV_WT_D0N BD7 CNV_WT_0_DP
GPP_I13/M2_SKT2_CFG2 CNV_WT_D0P CNV_WT_1_DN CNV_WT_0_DP 63
AM7 BG6
GPP_I14/M2_SKT2_CFG3 CNV_WT_D1N CNV_WT_1_DP CNV_WT_1_DN 63
BF6 CNV_WT_1_DP 63
GPP_J0_CNV_BLANKING AV6 CNV_WT_D1P BA1 CNV_WT_RCOMP
63 GPP_J0_CNV_BLANKING GPP_J1 GPP_J0/CNV_PA_BLANKING CNV_WT_RCOMP
AY3
AR13 GPP_J1/CPU_VCCIO_PWR_GATE# B12 PCIE_RCOMP_N
AV7 GPP_J11/A4WP_PRESENT PCIE_RCOMPN A13 PCIE_RCOMP_P
AW3 GPP_J10 PCIE_RCOMPP BE5
AT10 GPP_J_2 SD_RCOMP_1P8 BE4
CNV_BRI_DT AV4 GPP_J_3 SD_RCOMP_3P3 BD1
23 CNV_BRI_DT CNV_BRI_RSP GPP_J_4_CNV_BRI_DT_UART0_RTSB GPPJ_RCOMP_1P81
AY2 BE1
63 CNV_BRI_RSP CNV_RGI_DT GPP_J5/CNV_BRI_RSP/UART0_RXD GPPJ_RCOMP_1P82 SD_RCOMP
BA4 BE2 R1512 150R2F-1-GP
23 CNV_RGI_DT CNV_RGI_RSP GPP_J6/CNV_RGI_DT/UART0_TXD GPPJ_RCOMP_1P83 CNV_WT_RCOMP
63 CNV_RGI_RSP AV3 1 2
GPP_J8_CNV_RXD AW2 GPP_J7/CNV_RGI_RSP/UART0_CTS# Y35
63 GPP_J8_CNV_RXD GPP_J9_CNV_TXD GPP_J8/CNV_MFUART2_RXD RSVD2
23,63 GPP_J9_CNV_TXD AU9 Y36
GPP_J9/CNV_MFUART2_TXD RSVD3 R1513 100R2F-L1-GP-U
BC1 TP_RSVD3_BC1 1 TP1506 TPAD28-2-GP PCIE_RCOMP_N 1 2 PCIE_RCOMP_P
RSVD1 AL35
R1517 33R2J-2-GP TP
CNV_BRI_DT_R 1 2 CNV_BRI_DT R1514 200R2F-L-GP
63 CNV_BRI_DT_R SD_RCOMP
(MT_) CANON-LAKE-GP 1 2
(071.CANNO.0D0U)
R1519 33R2J-2-GP
CNV_RGI_DT_R 1 2 CNV_RGI_DT
63 CNV_RGI_DT_R
(MT_)

To be placed closer to PCH

A A

R1522 10KR2J-3-GP
1 2 CNV_BRI_DT
1D8V_PCH
(R_)
Wistron Corporation
R1521 20KR2F-L-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 2 CNV_RGI_DT Taipei Hsien 221, Taiwan, R.O.C.
(R_)
Title
PCH_(SPI/UART/I2C )
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 15 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

SB1B 2 OF 13
DMI_TX_CPU_N3 K34 J3 USB_PCH_PN1
3 DMI_TX_CPU_N3 DMI_TX_CPU_P3 DMI0_RXN USB2N_1 USB_PCH_PP1 USB_PCH_PN1 38
J35 J2 Front USB3.0
3 DMI_TX_CPU_P3 DMI_RX_CPU_N3 DMI0_RXP USB2P_1 USB_PCH_PN2 USB_PCH_PP1 38
C33 N13
3 DMI_RX_CPU_N3 DMI_RX_CPU_P3 B33 DMI0_TXN USB2N_2 N15 USB_PCH_PP2 USB_PCH_PN2 38 Front USB3.0
3 DMI_RX_CPU_P3 DMI_TX_CPU_N2 DMI0_TXP USB2P_2 USB_PCH_PP2 38
G33 K4
3 DMI_TX_CPU_N2 DMI_TX_CPU_P2 F34 DMI1_RXN USB2N_3 K3 20170406
3 DMI_TX_CPU_P2 DMI_RX_CPU_N2 DMI1_RXP USB2P_3 change net name from USB_OC7_R_N to GPIO_PCI_RESET
C32 M10
3 DMI_RX_CPU_N2 DMI_RX_CPU_P2 B32 DMI1_TXN USB2N_4 L9 to control PLTRST_N of device and slot
3 DMI_RX_CPU_P2 DMI_TX_CPU_N1 K32 DMI1_TXP USB2P_4 M1 USB_PCH_PN5
3 DMI_TX_CPU_N1 DMI_TX_CPU_P1 DMI2_RXN USB2N_5 USB_PCH_PP5 USB_PCH_PN5 32 3D3V_S0
J32 L2 Rear USB2.0 w/ RJ-45
3 DMI_TX_CPU_P1 DMI_RX_CPU_N1 C31 DMI2_RXP USB2P_5 K7 USB_PCH_PN6 USB_PCH_PP5 32
R1601 10KR2J-3-GP
3 DMI_RX_CPU_N1 DMI_RX_CPU_P1 DMI2_TXN USB2N_6 USB_PCH_PP6 USB_PCH_PN6 32 GPIO_PCI_RESET_N
B31 K6 Rear USB2.0 w/ RJ-45 1 2
3 DMI_RX_CPU_P1 DMI_TX_CPU_N0 DMI2_TXP USB2P_6 USB_PCH_PN7 USB_PCH_PP6 32
G30 L4
3 DMI_TX_CPU_N0 DMI_TX_CPU_P0 F30 DMI3_RXN USB2N_7 L3 USB_PCH_PP7 USB_PCH_PN7 39 Rear USB2.0
3 DMI_TX_CPU_P0 DMI_RX_CPU_N0 DMI3_RXP USB2P_7 USB_PCH_PN8 USB_PCH_PP7 39
C29 G4
3 DMI_RX_CPU_N0 DMI_RX_CPU_P0 B29 DMI3_TXN USB2N_8 G5 USB_PCH_PP8 USB_PCH_PN8 33 Card Reader
3 DMI_RX_CPU_P0 DMI3_TXP USB2P_8 USB_PCH_PN9 USB_PCH_PP8 33
A25 M6
DMI7_TXP USB2N_9 USB_PCH_PP9 USB_PCH_PN9 39 3D3V_SB
B25 N8 Rear USB2.0
P24 DMI7_TXN USB2P_9 H3 USB_PCH_PP9 39
R1602 10KR2J-3-GP
R24 DMI7_RXP USB2N_10 H2 USB_OC0_R_N 1 2
C26 DMI7_RXN USB2P_10 R10
B26 DMI6_TXP USB2N_11 P9
F26 DMI6_TXN USB2P_11 G1 R1603 10KR2J-3-GP
G26 DMI6_RXP USB2N_12 G2 USB_OC1_R_N 1 2
B27 DMI6_RXN USB2P_12 N3
C C
C27 DMI5_TXP USB2N_13 N2
L26 DMI5_TXN USB2P_13 E5 USB_PCH_PN14 20170515 R1604 10KR2J-3-GP
DMI5_RXP USB2N_14 USB_PCH_PP14 USB_PCH_PN14 63 WLAN USB prot change from #3 to #14 for PDG USB_OC3_R_N
M26 F6 WLAN 1 2
D29 DMI5_RXN USB2P_14 USB_PCH_PP14 63
E28 DMI4_TXP AH36 USB_OC0_R_N
K29 DMI4_TXN GPP_E9/USB2_OC0# AL40 USB_OC1_R_N USB_OC0_R_N 38
R1605 10KR2J-3-GP
DMI4_RXP GPP_E10/USB2_OC1# USB_OC2_R_N USB_OC1_R_N 39 USB_OC2_R_N
M29 AJ44 1 2
DMI4_RXN GPP_E11/USB2_OC2# AL41 USB_OC3_R_N
G17 GPP_E12/USB2_OC3# AV47 USB_OC4_R_N USB_OC3_R_N 32
F16 PCIE1_RXN/USB31_7_RXNGPP_F15/USB2_OC4# AR35 USB_OC5_R_N RN1601
A17 PCIE1_RXP/USB31_7_RXPGPP_F16/USB2_OC5# AR37 USB_OC6_R_N USB_OC5_R_N 1 8
B17 PCIE1_TXN/USB31_7_TXNGPP_F17/USB2_OC6# AV43 GPIO_PCI_RESET_N 20170418 USB_OC6_R_N 2 7
PCIE1_TXP/USB31_7_TXPGPP_F18/USB2_OC7# GPIO_PCI_RESET_N 40 GPIO_PCI_RESET change net name to GPIO_PCI_RESET_N USB_OC4_R_N
R21 3 6
P21 PCIE2_RXN/USB31_8_RXN F4 USB2_COMP 4 5
B18 PCIE2_RXP/USB31_8_RXP USB2_COMP F3 USB2_VBUSSENSE
C18 PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE U13 SRN10KJ-12-GP
K18 PCIE2_TXP/USB31_8_TXP RSVD1 G3 USB2_ID
J18 PCIE3_RXN/USB31_9_RXN USB2_ID
B19 PCIE3_RXP/USB31_9_RXP BE41 GPD7
PCIE3_TXN/USB31_9_TXN GPD7 GPD7 23
C19
N18 PCIE3_TXP/USB31_9_TXP G45 PCIE_TX_PCH_P24
PCIE4_RXN/USB31_10_RXN PCIE24_TXP PCIE_TX_PCH_N24 PCIE_TX_PCH_P24 62
R18 G46 PCIE_TX_PCH_N24 62 R1609 113R2F-GP
D20 PCIE4_RXP/USB31_10_RXP PCIE24_TXN Y41 PCIE_RX_PCH_P24 SSD USB2_COMP 1 2
PCIE4_TXN/USB31_10_TXN PCIE24_RXP PCIE_RX_PCH_N24 PCIE_RX_PCH_P24 62
C20 Y40
PCIE_RX_PCH_N5 PCIE4_TXP/USB31_10_TXP PCIE24_RXN PCIE_TX_PCH_P23 PCIE_RX_PCH_N24 62
F20 G48 PCIE_TX_PCH_P23 62
31 PCIE_RX_PCH_N5 PCIE_RX_PCH_P5 G20 PCIE5_RXN PCIE23_TXP G49 PCIE_TX_PCH_N23
PCIE_TX_PCH_N23 62 R1610 10KR2J-3-GP
31 PCIE_RX_PCH_P5 PCIE_TX_PCH_N5 PCIE5_RXP PCIE23_TXN PCIE_RX_PCH_P23 USB2_VBUSSENSE
LAN B21 W44 PCIE_RX_PCH_P23 62
SSD 1 2
31 PCIE_TX_PCH_N5 PCIE_TX_PCH_P5 A22 PCIE5_TXN PCIE23_RXP W43 PCIE_RX_PCH_N23
31 PCIE_TX_PCH_P5 PCIE_RX_PCH_N6 PCIE5_TXP PCIE23_RXN PCIE_TX_PCH_P22 PCIE_RX_PCH_N23 62
K21 H48 20170421
95 PCIE_RX_PCH_N6 PCIE_RX_PCH_P6 PCIE6_RXN PCIE22_TXP PCIE_TX_PCH_N22 PCIE_TX_PCH_P22 62 SSD change to PCIE21, 22, 23, 24 to support Optane
J21 H47 R1611 1KR2F-3-GP
20170426 PCI bridge 95 PCIE_RX_PCH_P6 PCIE_TX_PCH_N6 D21 PCIE6_RXP PCIE22_TXN U41 PCIE_RX_PCH_P22 PCIE_TX_PCH_N22 62 SSD USB2_ID 1 2
change from PCIEx1 slot to PCI bridge 95 PCIE_TX_PCH_N6 PCIE_TX_PCH_P6 PCIE6_TXN PCIE22_RXP PCIE_RX_PCH_N22 PCIE_RX_PCH_P22 62
C21 U40
95 PCIE_TX_PCH_P6 PCIE_TX_PCH_P7 PCIE6_TXP PCIE22_RXN PCIE_TX_PCH_P21 PCIE_RX_PCH_N22 62
B23 F46
94 PCIE_TX_PCH_P7 PCIE_TX_PCH_N7 C23 PCIE7_TXP PCIE21_TXP G47 PCIE_TX_PCH_N21 PCIE_TX_PCH_P21 62
94 PCIE_TX_PCH_N7 PCIE_RX_PCH_P7 PCIE7_TXN PCIE21_TXN PCIE_RX_PCH_P21 PCIE_TX_PCH_N21 62
20170426 PCIEx1 slot J24 R44 SSD
change from WLAN to PCIEx1 slot 94 PCIE_RX_PCH_P7 PCIE_RX_PCH_N7 L24 PCIE7_RXP PCIE21_RXP T43 PCIE_RX_PCH_N21 PCIE_RX_PCH_P21 62
94 PCIE_RX_PCH_N7 PCIE_RX_PCH_N8 PCIE7_RXN PCIE21_RXN PCIE_RX_PCH_N21 62
63 PCIE_RX_PCH_N8 F24
B PCIE_RX_PCH_P8 G24 PCIE8_RXN B
63 PCIE_RX_PCH_P8 PCIE_TX_PCH_N8 PCIE8_RXP
20170420 WLAN B24
change PCI bridge IC port from PCIE9 to PCIE8 63 PCIE_TX_PCH_N8 PCIE_TX_PCH_P8 PCIE8_TXN
63 PCIE_TX_PCH_P8 C24
20170426 PCIE8_TXP
change from PCI bridge to WLAN CANON-LAKE-GP
(071.CANNO.0D0U)

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_(DMI/PCI-E/USB)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 16 of 107
5 4 3 2 1
 5 4 3 2 1

DP_HPD_CPU
R1701
1
0R0402-PAD-2-GP
2 VGA1_DETECT
Vinafix.com
19,59 DP_HPD_CPU
D D

R1702 0R0402-PAD-2-GP
HDMI_DET_CPU 1 2 HDMI1_DETECT 3D3V_SB
19,56 HDMI_DET_CPU
R1705 10KR2J-3-GP
SSD_PEDET 1 2

V_CPU_ST_PLL
R1703 1KR2J-1-GP
THERMTRIP#_CPU 1 2
20170420
change PCIEx1 slot port from PCIE10 to PCIE9
SB1C 3 OF 13
20170418 AR2 G36 PCIE_RX_PCH_N9 20170406
PW_CLEAR change from GPP_K9 to GPP_K10 to follow D9 Bison CL_CLK PCIE9_RXN PCIE_RX_PCH_P9 PCIE_RX_PCH_N9 94 SATA LED add back to MB
AT5 F36
PCH_RST_GPIO change from GPP_K10 to GPP_F23 to follow D9 Bison AU4 CL_DATA PCIE9_RXP C34 PCIE_TX_PCH_N9 PCIE_RX_PCH_P9 94 PCIEx1 slot TP_GPP_E8 change to PCH_SATA_LED_N 3D3V_S0
CL_RST# PCIE9_TXN PCIE_TX_PCH_P9 PCIE_TX_PCH_N9 94
D34 R1704 10KR2J-3-GP
VGA1_DETECT PCIE9_TXP PCIE_TX_PCH_P9 94 PCH_SATA_LED_N
P48 1 2
V47 GPP_K8
20170413 PW_CLEAR V48 GPP_K9 K37
change to on board power switch 20 PW_CLEAR GPP_K10 PCIE10_RXN
W47 J37
remove the net CHASSIS_ID_0 @ pin L47 GPP_K11 PCIE10_RXP C35 R1706 10KR2J-3-GP
20170420 L47 PCIE10_TXN B35 VGA1_DETECT 1 2
add the net CHASSIS_ID_0 back for SFF GPP_K0 PCIE10_TXP
L46
NGFF_WIFI_PWR_CRL U48 GPP_K1 F44 SATA_RX_PCH_N2
63 NGFF_WIFI_PWR_CRL GPP_K3 GPP_K2 PCIE15_RXN/SATA2_RXN SATA_RX_PCH_P2 SATA_RX_PCH_N2 60
U47 E45
63 GPP_K3 GPP_K3 PCIE15_RXP/SATA2_RXP SATA_TX_PCH_N2 SATA_RX_PCH_P2 60
N48 B40 ODD 20170426
GPP_K5 GPP_K4 PCIE_15_SATA_2_TXN SATA_TX_PCH_P2 SATA_TX_PCH_N2 60 change to ODD
N47 C40
HDMI1_DETECT P47 GPP_K5 PCIE15_TXP/SATA2_TXP SATA_TX_PCH_P2 60
R46 GPP_K6 L41 SATA_RX_PCH_N3
GPP_K7 PCIE16_RXN/SATA3_RXN M40 SATA_RX_PCH_P3 SATA_RX_PCH_N3 60
PCIE16_RXP/SATA3_RXP SATA_TX_PCH_N3 SATA_RX_PCH_P3 60
C36 B41 HDD3
3D3V_SB PCIE11_TXP/SATA0A_TXP PCIE16_TXN/SATA3_TXN SATA_TX_PCH_P3 SATA_TX_PCH_N3 60
B36 C41 R1708 1KR2J-1-GP
F39 PCIE11_TXN/SATA0A_TXN PCIE16_TXP/SATA3_TXP SATA_TX_PCH_P3 60 PCH_PECI 1 2
R1709 10KR2J-3-GP
1 2 WLAN_PEDET G38 PCIE11_RXP/SATA0A_RXP K43 (R_)
C C
PCIE11_RXN/SATA0A_RXN PCIE17_RXN/SATA4_RXN K44
WLAN_PEDET AR42 PCIE17_RXP/SATA4_RXP A42
63 WLAN_PEDET GPP_F10/SATA_SCLOCK PCIE17_TXN/SATA4_TXN
R1712 10KR2J-3-GP AR48 B42
1 2 NGFF_WIFI_PWR_CRL AU47 GPP_F11/SATA_SLOAD PCIE17_TXP/SATA4_TXP 20170421
AU46 GPP_F13/SATA_SDATAOUT0 P41 change to PCIE21, 22 to support Optane
GPP_F12/SATA_SDATAOUT1 PCIE18_RXN/SATA5_RXN R40 R1710 619R2F-L1-GP
SATA_TX_PCH_N1 C39 PCIE18_RXP/SATA5_RXP C42 THERMTRIP#_PCH 1 2 THERMTRIP#_CPU
60 SATA_TX_PCH_N1 SATA_TX_PCH_P1 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN THERMTRIP#_CPU 4
D39 D42
20170426 HDD4 60 SATA_TX_PCH_P1 SATA_RX_PCH_N1 D46 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP
change to HDD 60 SATA_RX_PCH_N1 SATA_RX_PCH_P1 PCIE14_RXN/SATA1B_RXN PCH_SATA_LED_N
C47 AK48 PCH_SATA_LED_N 64 R1711 30R2J-1-GP
60 SATA_RX_PCH_P1 PCIE14_RXP/SATA1B_RXP GPP_E8/SATA_LED# AH41 PM_SYNC_PCH 1 2 PM_SYNC_CPU
SATA_TX_PCH_N0 B38 GPP_E0/SATAXPCIE0/SATAGP0 AJ43 20170519 PM_SYNC_CPU 4
60 SATA_TX_PCH_N0 SATA_TX_PCH_P0 C38 PCIE13_TXN/SATA0B_TXN GPP_E1/SATAXPCIE1/SATAGP1 AK47 remove test point for layout
HDD1 60 SATA_TX_PCH_P0 SATA_RX_PCH_N0 C45 PCIE13_TXP/SATA0B_TXP GPP_E2/SATAXPCIE2/SATAGP2 AN47
60 SATA_RX_PCH_N0 SATA_RX_PCH_P0 PCIE13_RXN/SATA0B_RXN GPP_F0/SATAXPCIE3/SATAGP_3 SSD_PEDET
C46 AM46
60 SATA_RX_PCH_P0 PCIE13_RXP/SATA0B_RXP GPP_F1/SATAXPCIE4/SATAGP4 AM43 SSD_PEDET 62
E37 GPP_F2/SATAXPCIE5/SATAGP5 AM47 20170519
D38 PCIE12_TXP/SATA1A_TXP GPP_F3/SATAXPCIE6/SATAGP6 AM48 remove test point for layout
J41 PCIE12_TXN/SATA1A_TXN GPP_F4/SATAXPCIE7/SATAGP7
H42 PCIE12_RXP/SATA_1A_RXP AU48
B44 PCIE12_RXN/SATA1A_RXN GPP_F21/EDP_BKLTCTL AV46
A44 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN AV44
R37 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN
R35 PCIE20_RXP/SATA7_RXP AD3 THERMTRIP#_PCH
20170421 D43 PCIE20_RXN/SATA7_RXN THRMTRIP# AF2 PCH_PECI
change to PCIE23, 24 to support Optane C44 PCIE19_TXP/SATA6_TXP PECI AF3 PM_SYNC_PCH 20170519
N42 PCIE19_TXN/SATA6_TXN PM_SYNC AG5 PLTRST_CPU_N remove test point for layout
PCIE19_RXP/SATA6_RXP PLTRST_CPU# PM_DOWN_PCH PLTRST_CPU_N 4,99
M44 AE2
PCIE19_RXN/SATA6_RXN PM_DOWN PM_DOWN_PCH 4
CANON-LAKE-GP
3D3V_S0
(071.CANNO.0D0U)
R1714 10KR2J-3-GP
GPP_K5 1 2
(R_)

R1713 10KR2J-3-GP
1 2
B B
(R_)

C1701 SCD1U16V2KX-3DLGP
SSD_PEDET 1 2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_(PCI-E/SATA)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 17 of 107
5 4 3 2 1
 5 4 3 2 1

SB1G 7 OF 13
BE33
GPP_A16/CLKOUT_48 Y3 CK_100M_CPU_XDP_DN
PCH_CPU_NSSC_CLK_DP D7 CLKOUT_ITPXDP# Y4 CK_100M_CPU_XDP_DP CK_100M_CPU_XDP_DN 99
4 PCH_CPU_NSSC_CLK_DP PCH_CPU_NSSC_CLK_DN CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P CK_100M_CPU_XDP_DP 99
4 PCH_CPU_NSSC_CLK_DN C6
CLKOUT_CPUNSSC# B6 PCH_CPU_PCIBCLK_DN
PCH_CPU_BCLK_DP CLKOUT_CPUPCIBCLK# PCH_CPU_PCIBCLK_DP PCH_CPU_PCIBCLK_DN 4
4 PCH_CPU_BCLK_DP B8 A6
PCH_CPU_PCIBCLK_DP 4

Vinafix.com PCH_CPU_BCLK_DN C8 CLKOUT_CPUBCLK_PCLKOUT_CPUPCIBCLK_P

4 PCH_CPU_BCLK_DN CLKOUT_CPUBCLK# AJ6
XTAL_24M_PCH_OUT U9 CLKOUT_PCIE_N0 AJ7 3D3V_S0
XTAL_24M_PCH_IN U10 XTAL_OUT CLKOUT_PCIE_P0 R1801 10KR2J-3-GP
R1802 60D4R2F-GP XTAL_IN AH9 PEG_CLK1_PCH# PEG_CLKREQ1_PCH# 1 2
D CLKOUT_PCIE_N1 PEG_CLK1_PCH# 63 D
1 2 XCLK_RBIAS XCLK_RBIAS T3 AH10 PEG_CLK1_PCH WLAN
XCLK_BIASREF CLKOUT_PCIE_P1 PEG_CLK1_PCH 63
PCH_RTCX1 BA49 AE14 PEG_CLK2_PCH# R1803 10KR2J-3-GP
PCH_RTCX2 BA48 RTCX1 CLKOUT_PCIE_N2 AE15 PEG_CLK2_PCH PEG_CLK2_PCH# 31 LAN PEG_CLKREQ2_PCH# 1 2
RTCX2 CLKOUT_PCIE_P2 PEG_CLK2_PCH 31
BF31 AE6 PEG_CLK3_PCH#
PEG_CLKREQ1_PCH# GPP_B5/SRCCLKREQ0# CLKOUT_PCIE_N3 PEG_CLK3_PCH PEG_CLK3_PCH# 62
20170515 BE31 AE7 SSD R1805 10KR2J-3-GP
remove the net L_BAR_CTRL 63 PEG_CLKREQ1_PCH# PEG_CLKREQ2_PCH# GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_P3 PEG_CLK3_PCH 62 PEG_CLKREQ3_PCH#
31 PEG_CLKREQ2_PCH# AR32 1 2
PEG_CLKREQ3_PCH# BB30 GPP_B7/SRCCLKREQ2# AC2
3D3V_S0 62 PEG_CLKREQ3_PCH# PCIE_SLOT2_PRSNT_N GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_N4
93 PCIE_SLOT2_PRSNT_N BA30 AC3
R1806 10KR2J-3-GP AN29 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_P4 R1807 10KR2J-3-GP
1 2 PCIE_SLOT2_PRSNT_N 20170515 AE47 GPP_B10/SRCCLKREQ5# AB2 PEG_CLKREQ8_PCH# 1 2
remove the net L_BAR_CTRL AC48 GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_N5 AB3
PEG_CLKREQ8_PCH# AE41 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_P5
93 PEG_CLKREQ8_PCH# PEG_CLKREQ9_PCH# GPP_H2/SRCCLKREQ8#
R1808 0R2J-2-GP 94 PEG_CLKREQ9_PCH# AF48 W4
1 2 PEG_CLKREQ10_PCH# PEG_CLKREQ10_PCH# AC41 GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_N6 W3 20170414
(PCI_) PEG_CLKREQ11_PCH# AC39 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_P6 duplicate net and pull up
94 PEG_CLKREQ11_PCH# GPP_H5/SRCCLKREQ11#
AE39 W7
20170406 AB48 GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_N7 W6 R1809 10KR2J-3-GP
PCI bridge IC has no CLKREQ# AC44 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_P7 PEG_CLKREQ9_PCH# 1 2
add a PD resistor AC43 GPP_H8/SRCCLKREQ14# AC14 PEG_CLK8_PCH#
GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_N8 AC15 PEG_CLK8_PCH PEG_CLK8_PCH# 93 PCIEx16
CLKOUT_PCIE_P8 PEG_CLK8_PCH 93
V2 R1810 10KR2J-3-GP
V3 CLKOUT_PCIE_N15 U2 PEG_CLK9_PCH# PEG_CLKREQ10_PCH# 1 2
CLKOUT_PCIE_P15 CLKOUT_PCIE_N9 PEG_CLK9_PCH PEG_CLK9_PCH# 94
U3 PCIEx1
CLKOUT_PCIE_P9 PEG_CLK9_PCH 94
T2
T1 CLKOUT_PCIE_N14 AC9 PEG_CLK10_PCH# R1811 10KR2J-3-GP
CLKOUT_PCIE_P14 CLKOUT_PCIE_N10 PEG_CLK10_PCH PEG_CLK10_PCH# 95 PCI bridge PEG_CLKREQ11_PCH#
AC11 1 2
AA1 CLKOUT_PCIE_P10 PEG_CLK10_PCH 95
Y2 CLKOUT_PCIE_N13 AE9 PEG_CLK11_PCH#
CLKOUT_PCIE_P13 CLKOUT_PCIE_N11 PEG_CLK11_PCH PEG_CLK11_PCH# 94 PCIEx1
AE11
AC7 CLKOUT_PCIE_P11 PEG_CLK11_PCH 94
AC6 CLKOUT_PCIE_N12 R6 CLKIN_XTAL
CLKOUT_PCIE_P12 CLKIN_XTAL
CANON-LAKE-GP
(071.CANNO.0D0U) R1815 0R0402-PAD-2-GP
CLKIN_XTAL 1 2 PULSAR_38D4M_REFCLK
PULSAR_38D4M_REFCLK 63
C C

20170504
add for CNVio clock
20170607
move R1816 to page 63
remove R1817

R1818 0R0402-PAD-2-GP
20 SUSCLK SUSCLK 1 2 SUSCLK_SIO SUSCLK_SIO 24

R1822 0R0402-PAD-2-GP
1 2 SUSCLK_WIFI
SUSCLK_WIFI 63

B B

XTAL_24M_PCH_IN

R1812 200KR2J-L1-GP
1 2 XTAL_24M_PCH_OUT
PCH_RTCX1
X1801
10MR3J-L1-GP
R1814 4 1
1 2 PCH_RTCX2
1

X1802 3 2 C1801
1 2 SC15P50V2JN-DL-GP
2
1

XTAL-32D768KHZ-88-GP
1

C1802
C1803 C1804 SC15P50V2JN-DL-GP
2

SC15P50V2JN-DL-GP SC15P50V2JN-DL-GP XTAL-24MHZ-182-GP

2

20170410
A change to common part A
20170607
change 24MHz Xtal circuit to follow D9
20170607 20170823
change 32.768KHz Xtal circuit to follow D9 Vendor suggest C1801,C1802 change to 15PF by Bob
20170901
change C1803,C1804 to 15P by Bob

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_(CLOCK/CL)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 18 of 107
5 4 3 2 1
 5 4 3 2 1

3D3V_SB

Vinafix.com WLAN_USB_DET
R1901
1
8K2R2F-1-GP
2
20170418
change from 2K2R to 8K2R to follow D9 Bison

20170418 R1902 10KR2J-3-GP 20170418

D PCH_RST_GPIO change from GPP_K10 to GPP_F23 to follow D9 Bison PIRQA_N mount R102 10KR to follow D9 Bison D
1 2
change net name to PCIVAUX_CTRL 20170607
SB1E 5 OF 13 change to net PIRQA_N
AL13 HDMI_CLK_CPU
HDMI_DET_CPU GPP_I5/DDPB_CTRLCLK HDMI_DATA_CPU HDMI_CLK_CPU 56
17,56 HDMI_DET_CPU AT6 AR8 20170531
GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I6/DDPB_CTRLDATA DDPC_CTRL_CLK HDMI_DATA_CPU 23,56 remove net PEG_SLOT_PWR_EN
AN10 AN13
AP9 GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I7/DDPC_CTRLCLK AL10 DDPC_CTRL_DATA
DP_HPD_CPU GPP_I2/DPPD_HPD2/DISP_MISC2 GPP_I8/DDPC_CTRLDATA DDPD_CTRL_CLK DDPC_CTRL_DATA 23
17,59 DP_HPD_CPU AL15 AL9 R1904 10KR2J-3-GP 20170417-2
GPP_I3/DPPE_HPD3/DISP_MISC3 GPP_I9/DDPD_CTRLCLK AR3 DDPD_CTRL_DATA PCH_HEATSINK_DET 1 2 add PCH heatsink hook and detect
GPP_I10/DDPD_CTRLDATA DDPD_CTRL_DATA 23
AN40
GPP_F23/DDPF_CTRLDATA AT49 GPIO_PEG_RESET_N
GPP_F22/DDPF_CTRLCLK GPIO_PEG_RESET_N 40
AP41 PCH_PS_ON_N
GPP_F14/EXT_PWR_GATE#/PS_ON# PCH_PS_ON_N 20,43
AN6
GPP_I4/EDP_HPD/DISP_MISC4 M45 GPIO_LAN_RESET_N
GPP_K23/IMGCLKOUT1 GPIO_LAN_RESET_N 40
L48
GPP_K22/IMGCLKOUT0 T45 PIRQA_N
GPP_K21 PIRQA_N 91
T46 R1917 10KR2J-3-GP
GPP_K20 AJ47 PIRQA_N 1 2
GPP_H23/TIME_SYNC0 (R_)
CANON-LAKE-GP 20170531
remove net PEG_SLOT_PWR_EN @ pin L48
(071.CANNO.0D0U)
3D3V_S0
20170418 R1906 2K2R2J-2-GP
GPIO_LAN_RESET change from GPP_F23 to GPP_K23 DDPC_CTRL_CLK 1 2
change net name to GPIO_LAN_RESET_N (R_)
GPIO_PEG_RESET change net name to GPIO_PEG_RESET_N
R1907 2K2R2J-2-GP
DDPD_CTRL_CLK 1 2
(R_)

R1908 2K2R2J-2-GP
HDMI_CLK_CPU 1 2

20170510
C remove R1909 because HDMI_DATA_CPU double PU C

R1910 10KR2J-3-GP
LPC_SERIRQ_PCH 1 2

R1911 10KR2J-3-GP
SB1F 6 OF 13 GPIO_PEG_RESET_N 1 2
USB30_TX_PCH_N1 F9 BB39 LPC_AD_PCH_P0
38 USB30_TX_PCH_N1 USB30_TX_PCH_P1 USB31_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD_PCH_P1 LPC_AD_PCH_P0 24,68
F7 AW37 20170406
38 USB30_TX_PCH_P1 USB30_RX_PCH_N1 USB31_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD_PCH_P2 LPC_AD_PCH_P1 24,68 add to control PLTRST_N of device and slot
38 USB30_RX_PCH_N1 D11 AV37 R1912 10KR2J-3-GP
USB30_RX_PCH_P1 C11 USB31_1_RXN GPP_A3/LAD2/ESPI_IO2 BA38 LPC_AD_PCH_P3 LPC_AD_PCH_P2 24,68 GPIO_LAN_RESET_N 1 2
38 USB30_RX_PCH_P1 USB30_TX_PCH_N2 USB31_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD_PCH_P3 24,68
38 USB30_TX_PCH_N2 C3
USB30_TX_PCH_P2 D4 USB31_2_TXN
38 USB30_TX_PCH_P2 USB30_RX_PCH_N2 USB31_2_TXP LPC_FRAME#_PCH_R
B9 BE38 R1913 33R2J-2-GP
38 USB30_RX_PCH_N2 USB30_RX_PCH_P2 USB31_2_RXN GPP_A5/LFRAME#/ESPI_CS0# LPC_SERIRQ_PCH LPC_FRAME#_PCH_R
38 USB30_RX_PCH_P2 C9 AW35 LPC_SERIRQ_PCH 24,68 1 2 LPC_FRAME#_PCH
USB31_2_RXP GPP_A6/SERIRQ/ESPI_CS1# BA36 GPP_A7 LPC_FRAME#_PCH 24,68
C17 GPP_A7/PIRQA#/ESPI_ALERT0# BE39 KBRST_N
USB31_6_TXN GPP_A0/RCIN#/ESPI_ALERT1# GPP_A14 KBRST_N 24
C16 BF38 1 2 R1914 22R2J-2-GP
G14 USB31_6_TXP GPP_A14/SUS_STAT#/ESPI_RESET# R1920 (R_) 100KR2J-1-GP 1 2 LPC_CLK_14M_EC
F14 USB31_6_RXN BB36 LPC_CLK_PCH_P0 LPC_CLK_14M_EC 24
C15 USB31_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK BB34 LPC_CLK_PCH_P1
B15 USB31_5_TXN GPP_A10/CLKOUT_LPC1 R1915 22R2J-2-GP
J13 USB31_5_TXP T48 LPC_CLK_PCH_P0 1 2 LPC_CLK_14M_DEBUG
K13 USB31_5_RXN GPP_K19/SMI# T47 LPC_CLK_14M_DEBUG 68
USB31_5_RXP GPP_K18/NMI#
G12 R1916 22R2J-2-GP
F11 USB31_3_TXP AH40 LPC_CLK_PCH_P1 1 2 LPC_CLK_33M_EC
C10 USB31_3_TXN GPP_E6/SATA_DEVSLP2 AH35 20170519 LPC_CLK_33M_EC 24
B10 USB31_3_RXP GPP_E5/SATA_DEVSLP1 AL48 remove test point for layout
USB31_3_RXN GPP_E4/SATA_DEVSLP0 AP47
C14 GPP_F9/SATA_DEVSLP7 AN37 PCH_HEATSINK_DET
B14 USB31_4_TXP GPP_F8/SATA_DEVSLP6 AN46
J15 USB31_4_TXN GPP_F7/SATA_DEVSLP5 AR47
K16 USB31_4_RXP GPP_F6/SATA_DEVSLP4 AP48 WLAN_USB_DET
USB31_4_RXN GPP_F5/SATA_DEVSLP3 WLAN_USB_DET 63

CANON-LAKE-GP
B B
(071.CANNO.0D0U) 20170519
remove test point for layout

3D3V_SB
R1918 10KR2J-3-GP
HS1903 GPP_A7 1 2
20170417-2 (R_)
add PCH heatsink hook and detect
PCH_HEATSINK_DET R1919 10KR2J-3-GP
1 2
(R_)
HS1901 HS1902
1 1
2 2

FOX-CON2-3-GP FOX-CON2-3-GP
(R_) (R_)

HEAT SINK DETECT

PCH HSINK D7 AURAS
(R_)

20170607
add heatsink into schematic

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_(USB/ESPI)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 19 of 107
5 4 3 2 1
 5 4 3 2 1

20170410
add net GPP_A8 for Edison's feedback
SB1D 4 OF 13
HDA_BITCLK_PCH BD11 BF36 SIO_PECI_REQ_N
HDA_SDIN0_PCH HDA_BCLK/I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF# GPP_A8 SIO_PECI_REQ_N 24
BE11 AV32
27 HDA_SDIN0_PCH HDA_SDOUT_PCH HDA_SDI0/I2S0_RXD GPP_A8/CLKRUN#
BF12
HDA_SYNC_PCH BG13 HDA_SDO/I2S0_TXD BF41 20170411
HDA_SYNC/I2S0_SFRM GPD11/LANPHYPC remove LAN power control 3D3V_S0
HDA_RST#_PCH BE10 BD42 SLP_WLAN_N R2001 10KR2J-3-GP
HDA_RST#/I2S1_SCLK GPD9/SLP_WLAN# SLP_WLAN_N 63 TP_SLP_LAN_N GPP_A8
BF10 1 TP2001 1 2
BE12 HDA_SDI1/I2S1_RXD BB46 SM_DRAMRST# 20170410
SM_DRAMRST# 11,12

Vinafix.com
2 1I2S1_SFRM BD12 I2S1_TXD/SNDW2_DATA DRAM_RESET# BE32 UART_BT_WAKE_N add net GPP_A8 for Edison's feedback
I2S1_SFRM/SNDW2_CLK GPP_B2/VRALERT# UART_BT_WAKE_N 63
R2058 (R_) BF33 R2002 10KR2J-3-GP
100KR2J-1-GP GPP_B1/GSPI1_CS1#/TIME_SYNC1 BE29 SIO_PECI_REQ_N 1 2
AUD_AZACPU_SDO_R AM2 GPP_B0/GSPI0_CS1# R47 R2004 0R2J-2-GP
AUD_AZACPU_SDI_R AN3 HDACPU_SDO GPP_K17/ADR_COMPLETE AP29 SUS_PWR_ACK 1 2 SUS_WARNB
D 7 AUD_AZACPU_SDI_R AUD_AZACPU_SCLK_R AM3 HDACPU_SDI GPP_B11/I2S_MCLK AU3 PCH_SYSPWROK (R_) R2003 1KR2J-1-GP
D
HDACPU_SCLK SYS_PWROK PCH_SYSPWROK 24,99 PCH_SYSPWROK 1 2
PCM_CLK_PCH AV18 BB47 PCH_WAKE_N R2006 0R0402-PAD-2-GP (R_)
PCM_IN_PCH GPP_D8/I2S2_SCLK WAKE# PCH_SLP_A_N PCH_WAKE_N 31,62,63,93,94,95 H_PWRGD_R
AW18 BE40 1 2 H_PWRGD
PCM_OUT_PCH GPP_D7/I2S2_RXD GPD6/SLP_A# TP_SLP_LAN_N PCH_SLP_A_N 24,99 H_PWRGD 4,99
BA17 BF40
PCM_SYNC_PCH BE16 GPP_D6/I2S2_TXD/MODEM_CLKREQ SLP_LAN# BC28 SLP_S0_N
BF15 GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPP_B12/SLP_S0# BF42 SLP_S3_N R2008 0R0402-PAD-2-GP
GPP_D20/DMIC_DATA0/SNDW4_DATA GPD4/SLP_S3# SLP_S4_N SLP_S3_N 24,40,42,43,50,99 PCH_JTAGX
BD16 BE42 SLP_S4_N 8,24,32,38,39,40,99 1 2 H_TCK H_TCK 4,99 3D3V_SB
AV16 GPP_D19/DMIC_CLK0/SNDW4_CLK GPD5/SLP_S4# BC42 1
GPD10 2 R2045 2K2R2J-2-GP
AW15 GPP_D18/DMIC_DATA1/SNDW3_DATA GPD10/SLP_S5# R2057 (R_) 100KR2J-1-GP FP_RST_N 1 2
GPP_D17/DMIC_CLK1/SNDW3_CLK BE45 SUSCLK
GPD8/SUSCLK BATLOW_N SUSCLK 18
BF44
GPD0/BATLOW# BE35 SUS_PWR_ACK R2007 10KR2J-3-GP
SUS_PWR_ACK 38 Place Near PCH within 1.1 inch
PCH_RTCRST_PULLUP BE47 GPP_A15/SUSACK# BC37 SUS_WARNB UART_BT_WAKE_N 1 2
PCH_SRTCRSTB_PULLUP BD46 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUS_WARNB 24
R2011 51R2F-2-GP
SRTCRST# PCH_JTAG_TCK 1 2
PCH_PWROK AY42 BG44 LANWAKE_R_N (R_) R2009 499R2F-2-GP
40 PCH_PWROK RSMRST_SIO_N PCH_PWROK GPD2/LAN_WAKE# SML0CLK_PCH
24,63,99 RSMRST_SIO_N BA47 BG42 ACPRESENT 1 2
RSMRST# GPD1/ACPRESENT BD39 SLP_SUSB C2001 SCD1U16V2KX-L-GP
PCH_DPWROK SLP_SUS# PWRBTN_N SLP_SUSB 24,42,51
AW41 BE46 PWRBTN_N 24,64,99 1 2
26 PCH_DPWROK SMBALERT_N BE25 DSW_PWROK GPD3/PWRBTN# AU2 FP_RST_N (R_) R2010 499R2F-2-GP
23 SMBALERT_N SMB_CLK_RESUME GPP_C2/SMBALERT# SYS_RESET# FP_RST_N 99 SML0DATA_PCH
BE26 AW29 SPKR 1 2
24,92,93,94 SMB_CLK_RESUME SMB_DATA_RESUME GPP_C0/SMBCLK GPP_B14/SPKR H_PWRGD_R SPKR 23,27
24,92,93,94 SMB_DATA_RESUME BF26 AE3
SML0ALERT# BF24 GPP_C1/SMBDATA CPUPWRGD
23 SML0ALERT# SML0CLK_PCH GPP_C5/SML0ALERT# ITP_PMODE
BF25 AL3 R2012 1KR2J-1-GP
SML0DATA_PCH BE24 GPP_C3/SML0CLK ITP_PMODE AH4 PCH_JTAGX ITP_PMODE 99 SMLICLK_PCH 1 2
TMIN_SHIFT_PCH BD33 GPP_C4/SML0DATA PCH_JTAGX AJ4 PCH_JTAG_TMS
23 TMIN_SHIFT_PCH SMLICLK_PCH GPP_B23/SML1ALERT#/PCHHOT# PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TMS 4
BF27 AH3
24 SMLICLK_PCH SMLIDATA_PCH BE27 GPP_C6/SML1CLK PCH_JTAG_TDO AH2 PCH_JTAG_TDI PCH_JTAG_TDO 4
R2013 1KR2J-1-GP
24 SMLIDATA_PCH GPP_C7/SML1DATA PCH_JTAG_TDI PCH_JTAG_TCK PCH_JTAG_TDI 4 SMLIDATA_PCH
AJ3 DB2001 0R3J-0-U-GP 1 2
PCH_JTAG_TCK PCH_JTAG_TCK 99 PCH_PWROK 1 2
20170410 CANON-LAKE-GP (R_) 20170411
change net name form TMIN_SHIFT to TMIN_SHIEF_PCH for Edison's feedback remove WLAN power control
(071.CANNO.0D0U) 20170421
For DB1 Debug Hole add WALN power control for BIOS's request 3D3V_S5
R2044 10KR2J-3-GP
SLP_WLAN_N 1 2
C C

R2014 1KR2J-1-GP
PCH_WAKE_N 1 2

27 HDA_BITCLK_CODEC
HDA_BITCLK_CODEC
R2017
1
33R2J-2-GP
2 HDA_BITCLK_PCH
CRB C2002 SCD1U16V2KX-3DLGP
1 2 R2015 10KR2J-3-GP

R2019 33R2J-2-GP
SLP_S0_N de-glitch circuit U2001
3D3V_SB
(R_) ACPRESENT 1 2

HDA_RST#_CODEC 1 2 HDA_RST#_PCH 20170411

27 HDA_RST#_CODEC reserve CEC control 1 6 SLP_S0_N R2016
10KR2J-3-GP
3D3V_SB B C BATLOW_N
R2046 0R2J-2-GP 2 5 1 2
R2020 33R2J-2-GP SLP_S3_N 1 2 SLP_S3_N_EXTD1 3 GND VCC 4 SLP_S0_N_EXTD1 20170418
HDA_SDOUT_CODEC 1 2 HDA_SDOUT_PCH (R_) A Y change to 10KR to follow D9 Bison
27 HDA_SDOUT_CODEC R2047 0R2J-2-GP R2018 10KR2J-3-GP
1 2 74AUP1G97GW-GP LANWAKE_R_N 1 2
R2022 33R2J-2-GP (R_) (R_) C2003 SCD1U16V2KX-3DLGP
HDA_SYNC_CODEC 1 2 HDA_SYNC_PCH 1 2
27 HDA_SYNC_CODEC 3D3V_SB
R2023 1KR2F-3-GP U2002 (R_)
PCH_PS_ON_N 1 2 PCH_PS_ON_N_EXTD1 1 8 V_CPU_ST_PLL
19,43 PCH_PS_ON_N CLK VCC 7
R2025 30R2J-1-GP 3D3V_SB 2

1
AUD_AZACPU_SDO 1 2 AUD_AZACPU_SDO_R C2004 3 D PRE# 6 SLP_S0_N_EXTD1 V_CPU_ST_PLL
7 AUD_AZACPU_SDO (R_)
SC100P50V2JN-3DLGP 4 Q# CLR# 5 SLP_S0_N_EXTD2 R2021 1K5R2F-2-GP
(R_) GND Q PCH_JTAGX 1 2

2
R2027 30R2J-1-GP SN74AUP1G74DCUR-GP C2005 SCD1U16V2KX-3DLGP (R_)
AUD_AZACPU_SCLK 1 2 AUD_AZACPU_SCLK_R 1 2
7 AUD_AZACPU_SCLK (R_) 3D3V_SB
(R_) R2024 100R2F-L1-GP-U
U2003 PCH_JTAG_TDO 1 2
R2029 33R2J-2-GP
PCM_SYNC 1 2 PCM_SYNC_PCH 1 6 SLP_S0_N_EXTD2
63 PCM_SYNC 3D3V_SB B C
2 5 R2026 51R2F-2-GP
SLP_S0_N 3 GND VCC 4 SLP_S0_PLT_N PCH_JTAG_TDI 1 2
A Y SLP_S0_PLT_N 24,40,91
R2031 33R2J-2-GP
PCM_OUT 1 2 PCM_OUT_PCH
63 PCM_OUT
74AUP1G97GW-GP R2028 51R2F-2-GP
PCH_JTAG_TMS 1 2
(R_)
R2032 33R2J-2-GP
PCM_IN 1 2 PCM_IN_PCH R2048 0R0402-PAD-2-GP For ITH/DCI debug
B 63 PCM_IN B
1 2

R2033 33R2J-2-GP R2030 1K5R2F-2-GP

PCM_CLK 1 2 PCM_CLK_PCH SUSCLK 1 2
63 PCM_CLK
(R_)

R2049 100KR2J-1-GP
SLP_S3_N 1 2
(R_)

R2050 100KR2J-1-GP
SLP_S4_N 1 2
(R_)
ME ENABLE/DISABLE PASSWORD CLEAR CLEAR CMOS R2051 100KR2J-1-GP
PCH_SLP_A_N 1 2
With Jumper ME Disable With Jumper Normal Mode With Jumper Clear CMOS (R_)
Without Jumper Normal Mode Without Jumper Clear Password Without Jumper Normal Mode R2052 100KR2J-1-GP
SLP_WLAN_N 1 2
3D3V_SB
R2034 0R0402-PAD-2-GP R2035 4K7R2J-2-GP (R_)
1 2 ME_CNTL_2 PCH_RTCRST_DOWN 1 2
R2053 100KR2J-1-GP
SLP_SUSB 1 2
2

4
6

R2036 0R0402-PAD-2-GP (R_)

JMP1 1 2 PCH_RTCRST_N
PCH_RTCRST_N 99
E

R2037 1KR2J-1-GP PIN-CONN6A-S3-GP R2054 100KR2J-1-GP

ME_CNTL 1 2 ME_CNTL_1 B LMBT3906LT1G-1-GP TP_SLP_LAN_N 1 2
15 ME_CNTL
Q2001 (R_)
1

3
5
C

R2038 1KR2J-1-GP R2039 0R0402-PAD-2-GP R2040 30K1R2F-L-GP R2055 100KR2J-1-GP

HDA_SDOUT_PCH 1 2 AUD_LINK_SDO_C 1 2 AUD_LINK_SDO_R1 PCH_RTCRST_PULLUP 1 2 HDA_BITCLK_PCH 1 2
3P0V_BAT_VREG
(R_)

A 3D3V_SB C2006 SC1U10V2KX-1DLGP R2056 100KR2J-1-GP A

1 2 HDA_RST#_PCH 1 2
(R_)
1

R2042 30K1R2F-L-GP
R2041 1 2 PCH_SRTCRSTB_PULLUP
3P0V_BAT_VREG
10KR2J-3-GP
1
1

C2007 R2043
Wistron Corporation
2

PW_CLEAR SC1U10V2KX-1DLGP 4K7R2J-2-GP

17 PW_CLEAR
(R_) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

2

Title
PCH_(GPIO/SMBUS/IHDA/JTAG)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 20 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
SB1H 8 OF 13 C2101
D D
AA22 AW9 SCD1U16V2KX-3DLGP
1V_PCH_SB VCCPRIM_1P051 VCCPRIM_3P32 3D3V_SB
AA23
AB20 VCCPRIM_1P052 BF47 DCPRTC 1 2
AB22 VCCPRIM_1P053 DCPRTC1 BG47
AB23 VCCPRIM_1P054 DCPRTC2
AB27 VCCPRIM_1P055 V23
VCCPRIM_1P056 VCCPRIM_3P35 3D3V_SB
AB28 AN44
VCCPRIM_1P057 VCCSPI 3D3V_SB
AB30
AD20 VCCPRIM_1P058 BC49
VCCPRIM_1P059 VCCRTC1 3P0V_BAT_VREG
AD23 BD49
AD27 VCCPRIM_1P0510 VCCRTC2
AD28 VCCPRIM_1P0511 AN21
VCCPRIM_1P0512 VCCPGPPG_3P3 3D3V_SB
AD30 AY8
AF23 VCCPRIM_1P0513 VCCPRIM_3P33 BB7
AF27 VCCPRIM_1P0516 VCCPRIM_3P34
AF30 VCCPRIM_1P0517 AC35
VCCPRIM_1P0518 VCCPGPPHK1 3D3V_SB
U26 AC36
U29 VCCPRIM_1P0523 VCCPGPPHK2 AE35
VCCPRIM_1P0524 VCCPGPPEF1 3D3V_SB
V25 AE36
V27 VCCPRIM_1P0525 VCCPGPPEF2 R2101
V28 VCCPRIM_1P0526 AN24 VCCPGPPD_PWR 1 2 0R0603-PAD-2-GP-U
VCCPRIM_1P0527 VCCPGPPD 1D8V_PCH
V30 AN26
VCCPRIM_1P0528 VCCPGPPBC1 3D3V_SB
V31 AP26 R2102
VCCPRIM_1P0529 VCCPGPPBC2 1 2 0R3J-0-U-GP
3D3V_SB
1V_PCH_SB AD31 AN32 3D3V_SB (R_)
AE17 VCCPRIM_1P0514 VCCPGPPA
VCCPRIM_1P0515 AT44
VCCPRIM_3P31 3D3V_SB
1V_PCH_SB W22 BE48 3D3V_S5
W23 VCCDUSB_1P051 VCCDSW_3P31 BE49
VCCDUSB_1P052 VCCDSW_3P32
BG45 BB14
1V_VCCDSW VCCDSW_1P051 VCCHDA 3D3V_SB
BG46 AG19
VCCDSW_1P052 VCCPRIM_1P83 1D8V_PCH
1V_PCH_SB W31 AG20 20170428
VCCPRIM_MPHY_1P05 VCCPRIM_1P84 AN15 rename 1D8V_SB to 1D8V_PCH
D1 VCCPRIM_1P85 AR15
E1 VCCPRIM_1P0521 VCCPRIM_1P86 BB11
C49 VCCPRIM_1P0522 VCCPRIM_1P87
1V_VCCAMPHYPLL VCCAMPHYPLL_1P051
C D49 AF19 C
E49 VCCAMPHYPLL_1P052 VCCPRIM_1P81 AF20
VCCAMPHYPLL_1P053 VCCPRIM_1P82
P2 AG31
1V_VCCA_XTAL VCCA_XTAL_1P051 VCCPRIM_1P0520 1V_PCH_SB
P3 AF31
W19 VCCA_XTAL_1P052 VCCPRIM_1P0519 AK22
1V_PCH_SB VCCA_SRC_1P051 VCCPRIM_1P241 1D24V_PCH
W20 AK23 20170412
VCCA_SRC_1P052 VCCPRIM_1P242 rename 1D24V_SB to 1D24V_PCH
C1 AJ22
VCCAPLL_1P054 VCCDPHY_1P241 1D24V_PCH
C2 AJ23
V19 VCCAPLL_1P055 VCCDPHY_1P242 BG5
VCCA_BCLK_1P05 VCCDPHY_1P243
B1 K47 TP_VCCPHY_SENSE 1 TP2101
B2 VCCAPLL_1P051 VCCMPHY_SENSE K46 TP_VSSPHY_SENSE 1 TP2102
B3 VCCAPLL_1P052 VSSMPHY_SENSE
VCCAPLL_1P053
CANON-LAKE-GP
(071.CANNO.0D0U)

20170428 20170412
rename 1D8V_SB to 1D8V_PCH rename 1D24V_SB to 1D24V_PCH

3P0V_BAT_VREG 3D3V_SB 3D3V_SB

3D3V_S5 1D8V_PCH 1D24V_PCH
1

1
C2102 C2103 C2104 C2105 C2106 C2126 C2107 C2108 C2109
SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP SC4D7U6D3V3KX-DLGP
1V_PCH_SB 1V_VCCAMPHYPLL (R_)
2

2
L2101 HCB1608KF-601T10-GP
B B
1 2
1

(68.00230.041) C2110 C2111 C2112 close to AC35, AC36 close to AE35, AE36
SC1U10V2KX-1DLGP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
1V_PCH_SB
2

1
C2113 C2114 C2115 C2116 C2117
1V_PCH_SB 1V_VCCA_XTAL SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
L2102 HCB1608KF-601T10-GP
2

2
1 2
1

(68.00230.041) C2118 C2119

SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2

1
C2120 C2121 C2122 C2123 C2124
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
1V_VCCDSW
2

2
1

C2125
SC1U10V2KX-1DLGP
2

C2128 C2127
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_(POWER1)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 21 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

SB1J 10 OF 13
Y14
RSVD7 Y15
RSVD8 U37
RSVD6 U35
RSVD5
N32
SB1L RSVD3 R32
SB1I 9 OF 13 12 OF 13 RSVD4
A2 AL12 BG3 M24 AH15 TP_PCH_AH15 1 TP2201
A28 VSS_1 VSS_73 AL17 BG33 VSS_145 VSS_196 M32 RSVD2 AH14 TP_PCH_AH14 1 TP2202
A3 VSS_2 VSS_74 AL21 BG37 VSS_146 VSS_197 M34 RSVD1
A33 VSS_3 VSS_75 AL24 BG4 VSS_147 VSS_198 M49
A37 VSS_4 VSS_76 AL26 BG48 VSS_148 VSS_199 M5
A4 VSS_5 VSS_77 AL29 C12 VSS_149 VSS_200 N12 AL2 PCH_XDP_PREQ_R_N
VSS_6 VSS_78 VSS_150 VSS_201 PREQ# PCH_XDP_PRDY_R_N PCH_XDP_PREQ_R_N 99
A45 AL33 C25 N16 AM5
VSS_7 VSS_79 VSS_151 VSS_202 PRDY# H_TRST_N_R PCH_XDP_PRDY_R_N 99
A46 AL38 C30 N34 AM4 H_TRST_N_R 4
A47 VSS_8 VSS_80 AM1 C4 VSS_152 VSS_203 N35 CPU_TRST# AK3 PROC_TRIGIN_PCH
A48 VSS_9 VSS_81 AM18 C48 VSS_153 VSS_204 N37 TRIGGER_OUT AK2 PROC_TRIGOUT_PCH
VSS_10 VSS_82 VSS_154 VSS_205 TRIGGER_IN PROC_TRIGOUT_PCH 9
A5 AM32 C5 N38
A8 VSS_11 VSS_83 AM49 D12 VSS_155 VSS_206 P26 CANON-LAKE-GP
AA19 VSS_12 VSS_84 AN12 D16 VSS_156 VSS_207 P29
VSS_13 VSS_85 VSS_157 VSS_208 (071.CANNO.0D0U)
AA20 AN16 D17 P4
AA25 VSS_14 VSS_86 AN34 D30 VSS_158 VSS_209 P46
AA27 VSS_15 VSS_87 AN38 D33 VSS_159 VSS_210 R12
AA28 VSS_16 VSS_88 AP4 D8 VSS_160 VSS_211 R16
AA30 VSS_17 VSS_89 AP46 E10 VSS_161 VSS_212 R26
AA31 VSS_18 VSS_90 AR12 E13 VSS_162 VSS_213 R29
AA49 VSS_19 VSS_91 AR16 E15 VSS_163 VSS_214 R3
AA5 VSS_20 VSS_92 AR34 E17 VSS_164 VSS_215 R34
C C
AB19 VSS_21 VSS_93 AR38 E19 VSS_165 VSS_216 R38
AB25 VSS_22 VSS_94 AT1 E22 VSS_166 VSS_217 R4
AB31 VSS_23 VSS_95 AT16 E24 VSS_167 VSS_218 T17
AC12 VSS_24 VSS_96 AT18 E26 VSS_168 VSS_219 T18
AC17 VSS_25 VSS_97 AT21 E31 VSS_169 VSS_220 T32
AC33 VSS_26 VSS_98 AT24 E33 VSS_170 VSS_221 T4 R2201 30D1R2F-L-GP
AC38 VSS_27 VSS_99 AT26 E35 VSS_171 VSS_222 T49 PROC_TRIGIN_PCH 1 2 PROC_TRIGIN_CPU
VSS_28 VSS_100 VSS_172 VSS_223 PROC_TRIGIN_CPU 9
AC4 AT29 E40 T5
AC46 VSS_29 VSS_101 AT32 E42 VSS_173 VSS_224 T7
AD1 VSS_30 VSS_102 AT34 E8 VSS_174 VSS_225 U12
AD19 VSS_31 VSS_103 AT45 F41 VSS_175 VSS_226 U15
AD2 VSS_32 VSS_104 AV11 F43 VSS_176 VSS_227 U17
AD22 VSS_33 VSS_105 AV39 F47 VSS_177 VSS_228 U21
AD25 VSS_34 VSS_106 AW10 G44 VSS_178 VSS_229 U24
AD49 VSS_35 VSS_107 AW4 G6 VSS_179 VSS_230 U33
AE12 VSS_36 VSS_108 AW40 H8 VSS_180 VSS_231 U38
AE33 VSS_37 VSS_109 AW46 J10 VSS_181 VSS_232 V20
AE38 VSS_38 VSS_110 B47 J26 VSS_182 VSS_233 V22
AE4 VSS_39 VSS_111 B48 J29 VSS_183 VSS_234 V4
AE46 VSS_40 VSS_112 B49 J4 VSS_184 VSS_235 V46
AF22 VSS_41 VSS_113 BA12 J40 VSS_185 VSS_236 W25
AF25 VSS_42 VSS_114 BA14 J46 VSS_186 VSS_237 W27
AF28 VSS_43 VSS_115 BA44 J47 VSS_187 VSS_238 W28
AG1 VSS_44 VSS_116 BA5 J48 VSS_188 VSS_239 W30
AG22 VSS_45 VSS_117 BA6 J9 VSS_189 VSS_240 Y10
AG23 VSS_46 VSS_118 BB41 K11 VSS_190 VSS_241 Y12
AG25 VSS_47 VSS_119 BB43 K39 VSS_191 VSS_242 Y17
AG27 VSS_48 VSS_120 BB9 M16 VSS_192 VSS_243 Y33
AG28 VSS_49 VSS_121 BC10 M18 VSS_193 VSS_244 Y38
AG30 VSS_50 VSS_122 BC13 M21 VSS_194 VSS_245 Y9
AG49 VSS_51 VSS_123 BC15 VSS_195 VSS_246
AH12 VSS_52 VSS_124 BC19 CANON-LAKE-GP
AH17 VSS_53 VSS_125 BC24
VSS_54 VSS_126 (071.CANNO.0D0U)
AH33 BC26
AH38 VSS_55 VSS_127 BC31
AJ19 VSS_56 VSS_128 BC35
AJ20 VSS_57 VSS_129 BC40
B
AJ25 VSS_58 VSS_130 BC45 B
AJ27 VSS_59 VSS_131 BC8
AJ28 VSS_60 VSS_132 BD43
AJ30 VSS_61 VSS_133 BE44
AJ31 VSS_62 VSS_134 BF1
AK19 VSS_63 VSS_135 BF2
AK20 VSS_64 VSS_136 BF3
AK25 VSS_65 VSS_137 BF48
AK27 VSS_66 VSS_138 BF49
AK28 VSS_67 VSS_139 BG17
AK30 VSS_68 VSS_140 BG2
AK31 VSS_69 VSS_141 BG22
AK4 VSS_70 VSS_142 BG25
AK46 VSS_71 VSS_143 BG28
VSS_72 VSS_144
CANON-LAKE-GP
(071.CANNO.0D0U)

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_(VSS)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 22 of 107
5 4 3 2 1
 5 4 3 2 1

GPP_B14 / SPKR Top Swap Rising edge of The signal has a weak internal Pull-down. GPP_H15 / Reserved Rising edge of External pull-up is required. Recommend 100K if pulled GPP_F23 Display Rising edge of This signal has a weak internal pull-down.
Override PCH_PWROK 0 = Disable “Top Swap” mode. (Default) SML3ALERT# RSMRST# up to 3.3V or 75K if pulled up to 1.8V. Port F PCH_PWROK 0 = Port F is not detected. (Default)
1 = Enable “Top Swap” mode. This inverts an address This strap should sample HIGH. There should NOT be Detected 1 = Port F is detected.
on access to SPI and firmware hub, so the any on-board device driving it to opposite direction
processor believes it fetches the alternate boot during strap sampling.
block instead of the original boot-block. PCH will
invert A16 (default) for cycles going to the upper PCIVAUX power control
two 64-KB blocks in the FWH or the appropriate
Swap Block size soft strap .
Vinafix.com
address lines (A16, A17, or A18) as selected in Top
15 GPP_H_15
GPP_H_15
R2301
1
4K7R2J-2-GP
2
3D3V_SB
GPP_J4 /
CNV_BRI_DT /
XTAL
Frequency
Rising edge of
RSMRST#
This signal has a weak internal pull-down.
0 = 38.4/19.2MHz XTAL frequency selected. (Default)
R2302 4K7R2J-2-GP R2330 20KR2J-L2-GP UART0_RTS# Select 1 = 24MHz XTAL frequency selected.
D D
SPKR 1 2 1 2
20,27 SPKR 3D3V_S0
(R_) (R_)
R2303 10KR2J-3-GP
R2304 20KR2J-L2-GP CNV_BRI_DT 1 2
15 CNV_BRI_DT 1D8V_PCH
1 2
(R_) 20170428
GPP_B23 / Reserved Rising edge of This signal has an internal Pull-down. External pull-up is rename 1D8V_SB to 1D8V_PCH R2305 10KR2J-3-GP
SML1ALERT# / RSMRST# required. 20170504 1 2
PCHHOT# This strap should sample HIGH. There should NOT be change to PU for 24MHz Xtal (R_)
any on-board device driving it to opposite direction 20170724
during strap sampling. R2303 change to 1K by bob yeh
GPP_B18 / No Reboot Rising edge of The signal has a weak internal Pull-down.
GSPI0_MOSI PCH_PWROK 0 = Disable “No Reboot” mode. (Default)
1 = Enable “No Reboot” mode (PCH will disable the 20170410
TCO Timer system reboot feature). This function is change net name form TMIN_SHIFT to TMIN_SHIEF_PCH for Edison's feedback GPP_J6 / Modem Rising edge of An external pull-up or pull-down is required.
useful when running ITP/XDP. add reserved series resistor to solate the net from SIO for Edison's feedback CNV_RGI_DT / Reference RSMRST# 0 = XTAL_IN (Default)
R2306 0R2J-2-GP UART0_TXD Clock 1 = CLKIN_XTAL
1 2 TMIN_SHIFT Source
TMIN_SHIFT 24 Select
R2308 4K7R2J-2-GP (R_)
LPSS_GSPI0_MOSI 1 2
15 LPSS_GSPI0_MOSI 3D3V_S0
(R_) R2307 4K7R2J-2-GP
TMIN_SHIFT_PCH 1 2 R2310 20KR2J-L2-GP
20 TMIN_SHIFT_PCH 3D3V_SB CNV_RGI_DT
R2311 1KR2J-1-GP 1 2
15 CNV_RGI_DT 1D8V_PCH
1 2
(R_) R2309 20KR2J-L2-GP 20170428
1 2 R2312 10KR2J-3-GP rename 1D8V_SB to 1D8V_PCH
(R_) 1 2
(R_)

GPP_C2 / TLS Rising edge of This signal has a weak internal Pull-down.
SMBALERT# Confidentiality RSMRST# 0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default) HDA_SDO / Flash Rising edge of This signal has a weak internal Pull-down.
1 = Enable Intel ME Crypto Transport Layer Security I2S0_TXD Descriptor PCH_PWROK 0 = Enable security measures defined in the Flash GPP_J9 1.8V Rising edge of The signal has a weak internal pull-down
(TLS) cipher suite (with confidentiality). Must be Security Descriptor. (Default) VCCPSPI RSMRST# 0 = VCCPSPI is connected to 3.3V rail
pulled up to support Intel AMT with TLS. Override 1 = Disable Flash Descriptor Security (override). This 1 = VCCPSPI is connected to 1.8V rail
strap should only be asserted high using external
Pull-up in manufacturing/debug environments
ONLY.
R2314 10KR2J-3-GP R2315 20KR2J-L2-GP
C SMBALERT_N 1 2 GPP_J9_CNV_TXD 1 2 C
20 SMBALERT_N 3D3V_SB 15,63 GPP_J9_CNV_TXD
(R_)
ME DISABLE JUMPER
R2316 20KR2J-L2-GP
1 2
(R_)
GPP_H12 / eSPI Flash Rising edge of This signal has a weak internal pull-down. GPD7 Reserved Rising edge of External pull-up is required. Recommend 100K.
SML2ALERT# Sharing RSMRST# 0 = Master Attached Flash Sharing (MAFS) enabled DSW_PWROK This strap should sample HIGH. There should NOT be
Mode (Default) any on-board device driving it to opposite direction
1 = Slave Attached Flash Sharing (SAFS) enabled. during strap sampling
GPP_B22 / Boot BIOS Rising edge of This Signal has a weak internal Pull-down.
GSPI1_MOSI Strap Bit PCH_PWROK This field determines the destination of accesses to the
BBS BIOS memory range. Also controllable using Boot BIOS R2322 20KR2J-L2-GP R2318 1KR2J-1-GP
Destination bit (Bus0, Device31, Function0, offset DCh, GPP_H_12 1 2 GPD7 1 2
bit 6). 15 GPP_H_12 16 GPD7 3D3V_S5
(R_)
Bit 6 Boot BIOS Destination
0 SPI (Default)
1 LPC

GPP_I6 / Display Rising edge of This signal has a weak internal Pull-down. SPI0_IO2 Reserved Rising edge of External pull-up is required. Recommend 100K if pulled
R2319 4K7R2J-2-GP DDPB_CTRLDATA Port B PCH_PWROK 0 = Port B is not detected. (Default) RSMRST# up to 3.3V or 75K if pulled up to 1.8V.
LPSS_GSPI1_MOSI 1 2 Detected 1 = Port B is detected. This strap should sample HIGH. There should NOT be
15 LPSS_GSPI1_MOSI 3D3V_SB any on-board device driving it to opposite direction
(R_)
during strap sampling.
R2320 20KR2J-L2-GP R2324 2K2R2J-2-GP
1 2 HDMI_DATA_CPU 1 2
19,56 HDMI_DATA_CPU 3D3V_S0
(R_) R2313 20KR2J-L2-GP
SPI_WP_PCH 1 2
15,25 SPI_WP_PCH 3D3V_SPI

R2332 4K7R2J-2-GP
GPP_C5 / eSPI or LPC Rising edge of This signal has a weak internal Pull-down. GPP_I8 / Display Rising edge of This signal has a weak internal Pull-down. 1 2
SML0ALERT# RSMRST# 0 = LPC is selected (for EC). (Default) DDPC_CTRLDATA Port C PCH_PWROK 0 = Port C is not detected. (Default) (R_)
1 = eSPI is selected (for EC). Detected 1 = Port C is detected.

R2321 4K7R2J-2-GP R2327 2K2R2J-2-GP

SML0ALERT# 1 2 DDPC_CTRL_DATA 1 2 SPI0_IO3 Reserved Rising edge of External pull-up is required. Recommend 100K if pulled
B 20 SML0ALERT# 3D3V_SB 19 DDPC_CTRL_DATA 3D3V_S0 RSMRST# up to 3.3V or 75K if pulled up to 1.8V. B
(R_) (R_)
This strap should sample HIGH. There should NOT be
R2323 20KR2J-L2-GP any on-board device driving it to opposite direction
during strap sampling.
1 2

GPP_I10 / Display Rising edge of This signal has a weak internal pull-down.
DDPD_CTRLDATA Port D PCH_PWROK 0 = Port D is not detected. (Default) R2317 20KR2J-L2-GP
Detected 1 = Port D is detected. SPI_HOLD_PCH 1 2
15,25 SPI_HOLD_PCH 3D3V_SPI
SPI0_MOSI Reserved Rising edge of External pull-up is required. Recommend 100K if pulled
RSMRST# up to 3.3V or 75K if pulled up to 1.8V. R2329 2K2R2J-2-GP R2331 4K7R2J-2-GP
This strap should sample HIGH. There should NOT be DDPD_CTRL_DATA 1 2 1 2
any on-board device driving it to opposite direction 19 DDPD_CTRL_DATA 3D3V_S0
(R_) (R_)
during strap sampling.

R2325 1KR2J-1-GP
SPI_SI_PCH 1 2
15,25,91,99 SPI_SI_PCH 3D3V_SPI
(R_)

R2326 4K7R2J-2-GP
1 2
(R_)

R2328 4K7R2J-2-GP
SPI_SO_PCH 1 2
15,25,91 SPI_SO_PCH
(R_)

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_(Strap Pin)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 23 of 107
5 4 3 2 1
 5 4 3 2 1

20170406
rename for new PSU design
FAN 26 CPU_FAN_TACH_SIO
20170418
rename for D9 PSU design Circuit to Support pre-Post Diagnostic 20170406
rename the net PLTRST_PCI_N to PLTRST_BUF_PCI_N
26 CPU_FAN_CTRL_SIO Layout Note: place 2200PF near SIO, Layout Note: place 2200PF near SIO, 20170419 rename the net PLTRST_LAN_N to PLTRST_BUF_LAN_N
others near PCH location others near CPU core MOS location rename for new PSU and D9 PSU design
3D3V_S5 3D3V_S0
26 SYS_FAN_TACH_SIO 12V_CPU
26 SYS_FAN_CTRL_SIO 3D3V_S0 0D95V_CPU_VCCIO R2401 22R2J-2-GP
SYS_THERMDA+ CPU_THERMDA+ PCIRST1# 1 2 PLTRST_BUF_PCI_N
PLTRST_BUF_PCI_N 40

1
1

1
20170512 R2403 R2405 R2406 100KR2J-1-GP
add for SSD R2402 30KR2F-GP R2404 30KR2F-GP 1 2
20170524 8K2R2F-1-GP 9K1R2F-1-GP Q2402 (R_) PCIEx16, PCIEx1, PCI bridge
correct the thermal couple circuit Q2401 1 6 MB_REG_PG

2
1 6 R2407 22R2J-2-GP

C
E

2
1

1
C2402 C2404 MB_REG_PG_1 2 5 SP_TXD_N_1 PCIRST2# 1 2 PLTRST_BUF_LAN_N
CLOCK SC2200P50V2KX-2DLGP Q2403 B C2403(R_) Q2409 B C2427(R_) SC2200P50V2KX-2DLGP Q2404 B C2401(R_) PWR2_PRSN_1 2 5 PWR2_PRSN_2
SP_TXD_N
PLTRST_BUF_LAN_N 40
LMBT3904LT1G-GP SC100P50V2JN-3DLGP LMBT3904LT1G-GP SC100P50V2JN-3DLGP LMBT3904LT1G-GP SC100P50V2JN-3DLGP 3 4
19 LPC_CLK_14M_EC 5V_S0

1
PWR2_PRSNT 3 4 R2410 100KR2J-1-GP
19 LPC_CLK_33M_EC

C
E

E
20170410 20170410 R2408 R2409 MMDT3904-2-GP 1 2
18 SUSCLK_SIO

Vinafix.com
change to common part change to common part 680R2F-GP MMDT3904-2-GP 6K8R2F-2-GP (R_) LAN, WALN, SSD, LPC, TPM

SYS_THERMDA- CPU_THERMDA-

2
D LPC 19,68 LPC_AD_PCH_P0
D

19,68 LPC_AD_PCH_P1
19,68 LPC_AD_PCH_P2
VBAT2 20170421 3D3V_SB
19,68 LPC_AD_PCH_P3 change to 10KR2F to follow vendor's feedback
C2405 3D3V_S0
19,68 LPC_FRAME#_PCH SC1U10V2KX-1DLGP 3D3V_S0 3D3V_S0 1V_PCH_SB

1
3D3V_S0

1
R2411

1
1 2 R2415 10KR2F-2-GP
Divide to 0.55V

1
R2413 R2414 2KR2F-3-GP
3D3V_S0 R2412 10KR2F-2-GP 9K1R2F-1-GP Q2406

2
3D3V_SB 30KR2F-GP Q2405 1 6 MB_REG_PG VIN_DET

2
VR_READY 1 6 MB_REG_PG

1
3D3V_S5 C2408 MB_REG_PG_3 2 5 MB_REG_PG_2

2
1

1
C2406 SCD1U16V2KX-3DLGP MEM_REG_PG_2 2 5 MEM_REG_PG_1 C2407 R2416
SCD1U16V2KX-3DLGP 3D3V_S5 MB_REG_PG 3 4 SCD01U50V2KX-1DLGP 2KR2F-3-GP
3D3V_S0

1
1 2 MEM_REG_PG 3 4
1D2V_SM_S3

2
1
V5_ALW_MON R2423 MMDT3904-2-GP R2424

2
MMDT3904-2-GP R2417 7K15R2F-L-GP 33KR2F-GP
9K1R2F-1-GP

104
120
15

22
32
55
60
65
77

21

45

27

2
4
U2401

2
20170508

VBAT
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL

HV3_DUAL

V3_S5
V5_ALW_MON

VCC
change from SUSCLK to SUSCLK_SIO to follow D9 R2478 10KR2J-3-GP
1 2
SMBUS SUSCLK_SIO 19
CLK32 SDAT_1/GP120
78 SMB_DATA_RESUME (R_)
3D3V_SB
LPC_CLK_14M_EC 7 79 SMB_DATA_MAIN
11,12,59,99 SMB_CLK_MAIN LPC_AD_PCH_P0 CLOCKI SDAT/GP121 SMB_CLK_RESUME
8 80 U2405 5V_S5
11,12,59,99 SMB_DATA_MAIN LPC_AD_PCH_P1 9 LAD0 SCLK_1/GP122 81 SMB_CLK_MAIN 5 1
20,92,93,94 SMB_DATA_RESUME LPC_AD_PCH_P2 LAD1 SCLK/GP123 3D3V_SB VCC IN_B H_SKTOCC_CPU 4
10
20,92,93,94 SMB_CLK_RESUME LPC_AD_PCH_P3 LAD2 PWR2_PRSN_2
LPC I/F 11 2

LPC Interface

Miscellaneous
LPC_FRAME#_PCH 12 LAD3 IN_A
20 SMLICLK_PCH PLTRST#_SIO LFRAME#
14 4 3 R2419 10KR2J-3-GP
20 SMLIDATA_PCH 15 PLTRST#_SIO LPC_CLK_33M_EC LRESET# 15 H_SKTOCC_N OUT_Y GND SUS_ACK_EN_N
16 1 2
LPC_SERIRQ_PCH 127 PCICLK 87 TC7SZ32FU-2-GP
R2420LPC_PME_N LPC_PME_N 75 SER_IRQ GP105 3D3V_SB
OTHERS PCH_SLP_A_N 15
1 2 IO_SMI_N 126 GP041/IO_PME#
SLP_M#/GP071/IO_SMI# GP107
89
(R_)
R2421 10KR2J-3-GP
20170406 0R0402-PAD-2-GP 13 LPC_PME_N 1 2
4,44 PROCHOT#_CPU_R remove net SIO_SMBCLK1 GP117 PCIAUX_GATE
92
19 KBRST_N remove net SIO_SMBDAT1 GP125 93 R2477 0R2J-2-GP
20170421 SIO_SMBCLK1 70 GP126 94 SUS_ACK_EN_N 1 2 R2425 10KR2J-3-GP
19,68 LPC_SERIRQ_PCH add back to follow vendor's feedback SIO_SMBDAT1 GP036/SMB_CLK1 SUS_ACK_EN#/GP127 SUS_ACK_EN_N 38 SIO_SMBCLK1
72 95 1 2

SMB
SMLIDATA_PCH R2422 1 2 0R0402-PAD-2-GP SIO_SMBDAT2 25 GP040/SMB_DAT1 BACKFEED_CUT#/GP116 20170421 20170406
SMLICLK_PCH R2426 1 2 0R0402-PAD-2-GP SIO_SMBCLK2 26 SMBDAT2/GP010 add TXD, RXT @ LPC connector for BIOS debug remove net SIO_SMBCLK1
SMBCLK2/GP011 96 SP_DCD_N remove net SIO_SMBDAT1 R2427 10KR2J-3-GP
GPIO 20,99 PCH_SLP_A_N
V_CPU_ST_PLL DCD1#/GP043
DSR1#/GP044
97 SP_DSR_N 20170421
add back to follow vendor's feedback
SIO_SMBDAT1 1 2
SIO_PECI_REQ_N 20 98 SP_RXD_N
20 SIO_PECI_REQ_N H_CPURST#/GP005/PECI_REQUEST# RXD1/GP045 SP_RTS_N SP_RXD_N 68

Serial Port 1
29 99
PECI_CPU R2428 1 2 43D2R2F-GP PECI_EC 30 PECI_VREF RTS1#/GP046 100 SP_TXD_SIO R2431 4K7R2J-2-GP
PECI/LVSMB_CLK1 5V_PRSNT/GP047/TXD1 SP_TXD_SIO 68
1

C2411 R2430 1 2 10KR2J-3-GP PECI_READY 31 101 SP_CTS_N TMIN_SHIFT 1 2

CEC

PECI
C
V_CPU_ST_PLL PECI_READY/LVSMB_DAT1 CTS1#/GP050 SP_DTR_N C
SC4D7U6D3V3KX-DLGP 102 C2409 SCD1U16V2KX-3DLGP
DTR1#/GP051 103 SP_RI_N 1 2
3D3V_SB
2

RI1#/GP052
Power Manager 20170410
change to 4D7U for Edison's feedback
When 3P3V_SB ready,
RSMRST asserted
PCIRST1#
PCIRST2#
SIO_PS_ON_N
51
52
53
PCI_RST_1#/GP026
PCI_RST_2#/GP027
SP_TXD_SIO R2429 1 2 160R2F-GP SP_TXD_N PCH_SYSPWROK U2402
(R_)
PCIAUX_GATE
R2432
1
10KR2J-3-GP
2

PCH_PWROK_EC 43 SIO_PS_ON_N EC_PWRGD_3V PS_ON#/GP030 SLP_S0_PLT_N

26 PCH_SIO_DPWROK R2433 1 2 33R2J-2-GP 57 106
3D3V_SB
1 6
RSMRST_SIO_N 2 0R0402-PAD-2-GP RSMRST_SIO_N_1 PWR_GOOD_3V/GP033 GP054 B C SLP_S0_PLT_N 20,40,91
R2434 1 58 2 5 R2436 1KR2J-1-GP
67 RSMRST# PWR2_PRSNT PWRGD_PS GND VCC PCH_SYSPWROK_EXTD1 SMB_DATA_RESUME 1

Glue Logic
R2435 108 3 4 2
1 2 PWRGD_PS 123 LATCHED_BF_CUT/GP035 PWR2_PRSNT/GP056 109 MB_REG_PG A Y
3D3V_S0 PWRGD_PS MB_REG_PG/GP057

Diagnostic
10KR2J-3-GP
111 MEM_REG_PG 74AUP1G97GW-GP R2437 1KR2J-1-GP
20,63,99 RSMRST_SIO_N MEM_REG_PG/GP061 SMB_CLK_RESUME 1 2
(R_)
SLP_S3_N 121 20170411 C2410 SCD1U16V2KX-3DLGP
D

20,24,99 PCH_SYSPWROK 20,40,42,43,50,99 SLP_S3_N SLP_S4_N 69 SLP_S3# reserve CEC control 1 2

DPWROK pull up when
8,20,32,38,39,40,99 SLP_S4_N SLP_S4# 3D3V_S5
122 113 KCLK (R_)
Q2407
V3_Dual pull out to 50% PCH_SIO_DPWROK 28 SLP_S5#/GP066 KCLK 114 KDAT U2403 3D3V_SB
2N7002K-2-GP DPWROK/GP013 KDAT 115 MCLK RN2401
23 TMIN_SHIFT SUS_WARNB SUS_WARNB_R MCLK
R2438 1 2 0R0402-PAD-2-GP 68 116 MDAT 1 5 MDAT 1 8

Deep Sleep Logic

SLP_SUSB 71 SUS_WARN#/GP004 MDAT 118 KBRST_N PCH_SYSPWROK_EXTD1 2 NC#1 VCC MCLK 2 7
40 VR_READY SLP_SUS# GP063/KBDRST# A PCH_SYSPWROK_EXTD2
C2412 2 1 SC1U10V2KX-1DLGP 74 119 A20GATE 3 4 KDAT 3 6
20 SUS_WARNB SUS3V_ON#/GP076 GP064/A20M GND Y
56 4 5

Keyboard/
(R_) KCLK
G

73 SUS3V_FON#/GP032

Mouse
20,42,51 SLP_SUSB SUS5V_ON#/GP075 SN74LVC1G14DCKR-1-GP SRN8K2J-4-GP
VCTRL_VCC_EN 37 CPU_FAN_TACH_SIO 20170421
42,43 PSPWRGD TACH1/GP017 (R_) 20170413
38 SYS_FAN_TACH_SIO remove SYS FAN change from 73.01G14.GHG to 73.01G14.IHG
TACH2/GP020 39 SYS_FAN2_TACH_SIO 20170426 U2404
42 VCTRL_VCC_EN TACH3/GP021 reserve SYS FAN PCH_SYSPWROK_EXTD3 PCH_SYSPWROK
1 6 20170524
change to RN for layout's request

Miscellaneous
47 CPU_FAN_CTRL_SIO PCH_SYSPWROK_EXTD1 2 5 PCH_SYSPWROK_EXTD2
GP022/PWM1 48 SYS_FAN_CTRL_SIO
GP023/PWM2 49 3 4
THERM_THRESH/GP024/PWM3 2 SIO_GREEN 3D3V_S0
GP000/PWM4 2N7002KDW-1-GP RN2402

HWM Interface
46 VIN_DET SP_RTS_N 1 8
V_IN (R_)
SIO_YELLOW 23 SP_RXD_N 2 7
SIO_GREEN 24 YELLOW#/GP006 41 CPU_THERMDA+ SP_DSR_N 3 6
R2446 1 2 330KR2F-L-GP TMIN_SHIFT 33 GREEN#/GP007 REMOTE1+ 42 CPU_THERMDA- R2439 0R0402-PAD-2-GP SP_DCD_N 4 5
PWRBTN_N 34 TMIN_SHIFT/GP014 REMOTE1- 43 SYS_THERMDA+ PCH_PWROK_EC 1 2 PCH_SYSPWROK
FP_CBL_DET_PD PWRBTN#/GP015 REMOTE2A+/REMOTE2B- SYS_THERMDA- PCH_SYSPWROK 20,24,99
R2448 1 2 10KR2J-3-GP 50 44 SRN8K2J-4-GP
PECI 4 PECI_CPU
R2449 1 2 10KR2J-3-GP PC_SPKR_DET_PD 54 FP_CBL_DET#/GP025
PC_SPKR_DET/GP031
REMOTE2A-/REMOTE2B+
76 36 PROCHOT#_EC

1
R2450 1 2 1KR2J-1-GP TRST_N 124 GP042 PROCHOT_IN#/PROCHOT_OUT#/GP016
TRST#

1
R2452 1 2 10KR2J-3-GP SIO_SPKR 125 C2413 R2442
3D3V_SB SPEAKER/DIAG_EN#/GP070
(R_) SC100P50V2JN-3DLGP 20KR2J-L2-GP
LED
1

NC#105
NC#107
NC#110
NC#112
NC#61
NC#62
NC#63
NC#64
NC#84
NC#85
NC#91

2
HVSS

AVSS
CAP1
NC#5
NC#6

R2453

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2
64 SIO_YELLOW
PU : Disable Pre-Post Diagnostic 10KR2J-3-GP
64 SIO_GREEN
PD : Enable Pre-Post Diagnostic SCH5553-NU-GP RN2403
2

5
6
61
62
63
64
84
85
91
105
107
110
112

128

1
3
17
35
59
66
82
83
86
88
90
117

40

18
(071.05553.000E) SP_RI_N 1 8
B SP_DTR_N 2 7 B
SP_CTS_N 3 6
Power Botton/Reset CAP_1 4 5

SRN8K2J-4-GP
20,64,99 PWRBTN_N
CRB
1

C2414
SC4D7U6D3V3KX-DLGP

PROCHOT design
2

KBMS
20170417 R2458 3D3V_S0
remove U6, C130, C131, PROCHOT#_BUFF_EC 75R2J-1-GP R2459 1KR2J-1-GP
SMB_DATA_MAIN 1 2
PROCHOT#_EC 1 2 PROCHOT#_CPU_R

1
R2461 1KR2J-1-GP
R2460 SMB_CLK_MAIN 1 2
100KR2F-L1-GP
SCH5555(S) SCH5553(T) (R_)
R2462 10KR2J-3-GP

2
Pin 3 GP001 VSS SYS_FAN2_TACH_SIO 1 2

Pin 5 GP002 NC
20170421 R2476 10KR2J-3-GP
Pin 6 GP003 NC remove SYS FAN SYS_FAN_TACH_SIO 1 2
20170426
reserve SYS FAN
Pin 61 GP111 NC 20170508
add PU resisitor back R2463 10KR2J-3-GP
KBRST_N 1 2
Pin 62 GP112 NC
Pin 63 GP113 NC
12V_S5 12V_S5 5V_S5 R2464 10KR2J-3-GP
Pin 64 GP114 NC A20GATE 1 2
1

Pin 82 DDC_DAT_5V VSS 3D3V_S5

GP100 R2466 R2467 R2468
Place 10uF cap on V_3P3_A path R2465 30KR2F-GP
DDC_DAT_2P5V 20KR2F-L-GP 100KR2J-1-GP 16KR2F-GP PWR2_PRSNT 1 2
Pin 83 VSS
GP101
1

1
Pin 84 DDC_CLK_5V NC
2

GP102 Q2408 C2415 C2416 C2417 C2418 C2419 C2420 C2421 C2422 C2423 C2424 R2469 30KR2F-GP
Pin 85 DDC_CLK_2P5V NC 1 6 V5_ALW_MON_1 (R_) MB_REG_PG 1 2
2

2
GP103
Pin 86 GP104 VSS V5_ALW_MON_2 2 5 SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SC10U6D3V3MX-DL-GP
1

R2470 30KR2F-GP
1

MEM_REG_PG
SCD1U16V2KX-3DLGP

Pin 88 GP106 VSS 3 4 R2472 C2426 1 2

1

6K8R2F-2-GP SCD01U50V2KX-1DLGP
1

Pin 91 PCIAUX_CTRL# NC C2425 R2471 MMDT3904-2-GP

2

GP124 1K65R2F-GP V5_ALW_MON R2473 30KR2F-GP

2

PCIAUX_GATE SP_TXD_N 1 2
Pin 92 GP125 Place these 0.1uF de-coupling caps on pin 22, 32, 45, 55, 60, 65, 77, 104,and 120
2

GP125
2

A A
Pin 105 GP053 NC
R2474 47KR2J-2-GP
GP055 RSMRST_SIO_N 1 2
Pin 107 NC The divider must give a voltage above 1.37V while V_5P0_A in the system is valid.
If V_5P0_A begins to fall unexpectedly, the V5_ALW_MON voltage must be below 1.11V
Pin 110 GP060 NC before V_3P3_A or SB3V become invalid to PCH R2475 100KR2J-1-GP
PCH_SIO_DPWROK 1 2
Pin 112 GP062 NC

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SMSC 5555/5553
Size Document Number Rev
D Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 24 of 107
5 4 3 2 1
 5 4 3 2 1

20170406
change to single 32MB SPI ROM

Vinafix.com 3D3V_SPI 3D3V_SPI

20170419 3D3V_SPI

1
D add for Edison's feedback D

1
R2501 C2501 20170419
SPI ROM

1
1KR2J-1-GP SC1U10V2KX-1DLGP add for Edison's feedback
(R_) R2502

2
U2501 1KR2J-1-GP

2
SPI_CS_PCH_N0 (R_)
15 SPI_CS_PCH_N0
RN2501 1 8 RN2502

2
SPI_SO_PCH 1 4 SPI_SO_ROM1 2 CS# VCC 7 SPI_HOLD_ROM1 1 8 SPI_HOLD_PCH
15,23,91 SPI_SO_PCH SPI_WP_PCH 2 3 SPI_WP_ROM1 3 SO/SIO1 SIO3 6 SPI_CLK_ROM1 2 7 SPI_CLK_PCH SPI_HOLD_PCH 15,23
15,23 SPI_WP_PCH SIO2 SCLK SPI_SI_ROM1 SPI_SI_PCH SPI_CLK_PCH 15,91
4 5 3 6
GND SI/SIO0 SPI_SI_PCH 15,23,91,99
SRN33J-5-GP-U 4 5

MX25L25673GM2I-08G-GP SRN33J-7-GP-U
(R_)

SSKT1
1 8
2 7
3
4
6
5
V3P3A_V1P8A_PCH_SPI
SKT-91960-0084L-GP
(R_62.10089.001) 3D3V_SB R2503 1 2 0R0603-PAD-2-GP-U 3D3V_SPI

SPI Socket
U2502
7 2
8 CS# VCC 1
9 SO/SIO1 SIO3 16
10 SIO2 SCLK 15
GND SI/SIO0
4
NC#4 5
NC#5 6
C C
NC#6 11
3 NC#11 12
20170515 RESET# NC#12 13
add 16 pin SPI ROM colay NC#13 14
NC#14

MX25L25673GMI-10G-GP

SSKT2
SPI_CLK_ROM1 16 1

SPI_SI_ROM1 15 2
14 3
13 4
12 5
11 6
10 7 SPI_CS_PCH_N0
9 8 SPI_SO_ROM1

SKT-SPI16P-7-GP
(X_)

B B

R2504 2 1 1K5R2F-2-GP 3D3V_S5

VCCRTC
R2505 1 2 45K3R2F-L-GP
TP2501 TP2502
VBAT1_R
1

R2506 1 2 1KR2J-1-GP VBAT1_L

VBAT1
A
1

1
+

BAT2501 BT2501 D2501 D2502 20170417-2

BATTERY CR2032 BAT-20-00950-1A01-A-GP-U RB551V30-GP BAT54C-12-GP change back to common part
(23.21012.001)
2

3P0V_BAT_VREG
3

VBAT2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Flash&RTC
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 25 of 107
5 4 3 2 1
CPU FAN CONTROL 12V_CPU

1
R2601
4K7R2J-2-GP
3D3V_S0 20170410
change to common part

2
Reverse V : 20 V

Vinafix.com Forward V : 0.47V at 0.5A

Forward Curr. : 500mA
CPU_FAN_TACH_1 R2602 1 2 20KR2J-L2-GP CPU_FAN_TACH_SIO
CPU_FAN_TACH_SIO 24

K
1

1
Source : 83.R5003.T8F
D2601 12V_CPU FANC1
R2603 RB551V30-GP 1 R2604
2K2R2J-2-GP 8K2R2F-1-GP
2

2
A
3 NP1
CPU_FAN_CTRL_SIO R2605 1 2 100R2F-L1-GP-U CPU_FAN_CTRL_CONN 4
24 CPU_FAN_CTRL_SIO
BAOT-CON4-S5-GP
PWM:21-28KHz (021.60293.0104)

SYS FAN CONTROL 12V_S0

1
20170421
remove SYS FAN
20170426 R2615 (R_)
reserve SYS FAN 3D3V_S0 20170410 4K7R2J-2-GP
change to common part

2
Reverse V : 20 V
Forward V : 0.47V at 0.5A SYS_FAN_TACH_1 R2618 1 2 20KR2J-L2-GP SYS_FAN_TACH_SIO
Forward Curr. : 500mA SYS_FAN_TACH_SIO 24

K
1

1
Source : 83.R5003.T8F
(R_)
D2602 12V_S0 FANS1 R2617
(R_) R2616 RB551V30-GP 1 8K2R2F-1-GP
2K2R2J-2-GP (R_) (R_)
2

2
A
3 NP1
SYS_FAN_CTRL_SIO R2614 1 2 100R2F-L1-GP-U SYS_FAN_CTRL_CONN 4
24 SYS_FAN_CTRL_SIO
(R_)
PWM:21-28KHz FOX-CON4-S19-GP
(R_)

Thermal sensor G709

20170413
change thermal shut down solution

U2601 3D3V_S5

TH_SET 1 5
2 SET VCC 3D3V_S5
GND
1

3 4 R2612 1 2 0R2J-2-GP
R2611 OUT# HYST

1
9K53R2F-GP
(R_) G709T1UF-GP R2613
(R_) 10K5R2F-GP 3D3V_S5
2

(R_) U2602
1 5
24 PCH_SIO_DPWROK

2
A VCC
TS_CRIT# 2
B
3 4 PCH_DPWROK 20
GND Y
SNLVC1G08DCKRG4-GP
(R_) R2619 100KR2J-1-GP
Modify circuit for thermal shutdown issue 1 2
(R_)

20170524
recall the symbol of the screw holes

HS2601 HS2602 HS2603 HS2604 HS2605 GEN315R158-8-F-C-S-GP-U

HS2606 HS2607 HS2608
GEN315R158-8-F-C-S-GP-U GEN315R158-8-F-C-S-GP-U GEN315R158-8-F-C-S-GP-U GEN315R158-8-F-C-S-GP-U GEN315R158-8-F-C-S-GP-U GEN315R158-8-F-C-S-GP-U GEN315R158-8-F-C-S-GP-U
5

4
6 3 6 3 6 3 6 3 6 3 6 3 6 3 6 3

7 2 7 2 7 2 7 2 7 2 7 2 7 2 7 2
8

M2601 LBL2601 LBL2602

PCB2601 LABEL LABEL
MAIN PCB (40.3EQ13.011) (45.3E702.001)
(348.0A202.001C)

MYLAR LAN ID : LAN ID :

F80F4105EB9A F80F4105EB9A
348.0A202.001C GLOBALB (R_)
348.0A203.001C VICTORY
348.0A204.001C GECS Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Thermal&FAN
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 26 of 107
 AGND
HP_OUT_R
HP_OUT_R 29
HP_OUT_L
HP_OUT_L 29

1
C2701
SC2D2U10V3KX-1DLGP-U AUD_LINE1_L
AUD_LINE1_L 30

2
AUD_LINE1_R
AUD_LINE1_R 30

1
C2702
SC2D2U10V3KX-1DLGP-U AUD_VREF

CPVEE
AGND

CBN
2

1
C2703
SC10U25V5KX-DL-GP 5V_AUD_S5

Vinafix.com AGND

CBP

2
D2701 3D3V_AUD_S0
1 2

1
AGND C2704 C2705
AZ5125-01H-R7G-GP SCD1U16V2KX-3DLGP SC10U25V5KX-DL-GP

36

35

34

33

32

31

30

29

28

27

26

25
1

1
5V_AUD_S5 (083.PJSD5.00A0) C2706 C2707 U2701

2
L2701 SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP

AVSS2

HP1-OUT-L_PORT-H-L

CENTER_PORT-G-L

LINE1-L_PORT-C-L

AVSS1
CBN

HP1-OUT-R_PORT-H-R

LFE_PORT-G-R

LINE1-R_PORT-C-R

VREF
CBP

CPVEE
1 2
5V_S5

2
MHC1608S800QBP-GP
1

20170419 C2710 AGND

remove Audio CEC circuit 37 24 SC10U25V5KX-DL-GP
HPVDD AVDD
1

1
R2701 C2708 C2709 AGND
10KR2J-3-GP SCD1U16V2KX-3DLGP SC10U25V5KX-DL-GP 38 23 ALDO_CAP 1 2
AGND CPVREF ALDO-CAP AGND
2

2
39 22
30 AUDOUT_R HP2-OUT-R_PORT-I-R FRONT-L_PORT-D-L 20170412
40 21 remove internal speaker amp
30 AUDOUT_L HP2-OUT-L_PORT-I-L FRONT-R_PORT-D-R
AGND AGND AGND
41 20 AUD_MIC2_R
FRONT-JD/CLFE-JD MIC2-R_PORT-F-R AUD_MIC2_R 29
42 19 AUD_MIC2_L
LINE2-JD/SURR-JD MIC2-L_PORT-F-L AUD_MIC2_L 29
LINE1_JD/LINE2_JD 43 18
LINE1-JD/HP1-OUT-JD SURR-R_PORT-A-R
Analog MIC1_JD/FRONT_JD 44 17

MIC1-VREFO-R/LINE1-VREFO
20170412 MIC1-JD/HP2-OUT-JD SURR-L_PORT-A-L
remove internal speaker amp EAPD 45 16 AUD_MIC1_R
20170418 EAPD/GPIO2 MIC1-R_PORT-B-R AUD_MIC1_R 30
add net EAPD back to control de-pop circuit
Digital 46
SPDIF-OUT MIC1-L_PORT-B-L
15 AUD_MIC1_L
AUD_MIC1_L 30
DLDO_CAP 47 14 AUD_LINE2_R
DLDO-CAP LINE2-R_PORT-E-R AUD_LINE2_R 29

MIC1-VREFO-L

LINE2-VREFO
1

MIC2-VREFO
C2711 C2712 48 13 AUD_LINE2_L

SDATA-OUT
DVDD LINE2-L_PORT-E-L AUD_LINE2_L 29
20170419 SC10U25V5KX-DL-GP SCD1U16V2KX-3DLGP

SDATA-IN

DVDD-IO

PCBEEP
RESET#
remove Audio CEC circuit

SYNC
DVSS

BCLK
3D3V_S0 3D3V_AUD_S0

1
L2702
2 ALC3820-CG-GP
20170418
due to remove the AMP function
Analog

10

11

12
MHC1608S800QBP-GP remove Q13, R270 change back to Gambit design
1

1
C2713 C2714 net name DE_POP change to MIC1_VREFO_RR
SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP
LINE2_VREFO
Digital
LINE2_VREFO 29
2

2
HDA_BITCLK_CODEC MIC2_VREFO
20 HDA_BITCLK_CODEC MIC1_VREFO_RR MIC2_VREFO 29
MIC1_VREFO_RR 30

1
3D3V_SB C2715 MIC1_VREFO_LL
MIC1_VREFO_LL 30
L2703 SC22P50V2JN-4DLGP
1 2

2
MHC1608S800QBP-GP AUD_BEEP C2716 1 2 SCD1U16V2KX-3DLGP R2702 1 2 47KR2J-2-GP
SPKR 20,23
(R_)

1
HDA_SDOUT_CODEC HDA_RST#_CODEC
20 HDA_SDOUT_CODEC HDA_RST#_CODEC 20
20170419

1
add power option for vendor's feedback R2703 1 2 33R2J-2-GP HDA_SDIN0_CODEC HDA_SYNC_CODEC C2717 R2704
20 HDA_SDIN0_PCH HDA_SYNC_CODEC 20
SCD1U16V2KX-3DLGP 4K7R2J-2-GP
3D3V_AUD_S0

2
1
C2718
SCD1U16V2KX-3DLGP

2
AUD_BEEP_R 20170413
remove internal speaker amp
remove off-page arrow

20170419
remove Audio CEC circuit

R2705 1 2 0R0603-PAD-2-GP-U C2719 1 2 SCD1U50V3KX-DL-GP

3D3V_S0 3D3V_S0 (R_)

1
AGND
R2706 R2707 AGND
100KR2F-L1-GP 100KR2F-L1-GP
R2708 1 2 0R0603-PAD-2-GP-U C2720 1 2 SCD1U50V3KX-DL-GP
(R_)

2
MIC1_JD/FRONT_JD LINE1_JD/LINE2_JD

AGND
1

1
AGND
R2709 R2710 R2711 R2712
100KR2F-L1-GP 200KR2F-L-GP 100KR2F-L1-GP 200KR2F-L-GP R2713 1 2 0R0603-PAD-2-GP-U
2

2
MIC1_JD LINE2_JD
30 MIC1_JD FRONT_JD LINE1_JD LINE2_JD 29
30 FRONT_JD AGND
LINE1_JD 30

Layout: Near Codec Layout: separately place round AGND

3D3V_S5

1
C2721
SCD1U16V2KX-3DLGP
(R_)

2
R2714 1 2 220KR2F-GP
3D3V_S0 (R_)

E
1

R2715 1 2 0R2J-2-GP R2716 1 2 10KR2J-3-GP Q85_B B Q2701

R2717 (R_) (R_) LMBT3906LT1G-1-GP
10KR2J-3-GP Q84_E Q84_E2 (R_)

C
(R_)

Digital
E
2

MUTE 29,30

1
C2722
Q84_B B Q2702 SC22U6D3V5MX-2DLGP
LMBT3906LT1G-1-GP (R_)
E

2
(R_)
Analog
C

HDA_RST#_CODEC R2718 1 2 1KR2J-1-GP B Q2703

(R_) LMBT3906LT1G-1-GP
20170418 Q82_B (R_)
C

HDA LINK core power is 3.3V

do not need leve shieft
E

EAPD R2719 1 2 1KR2J-1-GP Q83_B B Q2704

(R_) LMBT3906LT1G-1-GP Wistron Corporation
(R_) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
C

Taipei Hsien 221, Taiwan, R.O.C.

Title
Audio Codec_(ALC3820)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 27 of 107
 Vinafix.com
20170412
remove internal speaker amp

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
AMP (ALC1003)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 28 of 107
 Vinafix.com

Front Audio Port

27 LINE2_VREFO R2901 1 2 2K2R2J-2-GP

C2901 SC10U25V5KX-DL-GP HPMIC1

AUD_LINE2_L 1 2 AUD_MIC2_L_C R2902 1 2 1KR2J-1-GP PF_MIC2_LL 1
FL2901 2 MCB1005S121FBP-GP FP_MIC2_L 4
27 AUD_LINE2_L
3
C2902 SC10U25V5KX-L-GP FP_OUT_R 2

1
AUD_LINE2_R 1 2 C2903 FP_OUT_L 1
27 AUD_LINE2_R
D2901 (R_) SC100P50V2JN-3DLGP
20170410 5

2
change to common part 3 LINEIN_R R2903 1 2 LINE2_JD 6
4K7R2J-2-GP 27 LINE2_JD

27 MIC2_VREFO 1 AGND G1
G2
2 LINEIN_L R2904 1 2
4K7R2J-2-GP AUDIO-JK631-GP

LBAT54ALT1G-1-GP AGND

AUD_MIC2_R C2904 1 2 SC4D7U25V5KX-DL-GP

27 AUD_MIC2_R
AUD_MIC2_L C2905 1 2 SC4D7U25V5KX-DL-GP
27 AUD_MIC2_L

HP_OUT_R R2905 1 2 10R2F-L-GP FP_OUT_RR 1

FL2902 2 MCB1005S121FBP-GP
27 HP_OUT_R

HP_OUT_L R2906 1 2 10R2F-L-GP FP_OUT_LL 1

FL2903 2 MCB1005S121FBP-GP
27 HP_OUT_L
1

1
Q2901 C2907 C2906
1 6 R2907 R2909 SC100P50V2JN-3DLGP SC100P50V2JN-3DLGP
AGND
22KR2J-GP 22KR2J-GP

2
R2908 1 2 1KR2J-1-GP MUTE_FP_OUT_LL 2 5
2

27,30 MUTE (R_)

3 4 AGND
20170410 MMDT3904-2-GP AGND AGND
change to common part (R_)

R2910 1 2 1KR2J-1-GP MUTE_FP_OUTR_RR

(R_)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Audio IO_(Front)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 29 of 107
 5 4 3 2 1

Vinafix.com
D D

C3001 SC10U25V5KX-DL-GP
Rear Audio Port
AUD_LINE1_L 1 2 LINE1_LL_C R3001 1 2 75R2F-2-GP LINE1_LL 1
L3001 2 MCB1005S121FBP-GP RP_LINE1_L
27 AUD_LINE1_L
AUD1
C3002 SC10U25V5KX-DL-GP RP_LINE1_L 32
AUD_LINE1_R 1 2 LINE1_RR_C R3002 1 2 75R2F-2-GP LINE1_RR 1
L3002 2 MCB1005S121FBP-GP RP_LINE1_R LINE1_JD 33
27 AUD_LINE1_R 27 LINE1_JD
34
BLUE

1
RP_LINE1_R 35
C C

1
R3004 R3003 C3003 C3004 RP_AUDOUT_L 22
22KR2J-GP 22KR2J-GP SC100P50V2JN-3DLGP SC100P50V2JN-3DLGP FRONT_JD 23
Line in
27 FRONT_JD 24
LIME

2
RP_AUDOUT_R 25
Line Out
AGND AGND RP_MIC1_L 2
MIC1_JD 3
Mic in
AUDOUT_L AUDOUT_LL RP_AUDOUT_L
27 MIC1_JD
RP_MIC1_R
4 PINK
27 AUDOUT_L R3005 1 2 75R2F-2-GP L30031 2 MCB1005S121FBP-GP 5
1

AUDOUT_R R3006 1 2 75R2F-2-GP AUDOUT_RR L30041 2 MCB1005S121FBP-GP RP_AUDOUT_R

27 AUDOUT_R
G1

1
Q3001 G2
1 6 G3
AGND

1
R3009 R3007 C3005 C3006 G4
R3008 1 2 1KR2J-1-GP MUTE_AUDOUT_RR 2 5 22KR2J-GP 22KR2J-GP SC100P50V2JN-3DLGP SC100P50V2JN-3DLGP
27,29 MUTE (R_) NP1
2

2
3 4 AGND
20170410
change to common part MMDT3904-2-GP AGND AUDIO-JK187-GP
(R_) AGND (22.10088.J41)
AGND
R3010 1 2 1KR2J-1-GP MUTE_AUDOUT_LL
(R_)

MIC1_VREFO_LL R3011 1 2 2K2R2J-2-GP

27 MIC1_VREFO_LL
20170418
due to remove the AMP function
remove D8 change back to Gambit design by vendor feedback
MIC1_VREFO_RR R3012 1 2 2K2R2J-2-GP
27 MIC1_VREFO_RR

C3007 SC10U25V5KX-DL-GP
AUD_MIC1_L 1 2 MIC1_LL_C R3013 1 2 75R2F-2-GP MIC1_LL L30051 2 MCB1005S121FBP-GP RP_MIC1_L
27 AUD_MIC1_L C3008 SC10U25V5KX-DL-GP
B AUD_MIC1_R MIC1_RR_C MIC1_RR RP_MIC1_R B
1 2 R3014 1 2 75R2F-2-GP L30061 2 MCB1005S121FBP-GP
27 AUD_MIC1_R
1

1
C3009 C3010
R3015 R3016 SC100P50V2JN-3DLGP SC100P50V2JN-3DLGP
22KR2J-GP 22KR2J-GP
2

2
2

AGND AGND

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Audio IO_(Rear)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 30 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com 1D05V_LAN

LAN_XTALO
D D
LAN_XTALI

LINK_ACTIVITY_N LINK_ACTIVITY_N 1
LINK_ACTIVITY_N 32 TP3101 TPAD30
SPEED_100_N SPEED_100_N 1
LAN_RSET SPEED_100_N 32 TP3102 TPAD30
R3101 1 2 2K49R2F-GP
SPEED_1000_N SPEED_1000_N 1
SPEED_1000_N 32 TP3103 TPAD30
Near pin31

3D3V_LAN

1D05V_LAN

1
C3101 C3102

32
31
30
29
28
27
26
25

1
SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP U3101 3D3V_LAN C3103 C3104
Near pin32 SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP

AVDD33

AVDD10
CKXTAL2
CKXTAL1
LED0

LED2
RSET

LED1/GPO
2

2
33 Near pin23 Near pin24 (R_)

2
GND

1
C3105
SCD1U16V2KX-3DLGP
(R_)

2
LAN_MDI0_DP 1 24
32 LAN_MDI0_DP LAN_MDI0_DN MDIP0 REGOUT
2 23
32 LAN_MDI0_DN 3 MDIN0 VDDREG 22
1D05V_LAN LAN_MDI1_DP AVDD10 DVDD10 PCH_WAKE_N 1D05V_LAN
4 21
32 LAN_MDI1_DP LAN_MDI1_DN MDIP1 LANWAKE# RTL_ISOLATE_N PCH_WAKE_N 20,62,63,93,94,95
5 20
32 LAN_MDI1_DN
1

1
C3106 C3107 C3108 LAN_MDI2_DP 6 MDIN1 ISOLATE# 19 PLTRST_LAN_N
32 LAN_MDI2_DP LAN_MDI2_DN MDIP2 PERST# PCIE_RX_CON_N5 PLTRST_LAN_N 40,62,63,68,91
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP 7 18
32 LAN_MDI2_DN 8 MDIN2 HSON 17 PCIE_RX_CON_P5
Near pin3 Near pin8 Near pin30
2

2
AVDD10 HSOP

REFCLK_N
REFCLK_P
CLKREQ#
AVDD33
MDIN3
MDIP3
C3109 1 2 SCD1U16V2KX-3DLGP PCIE_RX_PCH_N5

HSIN
HSIP
C3110 1 2 SCD1U16V2KX-3DLGP PCIE_RX_PCH_P5 PCIE_RX_PCH_N5 16
PCIE_RX_PCH_P5 16
RTL8111G-CGT-1-GP-U2

9
10
11
12
13
14
15
16
C 1D05V_LAN (071.8111H.0003) C
1

C3111 C3112
SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP
Near pin22 Near pin22 LAN_MDI3_DP PEG_CLK2_PCH#
32 LAN_MDI3_DP
2

LAN_MDI3_DN PEG_CLK2_PCH PEG_CLK2_PCH# 18

32 LAN_MDI3_DN PEG_CLK2_PCH 18
3D3V_LAN

1
C3113 C3114
SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP PCIE_TX_CON_N5 C3115 1 2 SCD1U16V2KX-3DLGP PCIE_TX_PCH_N5
PCIE_TX_PCH_N5 16
Near pin11 PCIE_TX_CON_P5 C3116 1 2 SCD1U16V2KX-3DLGP PCIE_TX_PCH_P5
PCIE_TX_PCH_P5 16

2
R3102 0R0402-PAD-2-GP
LANCLK_REQ_U_N 1 2 PEG_CLKREQ2_PCH#
PEG_CLKREQ2_PCH# 18

CEC
3D3V_S0
LAN power control

1
3D3V_SB 3D3V_LAN R3103
R3105 0R0603-PAD-2-GP-U 1KR2F-3-GP
1 2

2
RTL_ISOLATE_N

1
C3117

1
SC10U6D3V3MX-DL-GP
Near pin23 R3106

2
20170411 15KR2F-GP
B remove LAN power control B

2
25MHz XTAL
LAN_XTALO

R3104 1 2 1MR3F-GP LAN_XTALI

(R_)
1

X3101

R3107 4 1
680R2F-GP
2

LAN_XTALO_C 3 2
1

A C3118 XTAL-25MHZ-202-GP C3119 A

SC20P50V2JN-1-DL-GP SC20P50V2JN-1-DL-GP
2

20170410
change to common part

20170901 C3118,C3119 change to 20P

add Rd 680ohm by Bob
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
LAN RTL8111H
Size
C Document Number Rev
Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 31 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

Giga 100M 10M

TR3201
USB_PCH_PP6 2 3 USB_CON_PP6 Link Orange Green Green
16 USB_PCH_PP6
USB_PCH_PN6 1 4 USB_CON_PN6 Act Blink Blink Blink
16 USB_PCH_PN6
FILTER-4P-156-GP-U RJ45R1 USB+RJ45
5
5V_USB_RJ45 USB_CON_PN6 VBUS1 SPEED_100*_CON SPEED_100_N
TR3202 6 19 R3201 1 2 249R2F-GP
USB_PCH_PP5 2 3 USB_CON_PP5 USB_CON_PP6 7 D1_N O_LED SPEED_100_N 31
16 USB_PCH_PP5 D1_P
8 ORANGE
USB_PCH_PN5 1 4 USB_CON_PN5 GND
16 USB_PCH_PN5 GREEN SPEED_1000*_CON SPEED_1000_N
1 20 R3202 1 2 249R2F-GP
5V_USB_RJ45 USB_CON_PN5 VBUS2 G_LED SPEED_1000_N 31
FILTER-4P-156-GP-U 2
USB_CON_PP5 3 D2_N
4 D2_P
R3203 GND 21 3D3V_LAN
LAN_MDI0_DN 3 2 LAN_MDI0_DN_C LAN_MDI0_DP_C 10 Y_LED_P
31 LAN_MDI0_DN LAN_MDI0_DN_C 11 MDI0_P YELLOW
LAN_MDI0_DP 4 1 LAN_MDI0_DP_C LAN_MDI1_DP_C 12 MDI0_N
31 LAN_MDI0_DP LAN_MDI1_DN_C 13 MDI1_P 22 LAN_LEDACT_R# LINK_ACTIVITY_N
R3204 1 2 510R3J-2-GP
LAN_MDI2_DP_C MDI1_N Y_LED_N LINK_ACTIVITY_N 31
0R1210-PAD-GP 14
LAN_MDI2_DN_C 15 MDI2_P
LAN_MDI3_DP_C 16 MDI2_N
R3205 LAN_MDI3_DN_C 17 MDI3_P
LAN_MDI1_DN 3 2 LAN_MDI1_DN_C MDI3_N
31 LAN_MDI1_DN LAN_CONN_CVT
23 9
LAN_MDI1_DP 4 1 LAN_MDI1_DP_C 24 SHD#G1 VCT 18
31 LAN_MDI1_DP 25 SHD#G2 GND
SHD#G3

1
C 0R1210-PAD-GP 26 UC3201 UC3202 C
27 SHD#G4 SCD01U50V2KX-1DLGP SCD1U16V2KX-3DLGP
28 SHD#G5 (R_)

2
R3206 29 SHD#G6
LAN_MDI2_DN 3 2 LAN_MDI2_DN_C 30 SHD#G7
31 LAN_MDI2_DN SHD#G8 RJ45+XFORMER+2*USB 2.0
LAN_MDI2_DP 4 1 LAN_MDI2_DP_C
31 LAN_MDI2_DP
SKT-RJ45-USB-87-GP
0R1210-PAD-GP

R3207
LAN_MDI3_DN 3 2 LAN_MDI3_DN_C EU3201 EU3202
31 LAN_MDI3_DN
LAN_MDI3_DP 4 1 LAN_MDI3_DP_C LAN_MDI0_DN_C 1 6 LAN_MDI0_DP_C 1 6 LAN_LEDACT_R#
31 LAN_MDI3_DP
0R1210-PAD-GP
2 5 2 5

LAN_MDI1_DP_C 3 4 LAN_MDI1_DN_C SPEED_1000*_CON 3 4 SPEED_100*_CON

ESD AZC199-04SDR7G-1-GP AZC199-04SDR7G-1-GP

EU3203 EU3204

LAN_MDI2_DN_C 1 6 LAN_MDI2_DP_C USB_CON_PN6 1 6 USB_CON_PP6

2 5 2 5

LAN_MDI3_DP_C 3 4 LAN_MDI3_DN_C USB_CON_PP5 3 4 USB_CON_PN5

AZC199-04SDR7G-1-GP 20170607 AZC199-04SDR7G-1-GP

change ESD solution to follow D9
B B

U3201

5V_S5 5 1 5V_USB_RJ45
IN OUT 2
GND
1

C3201 4 3 UC3203 TC3201

SC1U10V2KX-1DLGP EN OC# SCD1U16V2KX-3DLGP E220U16VM-L8-GP
(R_)
2

G524B1T11U-GP

SLP_S4_N USB_OC3_R_N
8,20,24,38,39,40,99 SLP_S4_N 16 USB_OC3_R_N

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RJ45&Transformer
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 32 of 107
5 4 3 2 1
 5 4 3 2 1

3D3V_S0

Vinafix.com

1
D C3301 C3302 D
SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP
(MT_) (MT_)

2
3D3V_CARD_S0

1
C3303 C3304
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
(MT_) (MT_)

2
U1.6
U1.24
24

23
4

7
U3301

3V3_IN
V18

CARD_3V3

SDREG

XD_D7
XD_CD#
SD_WP_BD 8 15 U1.15 2 R3301 1 SD_CLK_BD
9 SP1 SP8 16 0R0402-PAD-2-GP
SD_DATA1_BD 10 SP2 SP9 18 SD_CMD_BD
SP3 SP10

1
SD_DATA0_BD 11 19 C3305
C SP4 SP11 C
12 20 SD_DATA3_BD SC6D8P50V2CN-DL-GP
SD_CD_BD 13 SP5 SP12 21 SD_DATA2_BD (R_)

2
14 SP6 SP13 22
SP7 SP14

GPIO0
RREF

GND
DM
DP
RTS5170-GR-GP

2
3

U1.1 1

17

25
(MT_)

R3303
USB_PCH_PN8 3 2 USB_CON_PN8
16 USB_PCH_PN8

1
USB_PCH_PP8 4 1 USB_CON_PP8
16 USB_PCH_PP8
R3302
0R1210-PAD-GP 6K2R2F-GP
(MT_) (MT_)

2
20170504
add short pad for vendor's feedback

B B

3D3V_CARD_CON_S0 SD1
F3301
3D3V_CARD_S0 1 2 400mA 4 7 SD_DATA0_BD
VDD DAT0 8 SD_DATA1_BD
DAT1 9 SD_DATA2_BD
POLYSW-1D1A6V-9-GP-U
SD_CLK_BD 5 DAT2 1 SD_DATA3_BD M3301
(MT_) CLK DAT3
1

C3306 C3307 SD_CMD_BD 2

SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP CMD
(MT_) (MT_) SD_CD_BD 10 3
2

SD_WP_BD 11 CD VSS 6
WP VSS SPONGE
NP1 12 (MT_347.03801.0001)
NP2 NP1 GND 13
NP2 GND

SKT-SDCARD-61-GP
(MT_)

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Card Reader (RTS5170)
Size Document Number Rev
B Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 33 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB Charger_(TPS2546)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 34 of 107
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

C C

B B

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
B Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 35 of 107
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

C C

B B

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
B Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 36 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 37 of 107
5 4 3 2 1
 5 4 3 2 1

5V_USB_FRONT
USB3F1

1 5 USB30_RX_CON_N1
VBUS SSRX- 6 USB30_RX_CON_P1
SSRX+
8 USB30_TX_CON_N1
USB_CON_PN1 2 SSTX- 9 USB30_TX_CON_P1
USB_CON_PP1 3 D- SSTX+

Vinafix.com
D+
7
10 GND_DRAIN
11 10 4
R3801 11 GND
D USB30_TX_PCH_P1 C3801 1 USB30_TX_CMC_P1 USB30_TX_CON_P1 D
2 SCD1U16V2KX-3DLGP 2 3
19 USB30_TX_PCH_P1 SKT-USB11-153-GP
USB30_TX_PCH_N1 C3802 1 2 SCD1U16V2KX-3DLGP USB30_TX_CMC_N1 1 4 USB30_TX_CON_N1
19 USB30_TX_PCH_N1
0R1210-PAD-GP 5V_USB_FRONT
20170424 USB3F2
remove USB charger circuit
change power from charger IC to USB3.0 power 1 5 USB30_RX_CON_N2
R3802 VBUS SSRX- 6 USB30_RX_CON_P2
USB30_TX_PCH_P2 C3803 1 2 SCD1U16V2KX-3DLGP USB30_TX_CMC_P2 2 3 USB30_TX_CON_P2 SSRX+
19 USB30_TX_PCH_P2 8 USB30_TX_CON_N2
USB30_TX_PCH_N2 C3804 1 2 SCD1U16V2KX-3DLGP USB30_TX_CMC_N2 1 4 USB30_TX_CON_N2 USB_CON_PN2 2 SSTX- 9 USB30_TX_CON_P2
19 USB30_TX_PCH_N2 USB_CON_PP2 3 D- SSTX+
0R1210-PAD-GP D+
7
10 GND_DRAIN
11 10 4
R3804 11 GND
USB30_RX_PCH_P1 2 3 USB30_RX_CON_P1
19 USB30_RX_PCH_P1 SKT-USB11-153-GP
USB30_RX_PCH_N1 1 4 USB30_RX_CON_N1
19 USB30_RX_PCH_N1
0R1210-PAD-GP

R3806
USB30_RX_PCH_P2 2 3 USB30_RX_CON_P2
19 USB30_RX_PCH_P2
USB30_RX_PCH_N2 1 4 USB30_RX_CON_N2
19 USB30_RX_PCH_N2 EU3801
0R1210-PAD-GP
USB30_RX_CON_N1 1 10 USB30_RX_CON_N1
USB30_RX_CON_P1 2 LINE_1 NC#10 9 USB30_RX_CON_P1 20170511
3 LINE_2 NC#9 8 correct the net name from USB30_RX_CON_N1 to USB30_RX_CON_P1
USB30_TX_CON_N1 4 GND GND 7 USB30_TX_CON_N1
TR3801 USB30_TX_CON_P1 5 LINE_3 NC#7 6 USB30_TX_CON_P1
USB_PCH_PP1 2 3 USB_CON_PP1 LINE_4 NC#6
C 16 USB_PCH_PP1 C

USB_PCH_PN1 1 4 USB_CON_PN1 AZ1045-04F-R7G-GP

16 USB_PCH_PN1
FILTER-4P-156-GP-U ESD (075.01043.0073)

TR3802 EU3802
20170406 USB_PCH_PP2 2 3 USB_CON_PP2
remove USB charger function 16 USB_PCH_PP2 USB30_RX_CON_N2 USB30_RX_CON_N2
1 10
change net name to USB_PCH_PP2 USB_PCH_PN2 1 4 USB_CON_PN2 USB30_RX_CON_P2 2 LINE_1 NC#10 9 USB30_RX_CON_P2
change net name to USB_PCH_PN2 16 USB_PCH_PN2 LINE_2 NC#9
3 8
FILTER-4P-156-GP-U USB30_TX_CON_N2 4 GND GND 7 USB30_TX_CON_N2
USB30_TX_CON_P2 5 LINE_3 NC#7 6 USB30_TX_CON_P2
LINE_4 NC#6

AZ1045-04F-R7G-GP
(075.01043.0073)

U3801

5 1
5V_S5 IN OUT 5V_USB_FRONT
2
1

C3805 4 GND 3
1

1
SC1U10V2KX-1DLGP EN OC# UC3801 TC3801
(R_) SCD1U16V2KX-3DLGP E220U16VM-L8-GP
2

G524B1T11U-GP EU3803
2

2
USB_CON_PN1 1 6 USB_CON_PP1

SLP_S4_N USB_OC0_R_N
8,20,24,32,39,40,99 SLP_S4_N 16 USB_OC0_R_N
2 5

USB_CON_PP2 3 4 USB_CON_PN2

AZC199-04SDR7G-1-GP
B B
20170607
change USB2.0 ESD solution to follow D9

5V Monitoring Circuit
3D3V_SB
3D3V_S5
S0 S3 S5 DS
R3818 4K7R2J-2-GP
1 2 H H H L
1

(R_) 1D2V_SM_S3 5V_USB_FRONT

R3811
4K7R2J-2-GP
R3817 1 (R_) 2 0R2J-2-GP SUS_ACK_EN_N
SUS_ACK_EN_N 24
2

1
SUS_PWR_ACK R3815 1 2 0R2J-2-GP SUS_PWR_ACK_R
20 SUS_PWR_ACK
R3816 R3807
S0 S3 S5 DS 0R2J-2-GP 10KR2J-3-GP
2

(R_)
1

H H H L C3807
1

SCD1U16V2KX-3DLGP R3813 (R_) Q3801 2 S0 S3 S5 DS

(R_) 10KR2J-3-GP R3814 1 6
2

1 2 SUS_PWR_ACK_BJT 2 R3808 H H H L
1

5 SUS_PWR_ACK_5V_DUAL_L 2 1 SUS_PWR_ACK_5V_DUAL
0R0402-PAD-2-GP SUS_PWR_ACK_BJT_L 3 4
1

10KR2J-3-GP
1

MBT3904DW1T1G-2-GP C3806 R3812 (R_)

1

04/05 back to 5V_S5 (75.03904.D7C) SCD1U16V2KX-3DLGP 10KR2J-3-GP

1

R3810 (R_)
2

A 22KR2F-GP R3809 A
2

5V_S5 10KR2J-3-GP
(R_)
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB30_(Front)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 38 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

USB2R1

12

10
4
8
USB_CON_PP9 3
USB_CON_PP7 7
USB_CON_PN9 2
USB_CON_PN7 6
1
5V_USB_REAR
5

DOWN
UP
9

11

SKT-USB12-24-GP

C C

TR3901
USB_PCH_PN9 2 3 USB_CON_PN9
16 USB_PCH_PN9
USB_PCH_PP9 1 4 USB_CON_PP9
16 USB_PCH_PP9
FILTER-4P-156-GP-U

TR3902
USB_PCH_PN7 2 3 USB_CON_PN7
16 USB_PCH_PN7
USB_PCH_PP7 1 4 USB_CON_PP7
16 USB_PCH_PP7
FILTER-4P-156-GP-U

U3901

5 1
B 5V_S5 IN OUT 2
5V_USB_REAR
ESD B
1

1
C3901 4 GND 3 UC3901 TC3901
SC1U10V2KX-1DLGP EN OC# SCD1U16V2KX-3DLGP E220U16VM-L8-GP
(R_)
2

G524B1T11U-GP 2

SLP_S4_N USB_OC1_R_N
8,20,24,32,38,40,99 SLP_S4_N 16 USB_OC1_R_N

EU3901

USB_CON_PN9 1 6 USB_CON_PP9

2 5

USB_CON_PP7 3 4 USB_CON_PN7

AZC199-04SDR7G-1-GP
20170607
change ESD solution to follow D9

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB20_(Rear)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 39 of 107
5 4 3 2 1
 5 4 3 2 1

C4001 SCD1U16V2KX-3DLGP
20170414 3D3V_SB 1 2
change from 3D3V_SB to 3D3V_S0 3D3V_S0
U4001 (R_)
20170417 PLTRST_BUF_LAN_N 1 5
24,40 PLTRST_BUF_LAN_N

1
remove PU 10KR resistor @ VR_ENABLE A VCC
R4001 3D3V_S0 GPIO_LAN_RESET_N 2
19 GPIO_LAN_RESET_N B
10KR2J-3-GP LAN, WALN, SSD, LPC, TPM
3 4 PLTRST_LAN_N
GND Y PLTRST_LAN_N 31,40,62,63,68,91

1
U4002 R4002 100KR2J-1-GP

2
VR_ENABLE 6 1 R4003 20170417 1 2
43 VR_ENABLE U4003 20KR2J-L2-GP change to 20KR CEC 74AHC1G08DCKR-GP (R_)
20,24,42,43,50,99 SLP_S3_N
SLP_S3_N 5 2 S3_QUK
Vinafix.com
G

PLTRST_N
(R_)

2
4 3 D VR_READY_IMVP C4002 SCD1U16V2KX-3DLGP
VR_READY_IMVP 40,44
1 2
3D3V_S0
2N7002KDW-1-GP S U4004 (R_)
D PLTRST_BUF_PCI_N D
Notice:ZZ.2N702.J3101 20170417 1 5
move to CEC VR_READY 24,40 PLTRST_BUF_PCI_N A VCC
2N7002K-2-GP
20170417 SLP_S0_PLT_N 2
remove the net "PWR_VCCIO_VCCSA_EN" 20,24,91 SLP_S0_PLT_N B
change U20 to single package 3 4 PLTRST_PCON_N
20170405 GND Y R4004 100KR2J-1-GP
add for CRB PLTRST design 1 2
20170406 74AHC1G08DCKR-GP (R_)
move from page 24 to 40
20170411 (R_)

CEC 3D3V_SB
C4003
1 2
SCD1U16V2KX-3DLGP
reserve CEC control

3D3V_S0
C4004
1 2
SCD1U16V2KX-3DLGP

(R_) (R_)
VR_ENABLE U4005 PLTRST_PCON_N 1
U4006
A VCC
5

1 6 SLP_S0_PLT_N GPIO_PEG_RESET_N 2
3D3V_SB B C 19 GPIO_PEG_RESET_N B
2 5 PCIEx16
VR_ENABLE 3 GND VCC 4 VR_ENABLE_IMVP 3 4 PLTRST_PEG_N
A Y VR_ENABLE_IMVP 40,44 GND Y PLTRST_PEG_N 40,93

74AUP1G97GW-GP 74AHC1G08DCKR-GP
(R_) (R_)
C4005 SCD1U16V2KX-3DLGP
20170411 3D3V_S0 1 2
reserve CEC control 3D3V_S0
U4007 (R_)
20170417 PLTRST_PEG_N 1 5

1
add 0R short PWR_VCCSA_PG & VR_ENABLE A VCC
add 22KR PU to 3D3V_S0 @ VR_ENABLE GPIO_PCI_RESET_N
R4005 16 GPIO_PCI_RESET_N 2
22KR2J-GP B PCIEx1, PCI bridge
3 4 PLTRST_PCI_N
2
GND Y PLTRST_PCI_N 40,94,95
R4006 0R0402-PAD-2-GP R4007 0R0402-PAD-2-GP
PWR_VCCSA_PG 1 2 VR_ENABLE 1 2 VR_ENABLE_IMVP 74AHC1G08DCKR-GP
47 PWR_VCCSA_PG VR_ENABLE_IMVP 40,44
(R_)
R4008 0R0402-PAD-2-GP
PLTRST_BUF_LAN_N 1 2 PLTRST_LAN_N
24,40 PLTRST_BUF_LAN_N PLTRST_LAN_N 31,40,62,63,68,91
C C

R4009 0R0402-PAD-2-GP
PLTRST_BUF_PCI_N 1 2 PLTRST_PEG_N
CEC 3D3V_SB
C4006
1 2
SCD1U16V2KX-3DLGP
24,40 PLTRST_BUF_PCI_N PLTRST_PEG_N 40,93

(R_) R4010 0R0402-PAD-2-GP

VR_READY U4008 1 2 PLTRST_PCI_N PLTRST_PCI_N 40,94,95
1 6 SLP_S0_PLT_N
3D3V_SB B C
2 5
VR_READY_IMVP 3 GND VCC 4 VR_READY
A Y

74AUP1G97GW-GP 3D3V_SB 3D3V_SB

(R_)
20170411

1
reserve CEC control

1
20170417 R4011 C4007
add 0R short PWR_VCCSA_PG & VR_READY_IMVP 22KR2J-GP SCD1U16V2KX-3DLGP
20170515
remove 0R resisitor between PWR_VCCSA_PG & VR_READY_IMVP

2
2
R4013 0R0402-PAD-2-GP U4009
VR_READY_IMVP 1 2 VR_READY VR_READY_A 1 5 1 2 VCCST_GD_DRIVER
40,44 VR_READY_IMVP VR_READY 24,40 A VCC VCCST_GD_DRIVER 4,99
R4014
VR_READY R4015 1 2 0R0402-PAD-2-GP VR_READY_B 2 249R2F-GP
24,40 VR_READY B
3 4 ALL_SYS_PWRGD 1 2 PCH_PWROK
GND Y PCH_PWROK 20
R4016
SNLVC1G08DCKRG4-GP 249R2F-GP

1
C4008
SCD1U16V2KX-3DLGP

2
3D3V_SB

20170417
1

B move to page 48 B
3D3V_SB

DDR4 Power Sequence R4017

8K2R2F-1-GP
1

R4018 R4019 0R0402-PAD-2-GP

2

8K2R2F-1-GP VPP_EN_CR 1 2 VPP_EN

VPP_EN 52
C
2

VPP_EN_DDR4 B Q4001 C4009

LMBT3904LT1G-GP SC1U10V2KX-1DLGP
20170410 (R_)
2
E

change to common part

Q4002
1 6
R4020 10KR2J-3-GP R4021 0R0402-PAD-2-GP R4022 10KR2J-3-GP
SLP_S4_N 1 2 SLP_S4_VPP_N 2 5 S4_VPP_OR 1 2 S4_VPP_OR_R 1 2
8,20,24,32,38,39,99 SLP_S4_N 3D3V_S0
1

3 4
1

C4010 R4023
MMDT3904-2-GP SCD1U16V2KX-3DLGP 1KR2J-1-GP
(R_)
2

C4011 SCD1U16V2KX-3DLGP 20170417

2

1 2 move VCCIO PWROK circuit

3D3V_SB
(R_)

U4010
1 5
A VCC
PWRGD_VPP 2
52 PWRGD_VPP B R4024 0R0402-PAD-2-GP
3 4 VDDQ_EN_CR 1 2 VDDQ_EN
GND Y VDDQ_EN 50
1

SNLVC1G08DCKRG4-GP C4012
SC1U10V2KX-1DLGP
(R_)
2

A A

R4025 0R0402-PAD-2-GP R4026 0R0402-PAD-2-GP

DDR_VTT_CNTL_CPU 1 2 VTT_EN_CR 1 2 VTT_EN
4 DDR_VTT_CNTL_CPU VTT_EN 50 Wistron Corporation
1

C4013 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

SC1U10V2KX-1DLGP Taipei Hsien 221, Taiwan, R.O.C.
(R_)
2

Title
Power Plane EN Sequence
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 40 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 41 of 107
5 4 3 2 1
 8 7 6 5 4 3 2 1

U4201

4 13
5V_S5 VBIAS OUT1#13 5V_S0
14
OUT1#14 8
OUT2#8 3D3V_SB
5V_S5 1 9 3D3V_SB 5V_S0
2 IN1#1 OUT2#9
6 IN1#2 12 SB5V_CT1 C4201 1 2 SC1KP50V2KX-1DLGP
3D3V_S5 IN2#6 CT1 SB3V_CT2
7 10 C4202 1 2 SC1KP50V2KX-1DLGP
IN2#7 CT2

1
C4203 C4204 3 C4205 C4206 C4207 C4208

Vinafix.com
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP 5 ON1 11 SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U25V5KX-L-GP SC10U25V5KX-DL-GP
ON2 GND 15 (R_) (R_)

2
GND
EC_EUP_EN#
H: EUP disable AOZ2331DI-1-GP
D D
L: EUP enable
R4201 1 2 0R0402-PAD-2-GP S0_5V_EN
42,43 PSPWRGD
R4202 1 2 0R0402-PAD-2-GP SB3V_EN
20,24,51 SLP_SUSB

High Enable Logic

12V_S0
R4203 47KR2J-2-GP R4204 10KR2J-3-GP Low Diable Logic
1 2 1 2 V_VCC3P3_EN
3D3V_S5

3D3V_S0

4
G Q4201
5
D
12V_S5 3 6

1
S D
2 7

1
S D
C4209 C4210 1 8 C4211 C4212 R4205

1
S D
SCD1U25V2KX-1-DL-GP SCD1U25V2KX-1-DL-GP SC10U25V5KX-L-GP SCD1U16V2KX-3DLGP 4K7R2J-2-GP
R4206 AONS36358-1-GP (R_)

2
100KR2J-1-GP

2
U4202
1 6 V_VCC3P3_EN_R
2

R4207 10KR2J-3-GP Discharge resistor

2 5 +12V_PG_U29 1 2 20170410
PSPWRGD 42,43 change to common part
VCTRL_VCC_EN 3 4

2N7002KDW-1-GP

VCTRL_VCC_EN 24

C C

MT only 12V_S0
U4203
8 D S 1
7 D S 2
6 D S 3
12V_S5
20170405 5 D G 4
change 12V circuit for CY15 PSU design 20170410
20170419 change to common part C4213 SCD1U16V2KX-3DLGP
add 12V circuit for CY15 PSU design back R4208 1 2 220KR2F-GP 12VBDC_EN_1 R4209 1 2 22KR2F-GP 12VBDC_EN AON7401-GP 1 2
12V_SYSATX_S5

1
20170406 C4214 S0 S3 S4 S5 20170406

K
1
rename for new rule SCD01U50V2KX-L-GP rename for new rule
S0 S3 S5 DS (R_) L H H H D4201

2
12V_S0 12V_SYSATX_S5 R4210 SM240AF-GP
S0 S3 S5 DS L H H H 22KR2F-GP Reverse V : 40 V
Forward V : 0.5V at 2A

A
1

12V_S0 Forward Curr. : 2A

H L L L
R4211
1

1
200KR2J-L1-GP 12V_SYSATX_S5
1

C4215 R4213
SCD1U16V2KX-L-GP R4212 10KR2J-3-GP 20170406
2

(R_) 100KR2F-L1-GP Q4202 Q4203 rename for new rule

2

SLP_S3_N_R_1 1 6 12VBDC_EN_2 G
2

2
R4216 10KR2J-3-GP
12V_DETECT R4214 1 2 0R2J-2-GP R4215 1 2 22KR2F-GP 12V_DETECT_DELAY 2 5 SLP_S3_N_R 1 2 SLP_S3_N D +12V_PG
20170410 (R_) SLP_S3_N 20,24,40,43,50,99
1

change to common part 3 4 S

1

C4216 C4217 Notice:ZZ.2N702.J3101

20170413
R4217 SCD1U16V2KX-3DLGP SC1U50V3KX-1-GP MMDT3904-2-GP 2N7002K-2-GP change PSU design
10KR2F-2-GP remove off-page arrow
2

2
2

12V_SYSATX_S5 20170406
B rename for new rule B
1

R4218
100KR2J-1-GP
Q4204
2

1 6 12V_DETECT_2

2 5
1

12V_DETECT_1 3 4
R4219
MMDT3904-2-GP 10KR2F-2-GP
20170410 (R_)
2

change to common part

SFF only

20170417-2
change back to D9 PSU design
20170424
remove circuit for MT

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Switch power
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 42 of 107
8 7 6 5 4 3 2 1
 5 4 3 2 1

1 PS_ON 4 P_OK
2 COM 5 +12VBDC
SFF only
3 COM 6 +12VBDC 20170406
rename for new PSU design
20170418
rename for D9 PSU design

Vinafix.com
20170417-2 20170419
change back to D9 PSU design rename for new PSU, D9 PSU design and remove IPCC
20170424
remove circuit for MT
12V_CPU
D D

NP1
4

3
1
C4303 ATX2
SC1U50V3KX-1-GP FOX-CONN4F-1-GP
(020.80375.0004)

1
Modify for Fix pin

C
CEC C

PS_ON_N
20170411 C4305 SCD1U16V2KX-3DLGP
reserve CEC control 1 2
3D3V_SB
(R_)
U4301 R4302 0R0402-PAD-2-GP
SIO_PS_ON_N 1 2 PS_ON_N
SLP_S3_N PCH_PS_ON_N 24 SIO_PS_ON_N
20,24,40,42,50,99 SLP_S3_N 1 6 PCH_PS_ON_N 19,20
2 B C 5
3 GND VCC 4 R4303 0R2J-2-GP
A Y CEC_PS_ON_N 1 2
(R_)

C
74AUP1G97GW-GP R4304 10KR2F-2-GP
CEC_PS_ON_N_EXTD2 1 2 CEC_PS_ON_N_EXTD1 B Q4301
(R_)
D4303 (R_) LMBT3904LT1G-GP
VR_ENABLE 1 (R_)
40 VR_ENABLE

E
20170410
3 change to common part

PWR_VCCIO_VCCSA_EN 2
47,48 PWR_VCCIO_VCCSA_EN
BAT54C-12-GP
(R_)

B B

MT only 1 +12VSB 5 +12VBDC

2 COM 6 +12VBDC
3 COM 7 COM
4 P_OK 8 PS_ON
5V_S5
20150522
change to 020.80369.0008 for EMN issue
1

12V_S0 12V_SYSATX_S5 20170406

ATX3 rename for new rule
R4305 NP1
10KR2J-3-GP 5 1
2

6 2
7 3
PS_ON_N 8 4 PSPWRGD
PSPWRGD 42
1

C4306 LIN-CONN8B-S-GP-U C4307

SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
2

20170410 12V_S0 12V_SYSATX_S5 20170406

change to common part rename for new rule
1

C4308 C4309 C4310 C4311

SCD1U16V2KX-L-GP SCD1U16V2KX-3DLGP SCD1U16V2KX-L-GP SCD1U16V2KX-3DLGP
A (R_) (R_) A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ATX CONNECTOR
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 43 of 107
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

Intel Coffeelake IMVP8 POWER CKT - S-LINE 62 95W 4+2 PHASE

20170522 20170515 S-Line 62 65W CPU power spec
reserve original design change from 5V_S0 to 5V_S5 for power's feedback 20170406
rename for new PSU design Vcore ICCMAX=133A, TDC=91A
20170418
5V_S0 5V_S5 12V_CPU rename for D9 PSU design
20170419 VccGT ICCMAX=45A, TDC=30A
rename for new PSU and D9 PSU design

1
PR4470 PR4401 PR4402
2D2R3-1-U-GP 2D2R3-1-U-GP 1KR2F-3-GP V_CPU_ST_PLL 20170414 PWR_ROSC
(R_) CRB reserve pull-up resistor

1
PWR_VCORE_VCC PWR_VCORE_VRMP

1
PR4403
PC4401 Working 26K1R2F-2-GP

1
PC4402 PC4403 SC1U50V3KX-1-GP
F~315Khz

2
SC2D2U10V3KX-1DLGP-U SCD01U50V2KX-1DLGP PR4404 PR4405 PR4406

2
100R2F-L1-GP-U 45D3R2F-L-GP 75R2F-2-GP

2
(R_)
PUT CLOSE

2
PU4401 TO PWM

9
6X6 52PIN QFN
2 3 PWR_VCORE_SDIO PR4410 1 2 10R2F-L-GP

VCC

VRMP
40 VR_ENABLE_IMVP EN SDIO 5 PWR_VCORE_SCLK 1 2 49D9R2F-GP VIDSOUT_CPU_R 4
PR4411
SCLK VIDSCK_CPU_R 4 PWR_ADDR
6 4
40 VR_READY_IMVP VR_RDY ALERT VIDALERT#_CPU_R 4
PWR_VCORE_DOUT 50 30
DIFF DRON 34 PWR_ADDR PWR_VCORE_DRVON 45,46
PWM1_SV_ADDR PWR_VCORE_PWM1 45 VCORE SVID

1
1 2PWR_VCORE_COMP_A 1 2 1 2 PWR_VCORE_COMP_R 1 2 PWR_VCORE_COMP 48 36
COMP CSN1 37 PWR_VCORE_CSP1_IC PR4412 1 (R_) 2 100KR2F-L1-GP
PWR_VCORE_CSN1 44,45 ADDRESS=00h PR4413
PR4407 PC4404 PR4408 PC4405 CSP1 10KR2F-2-GP
47R2F-GP 1 2 SC470P50V2KX-3DLGP 4K02R2F-GP 1 2 SC2200P50V2KX-2DLGP PR4414 1 2 6K98R2F-GP PC4407 1 2 SCD1U25V2KX-1-DL-GP VCCGT SVID
49 33 44,45 PWR_VCORE_CSP1 PWR_VBOOT
ADDRESS=01h

2
FB PWM2/VBOOT 38 PWR_VCORE_PWM2 45
PR4409 PC4406
CSN2 PWR_VCORE_CSP2_IC PWR_VCORE_CSN2 44,45
1KR2F-3-GP SC33P50V2JN-3DLGP 39 PR4415 1 (R_) 2 100KR2F-L1-GP
1 2 PWR_VCORE_FB CSP2
1V_CPU_CORE
PR4417 1 2 6K98R2F-GP PC4408 1 2 SCD1U25V2KX-1-DL-GP
32 44,45 PWR_VCORE_CSP2 PWR_ICCMAX
PR4416
PWM3/ICCMAX 40 PWR_VCORE_PWM3 45
100R2F-L1-GP-U PR4418 0R0402-PAD-2-GP
C PWR_VCORE_VSP CSN3 PWR_VCORE_CSP3_IC PWR_VCORE_CSN3 44,45 C
1 2 51 41 PR4419 1 (R_) 2 100KR2F-L1-GP

1
8 VCORE_VCC_SEN PC4409 PR4420 VSP CSP3 PWR_VBOOT
SC1KP50V2KX-1DLGP 3KR2F-GP PR4421 1 2 6K98R2F-GP PC4410 1 2 SCD1U25V2KX-1-DL-GP
1 2 PWR_VCORE_VSN 52 31 44,45 PWR_VCORE_CSP3 PWR_ROSC

2
8 VCORE_VSS_SEN VSN PWM4/ROSC 42 PWR_VCORE_PWM4 45
CSN4 PWR_VCORE_CSN4 44,45
1

1
43 PWR_VCORE_CSP4_IC PR4422 1 (R_) 2 100KR2F-L1-GP
PR4423 1 2 CSP4 PR4424
100R2F-L1-GP-U PR4425 1 2 6K98R2F-GP PC4412 1 2 SCD1U25V2KX-1-DL-GP VCORE 10KR2F-2-GP
45 44,45
PWR_VCORE_CSSUM PWR_VCORE_CSP4
PC4411 PR4426 1 2 100KR2F-L1-GP
SC3300P50V2KX-1DLGP PWR_VCORE_IOUT 1 CSSUM PWR_VCORE_CSP1 44,45 VBOOT=0V
2

2
IOUT 47 PWR_VCORE_CSCOMP PR4427 1 2 100KR2F-L1-GP PWR_VCORE_TCP PR4428 1 2 300KR2F-GP PR4429 1 2 100KR2F-L1-GP
PWR_VCORE_CSP2 44,45

1
CSCOMP PR4431 NTC-100K-11-GP-U

1
PR4430 PC4414 Vcore OCP 1 2 PC4413 1 2 SC220P50V2KX-3DLGP PR4432 1 2 100KR2F-L1-GP
30KR2F-GP PWR_VCORE_CSP3 44,45
SC470P50V2KX-3DLGP
46 PWR_VCORE_ILIM PR4433 1 2 35K7R2F-GP PC4415 1 2 SC1500P50V2KX-2-DL-GP PR4434 1 2 100KR2F-L1-GP

2
ILIM PWR_VCORE_CSP4 44,45
VCORE PORTION

2
44 PWR_VCORE_CSREF PR4435 1 2 10R2F-L-GP
CSREF PWR_VCORE_CSN1 44,45

1
PC4416 PR4436 1 2 10R2F-L-GP PWR_VBOOTA
PWR_VCORE_CSN2 44,45
SC1KP50V2KX-1DLGP PR4437 1 2 10R2F-L-GP
PWR_GT_DOUT 16 PWR_VCORE_CSN3 44,45
PR4438 1 2 10R2F-L-GP

2
DIFFA PWR_VCORE_CSN4 44,45

1
1 2 PWR_GT_COMP_A 1 2 1 2 PWR_GT_COMP_R 1 2 PWR_GT_COMP 18
COMPA 28 PWR_ICCMAXA PR4441
PWM1A/ICCMAXA 24 PWR_GT_PWM1 46
PR4439 PC4417 PR4440 PC4418 VCCGT 10KR2F-2-GP
1 2 1 2 CSN1A 23 PWR_GT_CSP1_IC PWR_GT_CSN1 44,46
47R2F-GP SC470P50V2KX-3DLGP 4K02R2F-GP SC2200P50V2KX-2DLGP PR4443 1 (R_) 2 100KR2F-L1-GP
17 CSP1A VBOOT=0V

2
PR4442 PC4419 FBA PR4444 1 2 6K98R2F-GP PC4420 1 2 SCD1U25V2KX-1-DL-GP
44,46 PWR_GT_CSP1 PWR_VBOOTA
1 2 1KR2F-3-GP SC33P50V2JN-3DLGP 29
1V_CPU_GT PWR_GT_FB PWM2A/VBOOTA PWR_GT_PWM2 46
26
CSN2A 25 PWR_GT_CSP2_IC PWR_GT_CSN2 44,46
PR4445 PR4446 1 (R_) 2 100KR2F-L1-GP
100R2F-L1-GP-U PR4447 0R0402-PAD-2-GP CSP2A
1 2 PWR_GT_VSP 15 PR4448 1 2 6K98R2F-GP PC4421 1 2 SCD1U25V2KX-1-DL-GP
VSPA 44,46 PWR_GT_CSP2
1

8 VCCGT_VCC_SEN PC4422 PR4450 PR4449 68K1R3F-1-GP

3K6R2F-GP 21 PWR_GT_CSSUM 1 2 PWR_ICCMAX
SC1KP50V2KX-1DLGP CSSUMA PWR_GT_CSP1 44,46
1 2 PWR_GT_VSN 14 PR4453 68K1R3F-1-GP
2

8 VCCGT_VSS_SEN VSNA 19 PWR_GT_CSCOMP PR4451 1 2 100KR2F-L1-GP PWR_GT_TCP PR4452 1 2 294KR2F-1-GP 1 2

PWR_GT_CSP2 44,46
1

CSCOMPA PR4455 NTC-100K-11-GP-U

1
PR4454 1 2 1 2 PC4424 1 2 SC220P50V2KX-3DLGP
100R2F-L1-GP-U VCORE PR4456
PC4423 20 PWR_GT_ILIM PR4457 1 2 24K9R2F-L-GP PC4425 1 2 SC1500P50V2KX-2-DL-GP 133KR2F-GP
SC3300P50V2KX-1DLGP PWR_GT_IOUT 13 ILIMA IMAX SET
2

1
IOUTA 22 PWR_GT_CSREF PR4459 1 2 10R2F-L-GP AT 133A
PWR_GT_CSN1 44,46

2
CSREFA

1
20170417 PR4458 PC4426 PC4427
remove PR62 42K2R2F-L-GP SC470P50V2KX-3DLGP SC1KP50V2KX-1DLGP PR4460 1 2 10R2F-L-GP
PWR_GT_CSN2 44,46
VCCGT PORTION

2
PR4461
2

75R2F-2-GP
1 2 PROCHOT#_IMVP 10 27 PWR_GT_TSNS

NC#11
NC#12
4,24 PROCHOT#_CPU_R VRHOT# TSENSEA

EPAD

1
PWR_VCORE_TSNS 35 8 PWR_PSYS 1 2 PWR_VCORE_VCC PWR_ICCMAXA
B TSENSE PSYS PR4463 B
1

(074.81220.0D73) NCP81220MNTXG-GP PR4462 499R2F-2-GP

11
12

53
PR4464 2KR2F-3-GP

1
499R2F-2-GP

2
1

1
(R_) PC4428 PWR_GT_TSNS_R PR4465
VCCGT
PR4471 SCD1U25V2KX-1-DL-GP 47K5R2F-GP
IMAX SET
2

1
PWR_VCORE_TSNS_R PC4429 20KR2F-L-GP

2
SCD1U25V2KX-1-DL-GP PR4467 AT 45A

2
1

38K3R2F-GP PR4468
2

2
PR4469 BOTTOM PAD NTC-100K-11-GP-U
PR4466 38K3R2F-GP
CONNECT TO

2
NTC-100K-11-GP-U
GND Through PUT COLSE
2

2
PUT COLSE 6 VIAs TO VCCGT
TO VCORE
2

HOT SPOT
HOT SPOT

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VCORE & V_GT(NCP81220)
Size Document Number Rev
D Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 44 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D
20170406
rename for new PSU design
12V_CPU 20170418
rename for D9 PSU design
20170419
rename for new PSU and D9 PSU design

(R_)

1
20170406 PC4501 PC4502 PT4501
rename for new PSU design SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP E270U16VM-16-GP
12V_CPU 20170418

2
rename for D9 PSU design
20170419

5
6
7
8
rename for new PSU and D9 PSU design

D
D
D
D
PU4501
AONS36358-1-GP

1
PR4501 PC4503
PR4502 2D2R5F-2-GP SCD1U50V3KX-DL-GP 270uF/16V,
PWR_VCORE_BST1 1 2 PWR_VCORE_BST1_R 1 2 PWR_VCORE_HG1_R 4

G
2D2R5F-2-GP
ESR=10mohm,

S
S
S
Ripple current=5000mA

3
2
1
PC4504
SC1U50V3KX-1-GP PR4504 PR4503

1
PU4502 1R5J-2-GP 10KR2J-3-GP
1 2 PWR_VCORE_VCC1 4 8 PWR_VCORE_HG1 1 2 0.36uH, DCR=0.6 mohm, Idc=32A, Isat=42A

BST
VCC DRVH

2
7 PWR_VCORE_SW1 PL4501 1 2 COIL-D36UH-19-GP 20170426
PWR_VCORE_PWM1 SW 1V_CPU_CORE
2

GND

GND
44 PWR_VCORE_PWM1 3 PWM 5 PWR_VCORE_LG1

1
EN DRVL

1
PR4506 PR4505 PT4502 PT4503

9
51R2F-2-GP 2D2R5F-2-GP E820U2D5VM-6-GP E820U2D5VM-6-GP

1
1 2 PWR_VCORE_EN1 NCP81258MNTBG-GP

2
44,45,46 PWR_VCORE_DRVON
PG4501 PG4502

5
6
7
8

5
6
7
8

1PWR_VCORE_SNB1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

D
D
D
D

D
D
D
D
PU4503 PU4504

2
BOTTOM PAD AONS36356-GP AONS36356-GP
CONNECT TO
GND Through
4 4

G
4 VIAs 820uF/2.5V,

S
S
S

S
S
S
ESR=7mohm,

3
2
1

3
2
1
Ripple current=5000mA
PC4505
SC1500P50V2KX-2-DL-GP

2
44 PWR_VCORE_CSP1

44 PWR_VCORE_CSN1

20170406
12V_CPU rename for new PSU design
20170418
rename for D9 PSU design
20170419
rename for new PSU and D9 PSU design

1
20170406 PC4506 PC4507 PT4504
rename for new PSU design SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP E270U16VM-16-GP
12V_CPU 20170418

65W VCORE

2
rename for D9 PSU design
20170419

5
6
7
8
rename for new PSU and D9 PSU design

D
D
D
D
PU4505
AONS36358-1-GP TDC= 91A

1
PR4507 PC4508
PR4508
PWR_VCORE_BST2 1
2D2R5F-2-GP
2 PWR_VCORE_BST2_R 1
SCD1U50V3KX-DL-GP
2 PWR_VCORE_HG2_R 4 270uF/16V,
Iccmax= 133A

G
2D2R5F-2-GP
ESR=10mohm,

S
S
S
Ripple current=5000mA

3
2
1
PC4509
SC1U50V3KX-1-GP PR4510 PR4509

1
PU4506 1R5J-2-GP 10KR2J-3-GP
C 1 2 PWR_VCORE_VCC2 4 8 PWR_VCORE_HG2 1 2 C
0.36uH, DCR=0.6 mohm, Idc=32A, Isat=42A

BST
VCC DRVH

2
7 PWR_VCORE_SW2 PL4502 1 2 COIL-D36UH-19-GP 20170426
PWR_VCORE_PWM2 2 SW 1V_CPU_CORE

GND

GND
44 PWR_VCORE_PWM2 3 PWM 5 PWR_VCORE_LG2

1
EN DRVL
PR4512 PR4511

1
51R2F-2-GP 2D2R5F-2-GP PT4505
1 2 PWR_VCORE_EN2 NCP81258MNTBG-GP E820U2D5VM-6-GP

1
44,45,46 PWR_VCORE_DRVON

5
6
7
8

5
6
7
8

1PWR_VCORE_SNB2 2

2
PG4503 PG4504

D
D
D
D

D
D
D
D
PU4507 PU4508 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
BOTTOM PAD AONS36356-GP AONS36356-GP

2
CONNECT TO
GND Through
4 4

G
4 VIAs

S
S
S

S
S
S
820uF/2.5V,
ESR=7mohm,

3
2
1

3
2
1
Ripple current=5000mA
PC4510
SC1500P50V2KX-2-DL-GP

2
44 PWR_VCORE_CSP2

44 PWR_VCORE_CSN2

20170406
12V_CPU rename for new PSU design
20170418
rename for D9 PSU design
20170419
rename for new PSU and D9 PSU design

1
20170406 PC4511 PC4512 PT4506
rename for new PSU design SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP E270U16VM-16-GP
12V_CPU 20170418

2
rename for D9 PSU design
20170419

5
6
7
8
rename for new PSU and D9 PSU design

D
D
D
D
PU4509
AONS36358-1-GP
1

PR4514 PC4513
PR4513 2D2R5F-2-GP SCD1U50V3KX-DL-GP 270uF/16V,
PWR_VCORE_BST3 1 2 PWR_VCORE_BST3_R 1 2 PWR_VCORE_HG3_R 4

G
2D2R5F-2-GP
ESR=10mohm,

S
S
S
Ripple current=5000mA
2

3
2
1
PC4514
SC1U50V3KX-1-GP PR4516 PR4515
1

PU4510 1R5J-2-GP 10KR2J-3-GP

1 2 PWR_VCORE_VCC3 4 8 PWR_VCORE_HG3 1 2 0.36uH, DCR=0.6 mohm, Idc=32A, Isat=42A
BST

VCC DRVH

2
7 PWR_VCORE_SW3 PL4503 1 2 COIL-D36UH-19-GP 20170426
PWR_VCORE_PWM3 SW 1V_CPU_CORE
2
GND

GND

44 PWR_VCORE_PWM3 3 PWM 5 PWR_VCORE_LG3

1
EN DRVL

1
PR4518 PR4517 PT4507
6

51R2F-2-GP 2D2R5F-2-GP E820U2D5VM-6-GP

1 2 PWR_VCORE_EN3 NCP81258MNTBG-GP

2
44,45,46 PWR_VCORE_DRVON

5
6
7
8

5
6
7
8

1PWR_VCORE_SNB3 2
PG4505 PG4506

D
D
D
D

D
D
D
D
PU4511 PU4512 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
BOTTOM PAD AONS36356-GP AONS36356-GP

2
CONNECT TO
GND Through
4 4

G
4 VIAs 820uF/2.5V,

S
S
S

S
S
S
ESR=7mohm,

3
2
1

3
2
1
Ripple current=5000mA
PC4515
SC1500P50V2KX-2-DL-GP

2
B B

44 PWR_VCORE_CSP3

44 PWR_VCORE_CSN3

20170406
12V_CPU rename for new PSU design
20170418
rename for D9 PSU design
20170419
rename for new PSU and D9 PSU design

1
20170406 PC4516 PC4517
rename for new PSU design SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP
12V_CPU 20170418

2
rename for D9 PSU design
20170419
5
6
7
8

rename for new PSU and D9 PSU design

D
D
D
D

PU4513
AONS36358-1-GP
1

PR4520 PC4518
PR4519 2D2R5F-2-GP SCD1U50V3KX-DL-GP
PWR_VCORE_BST4 1 2 PWR_VCORE_BST4_R 1 2 PWR_VCORE_HG4_R 4
G

2D2R5F-2-GP
S
S
S
2

3
2
1

PC4519
SC1U50V3KX-1-GP PR4522 PR4521
1

PU4514 1R5J-2-GP 10KR2J-3-GP

1 2 PWR_VCORE_VCC4 4 8 PWR_VCORE_HG4 1 2 0.36uH, DCR=0.6 mohm, Idc=32A, Isat=42A
BST

VCC DRVH
2

7 PWR_VCORE_SW4 PL4504 1 2 COIL-D36UH-19-GP 20170426

PWR_VCORE_PWM4 2 SW 1V_CPU_CORE
GND

GND

44 PWR_VCORE_PWM4 3 PWM 5 PWR_VCORE_LG4

1
EN DRVL
PR4524 PR4523
6

1
51R2F-2-GP 2D2R5F-2-GP PT4508
1 2 PWR_VCORE_EN4 NCP81258MNTBG-GP E820U2D5VM-6-GP

1
44,45,46 PWR_VCORE_DRVON
5
6
7
8

5
6
7
8

1PWR_VCORE_SNB4 2

2
PG4507 PG4508
D
D
D
D

D
D
D
D

PU4515 PU4516 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

BOTTOM PAD AONS36356-GP AONS36356-GP

2
CONNECT TO
GND Through
4 4
G

4 VIAs
S
S
S

S
S
S

820uF/2.5V,
ESR=7mohm,
3
2
1

3
2
1

PC4520 Ripple current=5000mA

SC1500P50V2KX-2-DL-GP
2

44 PWR_VCORE_CSP4

44 PWR_VCORE_CSN4

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VCORE OUTPUT(NCP81258)
Size Document Number Rev
E Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 45 of 107
5 4 3 2 1
 5 4 3 2 1

20170406
rename for new PSU design
12V_CPU 20170418
rename for D9 PSU design

Vinafix.com
20170419
rename for new PSU and D9 PSU design

1
20170406 PC4601 PC4602 PT4601
D rename for new PSU design D
SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP E270U16VM-16-GP
12V_CPU 20170418

2
rename for D9 PSU design
20170419

5
6
7
8
rename for new PSU and D9 PSU design

D
D
D
D
PU4601
AONS36358-1-GP

1
PR4601 PC4603
PR4602 2D2R5F-2-GP SCD1U50V3KX-DL-GP 270uF/16V,
PWR_GT_BST1 1 2 PWR_GT_BST1_R 1 2 PWR_GT_HG1_R 4

G
2D2R5F-2-GP
ESR=10mohm,

S
S
S
Ripple current=5000mA

3
2
1
1
PC4604
SC1U50V3KX-1-GP PR4604 PR4603

1
PU4602 1R5J-2-GP 10KR2J-3-GP
1 2 PWR_GT_VCC1 4 8 PWR_GT_HG1 1 2 0.36uH, DCR=0.6 mohm, Idc=32A, Isat=42A

BST
VCC DRVH

2
7 PWR_GT_SW1 PL4601 1 2 COIL-D36UH-19-GP
20170426
PWR_GT_PWM1 SW 1V_CPU_GT
2

GND

GND
44 PWR_GT_PWM1 PWM PWR_GT_LG1
3 5

1
EN DRVL

1
PR4606 PR4605 PT4602 PT4603

9
51R2F-2-GP 2D2R5F-2-GP E820U2D5VM-6-GP E820U2D5VM-6-GP
1 2 PWR_GT_EN1 NCP81258MNTBG-GP
44,45,46 PWR_VCORE_DRVON

2
1

1
2
5
6
7
8
PG4601 PG4602

D
D
D
D
PU4603 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
BOTTOM PAD AONS36356-GP

PWR_GT_SNB1

2
CONNECT TO
GND Through
4

G
4 VIAs 820uF/2.5V,

S
S
S
ESR=7mohm,

3
2
1
Ripple current=5000mA

1
PC4605
SC1500P50V2KX-2-DL-GP
C C

2
44 PWR_GT_CSP1

44 PWR_GT_CSN1
20170406
rename for new PSU design
12V_CPU 20170418
rename for D9 PSU design
20170419
rename for new PSU and D9 PSU design

1
20170406 PC4606 PC4607
rename for new PSU design SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP
12V_CPU 20170418

2
rename for D9 PSU design
20170419
65W GT

5
6
7
8
rename for new PSU and D9 PSU design

D
D
D
D
PU4604
AONS36358-1-GP
TDC= 30A
1

PR4608 PC4608
PR4607 2D2R5F-2-GP SCD1U50V3KX-DL-GP
PWR_GT_BST2 PWR_GT_BST2_R PWR_GT_HG2_R
2D2R5F-2-GP 1 2 1 2 4
Iccmax= 45A

S
S
S
2

3
2
1
1
PC4609
SC1U50V3KX-1-GP PR4610 PR4609
1

PU4605 1R5J-2-GP 10KR2J-3-GP

1 2 PWR_GT_VCC2 4 8 PWR_GT_HG2 1 2 0.36uH, DCR=0.6 mohm, Idc=32A, Isat=42A
BST

VCC DRVH

2
7 PWR_GT_SW2 PL4602 1 2 COIL-D36UH-19-GP
20170426
PWR_GT_PWM2 SW 1V_CPU_GT
2
GND

GND

B 44 PWR_GT_PWM2 PWM PWR_GT_LG2 B

3 5

1
EN DRVL

1
PR4612 PR4611 PT4604 PT4605
6

51R2F-2-GP 2D2R5F-2-GP E820U2D5VM-6-GP E820U2D5VM-6-GP

1 2 PWR_GT_EN2 NCP81258MNTBG-GP
44,45,46 PWR_VCORE_DRVON

2
1

1
2
5
6
7
8
PG4603 PG4604

D
D
D
D
PU4606 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
BOTTOM PAD AONS36356-GP

PWR_GT_SNB2

2
CONNECT TO
GND Through
4

G
4 VIAs

S
S
S
820uF/2.5V,
ESR=7mohm,
3
2
1
Ripple current=5000mA

1
PC4610
SC1500P50V2KX-2-DL-GP

2
44 PWR_GT_CSP2

44 PWR_GT_CSN2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
V_GT OUTPUT(NCP81258)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 46 of 107
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

84.00920.037 SIZ920DT
HS-
Vgs @ 4.5V, 20170406
Id = 17A, rename for new PSU design
12V_CPU 20170418
Rds(on) = 7.4~8.9mohm, rename for D9 PSU design
LS- PWR_V_12V_CPU_S0_VSA Vin Ripple current Imax = 3.3A PR4701 1 2 GAP-CLOSE-PWR-3-GP
20170419
rename for new PSU and D9 PSU design
Vgs @ 4.5V,
Id = 25A, PR4702 1 2 GAP-CLOSE-PWR-3-GP
Rds(on) = 2.9~3.5mohm, PR4703 1 2 GAP-CLOSE-PWR-3-GP
High Enable Logic

1
PC4701 PC4702 PC4703
SC1U50V3KX-1-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP PR4704 1 2 GAP-CLOSE-PWR-3-GP
Low Diable Logic

2
PR4705 1 2 GAP-CLOSE-PWR-3-GP
PR4707
PWR_VCCSA_PG PU4701 2D2R5J-1-GP PR4706 1 2 GAP-CLOSE-PWR-3-GP
C
40 PWR_VCCSA_PG PWR_VCCSA_UG PWR_VCCSA_UG_R C
RT8237CZQW-2-GP 2 1
OCP setting > 21.7A PR4708 PC4704
40K2R2F-GP 1 11 PR4709 SCD1U50V3KX-DL-GP
51K ohm 1 2 PWR_VCCSA_CS 2 PGOOD GND 10 PWR_VCCSA_BOOT 1 2 PWR_VCCSA_BOOT_R 2 1
PWR_VCCIO_VCCSA_EN 3 CS BOOT 9 PWR_VCCSA_UG 2D2R5J-1-GP 20170412
43,48 PWR_VCCIO_VCCSA_EN EN UGATE

2
PWR_VCCSA_FB 4 8 PWR_VCCSA_PHASE
PWR_VCCSA_RF 5 FB PHASE 7 PWR_VCCSA_VCC PR4710
High: ENALBE VCCSA
RF VCC 6 PWR_VCCSA_LG 10KR2J-3-GP 0.47uH, Iomax= 11.5A
1

LGATE PU4702 DCR=4.0~4.2mohm, 820uF/2.5V,

Low : DISALBE VCCSA PR4711 2 Idc=17.5A, Isat=26A ESR=7mohm, OCP>21.7A

1
470KR2F-GP 5V_S0 3 6.5 * 6.9 * 3.0 mm
1 4 Ripple 1D05V_CPU_SA
PWM Frequency 10 current=5000mA
2

PWR_VCCSA_PHASE 9 PWR_VCCSA_PHASE PL4701 1 2 IND-D47UH-22-GP-U

setting

2
7
PR4712 PWR_VCCSA_LG 8 6
RF=470K

1
2D2R5J-1-GP 5
PWM Freq=290K Hz PR4713

1
2D2R5J-1-GP

1
FDMS3600-02-RJK0215-COLAY-GP PG4701 PC4705 PT4701 PT4702
GAP-CLOSE-PWR-3-GP SC1U50V3KX-1-GP E820U2D5VM-6-GP E820U2D5VM-6-GP

2
1
PC4706

2
SC1U50V3KX-1-GP PWR_VCCSA_SNB
PU4702

2
SIZ998DT-T1-GE3-GP

1
(075.06994.0037) PC4707
SC1500P50V2KX-2-DL-GP

2
PC4708 (R_)
SC18P50V2JN-1DLGP

2 1

PR4714
4K87R2F-GP PR4715
2 1 2 1 PWR_VCCSA_FB1

10R2F-L-GP
1

R1
PR4716
10KR2F-2-GP
R2
2

8 VSS_SA_IO_SENSE
1

PR4717
B 8 VCCSA_SENSE 10R2F-L-GP B
2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VCCSA (NCP1589D)
Size Document Number Rev
D Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 47 of 107
5 4 3 2 1
 5 4 3 2 1

PWR_VCCIO_VIN 1D2V_SM_S3

Vinafix.com PR4801 1

PR4802 1
2

2
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
D D
PR4803 1 2 GAP-CLOSE-PWR-3-GP

PR4804 1 2 GAP-CLOSE-PWR-3-GP

PR4805 1 2 GAP-CLOSE-PWR-3-GP
12V_S0
PR4806 1 2 GAP-CLOSE-PWR-3-GP

PR4807 1 2 GAP-CLOSE-PWR-3-GP

1
PR4808 PR4809 1 2 GAP-CLOSE-PWR-3-GP
10R2F-L-GP

1
PC4801 PC4802 PC4803
SC10U10V5KX-2DLGP SC10U10V5KX-2DLGP SCD1U16V2KX-3DLGP

2
1
PC4804
SC1U50V3KX-1-GP

5
6
7
8
2

D
D
D
D
PU4801 PU4802
APL5611ACI-TRG-GP AONS36358-1-GP
PWR_VCCIO_VCCSA_EN 1 6 PWR_VCCIO_VCC PR4810
43,47,48 PWR_VCCIO_VCCSA_EN EN VCC 100R5J-4-GP
2 5 PWR_VCCIO_DRV 2 1 PWR_VCCIO_DRV_R 4

G
GND DRV

S
S
S
3 4 PWR_VCCIO_SS Iomax= 6.4A

3
2
1
1
FB SS
OCP>9.6A

1
1 PR4811 PC4806
2K2R2F-GP SCD01U50V2KX-1DLGP
PC4805 (R_)

2
SCD047U25V2KX-4-GP 0D95V_CPU_VCCIO
2

2
PWR_VCCIO_FB1 PR4812 1 2

PWR_VCCIO_FB3
0R0402-PAD-2-GP

1
C
1
R1 C

1
(R_) PC4807 PR4813 PT4801 PC4808 PC4809 PC4810
SC1KP50V2KX-1DLGP 10R2F-L-GP PR4814 PR4815 E820U2D5VM-6-GP SC22U6D3V5MX-2DLGP SC22U6D3V5MX-2DLGP SCD1U16V2KX-3DLGP
2

4K7R2F-GP 10R2F-L-GP (R_)

2
PWR_VCCIO_FB2

2
1

PC4812

1
SC2200P50V2KX-2DLGP PC4811 820uF/2.5V,
SCD047U25V2KX-4-GP
ESR=7mohm,
2

2
PWR_VCCIO_FB Ripple current=5000mA

1
R2
PR4816
8 VCCIO_SENSE
VCCIO_SENSE

24KR2F-GP

2
Vout = 0.8*(1+R1/R2)=0.956V

20170417
remove VCCIO, VCCSA short resistor

B B

20170417
move from page 40 3D3V_S0
1

R4801
10KR2J-3-GP

R4802 47KR2J-2-GP
2

1 2 PWR_VCCIO_VCCSA_EN
3D3V_SB PWR_VCCIO_VCCSA_EN 43,47,48
U4801
1 6
R4803 10KR2J-3-GP
PWR_VDDQ_PG 2 5 PWR_VDDQ_PG_ISOLATE 1 2
50 PWR_VDDQ_PG 3D3V_SB
3 4

2N7002KDW-1-GP

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VCCIO(RT8237)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 48 of 107
5 4 3 2 1
 5 4 3 2 1

3D3V_S5 PWR_3D3V
RES X15

PR4901 1 2 GAP-CLOSE-PWR-3-GP

PR4902 1 2 GAP-CLOSE-PWR-3-GP

PR4903 1 2 GAP-CLOSE-PWR-3-GP

V_5P0_A PR4904 1 2 GAP-CLOSE-PWR-3-GP

PR4905 1 2 GAP-CLOSE-PWR-3-GP

PR4906 1 2 GAP-CLOSE-PWR-3-GP
RES X14
PR4908 1 2 GAP-CLOSE-PWR-3-GP
V_3P3_A
Vinafix.com
PR4910 1 2 GAP-CLOSE-PWR-3-GP
12V_S5 PWR_5V3D3V_VIN
PR4912 1 2 GAP-CLOSE-PWR-3-GP
PL4903 MHC2012S800UBP-GP
D PR4914 1 2 GAP-CLOSE-PWR-3-GP 1 2 D

PR4916 1 2 GAP-CLOSE-PWR-3-GP PL4904 MHC2012S800UBP-GP

1 2
PR4918 1 2 GAP-CLOSE-PWR-3-GP
PL4905 MHC2012S800UBP-GP
PR4920 1 2 GAP-CLOSE-PWR-3-GP 1 2
PWR_5V RES X15 5V_S5
PR4922 1 2 GAP-CLOSE-PWR-3-GP

PR4924 1 2 GAP-CLOSE-PWR-3-GP PR4925 1 2 GAP-CLOSE-PWR-3-GP

PWR_5V3D3V_VIN PR4927 1 2 GAP-CLOSE-PWR-3-GP

PR4929 1 2 GAP-CLOSE-PWR-3-GP

1
PWR_5V3D3V_VIN PWR_5V3D3V_VIN
PR4932 PR4933 1 2 GAP-CLOSE-PWR-3-GP
2D2R5J-1-GP
PR4934 1 2 GAP-CLOSE-PWR-3-GP
270uF/16V, Vin Ripple current Imax = 6.1A VIN pin Vin Ripple current Imax = 5.7A

2
ESR=10mohm, PWR_RT6575_VIN
POR VIH=4.6V(typ.) PR4936 1 2 GAP-CLOSE-PWR-3-GP
Ripple current=5000mA

1
PC4901 PC4902 PR4937 1 2 GAP-CLOSE-PWR-3-GP

1
PT4901 PC4903 PC4904 PC4905 PC4906 SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP
E270U16VM-16-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP SCD1U50V3KX-DL-GP PR4938 1 2 GAP-CLOSE-PWR-3-GP

2
2

2
D 8
D 7
D 6
D 5

5
6
7
8
PR4939 1 2 GAP-CLOSE-PWR-3-GP

D
D
D
D
PU4901 PU4902 PU4903
AONS36358-1-GP RT6575DGQW-GP AONS36358-1-GP PR4940 1 2 GAP-CLOSE-PWR-3-GP

12
PR4941
2D2R5J-1-GP PR4945 1 2 GAP-CLOSE-PWR-3-GP
Iomax= 13.5A

VIN
4 PWR_3V_UGATE2R 2 1 PWR_5V_UGATE1R 4

G
G

S
S
S
PC4907 PR4942 PR4943 PC4908 PR4946 1 2 GAP-CLOSE-PWR-3-GP

S
S
S
OCP>20.25A 20170406 SCD1U50V3KX-DL-GP 2D2R5J-1-GP 2D2R5J-1-GP SCD1U50V3KX-DL-GP 20170406

1
2
3

3
2
1
change to DIP part PR4944 1 2 PWR_3V_BOOT2_R 1 2 PWR_3V_BOOT2 9 17 PWR_5V_BOOT1 1 2 PWR_5V_BOOT1_R 1 2 change to DIP part PR4947 1 2 GAP-CLOSE-PWR-3-GP
PWR_3D3V 220uF/6.3V, PL4901 2
2D2R5J-1-GP
1 PWR_3V_UGATE2 10
BOOT2 BOOT1
16 PWR_5V_UGATE1 PL4902
Iomax= 11.5A PR4948 1 2 GAP-CLOSE-PWR-3-GP
ESR=15mohm
Ripple Current=3110mA
1 2 PWR_3V_PHASE2 8
UGATE2 UGATE1
18 PWR_5V_PHASE1 1 2
OCP>17.25A PR4949 1 2 GAP-CLOSE-PWR-3-GP
PHASE2 PHASE1
PWR_3V_LGATE2 11 15 PWR_5V_LGATE1
IND-2D2UH-356-GP LGATE2 LGATE1 IND-2D2UH-356-GP

2
2

1
14 PR4951 PG4901 PC4910 PT4903
BYP1
1

D 8
D 7
D 6
D 5

5
6
7
8
PT4902 PC4909 PG4902 PR4950 (R_) 2D2R5J-1-GP GAP-CLOSE-PWR-3-GP SC1U50V3KX-1-GP SE220U6D3VM-3GP

D
D
D
D
SE220U6D3VM-3GP SC1U50V3KX-1-GP GAP-CLOSE-PWR-3-GP 2D2R5J-1-GP PU4904 PWR_3V_FB2 4 2 PWR_5V_FB1 PU4905 (R_)

2
AONS36356-GP FB2 FB1 AONS36356-GP
2

2
PWR_3D3V_SN 4 PWR_3V_EN2 6 20 PWR_5V_EN1 4 PWR_5V_SN

G
G
EN2 EN1

S
S
S
C C

S
S
S
220uF/6.3V,

1
2
3

3
2
1
PWR_3V_CS2 5 1 PWR_5V_CS1
ESR=15mohm,

1
20170508 CS2 CS1 PC4912 20170508
PWM Frequency setting 3D3V

1
Remove for release space PC4911 (R_) PWM Freq=320K Hz PWM Frequency setting 5V SC1KP50V2KX-1DLGP Ripple current=3160mA Remove for release space
SC1KP50V2KX-1DLGP PR4952 19 PR4953 PWM Freq=253K Hz (R_)

2
78K7R2F-GP VCLK 62KR2F-GP

PWR_RT6575_PG 7 21

2
PGOOD GND
PWR_3V_FB2_A

LDO3

LDO5
PWR_5V_FB1_A

LDO5V

13
1

1
PC4913 (R_)
1

1
R1 PR4954 PC4914 (R_) PG4903 SCD1U16V2KX-3DLGP R1 PR4955 PC4915
6K65R2F-GP SC22P50V2JN-4DLGP GAP-CLOSE-PWR-2U-GP 15K4R2F-GP SC22P50V2JN-4DLGP

2
PWR_5V3D3V_LDO3 PWR_RT6575_LDO5 1 2
2

2
Place close to pin14
2

2
1

1
PC4916 PC4917
SC1U50V3KX-1-GP SC1U50V3KX-1-GP

1
1

PR4957
R2 PR4956 Vout=2 x (1+R1/R2) 10KR2F-2-GP
10KR2F-2-GP R2
=2 x ( 1+6.65/10)
Vout=2 x (1+R1/R2)

2
=3.33V
=2 x ( 1+15.4/10)
2

=5.08V
PR4958
100KR2J-1-GP
2 1
LDO5V

Need EE confirm
LDO5V PWR_5V3D3V_VIN

1
PR4959 PR4960
B 10KR2J-3-GP 100KR2F-L1-GP B
2

2
PWR_3V_EN2 PWR_5V_EN1
1

1
EN pin EN pin
1

1
PC4918 PR4961 PC4919 PR4962
VIH=1.6V(min) SCD22U10V2KX-2-GP 10KR2J-3-GP VIH=1.6V(min) SCD22U10V2KX-2-GP 28KR2F-GP
(R_)
2

2
2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
5V/3D3V_S5_(RT6575D)
Size Document Number Rev
D Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 49 of 107
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

VID
V_SM Logic-High = 0.75V
Logic-Low = 0.3V
PR5001
2D2R2F-GP
PWR_VDDQ_VIOP 2 1
5V_S5
PWR_VDDQ_VIN
VTT 12V_S5

1
PC5001 RES X4
SC1U50V3KX-1-GP

2
PL5002 MHC2012S800UBP-GP
1 2

OCP setting PR5002 PL5003 MHC2012S800UBP-GP

PWR_VDDQ_VDDP 1 2
5V_S5
Vin Ripple current Imax = 4.2A 1 2
PWR_DDR4_CS 0R0603-PAD-2-GP-U

1
PC5002

1
PR5003 SC1U50V3KX-1-GP PC5003 PC5004 PC5005 PC5006 PC5007 (R_)
205KR2F-GP SC1U50V3KX-1-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP

2
2

5
6
7
8
C C

D
D
D
D
PU5002
AONS36358-1-GP
20170417 PU5001 (074.08231.0A73) PR5005 PWR_VDDQ 1D2V_SM_S3
remove PR210 10KR2F RT8231AGQW-GP 2D2R5J-1-GP RES X17

13

11

12
PWR_DDR4_UG 2 1 PWR_DDR4_UG1 4

S
S
S
PR5007 PC5008 PR5006 1 2 GAP-CLOSE-PWR-3-GP

VID

VDD
CS
2D2R5J-1-GP SCD1U50V3KX-DL-GP

3
2
1
1
18 PWR_DDR4_BT 1 2 PWR_DDR4_BT1 1 2 PR5008 1 2 GAP-CLOSE-PWR-3-GP
48 PWR_VDDQ_PG PR5009
620KR2F-GP
PWR_VDDQ_PG 10
PGOOD
BOOT PR5004
10KR2J-3-GP
20170406
change to DIP part
Iomax= 14A PR5010 1 2 GAP-CLOSE-PWR-3-GP
PWR_VDDQ_VIN
1 2 PWR_VDDQ_TON 9
TON UGATE
17 PWR_DDR4_UG
820uF/2.5V, OCP>21A PR5011 1 2 GAP-CLOSE-PWR-3-GP
ESR=7mohm,

2
PWR_VDDQ_S5_EN 8 PL5001
R5001 PWR_VDDQ
VTT_EN 0R2J-2-GP 2 1 S5 Ripple current=5000mA PR5012 1 2 GAP-CLOSE-PWR-3-GP
40 VTT_EN SLP_S3_N R5002 2 1 PWR_VDDQ_S3_EN 7 16 PWR_DDR4_LX 1 2
20,24,40,42,43,99 SLP_S3_N 0R2J-2-GP (R_) S3 PHASE PR5013 1 2 GAP-CLOSE-PWR-3-GP
1 2 PWR_DDR4_LDOIN 19
1D2V_SM_S3

V_SM_VTT PR5014 VLDOIN COIL-1D2UH-50-GP PR5015 1 2 GAP-CLOSE-PWR-3-GP

1
0R0805-PAD-2-GP-U PC5009 15 PWR_DDR4_LG
LGATE

1
SC10U10V5KX-2DLGP PR5016 PC5010 PT5001 PR5017 1 2 GAP-CLOSE-PWR-3-GP
2D2R5J-1-GP SC1U50V3KX-1-GP E820U2D5VM-6-GP

0D675V
2

5
6
7
8
Close to output cap pin1, not PR5018 1 2 GAP-CLOSE-PWR-3-GP

2
D
D
D
D
1 14 PU5003
inside of the output cap

2
VTTGND PGND AONS36356-GP PR5020 1 2 GAP-CLOSE-PWR-3-GP
Iomax= 1.5A

PWR_VDDQ_SNB
5 PWR_DDR4_VDDQ 1 PR5019 2 PR5021 1 2 GAP-CLOSE-PWR-3-GP
VDDQ PWR_VDDQ
0R0402-PAD-2-GP 4

G
PWR_VTT PWR_DDR4_FB

S
S
S
0D675V_VTT_S0 PG5005 1 2 GAP-CLOSE-PWR-3-GP 20 6 PR5022 1 2 GAP-CLOSE-PWR-3-GP
VTT FB

3
2
1
PG5006 1 2 GAP-CLOSE-PWR-3-GP 2 PR5023 1 2 GAP-CLOSE-PWR-3-GP
VTTSNS

VTTREF
1

PC5011 (R_) PC5012 R1 PR5026 1 2 GAP-CLOSE-PWR-3-GP

GND

GND

1
SC10U10V5KX-2DLGP SC10U10V5KX-2DLGP

1
20170421 PR5024 PC5013 (R_) PC5014 PR5027 1 2 GAP-CLOSE-PWR-3-GP
2

change to 15K8R2F 15K8R2F-GP SC18P50V2JN-1DLGP SC1500P50V2KX-2-DL-GP

21

4
PR5028 1 2 GAP-CLOSE-PWR-3-GP

2
2
PR5029 1 2 GAP-CLOSE-PWR-3-GP

PWR_DDR4_VTTREF
PR5030 1 2 GAP-CLOSE-PWR-3-GP

R2

1
VDDQ_EN R5003 1 2 0R0402-PAD-2-GP PWR_VDDQ_S5_EN
40 VDDQ_EN
PR5025
20KR2F-L-GP
1
Vout Setting
Vout = Vref * ( 1 + R1/R2 )

2
B PC5015 B
SCD047U25V2KX-4-GP = 0.675 * ( 1 + 15.8K / 20K)
2

= 1.208V

VID vs Vref Table

VID Logic-High => Vref = 0.675 V
VID Logic-Low => Vref = 0.75 V
note. Vref can only be changed form
0.675v to 0.75v after power-on

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR PWR (RT8231A)
Size Document Number Rev
D Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 50 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

12V_S5
RES X6

84.00920.037 SIZ920DT
HS- PL5104 MHC2012S800UBP-GP
Vgs @ 4.5V, 1 2
Id = 17A,
PL5105 MHC2012S800UBP-GP
Rds(on) = 7.4~8.9mohm, PWR_12V_DUAL_1D0V Vin Ripple current Imax = 3.9A 1 2
LS-
Vgs @ 4.5V,
Id = 25A,

1
PC5101 PC5102 PC5103 PC5104 PC5105
3D3V_SB Rds(on) = 2.9~3.5mohm, SC1U50V3KX-1-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP

2
High Enable Logic
1

PR5108
2D2R5J-1-GP
PR5107 (R_) Low Diable Logic PWR_1D0V_UGATE 2 1 PWR_1D0V_UGATE_R
10KR2J-3-GP Iomax= 14.1A

1
OCP>21.15A
2

PU5101 PU5102
PR5110 PC5106 PR5109 2
PWR_1D0V_PG 1 11 2D2R5J-1-GP SCD1U50V3KX-DL-GP 10KR2J-3-GP 3
PWR_1D0V_CS PGOOD GND PWR_1D0V_BOOT
1.5uH, DCR=3.8~4.2mohm, Idc=16A, Isat=33A
2 10 2 1 PWR_1D0V_BOOT_R 2 1 1 4 PWR_1D0V

2
3P3V_S5_EN 3 CS BOOT 9 PWR_1D0V_UGATE 10 PL5101
PWR_1D0V_FB 4 EN UGATE 8 PWR_1D0V_PHASE 9 PWR_1D0V_PHASE 1 2
PWR_1D0V_RF 5 FB PHASE 7 PWR_1D0V_VCC 7 IND-1D5UH-52-GP
RF VCC 6 PWR_1D0V_LGATE PWR_1D0V_LGATE 8 6
LGATE
1

1
C 5 PC5107 PT5101 C
PR5111 PR5112 SC1U50V3KX-1-GP E820U2D5VM-6-GP
56KR2F-GP 470KR2F-GP RT8237CZQW-2-GP PR5113

2
1
5V_S5 2D2R5J-1-GP

1
PWM Frequency FDMS3600-02-RJK0215-COLAY-GP PR5114 PC5108 (R_)
2

PWR_1D0V_SNB 2
R1 4K87R2F-GP SC18P50V2JN-1DLGP
setting 2

2
PR5115 820uF/2.5V,

2
ROSC=56K RF=470K 2D2R5J-1-GP
ESR=7mohm,
IOCP>21.5A PWM Freq=290K Hz PWR_1D0V_FB Ripple current=5000mA
1

PU5102
SIZ998DT-T1-GE3-GP
VOUT=(1+R1/R2)*0.7
1

1
PC5109 (075.06994.0037) PC5110 Vo(cal.)=1.0577V

1
SC1U50V3KX-1-GP SC1500P50V2KX-2-DL-GP
PR5116
2

2
R2 10KR2F-2-GP

2
PWR_1D0V 1V_PCH_SB
RES X19
20170428
remove 1D8V_SB power solution PR5117 1 2 GAP-CLOSE-PWR-3-GP
change enable signal from 1D8V_SB_PWRGD to SLP_SUSB
PR5118 1 2 GAP-CLOSE-PWR-3-GP
R5101 1 2 0R0402-PAD-2-GP 3P3V_S5_EN
20,24,42 SLP_SUSB
PR5119 1 2 GAP-CLOSE-PWR-3-GP
1

C5101 PR5120 1 2 GAP-CLOSE-PWR-3-GP

SCD1U16V2KX-3DLGP
(R_) PR5121 1 2 GAP-CLOSE-PWR-3-GP
2

PR5122 1 2 GAP-CLOSE-PWR-3-GP
B B
PR5123 1 2 GAP-CLOSE-PWR-3-GP

PR5124 1 2 GAP-CLOSE-PWR-3-GP

PR5125 1 2 GAP-CLOSE-PWR-3-GP

PR5126 1 2 GAP-CLOSE-PWR-3-GP

PR5127 1 2 GAP-CLOSE-PWR-3-GP

PR5128 1 2 GAP-CLOSE-PWR-3-GP

PR5129 1 2 GAP-CLOSE-PWR-3-GP

PR5130 1 2 GAP-CLOSE-PWR-3-GP

PR5131 1 2 GAP-CLOSE-PWR-3-GP

PR5132 1 2 GAP-CLOSE-PWR-3-GP

PR5133 1 2 GAP-CLOSE-PWR-3-GP

PR5134 1 2 GAP-CLOSE-PWR-3-GP

PR5135 1 2 GAP-CLOSE-PWR-3-GP

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH 1D0V_(RT8237C)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 51 of 107
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

PWR_2D5V_VIN 3D3V_S5
5V_S5

PR5201
1 2
0R0805-PAD-2-GP-U
3D3V_S5 Iomax=2A

1
PC5202

1
SC1U50V3KX-1-GP PC5201

1
SC10U10V5KX-2DLGP

2
PR5202 PWR_2D5V 2D5V_VPP_S3

2
10KR2F-2-GP PU5201
APL5930KAI-TRG-1-GP

2
5 PR5203
6 VIN#5 4 1 2
PR5204 0R0402-PAD-2-GP 7 VCNTL VOUT#4 3 0R0805-PAD-2-GP-U
40 PWRGD_VPP POK VOUT#3
1 2 PWR_2D5V_EN 8 2
40 VPP_EN EN FB
PWR_2D5V_VIN 9 1
C VIN#9 GND C

1
PC5203 (R_) PC5204

1
PC5205 SC10U10V5KX-2DLGP SC10U10V5KX-2DLGP
SCD1U16V2KX-3DLGP (074.05934.003D)

2
1
2

2
PR5205 PC5206 (R_)
R1 21K5R2F-GP SC150P50V2JN-3GP

1
PWR_2D5V_FB

1
PR5206
R2 10KR2F-2-GP
Vo=0.8*(1+(R1/R2))=2.52 V

2
B B

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR_2D5V_VPP_(APL5930K)
Size Document Number Rev
B Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 52 of 107
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

1
R5301
12V_S0 D15R2010F-GP
(PCI_)

2
R5302 0R0603-PAD-2-GP-U U5301
1 2 NPC3063_#8 8 1 NPC3063_SWC
(PCI_) 7 DRC SC 2 NPC3063_SWE
6 ISEN SE 3 NPC3063_TCAP
C VCC CAP C
NPC3063_COMP 5 4
VFB GND

K
1
MC34063ADR2G-GP
1

1
C5302 C5303 (PCI_074.34063.0041) D5301

1
SCD1U16V2KX-3DLGP SC10U25V5KX-DL-GP C5301 L5301 SSM14-1-GP
(PCI_) (PCI_) SC470P50V2KX-3DLGP IND-100UH-40-GP (PCI_083.SS14W.008M)
2

2 (PCI_) (PCI_)

A
2

2
R5303 1K96R2F-1-GP
1 2 -12V_S0
(PCI_)
Iomax=100mA

1
1

2
R5304 C5304 R5305
16K9R2F-GP SC10U25V5KX-DL-GP TC5301 4K7R2J-2-GP
(PCI_) (PCI_) E220U16VM-L8-GP (R_)

1
(PCI_)

2
B B

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
MINUS 12V (NCP3063)
Size Document Number Rev
B Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 53 of 107
5 4 3 2 1
 5 4 3 2 1

20170428
Vinafix.com
remove 1D8V_SB power solution

D D

C C

20170412
remove 1D24V_SB power solution

B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 54 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D
20170419
remove IPCC circuit

C C

B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserve
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 55 of 107
5 4 3 2 1
 5 4 3 2 1

C5601
SCD1U16V2KX-3DLGP

HDMI_DATA_CPU_P0 1 2 HDMI_DATA_CMC_P0
7 HDMI_DATA_CPU_P0

D
7 HDMI_DATA_CPU_N0
HDMI_DATA_CPU_N0
C5602
SCD1U16V2KX-3DLGP

1 2 HDMI_DATA_CMC_N0
Vinafix.com TR5601
D

HDMI_DATA_CMC_N0 4 1 HDMI_DATA_CON_N0
C5603
SCD1U16V2KX-3DLGP HDMI_DATA_CMC_P0 3 2 HDMI_DATA_CON_P0

HDMI_DATA_CPU_P1 1 2 HDMI_DATA_CMC_P1
7 HDMI_DATA_CPU_P1 5V_S0
FILTER-4P-172-GP
C5604

20
22
(68.24500.201)
SCD1U16V2KX-3DLGP TR5602 HDMI1
HDMI_DATA_CMC_N1 4 1 HDMI_DATA_CON_N1 HDMI_DATA_CON_P0 1

1
HDMI_DATA_CPU_N1 1 2 HDMI_DATA_CMC_N1 C5612
7 HDMI_DATA_CPU_N1 HDMI_DATA_CMC_P1 HDMI_DATA_CON_P1
3 2 SCD1U16V2KX-3DLGP 2
HDMI_DATA_CON_N0 3

2
C5605 HDMI_DATA_CON_P1 4
SCD1U16V2KX-3DLGP FILTER-4P-172-GP 5
HDMI_DATA_CON_N1 6
(68.24500.201)
HDMI_DATA_CPU_P2 1 2 HDMI_DATA_CMC_P2 TR5603 HDMI_DATA_CON_P2 7
7 HDMI_DATA_CPU_P2

3
HDMI_DATA_CMC_N2 4 1 HDMI_DATA_CON_N2 8
C5606 U5602 HDMI_DATA_CON_N2 9

IN
SCD1U16V2KX-3DLGP HDMI_DATA_CMC_P2 3 2 HDMI_DATA_CON_P2 AP2331SA-7-GP HDMI_DATA_CON_P3 10
20170607 11
HDMI_DATA_CPU_N2 1 2 HDMI_DATA_CMC_N2 change from fuse to power switch HDMI_DATA_CON_N3 12

GND

OUT
7 HDMI_DATA_CPU_N2 13
FILTER-4P-172-GP
(68.24500.201) 14
C5607 TR5604 HDMI_CLK_CON 15

2
SCD1U16V2KX-3DLGP HDMI_DATA_CMC_N3 4 1 HDMI_DATA_CON_N3 5V_HDMI_CONN HDMI_DATA_CON 16
17
HDMI_DATA_CPU_P3 1 2 HDMI_DATA_CMC_P3 HDMI_DATA_CMC_P3 3 2 HDMI_DATA_CON_P3 5V_HDMI_CONN 18
7 HDMI_DATA_CPU_P3 HDMI_DET_CON 19

1
C5608 C5613

1
SCD1U16V2KX-3DLGP FILTER-4P-172-GP SCD1U16V2KX-3DLGP SKT-HDMI23-47-GP-U

21
23
R5601 R5602 R5603 R5604 R5605 R5606 R5607 R5608 (68.24500.201)

2
HDMI_DATA_CPU_N3 1 2 HDMI_DATA_CMC_N3 470R2J-2-GP 470R2J-2-GP 470R2J-2-GP 470R2J-2-GP 470R2J-2-GP 470R2J-2-GP 470R2J-2-GP 470R2J-2-GP
7 HDMI_DATA_CPU_N3
Q5601

2
3D3V_S0 1 6 DDSP_B_TX_N0

Note:ZZ.27002.F7C01
2 5
3D3V_S0
20170522
HDMI_DET_CON 3 4 HDMI_DET_CPU change to 62.10078.641 for EMN issue
HDMI_DET_CPU 17,19

1
2N7002KDW-1-GP
R5609 20170410 R5610
20KR2F-L-GP change to common part 1MR2J-1-GP

2
3D3V_S0
C C

20170607
move to page 59

EU5601
HDMI_DATA_CON_P0 1 10 HDMI_DATA_CON_P0
HDMI_DATA_CON_N0 2 LINE_1 NC#10 9 HDMI_DATA_CON_N0
3 LINE_2 NC#9 8
HDMI_DATA_CON_P1 4 GND GND 7 HDMI_DATA_CON_P1
HDMI_DATA_CON_N1 5 LINE_3 NC#7 6 HDMI_DATA_CON_N1
LINE_4 NC#6

AZ1045-04F-R7G-GP
(R_)

EU5602

HDMI_DATA_CON_P2 1 10 HDMI_DATA_CON_P2
HDMI_DATA_CON_N2 2 LINE_1 NC#10 9 HDMI_DATA_CON_N2
3 LINE_2 NC#9 8
HDMI_DATA_CON_P3 4 GND GND 7 HDMI_DATA_CON_P3
HDMI_DATA_CON_N3 5 LINE_3 NC#7 6 HDMI_DATA_CON_N3
LINE_4 NC#6

AZ1045-04F-R7G-GP
(R_)

EU5603

HDMI_CLK_CON 1 10 HDMI_CLK_CON
B HDMI_DATA_CON 2 LINE_1 NC#10 9 HDMI_DATA_CON B
3 LINE_2 NC#9 8
HDMI_DET_CON 4 GND GND 7 HDMI_DET_CON
5 LINE_3 NC#7 6
LINE_4 NC#6
20170410
change to common part
5V_S0 Reverse V : 20 V
ESD AZ1045-04F-R7G-GP
(R_)
Forward V : 0.47V at 0.5A
Forward Curr. : 500mA
A

Source : 83.R5003.T8F
D5601
RB551V30-GP
K

5V_DDC_HDMI
1
2

RN5601 C5609
SRN2K2J-1-GP SCD1U25V2KX-1-DL-GP
2

HDMI_CLK_CPU
For Reactance
4
3

19 HDMI_CLK_CPU
HDMI_CLK_CON

U5601
3 4
20170509
correcto the power rail name 2 5
3D3V_S0 3D3V_S0
HDMI_DATA_CPU 1 6 HDMI_DATA_CON
19,23 HDMI_DATA_CPU
1

2N7002KDW-1-GP 20170509 C5610 C5611

correcto the power rail name SC470P50V2KX-3DLGP SC470P50V2KX-3DLGP
(R_) (R_)
2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
HDMI
Size Document Number Rev
D Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 56 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 57 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 58 of 107
5 4 3 2 1
 Operation Mode Selection Table(Power on latch)

1
C5901 C5902 POL1_SPICEB(PIN10)
SC2D2U10V3KX-1DLGP-U SCD1U16V2KX-3DLGP

Vinafix.com

2
U5901
0 1
DP_AUX_CON_P
Not use, for Internal Not use, for Internal
C5903 SCD1U16V2KX-3DLGP
4
AVCC_12 AUX_P
2
3 DP_AUX_CON_N POL2(PIN9)
0 Test Purpose Test Purpose
1 2 EDP_AVC12 25 AUX_N
VCCK_12 DDI_VGA_DATA_C_P2 External Flash Mode
LANE0_P
5
1 ROM MODE
EDP_AVC33 1 6 DDI_VGA_DATA_C_N2
AVCC_33 LANE0_N 7 DDI_VGA_DATA_C_P3
14 LANE1_P 8 DDI_VGA_DATA_C_N3 5V_DISPLAY_S0
3D3V_S0 VCC_33 LANE1_N
1

1
C5904 C5905 EDP_DAC33 20 17 3D3V_S0 3D3V_S0
VDD_DAC_33 HVSYNC_PWR 19 EDP_HSYNC
ROM Mode:
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
HSYNC PIN29/30 pull high, connect to SMB_SDA/SMB_SCL(PCH)

1
26 18 EDP_VSYNC C5906 C5907
2

1
PVCC_33 VSYNC SCD1U16V2KX-3DLGP SC4D7U6D3V3KX-DLGP PIN10 pull down, PIN9 pull high
21 EDP_BLUE_P R5901 R5902

2
3D3V_S0 EDP_5VDDCCL 15 BLUE_P 22 EDP_GREEN_P 4K7R2J-2-GP 4K7R2J-2-GP
EDP_5VDDCDA 16 VGA_SCL GREEN_P 23 EDP_RED_P
External Flash Mode:
(R_)
VGA_SDA RED_P PIN29/30 pull high, connect to SMB_SDA/SMB_SCL(PCH)

2
R5918 1 (R_) 2 4K7R2J-2-GP I2C0_SCL_VGA 30
SMB_SCL LDO_RSTB
27 EDP_LDORSTB R5903 1 (R_) 2 4K7R2J-2-GP
3D3V_S0
POL1_SDA PIN9 pull high
20170421 R5919 1 (R_) 2 4K7R2J-2-GP I2C0_SDA_VGA 29 28 EDP_EXPCLKIN R5904 1 (R_) 2 4K7R2J-2-GP POL2_SCL
add reserved PU resistor for vendor's feedback SMB_SDA EXT_CLK_IN 31
PIN10 pull high, connect to SPI FLASH
PIN11/12/13 connect to SPI FLASH

1
R5905 1 (R_) 2 4K7R2J-2-GP EDP_GPI1 11 EXT1.2V_CTRL 32 DP_HPD_CPU
EDP_GPI2 GPI1/SPI_CLK HPD DP_HPD_CPU 17,19
R5906 1 (R_) 2 4K7R2J-2-GP 12 R5908 R5909

1
R5907 1 (R_) 2 4K7R2J-2-GP EDP_GPI3 13 GPI2/SPI_SI 4K7R2J-2-GP 4K7R2J-2-GP
GPI3/SPI_SO 24 R5910 (R_)
POL1_SDA 10 GND 33 100KR2J-1-GP
RTD2166 Slave Address:

2
POL2_SCL 9 POL1/SPI_CEB GND
POL2
0x64/0x65, 0x68/0x69

2
RTD2166-CGT-GP
R5911 0R0402-PAD-2-GP
L5901 MHC1608S600QBP-GP I2C0_SCL_VGA 1 2
EDP_AVC33 SMB_CLK_MAIN 11,12,24,99
3D3V_S0 1 2 6 via on Body PAD
1

C5908 R5912 0R0402-PAD-2-GP

SCD1U16V2KX-3DLGP I2C0_SDA_VGA 1 2
SMB_DATA_MAIN 11,12,24,99
2

C5910 SCD1U16V2KX-3DLGP
L5902 MHC1608S600QBP-GP DP_AUX_CON_P 1 2
1 2 EDP_DAC33 DP_AUX_CPU_P 7
3D3V_S0
1

C5909 C5911 SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP DP_AUX_CON_N 1 2
DP_AUX_CPU_N 7
2

C5912 SCD1U16V2KX-3DLGP
5V_DISPLAY_S0 5V_VGA_CONN DDI_VGA_DATA_C_P2 1 2
DDI_VGA_DATA_CPU_P2 7
F5901
1 2
12V_CPU C5913 SCD1U16V2KX-3DLGP
DDI_VGA_DATA_C_N2 1 2
DDI_VGA_DATA_CPU_N2 7
POLYSW-1D1A6V-9-GP-U

1 R5920 C5914 SCD1U16V2KX-3DLGP

D
10KR2F-2-GP DDI_VGA_DATA_C_P3 1 2
DDI_VGA_DATA_CPU_P3 7
Q5901
AO3418L-GP 20170410
2

5V_DISPLAY_SFR_G G (084.03404.0031) change to common part 5V_VGA_CONN C5915 SCD1U16V2KX-3DLGP

DDI_VGA_DATA_C_N3 1 2
DDI_VGA_DATA_CPU_N3 7
1

20170607

S
isolate HDMI and VGA power
R5921 5V_S0

1
2
100KR2J-1-GP
5V_VGA_CONN
2

RN5901
20170607 SRN2K2J-1-GP 20170607
move from page 56 isolate HDMI and VGA power
VGA1

4
3
9 4 VGA_CABLE_DET_N
VCC_CRT NC#4 VGA_CABLE_DET_N 15
11
NC#11
EDP_5VDDCDA 12
Ref. Sch is FB22ohm EDP_5VDDCCL DDCDATA_ID1
15
DDCCLK_ID3 5
EDP_RED_P L5903 1 2BLM18BB470SN1D-GP RED_CRT 1 GND 6
EDP_GREEN_P L5904 1 2BLM18BB470SN1D-GP GREEN_CRT 2 CRT_RED GND 7 20170522
EDP_BLUE_P L5905 1 2BLM18BB470SN1D-GP BLUE_CRT 3 CRT_GREEN GND 8 change to 020.20064.0015 for ME request
CRT_BLUE GND 10
1

14 GND 16
VSYNC GND
1

1
R5913 R5914 R5915 C5916 C5917 C5918 C5919 C5920 C5921 13 17
75R2F-2-GP 75R2F-2-GP 75R2F-2-GP SC22P50V2JN-4DLGP SC22P50V2JN-4DLGP SC22P50V2JN-4DLGP SC22P50V2JN-4DLGP SC22P50V2JN-4DLGP SC22P50V2JN-4DLGP HSYNC GND
2

2
D-SUB-15-295-GP
2

Ref. Sch is 2PF Ref. Sch is 2PF

EDP_VSYNC R5916 1 2 47R2F-GP EDP_VSYNC_C

EDP_HSYNC R5917 1 2 47R2F-GP EDP_HSYNC_C

1
C5922 C5923
20170421 SC2P50V2CN-3-GP SC2P50V2CN-3-GP
change to 47R & 2pF for vendor's feedback

2
ESD
EU5901 EU5902

GREEN_CRT 1 6 VGA_CABLE_DET_N EDP_5VDDCCL 1 6 EDP_HSYNC_C

2 5 Remove for Leakage 2 5 Remove for Leakage

RED_CRT 3 4 BLUE_CRT EDP_5VDDCDA 3 4 EDP_VSYNC_C

TVLST2304BD0-1-GP TVLST2304BD0-1-GP
(075.02304.007C) (075.02304.007C)
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DP to VGA (RTD2166)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 59 of 107
 5 4 3 2 1

SATA1

SATA_TX_PCH_P0 C6002 1 2 SCD01U50V2KX-1DLGP SATA_TX_CON_P0 2 8

17 SATA_TX_PCH_P0 SATA_TX_PCH_N0 SATA_TX_CON_N0 TXP 8
C6001 1 2 SCD01U50V2KX-1DLGP 3 9
17 SATA_TX_PCH_N0 TXN 9

17 SATA_RX_PCH_P0
SATA_RX_PCH_P0 C6003 1 2 SCD01U50V2KX-1DLGP SATA_RX_CON_P0 6
RXP GND
1 Blue
SATA_RX_PCH_N0 C6004 1 2 SCD01U50V2KX-1DLGP SATA_RX_CON_N0 5 4
17 SATA_RX_PCH_N0 SATA_HDD
Vinafix.com
RXN GND 7
GND

SKT-SATA7P-168-GP
D D

SATA4

SATA_TX_PCH_P1 C6005 1 2 SCD01U50V2KX-1DLGP SATA_TX_CON_P1 2 8

17 SATA_TX_PCH_P1 SATA_TX_PCH_N1 2 SCD01U50V2KX-1DLGP SATA_TX_CON_N1 TXP 8
C6006 1 (MT_) 3 9
17 SATA_TX_PCH_N1 TXN 9
(MT_)
20170426
SATA_RX_PCH_P1 C6007 1 2 SCD01U50V2KX-1DLGP SATA_RX_CON_P1 6 1 change to HDD
17
17
SATA_RX_PCH_P1
SATA_RX_PCH_N1
SATA_RX_PCH_N1 C6008 1 2 SCD01U50V2KX-1DLGP SATA_RX_CON_N1
(MT_) 5 RXP
RXN
GND
GND
4 Black 20170522
change ref from SATA2 to SATA4 to follow ARD
(MT_) 7
GND SATA_HDD
SKT-SATA7P-169-GP
(MT_)

SATA2
9
7
SATA_TX_PCH_P2 C6009 1 2 SCD01U50V2KX-1DLGP SATA_TX_CON_P2 6
17 SATA_TX_PCH_P2 SATA_TX_PCH_N2 SATA_TX_CON_N2
C6010 1 2 SCD01U50V2KX-1DLGP
(MT_) 5
17 SATA_TX_PCH_N2
(MT_) 4 20170426
17 SATA_RX_PCH_N2
SATA_RX_PCH_N2 C6012 1 2 SCD01U50V2KX-1DLGP SATA_RX_CON_N2 3 White change to ODD
SATA_RX_PCH_P2 C6011 1 2 SCD01U50V2KX-1DLGP
(MT_) SATA_RX_CON_P2 2 20170522
17 SATA_RX_PCH_P2
(MT_) SATA_ODD change ref from SATA3 to SATA2 to follow ARD
1
8
modify SATA ODD RX Reverse by Bob 20170808
SKT-SATA7P-29-GP-U
(MT_)

C C

SATA3

SATA_TX_PCH_P3 C6013 1 2 SCD01U50V2KX-1DLGP SATA_TX_CON_P3 2 8

17 SATA_TX_PCH_P3 SATA_TX_PCH_N3 TXP 8
C6014 1 2 SCD01U50V2KX-1DLGP SATA_TX_CON_N3
(MT_) 3 9
17 SATA_TX_PCH_N3 TXN 9 20170522
(MT_)
Black MT only change ref from SATA4 to SATA3 to follow ARD
SATA_RX_PCH_P3 C6015 1 2 SCD01U50V2KX-1DLGP SATA_RX_CON_P3 6 1
17
17
SATA_RX_PCH_P3
SATA_RX_PCH_N3
SATA_RX_PCH_N3 C6016 1 2 SCD01U50V2KX-1DLGP SATA_RX_CON_N3
(MT_) 5 RXP
RXN
GND
GND
4 SATA_HDD
(MT_) 7
GND

SKT-SATA7P-169-GP
(MT_)

3.5" SATA HDD POWER CONNECTOR 2.5" SATA HDD POWER CONNECTOR
MT only
SATAP2
SATAP1 NP1
NP1 4 1
12V_S0
4 1 12V_S0
5 2
5V_S0
5 2 6 3
5V_S0 3D3V_S0
3D3V_S0 6 3 NP2
NP2
PIN-CONN6B-S1-GP
B B
PIN-CONN6B-S1-GP (MT_)

5V_S0 12V_S0
5V_S0 12V_S0

1
C6017 C6020
1

C6018 C6019 SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP

SC10U25V5KX-DL-GP SC10U25V5KX-DL-GP (MT_) (MT_)

2
2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
HDD/ODD
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 60 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 61 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com 20170407
SDD change to 3D3V_S0
SSD power switch is removed

D D

20170407
SDD change to 3D3V_S0

NGFF(M Key) 3D3V_S0

1
20170421 C6201
SSD change to PCIE21, 22, 23, 24 to support Optane NGFF2
C6203 SC1U10V2KX-1DLGP
SCD1U16V2KX-3DLGP (MT_)

2
1 (MT_)
3 GND 2
PCIE_RX_PCH_N24 5 GND 3_3V 4
16 PCIE_RX_PCH_N24 PCIE_RX_PCH_P24 PERN3 3_3V
7 6
16 PCIE_RX_PCH_P24 PERP3 NC#6
9 8
PCIE_TX_PCH_N24 (MT_) C6202 1 2SCD22U10V2KX-2-GP PCIE_TX_CON_N24 11 GND NC#8 10 DAS/DSS#
16 PCIE_TX_PCH_N24 PCIE_TX_PCH_P24 PETN3 DAS/DSS#/LED1# DAS/DSS# 64
(MT_) C6204 1 2SCD22U10V2KX-2-GP PCIE_TX_CON_P24 13 12
16 PCIE_TX_PCH_P24 PETP3 3_3V
C 15 14 C

1
PCIE_RX_PCH_N23 17 GND 3_3V 16 C6205 C6206
16 PCIE_RX_PCH_N23 PCIE_RX_PCH_P23 PERN2 3_3V
16 PCIE_RX_PCH_P23 19 18 SCD1U16V2KX-3DLGP SC10U25V5KX-DL-GP
21 PERP2 3_3V 20 (MT_) (MT_)

2
PCIE_TX_PCH_N23 (MT_) C6207 1 2 SCD22U10V2KX-2-GP PCIE_TX_CON_N23 23 GND NC#20 22
16 PCIE_TX_PCH_N23 PCIE_TX_PCH_P23 PETN2 NC#22
16 PCIE_TX_PCH_P23 (MT_) C6208 1 2 SCD22U10V2KX-2-GP PCIE_TX_CON_P23 25 24
27 PETP2 NC#24 26
PCIE_RX_PCH_N22 29 GND NC#26 28
16 PCIE_RX_PCH_N22 PCIE_RX_PCH_P22 PERN1 NC#28
31 30
16 PCIE_RX_PCH_P22 PERP1 NC#30
33 32
PCIE_TX_PCH_N22 (MT_) C6209 1 2SCD22U10V2KX-2-GP PCIE_TX_CON_N22 35 GND NC#32 34
16 PCIE_TX_PCH_N22 PCIE_TX_PCH_P22 PETN1 NC#34
(MT_) C6210 1 2SCD22U10V2KX-2-GP PCIE_TX_CON_P22 37 36
16 PCIE_TX_PCH_P22 PETP1 NC#36
39 38
PCIE_RX_PCH_N21 41 GND DEVSLP 40
16 PCIE_RX_PCH_N21 PCIE_RX_PCH_P21 43 PERN0/SATA-B+ NC#40 42
16 PCIE_RX_PCH_P21 PERP0/SATA-B- NC#42
45 44
PCIE_TX_PCH_N21 (MT_) C6211 1 2 SCD22U10V2KX-2-GP PCIE_TX_CON_N21 47 GND NC#44 46
16 PCIE_TX_PCH_N21 PCIE_TX_PCH_P21 (MT_) C6212 1 2 SCD22U10V2KX-2-GP PCIE_TX_CON_P21 49 PETN0/SATA-A- NC#46 48
16 PCIE_TX_PCH_P21 51 PETP0/SATA-A+ NC#48 50 PLTRST_LAN_N
PEG_CLK3_PCH# 53 GND PERST#/NC#50 52 PEG_CLKREQ3_PCH# PLTRST_LAN_N 31,40,63,68,91
18 PEG_CLK3_PCH# PEG_CLK3_PCH REFCLKN CLKREQ#/NC#52 SSD_PEWAKE_N PEG_CLKREQ3_PCH# 18
18 PEG_CLK3_PCH 55 54
57 REFCLKP PEWAKE#/NC#54 56 3D3V_S0 R6202 0R2J-2-GP
67 GND NC#56 58 20170407 SSD_PEWAKE_N 1 2 PCH_WAKE_N
SSD_PEDET NC#67 NC#58 SDD change to 3D3V_S0 PCH_WAKE_N 20,31,63,93,94,95
69 68 (R_)
17 SSD_PEDET PEDET_NC-PCIE/GND-SATA SUSCLK_32KHZ
71 70
73 GND 3_3V 72 R6203 0R2J-2-GP
H:PCIe

1
75 GND 3_3V 74 C6213 C6214 1 2 WAKE_M2_SSD_N
GND 3_3V WAKE_M2_SSD_N 15
L:SATA 77
77 76
76 SCD1U16V2KX-3DLGP SC10U25V5KX-DL-GP (R_) Rook 20170330
reserved to follow D9 design
NP1 NP2 (MT_) (MT_)

2
NP1 NP2

SKT-NGFF75P-90-GP-U
(MT_)

B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 62 of 107
5 4 3 2 1
 5 4 3 2 1

3D3V_WLAN_SB 3D3V_WLAN_SB 3D3V_S5

1
R6318

1
C6301 C6302 C6303 C6304 (R_) 10KR2J-3-GP

2
SCD1U16V2KX-3DLGP
(MT_)
SCD1U16V2KX-3DLGP
(MT_)
SCD1U16V2KX-3DLGP
(MT_)
Vinafix.comSCD1U16V2KX-3DLGP
(MT_)

2
D D

U6305 Q6301 R6319 0R2J-2-GP

RSMRST_SIO_N G 4 3 PCM_OUT_C 1 2 PCM_OUT
20,24,99 RSMRST_SIO_N
(R_)
D CNV_DET_G 5 2 CNV_DET_G C6305 SCD1U16V2KX-3DLGP
PCIE_TX_CON_N8 1 2 PCIE_TX_PCH_N8
PCIE_TX_PCH_N8 16
S 6 1 (MT_)
Notice:ZZ.2N702.J3101 20170426
2N7002K-2-GP 2N7002KDW-1-GP change PCIE7 to PCIE8 C6306 SCD1U16V2KX-3DLGP
PCIE_TX_CON_P8 1 2 PCIE_TX_PCH_P8
(R_) (R_) PCIE_TX_PCH_P8 16
R6320 0R2J-2-GP (MT_)
PCM_SYNC_C 1 2 PCM_SYNC
(R_)

for CNVi no detection issue by Bob 20170907

H:4.2mm
NGFF1

76 77
74 76 77 75
3D3V_WLAN_SB 3_3VAUX GND CNV_WT_CLK_DP
72 73
3_3VAUX RESERVED#73 CNV_WT_CLK_DN CNV_WT_CLK_DP 15
70 71 CNV_WT_CLK_DN 15
20170504 68 RESERVED#70 RESERVED#71 69
add for CNVio clock 66 RESERVED#68 GND 67 CNV_WT_0_DP
PULSAR_38D4M_REFCLK RESERVED#66 RESERVED#67/2ND_LANE_PERN1 CNV_WT_0_DN CNV_WT_0_DP 15
C 18 PULSAR_38D4M_REFCLK 64 65 CNV_WT_0_DN 15 C
62 GPIO0_NFC_RESET#/MGPIO7 RESERVED#65/2ND_LANE_PERP1 63
60 NFC_I2C_IRQ/MGPIO5 GND 61 CNV_WT_1_DP
NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1 CNV_WT_1_DN CNV_WT_1_DP 15
58 59
W_DISABLE#1 NFC_I2C_SM_DATA RESERVED#59/2ND_LANE_PETP1 CNV_WT_1_DN 15
20170607 20170508 56 57
remove R1616 to page 63 and change the ref. change from SUSCLK to SUSCLK_WIFI to follow D9 W_DISABLE#2 54 W_DISABLE#1 GND 55 PCH_WAKE_N
PLTRST_LAN_N 52 RESERVED#54/W_DISABLE#2 PEWAKE0# 53 PEG_CLKREQ1_PCH# PCH_WAKE_N 20,31,62,93,94,95
R6304 10KR2J-3-GP 31,40,62,68,91 PLTRST_LAN_N PEG_CLKREQ1_PCH# 18
1 2 PULSAR_38D4M_REFCLK SUSCLK_WIFI 50 PERST0# CLKREQ0# 51 WLAN_PEDET
18 SUSCLK_WIFI GPP_J8_CNV_RXD SUSCLK_32KHZ GND PEG_CLK1_PCH# WLAN_PEDET 17
48 49
15 GPP_J8_CNV_RXD GPP_J9_CNV_TXD COEX1 REFCLKN0 PEG_CLK1_PCH PEG_CLK1_PCH# 18
(MT_) 46 47
15,23 GPP_J9_CNV_TXD GPP_J0_CNV_BLANKING COEX2 REFCLKP0 PEG_CLK1_PCH 18
R6301 60K4R2F-GP 15 GPP_J0_CNV_BLANKING 44 45
1 2 PCM_OUT 42 COEX3 GND 43 PCIE_RX_PCH_N8
CLINK_CLK PERN0 PCIE_RX_PCH_P8 PCIE_RX_PCH_N8 16
40 41
CLINK_DATA PERP0 PCIE_RX_PCH_P8 16
(MT_) 38 39 20170426
R6302 75KR2F-GP CNV_BRI_DT_R 36 CLINK_RESET GND 37 PCIE_TX_CON_N8 change PCIE7 to PCIE8
15 CNV_BRI_DT_R UART_CTS PETN0
1 2 PCM_SYNC CNV_RGI_RSP_R 34 35 PCIE_TX_CON_P8
CNV_RGI_DT_R 32 UART_RTS PETP0 33
15 CNV_RGI_DT_R UART_TX GND
(MT_)
CNV_BRI_RSP_R 22 23 CNV_WR_CLK_DP
UART_BT_WAKE_N UART_RX SDIO_RESET CNV_WR_CLK_DN CNV_WR_CLK_DP 15
R6311 10KR2J-3-GP 20 UART_BT_WAKE_N 20 21 CNV_WR_CLK_DN 15
1 2 W_DISABLE#1 18 UART_WAKE SDIO_WAKE 19
3D3V_WLAN_SB GND SDIO_DAT3 CNV_WR_0_DP
16 17 CNV_WR_0_DP 15
PCM_OUT 14 LED#2 SDIO_DAT2 15 CNV_WR_0_DN
(MT_) 20 PCM_OUT CNV_WR_0_DN 15
R6312 10KR2J-3-GP PCM_IN 12 PCM_OUT SDIO_DAT1 13
20 PCM_IN PCM_IN SDIO_DAT0
1 2 W_DISABLE#2 20 PCM_SYNC
PCM_SYNC 10 11 CNV_WR_1_DP
CNV_WR_1_DP 15
PCM_CLK 8 PCM_SYNC SDIO_CMD 9 CNV_WR_1_DN
20 PCM_CLK PCM_CLK SDIO_CLK CNV_WR_1_DN 15
(MT_) 6 7
4 LED#1 GND 5 USB_PCH_PN14
3D3V_WLAN_SB 3_3VAUX USB_D- USB_PCH_PP14 USB_PCH_PN14 16
2 3
3_3VAUX NGFF_KEY_E_75P USB_D+ WLAN_USB_DET USB_PCH_PP14 16
20170821 1 WLAN_USB_DET 19
add W_DISABLE#1,W_DISABLE#1 Pull-up 10K by Bob GND
NP2 NP1
NP2 NP1

SKT-NGFF75P-91-GP
20170413
R6317 20KR2F-L-GP change to 062.10003.0611
B B
1 2 CNV_RGI_RSP (MT_)
1D8V_PCH
(MT_)
R6316 20KR2F-L-GP
1 2 CNV_BRI_RSP 3D3V_S5 3D3V_WLAN_SB
R1518 22R2J-2-GP R6308 0R3J-0-U-GP
(MT_) CNV_BRI_RSP 1 2 CNV_BRI_RSP_R 1 2
15 CNV_BRI_RSP
(MT_)
(R_)

1
R1520 22R2J-2-GP C6307
CNV_RGI_RSP 1 2 CNV_RGI_RSP_R SC10U6D3V3MX-DL-GP
NGFF CARD STAND OFF
15 CNV_RGI_RSP
(MT_) Near pin4

2
To be placed closed to connector (MT_) HS6301
STF256R109H99-GP
(MT_334.03802.0001)

1
3D3V_S0
1

R6314
2

(R_) 10KR2J-3-GP 3D3V_S5

(MT_) R6315
75KR2F-GP
2

R6306
1

U6302 (MT_) 10KR2J-3-GP 3D3V_S5

GPP_K3 G U6301
17 GPP_K3
2

D NGFF_WIFI_PWR_EN 1 5
D6301 EN VIN#5
2
SLP_WLAN_N K A CNV_DET_S S 3 GND 4
20 SLP_WLAN_N 3D3V_WLAN_SB VOUT VIN#4
(R_) Notice:ZZ.2N702.J3101
1

1
A 2N7002K-2-GP C6310 A
RB551V30-GP C6308 C6309 RT9724GB-GP SCD1U16V2KX-3DLGP
D6302 (MT_)
SC22U6D3V3MX-1-DL-GP SCD1U16V2KX-3DLGP (MT_)
2

2
2

NGFF_WIFI_PWR_CRL K A (MT_) (MT_) (MT_74.06288.B7F)

17 NGFF_WIFI_PWR_CRL
R6313
RB551V30-GP
10KR2J-3-GP
(MT_) (MT_)
Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

3D3V_S5 Taipei Hsien 221, Taiwan, R.O.C.

Title
Mini card-NGFF
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 63 of 107
5 4 3 2 1
 5 4 3 2 1

MT only 3D3V_S5

1
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
R6401
POWER BUTTON 4K7R2J-2-GP

Vinafix.com

1
20170413 R6422 R6402 R6403 R6404

2
change to on board power switch PWRSW1 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
remove the net FP_CBL_DET, CHASSIS_ID_0 S1 S2 PWR_BTNJ_C R6405 1 2 33R2J-2-GP PWRBTN_N (LIGHT_) (NOTPM_) (GAM_) (R_)
PWRBTN_N 20,24,99

2
1
D White FORM_FAC_ID_3 D
C6401
PWR_LED_Y L1
+ -
L2 PWR_LED_G FORM_FAC_ID_2 FORM_FAC_ID_3 15
SC1U10V2KX-1DLGP
FORM_FAC_ID_1 FORM_FAC_ID_2 15

2
- +
FORM_FAC_ID_0 FORM_FAC_ID_1 15
Amber
FORM_FAC_ID_0 15
PTH1 PTH2

1
SW-TACT-LED-5-GP-U R6423 R6406 R6407 R6408
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
(MT_) (TPM_) (EAGID_)

2
5V_S5
SKU ID
Type ID_3 ID_2 ID_1 ID_0

2
3D3V_SB Gambit MLK MT w/o TPM IC 0 1 1 0
PWR_LED_G R6409
150R6J-1-GP Eagle MT w/ TPM IC 0 0 0 0

1
R6410 Eagle MT w/o TPM IC 0 1 0 0

1
White LED Amber LED Q6401 4K7R2J-2-GP Gambit MLK SFF w/o TPM IC X 1 1 1
PWR_LED_G 6 1

2
SIO_GREEN_1 5 2 SIO_YELLOW_1 R6411 1 2 10KR2J-3-GP SIO_YELLOW Eagle SFF w/ TPM IC X 0 0 1
SIO_YELLOW 24

1
C6402 Eagle SFF w/o TPM IC X 1 0 1
SCD1U16V2KX-3DLGP 4 3
(R_) Eagle Light w/o TPM IC,M2,PCI,PCIe 1 1 0 0
2
3D3V_SB
2N7002KDW-1-GP
PWR_LED_Y

1
5V_S5

C R6412 C
4K7R2J-2-GP

2
1

R6413 SIO_GREEN_1 R6414 1 2 10KR2J-3-GP SIO_GREEN

100R6J-3-GP SIO_GREEN 24

S0 White
2

Chassis ID
S3 White(blinking) PWR_LED_Y
ID_0 Chassis CY18 (CFL) CY16 (KBL)
SIO_YELLOW SIO_GREEN 0 Vostro Eagle Tahoe MLK
S4/S5 LED off
1

C6403
SCD1U16V2KX-3DLGP ORANGE(SUS_LED) L H 1 Inspiron Gambit MLK Gambit
(R_) WHITE(PWR_LED) H L
No Post Amber
2

Power switch cable select

Failure
to Post Amber(blinking)

3D3V_S0
20170419

20170517 SFF only add back for SFF

20170424
1

add for SSD LED remove circuit for MT

R6420
B
10KR2J-3-GP
U6402
POWER BUTTON B

SATA_LED_OUT 3 4
2

62 DAS/DSS# DAS/DSS# 2 5
R6421 10KR2J-3-GP
1 6 DAS/DSS#_NMOS 1 2
3D3V_S0

2N7002KDW-1-GP
LED1 U6401
R6418 1 2 360R3-GP HDD_LED_PWR1 A K SATA_LED_OUT 3 4
5V_S0
20170509
17 PCH_SATA_LED_N LED-W-130-GP PCH_SATA_LED_N 2 5 correcto the power rail name
R6416 10KR2J-3-GP
1 6 PCH_SATA_LED_NMOS 1 2
3D3V_S0

2N7002KDW-1-GP

SFF only
20170410
change to mounted
20170424
remove circuit for MT

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PWR Button/LED
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 64 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 65 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 66 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 67 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

LPC DEBUG PORT

C C
20170504
change to standard LPC debug connector

LPC1
15
LPC_SERIRQ_PCH 1
19,24 LPC_SERIRQ_PCH
LPC_CLK_14M_DEBUG 2
19 LPC_CLK_14M_DEBUG
3
PLTRST_LAN_N 4
31,40,62,63,91 PLTRST_LAN_N LPC_FRAME#_PCH 5
19,24 LPC_FRAME#_PCH LPC_AD_PCH_P3 6
19,24 LPC_AD_PCH_P3 LPC_AD_PCH_P2
19,24 LPC_AD_PCH_P2 7
LPC_AD_PCH_P1 8
19,24 LPC_AD_PCH_P1 LPC_AD_PCH_P0
19,24 LPC_AD_PCH_P0 9
10
3D3V_S0
11
12
SP_TXD_SIO_CON 13
SP_RXD_N_CON 14
16

20170421 ACES-CON14-5-GP
add TXD, RXT @ LPC connector for BIOS debug
(X_)

R6801 0R2J-2-GP
SP_TXD_SIO 1 2 SP_TXD_SIO_CON
24 SP_TXD_SIO
(X_)

R6802 0R2J-2-GP
SP_RXD_N 1 2 SP_RXD_N_CON
24 SP_RXD_N
(X_)
B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
LPC/UART Port
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 68 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 69 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 70 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 71 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 72 of 107
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 73 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 74 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 75 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 76 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 77 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 78 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 79 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 80 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 81 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 82 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 83 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 84 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 85 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 86 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 87 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 88 of 107
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 89 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 90 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

R9101 0R3J-0-U-GP
1 2
3D3V_S0
(TPM_)

R9104 0R3J-0-U-GP
1 2 TPM_VDD_P8
3D3V_SB
(R_)

1
C9101 C9102 C9103
SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
(TPM_) (TPM_) (TPM_)

2
R9113
Nuvoton TPM
1 2 SPI_CS_PCH_N2 U9101
3D3V_SB 3D3V_SB
10KR2J-3-GP TPM_VDD_P8 8 29 SLP_S0_PLT_N
VHIO SDA/GPIO0 SLP_S0_PLT_N 20,24,40
22 30 R9112 0R0402-PAD-2-GP
VHIO SCL/GPIO1 18 TPM_PIRQ 1 2 PIRQA_N
PIRQ#/GPIO2 PIRQA_N 19
1 6
R9113 X01 have to add 3D3V_SB

1
C9104 C9105 VSB GPIO3 13
SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP GPIO4 4 TPM_PP 1 TP9106 TPAD30
modfiy by bob 20170724 2
(TPM_) (TPM_) SPI_SI_TPM 21 PP/GPIO6

2
SPI_SO_TPM 24 MOSI/GPIO7
TPM_CS 20 MISO 7
SPI_CLK_TPM 19 SCS#/GPIO5 NC#7 9
SCLK NC#9 10
TPM_RST_R 17 NC#10 11
C C
PLTRST# NC#11 12
NC#12 14
16 NC#14 15
R9106 33R2J-2-GP 23 GND NC#15 25
SPI_SI_PCH 1 2 SPI_SI_TPM 33 GND NC#25 26
15,23,25,99 SPI_SI_PCH GND NC#26
(TPM_) 27
NC#27 28
R9105 33R2J-2-GP 2 NC#28 31
SPI_SO_PCH 1 2 SPI_SO_TPM 3 NC#2 NC#31 32
15,23,25 SPI_SO_PCH NC#3 NC#32
(TPM_) 5
NC#5
R9108 0R0402-PAD-2-GP
SPI_CS_PCH_N2 1 2 TPM_CS NPCT750JAAYX-1-GP
15 SPI_CS_PCH_N2
(TPM_)
R9107 33R2J-2-GP
SPI_CLK_PCH 1 2 SPI_CLK_TPM
15,25 SPI_CLK_PCH
(TPM_)

12V_S0

1
C9106
SCD1U16V2KX-3DLGP
(R_)

2
Q9101
G

PLTRST_LAN_N D
31,40,62,63,68 PLTRST_LAN_N
S 2 TPM_RST_R

2N7002K-2-GP
(TPM_) R9110
B 10KR2J-3-GP B
(TPM_)
1
R9111 2 0R2J-2-GP
1

(R_)

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
TPM
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 91 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

-12V_S0
3D3V_S0 5V_S0 12V_S0
20170821 SLOT4
add PCI_DET Pull-up 10K by Bob NP1 5V_S0
1 2
20170831 3D3V_S0
Delete PCI_DET Pull-up 10K by Bob 3 4 PME_N_1 R9201 1 2 0R2J-2-GP PME_N
PME_N 95
5 6 (R_)
7 8 R9202 1 2 0R2J-2-GP PCH_PME_N
PCH_PME_N 15
9 10 (PCI_)
PINTA_N 11 12
95 PINTA_N PINTC_N PINTB_N
95 PINTC_N 13 14
15 16 PINTD_N PINTB_N 95
PINTD_N 95
17 18
19 20
21 22 12V_S0 -12V_S0 3D3V_PCIVAUX_SB
23 24 20170831
25 26 Delete PIN22 PCI_DET by Bob

1
3D3V_PCIVAUX_SB 27 28 C9201 C9202 C9203
PCIRST# 29 30 SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
95 PCIRST# PCI_CLK1
31 32 (PCI_) (PCI_) (PCI_)
PCI_CLK1 95

2
C 95 PGNT0# PGNT0# 33 34 C
35 36 PREQ0#
PME_N_1 PREQ0# 95
37 38
PAD30 39 40 PAD31
95 PAD30 41 42 PAD31 95
PAD29
PAD29 95
PAD28 43 44
95 PAD28 45 46 5V_S0
PAD26 PAD27
95 PAD26 PAD27 95
47 48 PAD25
PAD25 95
R9203 22R2J-2-GP PAD24 49 50
1 2 95 PAD24 IDSEL_1 51 52
PAD16 PCBE3#
PCBE3# 95

1
(PCI_) 53 54 PAD23 C9204 C9205 C9206
55 56 PAD23 95
PAD22 SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
95 PAD22
PAD20 57 58 PAD21 (PCI_) (PCI_) (PCI_)
95 PAD20 PAD21 95

2
59 60 PAD19
61 62 PAD19 95
PAD18
95 PAD18
PAD16 63 64 PAD17
95 PAD16 65 66 PAD17 95
PCBE2#
PCBE2# 95
95 PFRAME# PFRAME# 67 68
69 70 PIRDY#
71 72 PIRDY# 95 3D3V_S0
95 PTRDY# PTRDY#
73 74 PDVSEL#
75 76 PDVSEL# 95
95 PSTOP# PSTOP#
77 78 PLOCK#
PLOCK# 95

1
SMB_CLK_RESUME 79 80 PPERR# C9207 C9208 C9209
20,24,93,94 SMB_CLK_RESUME SMB_DATA_RESUME 81 82 PPERR# 95
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
20,24,93,94 SMB_DATA_RESUME
83 84 PSERR# (PCI_) (PCI_) (PCI_)

2
85 86 PSERR# 95
95 PPAR PPAR
PAD15 87 88 PCBE1#
95 PAD15 PCBE1# 95
89 90 PAD14
91 92 PAD14 95
PAD13
95 PAD13
PAD11 93 94 PAD12
95 PAD11 95 96 PAD12 95
PAD10
PAD10 95
PAD9 97 98
95 PAD9
NP2
PCBE0# 99 100 PAD8
95 PCBE0# PAD8 95
101 102 PAD7
103 104 PAD7 95
PAD6
95 PAD6
PAD4 105 106 PAD5
B 95 PAD4 PAD5 95 B
107 108 PAD3
109 110 PAD3 95
PAD2
95 PAD2
PAD0 111 112 PAD1
95 PAD0 113 114 PAD1 95
R9204 1 2 8K2R2J-3-GP ACK64_N1 115 116 REQ64B_N1 R9205 2 1 8K2R2J-3-GP
3D3V_S0 3D3V_S0
(PCI_) 117 118 (PCI_)
119 120

PCISLT120-31-GP
(PCI_)

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCI Slot
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 92 of 107
5 4 3 2 1
 5 4 3 2 1

SLOT2

C9301 SCD22U10V2KX-2-GP B1 A1
PEG_TX_CPU_P0 12V_S0 P_12V PRSNT1#
1 2 PEG_TX_CON_P0
3 PEG_TX_CPU_P0 B2 A2
P_12V P_12V 12V_S0
(MT_) B3 A3

Vinafix.com
C9304 SCD22U10V2KX-2-GP B4 RSVD#B3 P_12V A4
PEG_TX_CPU_N0 1 2 PEG_TX_CON_N0 SMB_CLK_RESUME B5 GND GND A5
3 PEG_TX_CPU_N0 20,24,92,94 SMB_CLK_RESUME SMB_DATA_RESUME SMCLK JTAG2
B6 A6
20,24,92,94 SMB_DATA_RESUME B7 SMDAT JTAG3 A7
(MT_)
C9305 SCD22U10V2KX-2-GP B8 GND JTAG4 A8
D PEG_TX_CPU_P1 3D3V_S0 P_3V3 JTAG5 D
1 2 PEG_TX_CON_P1 B9 A9 20170406
3 PEG_TX_CPU_P1 JTAG1 P_3V3 3D3V_S0 change net name to PLTRST_PEG_N
B10 A10
3D3V_PCIVAUX_SB
PCH_WAKE_N VAUS_3V3 P_3V3 PLTRST_PEG_N
(MT_) 20,31,62,63,94,95 PCH_WAKE_N B11 A11 PLTRST_PEG_N 40
C9302 SCD22U10V2KX-2-GP WAKE# PWRGD
PEG_TX_CPU_N1 1 2 PEG_TX_CON_N1 PEG_CLKREQ8_PCH# B12 A12 R9301
3 PEG_TX_CPU_N1 18 PEG_CLKREQ8_PCH# RSVD#B12 GND PEG_CLK8_PCH
B13 A13 0R0402-PAD-2-GP
PEG_TX_CON_P0 GND REFCLK_P PEG_CLK8_PCH# PEG_CLK8_PCH 18
(MT_) B14 A14
PEG_TX_CON_N0 HSO0_P REFCLK_N PEG_CLK8_PCH# 18 PCIE_SLOT2_PRSNT_N PCIE_SLOT2_PRSNT_N_R
C9306 SCD22U10V2KX-2-GP B15 A15 18 PCIE_SLOT2_PRSNT_N 1 2
PEG_TX_CPU_P2 1 2 PEG_TX_CON_P2 B16 HSO0_N GND A16 PEG_RX_CPU_P0
3 PEG_TX_CPU_P2 GND HSI0_P PEG_RX_CPU_N0 PEG_RX_CPU_P0 3
B17 A17 PEG_RX_CPU_N0 3
B18 PRSNT2##B17 HSI0_N A18
(MT_)
C9303 SCD22U10V2KX-2-GP PEG_TX_CON_P1 B19 GND GND A19
PEG_TX_CPU_N2 1 2 PEG_TX_CON_N2 PEG_TX_CON_N1 B20 HSO1_P RSVD#A19 A20
3 PEG_TX_CPU_N2 B21 HSO1_N GND A21 PEG_RX_CPU_P1
GND HSI1_P PEG_RX_CPU_N1 PEG_RX_CPU_P1 3
(MT_) B22 A22 PEG_RX_CPU_N1 3
C9307 SCD22U10V2KX-2-GP PEG_TX_CON_P2 B23 GND HSI1_N A23
PEG_TX_CPU_P3 1 2 PEG_TX_CON_P3 PEG_TX_CON_N2 B24 HSO2_P GND A24
3 PEG_TX_CPU_P3 B25 HSO2_N GND A25 PEG_RX_CPU_P2
GND HSI2_P PEG_RX_CPU_N2 PEG_RX_CPU_P2 3
(MT_) B26 A26
PEG_TX_CON_P3 GND HSI2_N PEG_RX_CPU_N2 3
C9308 SCD22U10V2KX-2-GP B27 A27
PEG_TX_CPU_N3 1 2 PEG_TX_CON_N3 PEG_TX_CON_N3 B28 HSO3_P GND A28
3 PEG_TX_CPU_N3 B29 HSO3_N GND A29 PEG_RX_CPU_P3
GND HSI3_P PEG_RX_CPU_N3 PEG_RX_CPU_P3 3 3D3V_PCIVAUX_SB
(MT_) B30 A30 PEG_RX_CPU_N3 3 12V_S0 3D3V_S0
C9309 SCD22U10V2KX-2-GP B31 RSVD#B30 HSI3_N A31
PEG_TX_CPU_P4 1 2 PEG_TX_CON_P4 B32 PRSNT2##B31 GND A32
3 PEG_TX_CPU_P4 PEG_TX_CON_P4 B33 GND RSVD#A32 A33

1
PEG_TX_CON_N4 B34 HSO4_P RSVD#A33 A34 C9310 C9311 C9312
(MT_)
C9313 SCD22U10V2KX-2-GP B35 HSO4_N GND A35 PEG_RX_CPU_P4 SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
PEG_TX_CPU_N4 GND HSI4_P PEG_RX_CPU_P4 3
1 2 PEG_TX_CON_N4 B36 A36 PEG_RX_CPU_N4 (MT_) (MT_) (MT_)
PEG_RX_CPU_N4 3

2
3 PEG_TX_CPU_N4 PEG_TX_CON_P5 B37 GND HSI4_N A37
PEG_TX_CON_N5 B38 HSO5_P GND A38
(MT_)
C9314 SCD22U10V2KX-2-GP B39 HSO5_N GND A39 PEG_RX_CPU_P5
PEG_TX_CPU_P5 GND HSI5_P PEG_RX_CPU_P5 3
1 2 PEG_TX_CON_P5 B40 A40 PEG_RX_CPU_N5
PEG_RX_CPU_N5 3
3 PEG_TX_CPU_P5 PEG_TX_CON_P6 B41 GND HSI5_N A41
PEG_TX_CON_N6 B42 HSO6_P GND A42
(MT_)
C9315 SCD22U10V2KX-2-GP B43 HSO6_N GND A43 PEG_RX_CPU_P6
PEG_TX_CPU_N5 GND HSI6_P PEG_RX_CPU_P6 3
1 2 PEG_TX_CON_N5 B44 A44 PEG_RX_CPU_N6
3 PEG_TX_CPU_N5 PEG_TX_CON_P7 GND HSI6_N PEG_RX_CPU_N6 3
C B45 A45 C
PEG_TX_CON_N7 B46 HSO7_P GND A46
(MT_)
C9316 SCD22U10V2KX-2-GP B47 HSO7_N GND A47 PEG_RX_CPU_P7
PEG_TX_CPU_P6 GND HSI7_P PEG_RX_CPU_P7 3
1 2 PEG_TX_CON_P6 B48 A48 PEG_RX_CPU_N7
3 PEG_TX_CPU_P6 PRSNT2##B48 HSI7_N PEG_RX_CPU_N7 3
B49 A49
PEG_TX_CON_P8 B50 GND GND A50
(MT_)
C9317 SCD22U10V2KX-2-GP PEG_TX_CON_N8 B51 HSO8_P RSVD#A50 A51
PEG_TX_CPU_N6 1 2 PEG_TX_CON_N6 B52 HSO8_N GND A52 PEG_RX_CPU_P8
3 PEG_TX_CPU_N6 GND HSI8_P PEG_RX_CPU_N8 PEG_RX_CPU_P8 3
B53 A53
PEG_TX_CON_P9 GND HSI8_N PEG_RX_CPU_N8 3
(MT_) B54 A54
C9318 SCD22U10V2KX-2-GP PEG_TX_CON_N9 B55 HSO9_P GND A55
PEG_TX_CPU_P7 1 2 PEG_TX_CON_P7 B56 HSO9_N GND A56 PEG_RX_CPU_P9
3 PEG_TX_CPU_P7 GND HSI9_P PEG_RX_CPU_N9 PEG_RX_CPU_P9 3
B57 A57 PEG_RX_CPU_N9 3
PEG_TX_CON_P10 B58 GND HSI9_N A58
(MT_)
C9319 SCD22U10V2KX-2-GP PEG_TX_CON_N10 B59 HSO10_P GND A59
PEG_TX_CPU_N7 1 2 PEG_TX_CON_N7 B60 HSO10_N GND A60 PEG_RX_CPU_P10
3 PEG_TX_CPU_N7 GND HSI10_P PEG_RX_CPU_N10 PEG_RX_CPU_P10 3
B61 A61
PEG_TX_CON_P11 GND HSI10_N PEG_RX_CPU_N10 3
(MT_) B62 A62
C9320 SCD22U10V2KX-2-GP PEG_TX_CON_N11 B63 HSO11_P GND A63
PEG_TX_CPU_P8 1 2 PEG_TX_CON_P8 B64 HSO11_N GND A64 PEG_RX_CPU_P11
3 PEG_TX_CPU_P8 GND HSI11_P PEG_RX_CPU_N11 PEG_RX_CPU_P11 3
B65 A65 PEG_RX_CPU_N11 3
PEG_TX_CON_P12 B66 GND HSI11_N A66
(MT_)
C9321 SCD22U10V2KX-2-GP PEG_TX_CON_N12 B67 HSO12_P GND A67
PEG_TX_CPU_N8 1 2 PEG_TX_CON_N8 B68 HSO12_N GND A68 PEG_RX_CPU_P12
3 PEG_TX_CPU_N8 GND HSI12_P PEG_RX_CPU_N12 PEG_RX_CPU_P12 3
B69 A69
PEG_TX_CON_P13 GND HSI12_N PEG_RX_CPU_N12 3
(MT_) B70 A70
C9322 SCD22U10V2KX-2-GP PEG_TX_CON_N13 B71 HSO13_P GND A71
PEG_TX_CPU_P9 1 2 PEG_TX_CON_P9 B72 HSO13_N GND A72 PEG_RX_CPU_P13
3 PEG_TX_CPU_P9 GND HSI13_P PEG_RX_CPU_N13 PEG_RX_CPU_P13 3
B73 A73
PEG_TX_CON_P14 GND HSI13_N PEG_RX_CPU_N13 3
(MT_) B74 A74
C9323 SCD22U10V2KX-2-GP PEG_TX_CON_N14 B75 HSO14_P GND A75
PEG_TX_CPU_N9 1 2 PEG_TX_CON_N9 B76 HSO14_N GND A76 PEG_RX_CPU_P14
3 PEG_TX_CPU_N9 GND HSI14_P PEG_RX_CPU_N14 PEG_RX_CPU_P14 3
B77 A77 PEG_RX_CPU_N14 3
PEG_TX_CON_P15 B78 GND HSI14_N A78
(MT_)
C9324 SCD22U10V2KX-2-GP PEG_TX_CON_N15 B79 HSO15_P GND A79
PEG_TX_CPU_P10 1 2 PEG_TX_CON_P10 B80 HSO15_N GND A80 PEG_RX_CPU_P15
3 PEG_TX_CPU_P10 PCIE_SLOT2_PRSNT_N_R GND HSI15_P PEG_RX_CPU_N15 PEG_RX_CPU_P15 3
B81 A81
PRSNT2##B81 HSI15_N PEG_RX_CPU_N15 3
(MT_) B82 A82
B
C9325 SCD22U10V2KX-2-GP RSVD#2#B82 GND B
PEG_TX_CPU_N10 1 2 PEG_TX_CON_N10 NP1
3 PEG_TX_CPU_N10 NP1 NP2
PCIe X16 slot NP2
(MT_)
C9326 SCD22U10V2KX-2-GP PCISLT164-187-GP
PEG_TX_CPU_P11 1 2 PEG_TX_CON_P11
3 PEG_TX_CPU_P11 (MT_020.50008.0164)

(MT_)
C9328 SCD22U10V2KX-2-GP
PEG_TX_CPU_N11 1 2 PEG_TX_CON_N11
3 PEG_TX_CPU_N11
(MT_)
C9329 SCD22U10V2KX-2-GP
PEG_TX_CPU_P12 1 2 PEG_TX_CON_P12
3 PEG_TX_CPU_P12
20170411
(MT_) reserve CEC control
C9331 SCD22U10V2KX-2-GP 20170531
PEG_TX_CPU_N12 1 2 PEG_TX_CON_N12 remove PEG powre control
3 PEG_TX_CPU_N12 circuit
(MT_)
C9332 SCD22U10V2KX-2-GP
PEG_TX_CPU_P13 1 2 PEG_TX_CON_P13
3 PEG_TX_CPU_P13
(MT_)
C9334 SCD22U10V2KX-2-GP
PEG_TX_CPU_N13 1 2 PEG_TX_CON_N13
3 PEG_TX_CPU_N13
(MT_)
C9335 SCD22U10V2KX-2-GP
PEG_TX_CPU_P14 1 2 PEG_TX_CON_P14
3 PEG_TX_CPU_P14
20170413
(MT_) change from 074.07402.0093 to 74.03526.093
C9336 SCD22U10V2KX-2-GP
PEG_TX_CPU_N14 1 2 PEG_TX_CON_N14
3 PEG_TX_CPU_N14
(MT_)
C9337 SCD22U10V2KX-2-GP
CEC
PEG_TX_CPU_P15 1 2 PEG_TX_CON_P15
A 3 PEG_TX_CPU_P15
(MT_)
PCIEx16 12V_S0, 3D3V_S0 power control A

C9338 SCD22U10V2KX-2-GP
PEG_TX_CPU_N15 1 2 PEG_TX_CON_N15
3 PEG_TX_CPU_N15
(MT_)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCIeX16
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 93 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com B1
SLOT1
A1
12V_S0
D D
B2 A2
12V_S0
B3 A3
C9401 SCD22U10V2KX-2-GP B4 A4
PCIE_TX_PCH_P7 1 2 PCIE_TX_CON_P7 SMB_CLK_RESUME B5 A5
16 PCIE_TX_PCH_P7 20,24,92,93,94 SMB_CLK_RESUME SMB_DATA_RESUME
(MT_) 20,24,92,93,94 SMB_DATA_RESUME B6 A6
20170426 B7 A7
change PCIE6 to PCIE7 C9402 SCD22U10V2KX-2-GP B8 A8
PCIE_TX_PCH_N7 3D3V_S0
16 PCIE_TX_PCH_N7 1 2 PCIE_TX_CON_N7 B9 A9 3D3V_S0
(MT_) B10 A10
3D3V_PCIVAUX_SB
PCH_WAKE_N PLTRST_PCI_N
20,31,62,63,93,94,95 PCH_WAKE_N B11 A11 PLTRST_PCI_N 40,94,95
R9401 0R0402-PAD-2-GP NP1
PCIE_SLOT1_PRSNT_N 1 2 PCIE_SLOT1_PRSNT_N_R PEG_CLKREQ9_PCH# B12 A12
15 PCIE_SLOT1_PRSNT_N 18 PEG_CLKREQ9_PCH# PEG_CLK9_PCH
B13 A13
20170426 PCIE_TX_CON_P7 B14 A14 PEG_CLK9_PCH# PEG_CLK9_PCH 18
change PCIE6 to PCIE7 PCIE_TX_CON_N7 PEG_CLK9_PCH# 18
B15 A15
B16 A16 PCIE_RX_PCH_P7
PCIE_SLOT1_PRSNT_N_R B17 A17 PCIE_RX_PCH_N7 PCIE_RX_PCH_P7 16
B18 A18 PCIE_RX_PCH_N7 16
NP2 20170426
change PCIE6 to PCIE7
PCISLT36-7-GP
(MT_20.50534.036)
3D3V_S0 3D3V_PCIVAUX_SB 12V_S0 20170522
add F7 for ME request

1
C9403 C9404 C9405
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
2 (MT_) (MT_) (MT_)

2
C C

SLOT3
12V_S0 B1 A1

B2 A2
12V_S0
B3 A3
C9406 SCD22U10V2KX-2-GP B4 A4
PCIE_TX_PCH_P9 1 2 PCIE_TX_CON_P9 SMB_CLK_RESUME B5 A5
17 PCIE_TX_PCH_P9 20,24,92,93,94 SMB_CLK_RESUME SMB_DATA_RESUME
(MT_) B6 A6
20,24,92,93,94 SMB_DATA_RESUME
B7 A7
C9407 SCD22U10V2KX-2-GP 3D3V_S0 B8 A8
PCIE_TX_PCH_N9 1 2 PCIE_TX_CON_N9 B9 A9
17 PCIE_TX_PCH_N9 3D3V_S0
(MT_) 3D3V_PCIVAUX_SB B10 A10
PCH_WAKE_N B11 A11 PLTRST_PCI_N
20,31,62,63,93,94,95 PCH_WAKE_N PLTRST_PCI_N 40,94,95
R9402 0R0402-PAD-2-GP NP1
PCIE_SLOT4_PRSNT_N 1 2 PCIE_SLOT4_PRSNT_N_R PEG_CLKREQ11_PCH# B12 A12
15 PCIE_SLOT4_PRSNT_N 18 PEG_CLKREQ11_PCH# PEG_CLK11_PCH
B13 A13
PCIE_TX_CON_P9 PEG_CLK11_PCH# PEG_CLK11_PCH 18
B14 A14
PCIE_TX_CON_N9 PEG_CLK11_PCH# 18
B15 A15
B16 A16 PCIE_RX_PCH_P9
PCIE_SLOT4_PRSNT_N_R B17 A17 PCIE_RX_PCH_N9 PCIE_RX_PCH_P9 17
B18 A18 PCIE_RX_PCH_N9 17
NP2
B B

PCISLT36-7-GP
(MT_20.50534.036)
3D3V_S0 12V_S0 20170522
add F7 for ME request
1

C9408 C9409
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
(MT_) (MT_)
2

R9403 0R0603-PAD-2-GP-U
3D3V_SB 1 2 3D3V_PCIVAUX_SB
1

C9410 C9411
SCD1U16V2KX-3DLGP SC10U6D3V3MX-DL-GP
(MT_) (MT_)
2

20170411
reserve CEC control

A A

CEC
Wistron Corporation
PCIVAUX power control 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCieX1/X4
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 94 of 107
5 4 3 2 1
 5 4 3 2 1

92 PINTA_N
92 PINTB_N
92 PINTC_N
92 PINTD_N

3D3V_PCIVAUX_SB
92 PCIRST# 3D3V_S0 U9501
92 PGNT0#
92 PREQ0# 35 66 PDVSEL#

Vinafix.com 47 VCCP DEVSEL# 71 PFRAME#

57 VCCP FRAME# 70 PIRDY#
92 PME_N VCCP IRDY#
72 62 PLOCK#
92 PCI_CLK1 84 VCCP LOCK# 122 LDO_18V 1.8VD
94 VCCP M66EN 61 PPAR
D
110 VCCP PAR 55 PPERR# L9501 1 2 MHC1608S601LBP-GP (PCI_)
D
123 VCCP PERR# 56 PSERR#
LDO_18V 1.8VD 4 VCCP SERR# 67 PSTOP# 1.8VA
VCCP_AUX STOP# 68 PTRDY#
92 PFRAME# TRDY# PME_N
23 2 R9501 1 2 10KR2J-3-GP (PCI_) 3D3V_PCIVAUX_SB L9502 1 2 MHC1608S601LBP-GP (PCI_)
41 VCCK PME# 115 PCIRST#
92 PIRDY# 59 VCCK PCIRST#
92 PTRDY# 78 LDO_18V 18 PCIE_TX_CON_N6 C9501 1 2 SCD1U16V2KX-3DLGP(PCI_) PCIE_TX_PCH_N6 LDO_AUX_18V 1.8VAAUX
96 VCCK DIN 17 PCIE_TX_CON_P6 C9502 1 2 SCD1U16V2KX-3DLGP(PCI_) PCIE_TX_PCH_P6 20170426
92 PSTOP# VCCK DIP PCIE_RX_CON_N6
112 20 C9503 1 2 SCD1U16V2KX-3DLGP(PCI_) PCIE_RX_PCH_N6 change PCIE8 to PCIE6 L9503 1 2 MHC1608S601LBP-GP (PCI_)
125 VCCK DON 21 PCIE_RX_CON_P6 C9504 1 2 SCD1U16V2KX-3DLGP(PCI_) PCIE_RX_PCH_P6
92 PDVSEL# VCCK DOP PCI_R_CLKN PEG_CLK10_PCH# 1.8VDAUX
5 9 R9502 1 2 33R2J-2-GP (PCI_)
LDO_AUX_18V LDOAUX_18V CLKN PCI_R_CLKP PEG_CLK10_PCH
92 PLOCK# 10 R9503 1 2 33R2J-2-GP (PCI_)
11 CLKP 1 PCH_WAKE_N L9504 1 2 MHC1608S601LBP-GP (PCI_)
1.8VA VCC18A WAKE#

1
12 117 PLTRST_PCI_N
92 PPAR VCC18A PERST# PLTRST_PCI_N 40,94
19
1.8VAAUX VCC18A_AUX 27 20170509 R9504 R9505
92 PPERR# EECLK change from 0R to 33R for vendor's feedback 49D9R2F-GP LDO_18V
26 49D9R2F-GP
PAD0 30 EECS# 29 (R_) (R_)
92 PSERR# 92 PAD0

2
PAD1 31 AD0 EERDDATA 28
92 PAD1 AD1 EEWRDATA
PAD2 33
92 PAD2

1
PAD3 34 AD2 16 RREF R9506 1 2 12KR3-GP (PCI_) C9505 C9506 C9507 C9508
16 PCIE_RX_PCH_N6 92 PAD3 AD3 RREF TEST_EN
16 PCIE_RX_PCH_P6 PAD4 37 90 R9507 1 2 10KR2J-3-GP (PCI_) SCD01U50V2KX-1DLGP SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC10U6D3V3MX-DL-GP
92 PAD4 38 AD4 TEST_EN 92 EXT_ARB
PAD5 (PCI_) (PCI_) (PCI_) (PCI_)
92 PAD5

2
PAD6 39 AD5 EXT_ARB 91 RST_SEL
16 PCIE_TX_PCH_N6 92 PAD6 AD6 RST_SEL
16 PCIE_TX_PCH_P6 PAD7 40 104 PCICLK0 R9508 1 2 22R2J-2-GP (PCI_) PCI_CLK1
92 PAD7 43 AD7 PCICLK0 126 PCICLK_SEL
PAD8 R9509 1 2 10KR2J-3-GP (PCI_)
92 PAD8 AD8 PCICLK_SEL
18 PEG_CLK10_PCH# PAD9 44
92 PAD9 45 AD9
18 PEG_CLK10_PCH PAD10
92 PAD10 AD10 LDO_AUX_18V
PAD11 50 7 1.8VDAUX
92 PAD11 AD11 VCCK_AUX
PAD12 51 8
92 PAD12 52 AD12 NC#8 24
92 PCBE0# PAD13
92 PAD13 AD13 SEG_EN1/GP3
92 PCBE1# PAD14 53 25
92 PAD14

1
PAD15 54 AD14 SEG_EN2/GP4 32 C9509 C9510 C9511 C9512
92 PCBE2# 92 PAD15 AD15 SEG_G/GP2
92 PCBE3# PAD16 74 93 SCD01U50V2KX-1DLGP SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC10U6D3V3MX-DL-GP
92 PAD16 AD16 NC#93 EXT_ARB
PAD17 75 105 TP0 (PCI_) (PCI_) (PCI_) (PCI_)
92 PAD17

2
PAD18 76 AD17 TP0 106
92 PAD18 AD18 NC#106 RST_SEL
C 20,31,62,63,93,94 PCH_WAKE_N PAD19 77 109 TP1 C
92 PAD19 80 AD19 TP1 114
PAD20
92 PAD20 AD20 NC#114
PAD21 81 118
92 PAD21

1
PAD22 82 AD21 SEG_A 119
92 PAD22 83 AD22 SEG_B 120 1.8VD
PAD23 R9510 R9511
92 PAD23 AD23 SEG_C
PAD24 85 121 10KR2J-3-GP 10KR2J-3-GP
92 PAD24 86 AD24 SEG_D 127
PAD25 (PCI_) (PCI_)
92 PAD25 AD25 SEG_E/GP0
PAD26 88 128
92 PAD26

1
PAD27 89 AD26 SEG_F/GP1 C9513 C9514 C9515
92 PAD27 98 AD27
PAD28 SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
92 PAD28 AD28
PAD29 99 13 (PCI_) (PCI_) (PCI_)

2
92 PAD29 100 AD29 GNDA 14
PAD30
92 PAD30 AD30 GNDA
PAD31 101 15
92 PAD31 AD31 GNDA
36 3D3V_PCIVAUX_SB
PCBE0# 46 GNDP 48
PCBE1# 49 CBE0# GNDP 58 PCH_WAKE_N R9512 1 2 1.8VA
PCBE2# 69 CBE1# GNDP 73 10KR2J-3-GP
PCBE3# 87 CBE2# GNDP 95 (R_)
CBE3# GNDP 111
GNDP

1
PGNT0# 108 124 C9516 C9517 C9518
PGNT1# 103 GNT0# GNDP 3 SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
GNT1# GNDP_AUX (PCI_) (PCI_) (PCI_)

2
PINTA_N 65 22
PINTC_N 64 INTA# VSS 42
PINTB_N 63 INTC# VSS 60
PINTD_N 116 INTB# VSS 79
INTD# VSS 97
PREQ0# 107 VSS 113 3D3V_S0
PREQ1# 102 REQ0# VSS 6
REQ1# VSS_AUX

1
IT8893E-FX-GP C9519 C9520 C9521
(PCI_) SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC10U6D3V3MX-DL-GP
(PCI_) (PCI_) (PCI_)

2
B B
3D3V_S0
1.8VDAUX
RN9501
PGNT1# 1 4 SRN8K2J-3-GP
PREQ1# 2 3 (PCI_)

1
C9522 C9526 C9524
SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC10U6D3V3MX-DL-GP
RN9502 (PCI_) (PCI_) (PCI_)

2
PREQ0# 1 4 SRN8K2J-3-GP
TP0 2 3 (PCI_)
20170509
add for vendor's feedback
RN9503
PLOCK# 1 8 SRN8K2J-4-GP
PPAR 2 7 (PCI_) 1.8VAAUX
PSERR# 3 6
PPERR# 4 5

1
C9523 C9527 C9525
RN9504 SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SC10U6D3V3MX-DL-GP
PFRAME# 1 8 SRN8K2J-4-GP (PCI_) (PCI_) (PCI_)

2
PIRDY# 2 7 (PCI_)
PTRDY# 3 6
PSTOP# 4 5 20170509
add for vendor's feedback

RN9505
PINTD_N 1 8 SRN8K2J-4-GP
PCIRST# 2 7 (PCI_)
TP1 3 6
PGNT0# 4 5

RN9506
Place Near Chip IT8893E
PDVSEL# 1 8 SRN8K2J-4-GP
PINTA_N 2 7 (PCI_)
A PINTC_N 3 6 A
PINTB_N 4 5

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCI Bridge (IT8893E)
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 95 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 96 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 97 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 98 of 107
5 4 3 2 1
 5 4 3 2 1

XDP for CPU

PCH_XDP_PREQ_R_N R9901 1 2 0R0402-PAD-2-GP H_PREQ_N
XDP for CPU
4 H_TDO

D
4
4,20
4 H_TDI
H_TMS
H_TCK
Vinafix.com
PCH_XDP_PRDY_R_N R9902 1 2 0R0402-PAD-2-GP H_PRDY_N
1V_PCH_SB
D
4 H_TRST_N XDP1
MH1
4 H_PREQ_N
SPI_SI_PCH R9903 1 2 1KR2J-1-GP
4 H_PRDY_N
R9922 2K2R2J-2-GP 1 R9904 2 XDP_PCUDEBUG_3 1 2
PCH_SYSPWROK R9905 1 (R_) 2 0R2J-2-GP XDP_VR_READY 1 2 0R2J-2-GP (R_)
4,20 H_PWRGD 3D3V_SB
H_PREQ_N 3 4 SKL_PCUSTB_0_DP
4,40 VCCST_GD_DRIVER
Change for CRB v1.1 1 2 H_PRDY_N 5 6 SKL_PCUSTB_0_DN
15,23,25,91 SPI_SI_PCH
C9901 7 8
4 SKL_PCUSTB_0_DN SCD1U16V2KX-3DLGP 9 10
(R_) 11 12
4 SKL_PCUSTB_0_DP
4 SKL_PCUSTB_1_DN 13 14
15 16
4 SKL_PCUSTB_1_DP
RSMRST_SIO_N R9906 1 2 1KR2J-1-GP 17 18

Notice:20.F0441.060
4 BPM_CPU_N0 19 20
H_PWRGD R9907 1 (R_) 2 1KR2J-1-GP XDP_PWRGD BPM_CPU_N0 21 22 SKL_PCUSTB_1_DP
4 BPM_CPU_N1
BPM_CPU_N1 23 24 SKL_PCUSTB_1_DN
VCCST_GD_DRIVERR9908 1 (R_) 2 1KR2J-1-GP 25 26
27 28
4 SKL_PCUDEBUG_0 Change for CRB v1.1 29 30
31 32
22 PCH_XDP_PRDY_R_N
33 34
22 PCH_XDP_PREQ_R_N
1V_PCH_SB R9909 1 2 2K2R2J-2-GP 35 36
37 38
PLTRST_CPU_N R9910 1 (R_) 2 1KR2J-1-GP XDP_PWRGD 39 40 CK_100M_CPU_XDP_DP
C 4 XDP_PCUDEBUG_3 C
PWRBTN_N 41 42 CK_100M_CPU_XDP_DN
20,24,63 RSMRST_SIO_N ITP_PMODE R9911 1 2 0R2J-2-GP H_RSTOUT_XDP_N 43 44
20,24 PCH_SYSPWROK XDP_PWR_DEBUG 45 46 H_RSTOUT_XDP_N
20 FP_RST_N XDP_VR_READY 47 48 FP_RST_N
20 PCH_JTAG_TCK 49 50
0D95V_CPU_VCCIO R9912 1 2 150R2F-1-GP SMB_DATA_MAIN 51 52 H_TDO
20 ITP_PMODE
SMB_CLK_MAIN 53 54 H_TRST_N
SKL_PCUDEBUG_0 R9913 1 2 1KR2J-1-GP XDP_PWR_DEBUG PCH_JTAG_TCK 55 56 H_TDI
H_TCK 57 58 H_TMS
11,12,24,59 SMB_DATA_MAIN XDP_PRS
59 60
11,12,24,59 SMB_CLK_MAIN

1
18 CK_100M_CPU_XDP_DN MH2
18 CK_100M_CPU_XDP_DP R9914 R9915
DM-SMC-CONN60A-GP-01 0R2J-2-GP 51R2J-2-GP
4,17 PLTRST_CPU_N (R_) (R_) (R_)
15,23,25 SPI_WP_PCH

2
APS DEBUG
APS CONNECTOR
3D3V_SB 3D3V_S5 APS1
20,24,40,42,43,50 SLP_S3_N
B 15 B
8,20,24,32,38,39,40 SLP_S4_N
20,24 PCH_SLP_A_N 13
12 PWRBTN_N To CPU XDP
20,24,64 PWRBTN_N
20 PCH_RTCRST_N 11 To PCH XDP
10 To APS
PCH_SLP_A_N R9916 1 2 0R0402-PAD-2-GP SLP_A_N_CN 9
SLP_S3_N R9917 1 2 0R0402-PAD-2-GP SLP_S3_N_CN 8 PCH_JTAG_TCK To CPU XDP
SLP_S4_N R9918 1 2 0R0402-PAD-2-GP SLP_S4_N_CN 7 To PCH XDP
PCH_RTCRST_N R9919 1 2 0R0402-PAD-2-GP RTCRST_N_CN 6
5
PWRBTN_N R9920 1 2 0R0402-PAD-2-GP PWRBTN_N_CN 4
3
Layout Notes
FP_RST_N R9921 1 2 0R0402-PAD-2-GP FP_RST_N_CN 2

1
14

JWT-CON13-3-GP
(R_)
Pitch:1.0mm, Hight: 4.25mm
APS1 use 20.F2494.013

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
XDP&ITP
Size Document Number Rev
B Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 99 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 100 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Reserved
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 101 of 107
5 4 3 2 1
 5 4 3 2 1

POWER ON SEQUENCE

PLTRST#
SYS_PWROK
Vinafix.com
D D
PROCPWRGD
PCH_PWROK
VCCST_PWRGD
ALL_SYS_PWRGD
VR_READY
DDR_VTT_CNTL
V_CPU_CORE
V_CPU_SA/V_CPU_GT
VR_ENABLE
V_CPU_IO
+12V/5V_S0/3P3V_S0
PWR_VDDQ_PG
V_SM/V_SM_VTT
(Only for
C INTEL CLARKVILLE )CL_RST# C

PS_ON_N
SLP_S3_N
SLP_S4_N
+V3P3_NGFF_WLAN
SLP_WLAN#
+V3P3_LAN
SLP_LAN#
(If ME pwr used) SLP_A#
PWRBTN#
SUSACK#
SUSCLK
SUSWARN# >0ms
B
>10ms B
RSMRST#
<20ms 3.3V/1.8V ramp before 1.0V, total times max to 20ms
V1P0_PCH_S5
>200us
5V_SB
SUS5V_ON#
3P3V_SB
SUS3V_ON#
SUS3V_FON#
SLP_SUS#
>10ms
DSW_PWROK
>9ms
5V_S5/3P3V_S5
>9ms
RTCRST
VccRTC

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Sequence
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 102 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Delivery
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 103 of 107
5 4 3 2 1
 5 4 3 2 1

5 Power Button
PCH PWRBTN# PWRBTN_N SIO SCH5553
CPU DSW_PWROK 4
PCH_SIO_DPWROK DPWROK 5
Battery 1 RTCRST# 6 PWRBTN# Power Button
D
Vinafix.com
RTC_VCC SLP_SUS#
SLP_SUSB
SLP_SUS# PWRBTN_N
D

RSMRST# 8 RSMRST# V3_DUAL 3

Codec RSMRST_SIO_N 3D3V_S5
18 HDA_RST# SUSWARN# 9 SUWARN# 7
RESET# AZ_RST_N_M SUS_WARNB V3_S5
10 3D3V_SB
SUSACK# SUSACK#
SUS_PWR_ACK ATXPG 13
RESET# 17 PLTRST# 3P3V_S0
PLTRST_CPU_N PMC_SLP_S5# SLP_S5#
PMC_SLP_S4# 11 18
VCCST_PWRGD PCH_PWROK SLP_S4_N SLP_S4# PCIRST1# SLOT x 16
PLRST_PEG_SLOTS_N
PMC_SLP_S3# 12 SLP_S3#
15 SLP_S3_N
VR_READY 16
SYS_PWROK PWR_GOOD
EC_PWRGD_3V

PLTRST# 17 LRESET# 18 SLOT1

C

PLTRST_N PCIRST2# C

PLRST_PCIE_SLOTS_N SLOT4
LAN
LPC1 (Debug)
NGFF
IT8893E

2 5V_S5 6 11 V_CPU_ST_PLL
PWR_5V_EN1 SLP_SUSB 3P3V_SB SLP_S4_N

2 3D3V_S5 V1P0_PCH_SB V_VPP 11 V_SM

PWR_3V_EN2 PWRGD_VPP
B
USBVCC12 B

USBVCC34
USBVCC78

12 3P3V_S0 13 14
SLP_S3_N 5V_S0 V_CPU_IO V_CPU_CORE
PWR_VCCIO_EN VR_ENABLE

V_SM_VTT PWR_VCCSA V_CPU_GT

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Good & Reset Diagram
Size Document Number Rev
D Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 104 of 107
5 4 3 2 1
 5 4 3 2 1

SLOT4 Vinafix.com
SLOT3 SLOT2 SLOT1 INTEL
Kaby Lake-S
Channel A
2133MHz/2400MHz DDR4 DIMM
D
(65W 4C + GT2) Unbuffered 8GB
D

SKT H4 LGA1151 Channel B

42.5 mm x 42.5 mm 2133MHz/2400MHz DDR4 DIMM
Unbuffered 8GB

1 2 3
C C

100MHz
100MHz
100MHz
INTEL PCH
Skylake
PCH-H
100MHz Realtek Lan
1 RTL8111H
25MHz
FCBGA 837PIN 100MHz
2
23 mm x 23 mm CPU XDP
3 PCH XDP
100MHz 33MHz
ITE IT8893E
B B

100MHz
NGFF

LPC 80 Port
24MHz
SIO
24MHz SMSC SCH5553

24MHz 24MHz

32.768KHz 32.768KHz

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Clock Diagram
Size Document Number Rev
C Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 105 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
REST Flow Chart
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 106 of 107
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

B B

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
Change History
Size Document Number Rev
A Gambit MLK MT/Eagle MT CFL A00
Date: Friday, February 02, 2018 Sheet 107 of 107
5 4 3 2 1