13/12/2021 22:34 Assessment: Oracle SPARC M5-32 Server Overview (WBT)

Test: Assessment: Oracle SPARC M5-32 Server

Overview (WBT)
Review your answers, feedback, and question scores below. An asterisk (*) indicates a correct answer.

Assessment: Oracle SPARC M5-32 Server Overview (WBT)

(Answer all questions in this section)

6. What size DIMMs are supported in the SPARC M5-32 server? Select all the sizes that apply. (1/1) Points
(Choose all correct answers)

48 GB

32 GB
(*)

8 GB

16 GB
(*)


Correct!

7. Select the two statements the apply to fans in the SPARC M5-32 server. (1/1) Points
(Choose all correct answers)

If the fans are not working for a CMU, the CMU will continue to operate but the fans needs to be
replaced within 24 hours.

If the fans are not working for a CMU, there will be no airflow so the CMU will be shutdown.
(*)

If the fans are not working for a CMU, the CMU will continue to operate but the fans needs to be
replaced within 12 hours.

If there is an issue with a fan, the SPP adjusts the fans if needed.

If there is an issue with a fan, the SPP informs the SP of any cooling issues and the SP adjusts the fans if
needed.
(*)


Correct!

8. Select the statement that is true for an IOU’s components. (1/1) Points
One I/O board, four EMS and sixteen PCI slots and eight HDDs/SSDs.

Two I/O boards, four EMS and sixteen PCI slots and eight HDDs/SSDs.
(*)

Two I/O boards, two EMS and sixteen PCI slots and eight HDDs/SSDs.


Correct!

9. Select the three options that are true for Clock Boards in the SPARC M5-32 server. (1/1) Points
(Choose all correct answers)
Two Clock Boards
(*)

One clock board is redundant for failover

(*)

Only one Clock Board

Two Clock Boards are active

One clock board is active

(*)


Correct!

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13/12/2021 22:34 Assessment: Oracle SPARC M5-32 Server Overview (WBT)

10. Select the statement that is true regarding the SPARC M5-32 server Bixby ASICs. (1/1) Points
Each group of six Bixby ASICs can have a loss of up to three SSBs and the SPARC M5-32 server can run
in a degraded mode of five and the Coherency Directory is still available.

Each group of six Bixby ASICs can have a loss of one SSB and the SPARC M5-32 server can run in a
degraded mode of five but the Coherency Directory is not available.

Each group of six Bixby ASICs can have a loss of one SSB and the SPARC M5-32 server can run in a
degraded mode of five and the Coherency Directory is still available.
(*)


Correct!

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