THE PENTIUM PROCESSOR

CHAPTER 3
THE PENTIUM PROCESSOR FAMILY

• Intel introduced microprocessors way back in 1969. The work on these early
microprocessors led to the development of the Intel architecture (IA).

• The first processor in the IA family was the 8086 processor, introduced in
1979.

• Intel introduced its first 32-bit processor—the 80386—in 1985.

• The latest in the family is the Pentium series, The first Pentium was introduced in
1993.
THE PENTIUM PROCESSOR FAMILY
THE PENTIUM REGISTERS

• The Pentium has 10 32-bit and 6 16-bit registers. These registers are grouped
into general, control, and segment registers. The general registers are further
divided into data, pointer, and index registers.

•Data Registers
• There are four 32-bit data registers that can be used for arithmetic, logical,
and other operations (see Figure 3.1).
DATA REGISTERS
DATA REGISTERS

• These four registers are unique in that they can be used as follows:
• Four 32-bit registers (EAX, EBX, ECX, EDX); or
• Four 16-bit registers (AX, BX, CX, DX); or
• Eight 8-bit registers (AH, AL, BH, BL, CH, CL, DH, DL).
• It is possible to use a 32-bit register and access its lower half of the data by
the corresponding 16-bit register name.
• Similarly, the lower two bytes can be individually accessed by using the 8-bit
register names.
POINTER AND INDEX REGISTERS

• the four 32-bit registers in this group can be used either as 16- or 32-bit
registers

• The two index registers play a special role in string processing instructions
• The pointer registers are mainly used to maintain the stack. Even though they
can be used as general-purpose data registers, they are almost exclusively
used for maintaining the stack
POINTER AND INDEX REGISTERS
CONTROL REGISTERS

• This group of registers consists of two 32-bit registers: the instruction pointer
register and the flags register.
• The processor uses the instruction pointer register to keep track of the location
of the next instruction to be executed. Instruction pointer register is sometimes
called the program counter register
• The flags register can be considered as either a 16-bit FLAGS register or a
32-bit EFLAGS register.
• The EFLAGS register consists of 6 status flags, 1 control flag, and 10 system
flags
CONTROL REGISTERS
SEGMENT REGISTERS

• The six 16-bit segment registers support the segmented memory organization
of the Pentium processor

• The six segment registers point to where these segments are located in the
memory

• A program is logically divided into two parts: a code part that contains only
the instructions, and a data part that keeps only the data.
SEGMENT REGISTERS
PROTECTED-MODE MEMORY ARCHITECTURE

• Protected mode was first added to the x86 architecture with the release of
Intel's 80286 processor, and later extended with the release of the 80386.

• Due to the enhancements added by protected mode, it has become widely

adopted and has become the foundation for all subsequent enhancements to
the x86 architecture.

• It allows system software to use features such as virtual memory, paging and
safe multi-tasking designed to increase an operating system's control over
application software
PROTECTED-MODE MEMORY ARCHITECTURE

• The protected mode uses 32-bit addresses and is the native mode of the
Pentium. In protected mode, the Pentium supports both segmentation and
paging.

• Protected mode memory addressing (80286 and above) allows access to

data and programs located above the first 1M byte of memory, as well as
within the first 1M byte of memory

• Paging is useful in implementing virtual memory; it is transparent to the

application program, but segmentation is not.
PROTECTED-MODE MEMORY ARCHITECTURE

• The descriptor describes the location, length, and access rights of the segment
of memory (Figure 3.8).

• There are two descriptor tables used with the segment registers: one contains
global descriptors and the other contains local descriptors.

• A global descriptor a system descriptor and call a local descriptor an application

descriptor

• The selector, located in the segment register, selects one of the descriptors from
one of two tables of descriptors (Figure 3.7).
REAL-MODE MEMORY ARCHITECTURE

• The memory address space of the 8086 processor is 1 MB. To address a

memory location, we have to use a 20-bit address

• Since all registers in the 8086 are 16 bits wide, the address space is limited
to 65,536 (64 K) locations. As a consequence, the memory is organized as a
set of segments.

• we have to specify two components to identify a memory location:

• a segment base and an offset
REAL-MODE MEMORY ARCHITECTURE

• This two-component specification is referred to as the logical address.

• So how can we use a 16-bit register to store the 20-bit segment base
address?

• The trick is to store the most significant 16 bits of the segment base address
and assume that the least significant four bits are all 0 ( Figure 3.10.)

• We use the notation segment : offset (1100:450H) to specify the logical

address.

• Programmers have to be concerned with the logical addresses only.

REFERENCE

1. https://www.cs.princeton.edu/courses/archive/fall02/cs318/proj2/pc-arch.html
2. https://www.byclb.com/TR/Tutorials/microprocessors/ch2_1.htm#:~:text=The%20personal
%20computer%20memory%20structure,requiring%20relocatable%20software%20and%2
0data.&text=Protected%20mode%20memory%20addressing%20(80286,first%201M%2
0byte%20of%20memory.

3. https://en.wikipedia.org/wiki/Real_mode
4. https://en.wikipedia.org/wiki/Protected_mode