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Instruction format:

OPCODE OPERAND

Specifies the operation of the instruction

Specifies the data

Ex) MOV A, #23H

OPERAND

OPCODE

MOV A, R0

OPERAND

OPCODE

ADDRESSING MODES

Specifies about how source and destinations are specified in Instructions

1) Immediate Addressing Mode:(will help to move a data in to a register)


 Uses # symbol

Ex) MOV R0, #08H

MOV DPTR,#1000H (DPTR-16 bit register named as “Data Pointer” = Holds address of ROM)

Rules:

 If data starts with an alphabet then zero must be added


 Ex) MOV A,#0FFH; MOV A,#0A2H;MOV R0,#2A;MOV R1,#0AA
 The # symbol must not be used at the destination part of an instruction
Ex) MOV #23H, A ------- Wrong

2) Direct Addressing Mode:


 Uses Address in the instruction

Ex) MOV A, 00H

Here 00H refers an address

Ex)

MOV R0, #02h MOV A,#03H ; A=03


MOV R1,A; R1=03
MOV R1, 00H MOV R0,01H ;R0 = 03
END END
After execution,

R1 content will be 02
Rules:

 Address may be any of the 128 bytes RAM addresses(00H-7FH)


 Sometimes the address may be the address of SFR
 Size of the Source and destinations must be matching
Ex)
MOV R0,0000H ---- Wrong
MOV DPTR,02H----- Wrong
 Address may be represented either at source or at destination
Ex)
MOV A,02H --- Correct
MOV 02H,A-----Correct
3) Register Addressing Mode:
 Uses registers alone in the Instruction

Ex) MOV A,R0


MOV R1,A

Rules:

 Register size must be matching


Ex) MOV A,DPTR ----- Wrong(DPTR Size=16 bits but A reg Size = 8 bits)
 Between two register bank registers we can’t move data directly
EX)
MOV R0,R1 --- Wrong ; R1 = 03--- R0
Solution:
1) MOV A,R1
MOV R0,A
2) MOV 00H,01H

MOV R1,#03H
MOV A,R1
MOV R0,A
END

4) Register Indirect Addressing Mode:

 Uses “@” symbol in the instructions

Ex)

MOV A, @R0 ; MOVC A,@A+DPTR ; MOV @R1,A

Example Program:

MOV R1, #23H


MOV A, #01H
MOV A,@R0
END
After Execution:
A reg content will be 23h (@ symbol consider the reg content as
address rather data)

Rules:

 @ symbol uses only with R0 ,R1 and A reg


- When it is used with A then the content will be treated as data but if it is used
with R0 and R1 the the content will be treated as Address
5) Implicit Addressing Mode:
 Uses A register alone

Ex)

CPL A, RR A, RL A, RRC A, RLC A

Instruction Set
1. Data Transfer Instructions :
a) Move Instructions:
(n- 8 bit data; Rr = R0 to R7; nn-16 bit data; Rp = R0 &
R0)
MOV A,#n
MOV Rr,#n
Ex) MOV R0,# 03H
MOV Rr, A
Ex) MOV A,#06h; A <= 06
MOV R0,A ;R0<=06;A=06H
MOV A,Rr
MOV Add1,Add2
Ex)MOV 07h,03H
b) Exchange Instructions:
XCH A,Rr
EX) MOV A,#23H
MOV R0,#55H
XCH A,R0
END
A<= 55H; R0 <=23H

XCH A, ADD
-Exchanges contents of A with specified
address
XCH A,Rp
XCH A,@Rp
Ex)
MOV R0,#30H
MOV 30H,#55H (Since RAM address range 00h-7FH)
MOV A,#44H
XCH A,@R0
END
- 30 H< = 44H ; A<= 55H
- XCHD A,@RP

- - Exchanges with lower nibble


- Ex)
MOV R0,#30H
MOV 30H,#55H
MOV A,#44H
XCHD A,@R0
END
- 30 H< = 45H ; A<= 54H
2. Logical Instructions:
ANL A, #n
ANL A,add
ANL A, Rr
ANL A,@Rp
ANL add,A
ANL add, #n
(ORL , NOT, and XRL are other Logical operations)
CPL A
- ( NOT gate)
MOV A,#00H
CPL A
END
A Reg Content will be FF
3. Rotate Instructions
4. Arithmetic Instructions:
ADD A,#n
ADD A,Rr
ADD A,add
ADD A,@Rp
(ADDC for multi byte addition; SUBB for Subtraction)

Ex) FFFF+FFFF = 1FFFE

1
Ex) FF FF
+ FF FF
_______________
1 FF FE
_______________
MOV A,#0FFH
ADD A,#0FFH (FF+FF =>1FE ;FE=>A &CY <= 1)
MOV R0,A (R0 <= FE)
MOV A,#0FFH
ADDC A,#0FFH ; ( (A)+FF+CY) (A<= FF & CY <=1)
END
Final Result ; (A) = FF;(R0) = FE;(CY) =1

DA A- Decimal Adjust Accumulator


Usually if the result of addition exceeds 9 then the
result will be given in Hex Decimal Form
Ex) 08+03 = 0B ; 05+03 =08
MOV A,#08H
ADD A,#03H
END
After execution (A) <= 0B
But to see the result of 08+03 as 11(like normal
decimal number) then we have to use DA A instruction.

Ex)
MOV A,#03H
ADD A,#08H
DA A ; A <=11
END
NOTE:
DA A instruction must be used only after ADD
instruction
EX)
MOV A,#32H
DA A ----------- It won’t work (before DA A we
have to use ADD instruction)

5. Branching Instruction
Relative jump = 127d to -128d(- Indicates
backward dir)
Ex) DJNZ,JNC….
Absolute range = 2K
Ex) AJMP,ACALL….
Long Range = within 64KB
Ex) LJMP,LCALL….
Note:
1. JZ,JNZ,JC,JNC Used Only with A register
2. JZ,JNZ,JC,JNC demands an ALU instruction must be
executed before using these instructions.
Ex)
MOV A,#23H
JNC ,XX
MOV B,#32H
XX: END
JNC Won’t work since MOV A,#23H is not an ALU
Instruction
MOV A,#23H
ADD A,#32H
JNC ,XX
MOV B,#32H
XX: END
Now JNC Will work
1. Let R5 = 90
CJNE R5,#80,XX ( Internally 90-80 =+sign so no carry)

XX: JNC
2. Let R5 = 70
CJNE R5,#80,XX( Internally 70-80 = -sign so there is a
carry)
XX: JC
3. Let R5 = 80
CJNE R5,#80,XX (Condition Fails so no jump)
-

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