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EECE211 Fall 2021 Lecture 1

EECE211 반도체전자공학 I
Professor: 이정수, LG213호, Tel: 279-2380, HP: 010-7127-2963

Textbook: B. G. Streetman & S. Banerjee, “Solid State Electronic Devices,” 7th ed., Pearson 2015

Ref.: B. L. Anderson & R. L. Anderson, “ Fundamentals of Semiconductor Devices,” McGraw Hill 2005,
Pierret, “semiconductor Device Fundamentals,” Anderson Wesley 1996

TA: 김동휘 이청아 한상현 (LG220)

Objective: To provide a basic understanding of semiconductor devices

Grading: HW 20% + Midterm-I 20% + Midterm-II 20% + Final 30%+ Attendance 10%

Office Hours: by email until Oct.08

Etiquette: Arrive in e-class on time and Turn off noisy electronic devices

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EECE211

SEMICONDUCTOR SEMICONDUCTOR
PHYSICS DEVICES

ENERGY-
BAND DIODES TRANSISTORS

DRIFT-
DIFFUSION PN
BJTs
JUNCTIONS

SCHOTTKY
MOSFETs
EECE303 물리전자 JUNCTIONS

EECE401 반도체전자공학II

디스플레이공학 반도체공정 나노소자측정  ETC


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Course Schedule:

Week 1-2 Semiconductor Materials and Energy Bands


Week 3-4: Carrier Drift & Diffusion
Week 5: PN Junctions
Week 6: Midterm Exam. 1

Week 7~9: Bipolar Junction Transistors


Week 10: Midterm Exam. 2

Week 11: Field Effect Transistors(JFET&MESFET)


Week 12: MOS Capacitor
Week 13~15: MOSFET
Week 16: Final Exam.

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Semiconductor: Perspective

4 Source: 반도체산업의 최근동향과 전망, 안기현2018


Semiconductor: Perspective

5 Source: 반도체산업의 최근동향과 전망, 안기현2018


Semiconductor: TOP15기업 2020 *youtube: https://www.youtube.com/watch?v=0h5UkDItJ0c

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Semiconductor: Perspective

• 반도체 쏠림현상
– 전체 수출 비중의 18%
– 의존도가 10년 사이 9% 급등

• 수출의존도
– 반도체>자동차>기계>
석유화학>철강>디스플레이 순
- 휴대폰,디스플레이:
생산시설의 해외이전, 중국

• 신산업 창출 필요
– 전기차, 수소경제
– 바이오 산업
– 플랫폼 산업

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Semiconductor: Perspective

8 Source: 반도체산업의 최근동향과 전망, 안기현2018


Semiconductor: Perspective

9 Source: 반도체산업의 최근동향과 전망, 안기현2018


Brief History of Semiconductor

• 1947 @ Bell Lab.: Invention of Tr.


– William Shockley : Leader
– John Bardeen : Theorist
– Walter Brattain : Experimenter

• 1958 Jack Kilby @ TI


– Invention of IC

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Brief History of Semiconductor

#Tr. 106 in 30 yrs


#Trs doubling every 18 months

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Future Semiconductor

Source: IEDM14_Short Course


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Future Semiconductor
https://www.youtube.com/watch?v=3otqUu-7WUQ

Source: IEDM20_Short Course


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Semiconductor
• Low resistivity  Conductor
• High resistivity  Insulator
• Intermediate resistivity  Semiconductor
– Conductivity varies between that of conductors and insulators
– Elemental: Si, Ge
– Compound: Binary, Ternary (three-element), Quaternary (four-element)

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Periodic Structures
• Crystalline
– regular geometric periodicity throughout the entire volume
– Lattice: the periodic arrangement of atoms in the crystal

• Polycrystalline
– short-range ordered region varying in size and orientation w.r.t one another.
– grain boundary.

• Amorphous: no recognizable order within the material

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Periodic Structures & Cubic Lattices
• Unit cell
– a small volume of the crystal being used to produce the entire crystal
– various possible unit cells can be exist.

• Primitive cell: the smallest unit cell.

• The simplest 3-D cubic unit cells


– Simple cubic
– Body-centered cubic (bcc)
– Face-centered cubic (fcc)

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Cubic Lattices
• (Example 1-1) For a ‘bcc’ lattice of identical atoms with a lattice constant of 5 Å,
calculate the max. packing fraction and the radius of the atoms treated as hard
spheres with the nearest neighbors touching:
Nearest-neighbors in the bcc lattice lies along the diagonal. Since the body
diagonal is equal to 3  a ,
3 o o
radius of each atom :  5   2.165 
4
4 o o 3
volume of each atom :  (2.165 )  42 .5 
3

3
# of atoms per cube : 2
42.5  2
packing fraction :  68%
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The volume density is found by dividing the number of unit cell atoms by the unit
cell volume. 2 atoms 2
For a ‘bcc’: volume density :  8 3
 1.6  10 22
atoms/cm 3

a3
(5 10 )

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Diamond Lattice
• Diamond Lattice (Si, Ge, C)
– two interpenetrating fcc lattices, where the atoms
within the cell belong to the 2nd fcc lattice
– Tetrahedral structure: four nearest neighboring atoms

• Zincblende Lattice (Most of compound semiconductors; GaAs, GaN, InP, etc.)


– differs from the diamond lattice only in that the lattice sites are assigned
equally between two different atoms
– optoelectronics and high-speed ICs

Diamond lattice Zincblende lattice

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Diamond Lattice
• How many Si atoms per cm-3:
– Number of atoms in a unit cell:
a. 4 atoms completely inside cell
b. 8 corner atoms : 8 x 1/8=1 atom
c. 6 face atoms: 6x1/2=3 atoms
d. Total number inside the cell = 4 + 1 + 3 = 8 atoms

– Cell volume: (.543 nm)3 = 1.6 x 10-22 cm3

– Density of silicon atoms = (8 atoms) / (cell volume) = 5 x 1022 atoms/cm3

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Planes and Directions
• Miller indexing procedure for a plane
– Find the intercepts of the plane with the crystal axes: 2,4,1
– Take the reciprocals of the three integers and ½,¼,1
– Reduce to the smallest set of integers h, k, l 2,1,4
– Label the plane (hkl) (2,1,4)

– h: inverse x-intercept of plane


k: inverse y-intercept of plane
l: inverse z-intercept of plane

• Miller conversion summary

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Planes and Directions
• {100} (110) (111)

• A direction can be expressed as a set of three integers which are the components
of a vector in that direction.

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Crystallographic Planes in Si

Unit cell:

View in <111> direction

View in <100> direction View in <110> direction

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Planes and Directions
• Si wafers are usually cut along a {100} plane with a flat :

[001]
Plane (110)

[0 1 0] [010]
Plane direction

[1 00] [110]

Current Flow Direction in (110) plane


Current Flow Direction: [ 1 10]

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Crystal Growth
Raw Material: SiO2 (quartzite, a type of sand)

1) Reduction of quartzite to metallurgical grade silicon (MGS) with purity of ~ 98%


SiO2 + 2C  Si + 2CO

2) Conversion of MGS to trichlorosilane (SiHCl3)


Si + 3HCl  SiHCl3 + H2

3) Purification of SiHCl3 by distillation

4) Chemical vapor deposition of Si from the purified (SiHCl3), as electronic grade silicon
(EGS, purity: 5x1013/cm3, atomic concentration of Si : 5x1022/cm3)
SiHCl3 + 2H2  2Si + 6HCl

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Czochralski method

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Wafer fabrication processes

1) Inspection: resistivity, impurity level, crystal perfection, etc.


2) Grinding
3) Flats shaping
4) Sawing
5) Laser marking
6) Lapping or grinding
7) Edge shaping
8) Etching
9) Polishing

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PN Diode Fabrication Steps:

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