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Photovoltaic MPPT Battery Charge Controller Using The MPT612 IC Reference Board
Photovoltaic MPPT Battery Charge Controller Using The MPT612 IC Reference Board
Document information
Info Content
Keywords Solar, PV, MPPT, MPT612, PWM, DC-DC converter, buck, boost, buck
boost, PWM, UART, I2C-bus, GPIO, LQFP, ARM7TDMI-S, flash, SRAM,
ADC, JTAG, EmbeddedICE, FIFO, PLL, LED, power converter, BOM
Abstract This application note describes how to develop a buck-boost enabled
solar PV MPPT charge controller using the MPT612 reference board. In
addition, it describes how to test and benchmark the controller with other
designs.
NXP Semiconductors AN10936
PV MPPT battery charge controller using MPT612 IC reference board
Revision history
Rev Date Description
2.0 20110202 • Graphics updated: Figure 9(a), Figure 9(b), Figure 10(a), Figure 10(b), Figure 11,
Figure 12, Figure 13.
• Section 12 “Steps to link and test new applications”: contents replaced with web link.
• Corrected: several typographical errors throughout document.
1.0 20100902 Initial version
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
AN10936 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
1. Introduction
Solar illumination can be converted into electrical energy through solar cells and the
energy generated is called PhotoVoltaic (PV) energy. While the sun as a source is
available for free, generating PV energy is expensive. This makes it important to extract
the maximum PV energy from the incident sun light using the solar cells.
019aaa242
6 80
(2) MPP (3) PMPP PV power
PV current (1) IMPP
(W)
(A) 70
5
60
4
50
3 40
(4) VMPP
30
2
20
1
10
0 0
0 5 10 15 20 25
PV voltage (V)
If a battery (typically 12 V) is connected directly to the panel, only 78 % of the available maximum
power is extracted.
(1) Current at maximum power point (IMPP).
(2) Maximum power point (MPP).
(3) Power at the maximum power point (PMPP) or peak-watt (WP).
(4) Voltage at maximum power point (VMPP).
Fig 1. PV current and power output as a function of voltage
There is a specific PV voltage at which the power delivered by the PV panel is the highest.
On the curve the point at which the power is the maximum is called the power at the
maximum power point (PMPP) or peak-watt (WP). The voltage at MPP is called the
maximum power point voltage (VMPP) and the current is called the maximum power point
current (IMPP). In Figure 1, PMPP is 70 W, VMPP is 16.2 V and IMPP is 4.3 A.
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If the solar panel operates at its MPP, maximum power can be extracted from the panel.
Operating the panel at any other point amounts to under utilization of the PV power
available and thus inefficient use of expensive PV power. Tracking the MPP of a PV panel
(DC source) is called the Maximum Power Point Tracking (MPPT). MPPT and ensuring
that the panel operates at this MPP helps maximum utilization of the installed PV capacity.
• Controls maximum power extraction from a panel by tracking the MPP and ensuring
that the panel operates at MPP
• Controls battery charging as defined in the battery charge cycle specification to
improve usable battery life and protect it against reverse connection, over charging
and deep discharging
• Load protection against overloads and short-circuits
• LED or LCD Status indications
• Communication of system parameters to external systems using dedicated interfaces
Depending on the topology of the power electronics, an MPPT charge controller can be
either:
• Buck only – the PV voltage must be higher than the battery voltage
• Boost only – the PV voltage must be lower than battery voltage
• Buck-boost – both the PV voltage and battery voltage can be variable values with the
system switching between buck and boost based on the relative voltages
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panel
− +
solar charge
controller
12 V
+
battery loads
019aaa244
Fig 2. Simplified (DC only) PV system with PV panel, controller, battery and DC-loads
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2. MPT612 IC
The MPT612 is an IC developed for Maximum Power Point Tracking (MPPT) applications
to extract the maximum power from a source such as a PV panel or fuel cell. The ICs
primary function is to track the MPP of the source based on the voltage and current. The
resulting Pulse-Width Modulated (PWM) output is sent to the MOSFET to control the
device switching, enabling the system to operate at MPP.
Utilizing a patent pending MPPT algorithm defined in the embedded software, the
MPT612 provides up to 15 kB of on-chip high-speed flash memory enabling enhanced
functionality using user software. Serial communication interfaces such as UART, SPI,
SSP and I2C-bus make the MPT612 ideally suited for integrating with real world systems.
The MPT612 is based on the ARM7TDMI-S 32-bit RISC core and operates at up to
70 MHz. Housed in a 48-pin LQFP IC package, the MPT612 provides a number of
standard software libraries for implementing the PV MPPT function and several other
optional functions as shown in Figure 3. See the MPT612 data sheet for full details on the
MPT612.
PV configuration parameters
MPT612
SWITCH CIRCUIT
PWM
battery voltage sense BATTERY VOLTAGE BATTERY CHARGE CONTROL
MEASUREMENT CYCLE ALGORITHM
load configuration
parameters
battery configuration
parameters
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3. MPT612 software
The MPT612 is bundled together with the software libraries for the MPPT function. The
high level software architecture of the IC is shown in Figure 4.
CHARGE
BATTERY BATTERY
CYCLE
CONFIG DATA LOG
IMPLEMENT
SAMPLE APPLICATION 1
MPT612 IC + SW
MPPT Core
MPPT
MPPT MPPT
SAFETY
MODULE CONFIG
CHECK
Optional library
AN10936 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
• MPPT Core:
– MPPT Core is the main layer that implements the MPPT algorithm (patent
pending)
– This layer always tracks the MPP (Maximum Power Point) when enabled
– The APIs exported by this block, should be called by the application to control the
functionality of the MPPT Core
– The application over this layer sends the configuration to the MPPT Core, which in
turn works within those configuration parameters
The optional lead-acid battery charging module is explained in the MPT612 data sheet.
This software is also used in the MPPT charge controller reference design.
The application software developed for the MPPT charge controller reference design has
the following features:
• This application software implements the product requirements for a sample charge
controller that controls the load and charges the battery
• The main functionality of this software invokes the MPPT Core and lead-acid battery
charging layers at an appropriate time as required. This application manages the
safety check of the system
• It also indicates the status of the charge controller
• Logs the relevant data into flash memory for further action
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The charge controller takes power from a solar PV panel and charges the battery as
defined in the battery charge cycle specification. It also enables the battery supplying
power to the DC loads connected to the controller. Apart from this, a number of protection
mechanisms, system status indications, configurability and communication facilities are
implemented.
To ensure ease and safe use, a number of configuration parameters are available which
control protection mechanisms, system status indications and communication interfaces.
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AN10936 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
In addition, the charge controller system temperature is measured and battery charging
stopped, if the controller’s ambient temperature rises above a certain predefined value
(50 C in this example).
BUCK-BOOST CONVERTER
+ +
D1 + +
PWM
from
solar PV C1 L1 C2
BOOST
panel
ON to battery
− −
− −
PV
current
sense BUCK ON
and
voltage battery current and voltage sense
sense
PV voltage sense +
ANALOG SIGNAL LOAD CONTROL
CONDITIONING CIRCUIT PV current sense AND MONITOR to DC load
BAT voltage sense −
CIRCUIT
BAT current sense
temperature sense
MOSFET GATE PWM
MPT612 IC DRIVER CIRCUIT
3.3 V
POWER SUPPLY 1.8 V LED indications
RESET AND clock
CLOCK CIRCUIT control signals
reset
serial
communication
port
019aaa243
AN10936 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
5. Schematics
• The charge controller board takes PV power, charges the battery and supplies power
to loads
• The JTAG/UART add-on board is used exclusively for configuration and data logging
The charge controller board is needed for every PV system. However, the JTAG/UART
add-on board is typically used by service providers sparingly. One JTAG/UART add-on
board can be used with multiple charge controller systems. Separating the JTAG/UART
configuration and data logging functionality from the main PV charge controller reduces
the size and cost of the charge controller board.
Figure 6 shows the charge controller reference system with the charge controller board
and the JTAG/UART add-on board connected.
019aaa245
This charge controller board has one 8-pin input connector used for interfacing to all the
external systems (such as the PV panel, battery and loads).
The optional JTAG/UART add-on board can be connected to the JTAG/UART connector
to enable system configuration and data retrieval.
AN10936 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
019aaa246
a. Top view
019aaa247
b. Bottom view
Fig 7. Charge controller board
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019aaa248
a. Bottom view
019aaa249
b. Top view
Fig 8. JTAG/UART add-on board
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• Boost mode: quad op amps U4A and U4B with associated circuits are used for the
PV voltage sense in boost mode with a gain of 1.1.
• Buck mode: quad op amp U4C is used for PV voltage sense in buck mode with a
gain of 2.
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C18
0.01 μF
2nd order low-pass filter
VDD(3V3)_A VDD(3V3)_A
TP13
R24 R25 3
R23 5 1 4 1
4 7
PV_voltage_ref 10 kΩ 68.1 kΩ PV volt sense_boost
10 kΩ 2 11
1% 1%
1% 6 11 U4A
C20 U4B C22 LPV324M
0.01 μF LPV324M 0.01 μF
VDD(3V3)_A VDD(3V3)
GNDA
GNDA L8
GNDA GNDA 1 2
R26 R27 121E_bead
C19
10 kΩ 1 kΩ 10 μF C21
1% 1% 16 V 0.1 μF
CMAX
GNDA VDD(3V3)_A
R64 10 TP15
4 8
1 GNDA
10 kΩ PV volt sense_buck
1% 9 11
C68 U4C
0.01 μF LPV324M
GNDA
GNDA
R35 R66
10 kΩ 10 kΩ
1% 1%
GNDA 019aaa203
VDD(3V3)_A C23
0.01 μF
2nd order low-pass filter
VDD(3V3)_A
C24
0.1 μF
C49
GNDA V+ U14 0.1 μF
(1) R86 VIN+ 5
TP14
PV_current_ref_A 3 OUT 1 R29 R30 GNDA 12
100 Ω 4 14
VIN− 1
1% 68.1 kΩ 68.1 kΩ PV current sense
4
C25 1% 1% 13 11
2
0.01 μF U4D
GND INA194AIDBVT C26 LPV324M
(1) R87 0.01 μF
PV_current_ref_B GAIN 50
100 Ω GNDA
1%
GNDA GNDA
019aaa297
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A 2-stage amplifier is used to enhance the signal. The 1st stage operates with a gain of 5
and the 2nd stage operates with a gain of 10. Op amp U6C is a low-pass filter for removing
the signal noise.
VDD(3V3)_A
C28
C50
0.01 μF
2nd order low-pass filter
0.1 μF
VDD(3V3)_A
GNDA
R36 5 TP16
4 7 R37 R38 10
BAT_voltage_ref 1 4 8
5.1 kΩ BAT volt sense
6 11 10 kΩ 68.1 kΩ
1%
U5B 1% 1% 9 11
C29
U5C
0.01 μF LPV324M C30 LPV324M
0.01 μF
GNDA
GNDA
GNDA
R39 R40 GNDA
R112
5.1 kΩ 1 kΩ
1 MΩ
1% 1%
5%
GNDA VDD(3V3)_A
R54 3 4 1
100 kΩ BAT_overvoltage
VDD(3V3)_A 1% 2 11
U5A
R55 R59 LPV324M
10 kΩ 18 kΩ
1% 1%
GNDA GNDA 019aaa204
VDD(3V3)_A
C32
VDD(3V3)_A 0.01 μF
2nd order low-pass filter
C31 VDD(3V3)_A
0.1 μF
R41
(1) 3 4 1 GNDA 5 TP18
BAT_current_ref_A 4 7 1 R42 R43 10 TP17
0Ω 4 8 1
1% 2 11 68.1 kΩ 68.1 kΩ BAT current charge
C34 C35
6 11
U6A 1% 1% 9 11
0.33 μF 0.33 μF LPV324M U6B U6C
LPV324M C36 LPV324M
0.01 μF
GNDA
GNDA GNDA
GNDA
R44 GNDA
(1) R45 R46 R60
BAT_current_ref_B
DNI 10 kΩ 10 kΩ 100 kΩ
2.74 kΩ 1% 1% 1%
R48
1%
2.74 kΩ
1%
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When the system is in boost mode, MOSFET Q3 is closed and MOSFET Q4 is open. In
buck mode, Q4 is closed and Q3 is open. Capacitors C4 and C7 filter the output. Input
bulk capacitors C3 and C5 store energy when switching MOSFET Q1 is off.
Diode D13 protects the circuit if the PV terminals are connected incorrectly. Diode D5 and
fuse F1 protect the circuit if battery terminals are connected incorrectly. MOSFET Q2
controls the load. Load-side short-circuit protection is provided by the fuse F2. The
high-side gate driver circuit U3 drives the main switching MOSFET.
Low-ohmic current sense resistors R6, R8 and R10 are used for current measurement.
Resistor network R3 and R5 sense the PV voltage. Resistor network R4 and R7 sense the
battery voltage.
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BAT_gate_drive
R1 C1 R2 C2
PV_power D7
2 1 BAT_12V
TP1 15 Ω 4.7 nF 15 Ω 4.7 nF
PV_voltage_ref 1 5% 200 V 5% 200 V ES1B D12
BAT_POWER 2 1
D1
2 1 ES1B
Q1
PV_positive ES1B PSMN8R2-80YS(1)
A2
TP3 TP2 TP4
1 1 K 1
F1
PV input 12 A fuse holder
(1) A1 LOAD 1 LOAD 2
J14D D2 C4 C7
282856-8 KK R4
R3
STPS40L45CG 680 μF 680 μF 27.4 kΩ J14B J14A
N 35 V N 35 V C27 12 V battery KK
68.1 kΩ 1% 282856-8 282856-8
7 8 1 MOV1 P P J14C
1% C3 C5 C62 +
+ − P P 4.7 μF KK 5
50 V
3 4 1 2
N 1000 μF N 1000 μF 4.7 μF A1 A2 + − + −
R5 6 5 4 3 2 1 − 6 D8
2 3.9 kΩ 50 V 50 V 50 V
A2 A1 N BYV44
1% 7 8 9 10 11 12 A1 A2 282856-8
D13 D5
BYV42E Q3 L1 BYV42E
R7
PSMN8R2-80YS 85 μH
4.7 kΩ
R6 20 A
1%
F2
CN2220K25G 0.010 Ω
R8 12 A fuse holder
TP8 1% Q4 Q2
Rsense 0.005 Ω
1 PSMN1R3-30YL PSMN1R3-30YL(1)
PV_current_ref_B 1%
(4) R10
R122
TP7
33 Ω 0.01 Ω
1 TP5
PV_current_ref_A 5% BAT_voltage_ref 1 1%
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VDD(3V3)
J6 J15
VDD(3V3)
1 2 1
PIO21
3 4 2
TRST TDI PIO20
5 6 3
TMS TCK PIO18
7 8 4
RTCK TDO PIO17
9 10 5
RST DEBUGSEL PIO9
11 12 6
PIO8
13 14 7
PIO3
15 16 8
TxD0 PIO2
17 18 9
EINT1 RxD0
19 20 10
VDD(3V3) VDD(1V8) VDD(3V3)
JTAG/UART 2 2 2 GPIO_CON
L2 L3 L4
121E_bead 121E_bead 121E_bead PIO20 PIO21
1 1 1
TP31 TP32 Buck mode_enable
C37 C38 C40 C39
VDD(ADC)
0.1 μF 0.1 μF 0.1 μF 0.1 μF 1 1 VDD(3V3)
VDD(IO)
VDD(IO)
VDDC
GNDA
40 17 5 42 1 PIO19/MAT1_2/MISO1 R53
10 kΩ VDD(3V3) VDD(3V3) VDD(3V3)
PIO20/MAT1_3/MOSI1
2 5%
PIO21/SSEL1/MAT3_0
3
PIO14/EINT1/SCK1/DCD1
44 EINT1 R56 R65 R57 R58
4.7 kΩ 4.7 kΩ 1 kΩ 2.2 kΩ
5% 5% 5% 5%
PIO17/CAP1_2/SCL1 PIO17
47
PIO18/CAP1_3/SDA1 PIO18 A A
48 D17 D16
LED_GREEN1 LED_YELLOW1
TRST/PIO27/CAP2_0
TRST 8 PIO13/MAT1_1/DTR1 K K
TMS/PIO28/CAP2_1 41
TMS 9 PIO15/EINT2/RI1
TCK/PIO29/CAP2_2 45
TCK 10 PIO16/EINT0/MAT0_2 R67
PIO30/MAT3_3/TDI 46 Powerdown_wakeup
TDI 15 10 kΩ
PIO31/TDO 5%
TDO 16 PIO0/MAT3_1/TXD0
RTCK 13 TXD0
RTCK 26 PIO1/MAT3_2/RXD0
JTAGSEL 14 RXD0
DEBUGSEL 27
VDD(3V3)
VDD(3V3)
PIO8/TXD1/PWMOUT1 PIO08 DR2
29
PIO9/RXD1/PWMOUT2 PIO09 DR1 10 kΩ R75
U15 30 5% 2.2 kΩ
R72 3 D10 10 kΩ 5%
MPT612FBD48
47 kΩ 2 MMBD4148 5% A
PIO4/SCK0
5% 1 TP19 22 Buck_power_enable D18
1 RST PIO5/MISO0 LED_RED1
6 23 Load_cutoff
PIO6/MOSI0 K
SW2 C41 24
RESET SW 0.1 μF PWMOUT0
28 Buck_PWM
TP24
PIO2/SCL0 1
18 PIO2
C42 PIO3/SDA0 TP25
X1 21
11 1
PIO3
22 pF R120 X1
1 MΩ PVVOLTSENSEBUCK
C43
12.000 MHz 32 PV volt sense_buck
5% X2 PVVOLTSENSEBOOST
12 33 PV volt sense_boost
22 pF PVCURRENTSENSE
34 PV current sense
PIO10/CAP1_0/RTS1/AD3
VDD(RTC) 35 Load current sense
4 PIO11/CAP1_0/CTS1/AD4
36 BAT current charge
RTXC2 PIO12/MAT1_0/DSR1/AD5
25 37 BAT volt sense TP23
PIO25/AD6 1
RTXC1 38
20 PIO26/AD7
7 19 31 43 39 VDD(3V3)_A
GND
GND
GNDADC
GND
GNDA 019aaa205
VDD(3V3) is a 3.3 V supply, VDD(3V3)_A is a 3.3 V analog supply and VDD(1V8) is a 1.8 V supply.
Fig 12. MPT612 digital circuit schematic
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MOSFET switch M1 is used to switch off the power to the board during the standby
condition. The battery voltage comparator U11A, PV voltage comparator U11D and
overload comparator U11B with OR gate U12 forms the standby control circuit. The
Output of PV voltage comparator signal is also used as interrupt signal to the MPT612 to
wake it from the power-down state.
BAT_current_ref_B
L5 L6
2 1 1 2
121 Ω 121 Ω MOUNTING
Bead Bead HOLE
Switching regulator circuit for VDD(3V3) GNDA
BAT_12 V 3.3 V_standby VDD(3V3) VDD(1V8) MT1
U9 U10
Drive collector SW collector M1 TPS73018DBV 1
8 1 TP26
R93 I peak sense SW emitter L7 PMV65XP IN OUT
1 2 1
7 2 1 5
0.2 Ω VCC Timing cap K 47 μH
6 3 C54 C56
C65
Comp inv IP GND C51 680 μF 0.1 μF C52
4.7 μF 5 4 R100 R101 EN NR R114
C61
50 V 10 V 3 4 2.2 μF 2 MΩ(2)
A D11 2 4.7 nF
C53 MC33063A 330 pF N 47 kΩ 10 kΩ C58 16 V 1%
PMEG6010CEJ R97
47 μF R96 CMAX 5% 5%
C57
GND 0.1 μF
25 V 100 Ω
C55 0.1 μF
CMAX 5%
20.5 kΩ BAT_current_ref_B
0.1 μF
1%
R98 R99 C C
B B R118
Q6
100 Ω 12.4 kΩ Buck_power_enable
PMBT2222A
1% 1% Q7 4.7 kΩ
E E PMBT2222A 5%
3.3 V_standby 3.3 V_standby
R119
(1)BAT voltage comparator
U11A 4.7 kΩ
LPV324M 5%
Load current sense
C59
R123 2 11 TP27
0.1 μF 3.3 V_standby C60 C73
BAT_voltage_ref 1 1 5
1 0.1 μF 0.33 μF
100 kΩ 6 4
1% 3 4 R102
3.3 V_standby 3 2 U12 1 MΩ(2)
74LVC1G332GW (1)
5% TP28 4 10 Load_current_ref_A
4 5 R77 8
R103 7 1
3.3 V_standby 100 kΩ R107 DNI
1 MΩ (1) 11 9 Load_current_ref_B
5% U11B 11 6 1% U11C
R116 R106 10 kΩ
LPV324M LPV324M 1%
15 kΩ 15 kΩ
1% 1%
R108
R109 22 kΩ
1%
(1)PV voltage comparator R94
1 MΩ (1) 2.2 kΩ
5% 1%
3.3 V_standby 3.3 V_standby
R104 TP29
GNDA
12 4 R78 R117
PV_voltage_ref 14 1
100 kΩ Powerdown_wakeup
13 11 U11D 10 kΩ 15 kΩ
1%
LPV324M 1% 1%
3.3 V_standby
R110 R105
20.5 kΩ 10 kΩ
1% 1% 019aaa206
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The JTAG connector J7 is used with the debugger. Jumper J9 is closed when JTAG is
selected. Jumper J13 and J11 are used to select the ISP programming.
VDD(3V3) VDD(3V3)
ISP select
VDD(3V3) VDD(3V3)
C C44
B R80 M1 R70 1 2
Q12
PMBT2222A
33 kΩ 10 kΩ 0.1 μF
E 3 COM0
5% 5%
D14 2 R73 R71
1 1 10 kΩ 10 kΩ
MMBD4148 6 TXD_DB9 5% 5%
2 VCC
7 RXD_DB9
J10 3 FORCEOFF 15 EN
C45 16 1
8 2 1 C1+ INVALID
J11
4
2 10
RST 2 1 9 C1− FORCEON
5 0.1 μF
4 12
ISP select Connector D-sub 9 pin C46 C47
2 1 C2+ U13 V+ 1 2
C 5 TI 3
R74
M2 0.1 μF C2− V− 0.1 μF
Q10 B 6 7
PMBT2222A
33 kΩ C48
E 3
5% DOUT DIN 1 2
D15 2 13 11 TXD0
1 RIN ROUT 0.1 μF
8 14 9 RXD0
MMBD4148
GND MAX3221IPW
019aaa201
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7. Component selection
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7.2.2 Inductor
• IL(AV) = IO / (1 )
Where IO is the output current and is the duty cycle. In buck-boost mode, the maximum
duty cycle is 60 %.
• IL(AV) = 6 / 0.4 = 15 A
• IL(pk) = (IO / 1 ) + IL / 2 = 18.75 A; where IL is the inductor ripple current
• VI = 19 V
• = 0.8 %
• IL = 0.3 * IL(AV)
• fosc = 20 kHz
• Lmin = VI / (fosc IL) = 76 H
The inductor selected for proto stage is ~85 H/20 A. Also refer to:
• www.coilcraft.com/apps/selector/selector_1.cfm
• schmidt-walter.eit.h-da.de/smps_e/ivw_smps_e.html
To reduce the ESR, two 1000 F, 50 V capacitors are used in parallel. Nichicon part
number UHD1H102MHD with ESR 21 m, rated ripple current 3.01 A.
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• 45 V, 40 A
• VF = 0.45 V
C O I O max V O + V F V I min – V sw + V O + V F
-------------------------------------------------------------------------------------------------------------------------------------------------- (1)
f osc V OC
• IO(max) = 6 A
• VO = 16 V
• VF = 0.45 V
• VI(min) = 8 V
• Vsw = 0.4 V
• fosc = 20 kHz
• VOC = 200 mV
• CO 1028 µF
• ESR = VO / Isw(peak) = 11.1 m
Select two output electrolytic capacitors of 680 F, 35 V with an ESR of less than 25 m.
Place them in parallel so that effective ESR is less than 11.5 m.
• ESR 21 m
• Rated ripple current is 2.36 mA
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Where PAV = average power; Rth(tot) = total thermal resistance and Tamb = ambient
temperature.
The thermal resistance of the PCB in FR4 material (2 oz. copper) is 90 C/W for 1 cm2.
However, more thermal pads are required to minimize the MOSFET junction temperature.
One option is to add copper to be on the safer side. The PCB Rth is considered to be
300 C/W with 70 micron for calculation purposes. The maximum device junction
temperature is limited to 100 C. The ambient temperature is considered to be 50 C.
The above Rth(j-a) is based on a copper thickness of 35 micron. However, with a 75 micron
thickness of copper, the Rth(j-a) is further reduced. PCB thermal pad copper area is
calculated using Equation 2:
P d R th pcb – a
Area = ------------------------------------------------------------------------------------------------------ (2)
T j – T amb – P d R th j – c + R th c – pcb
Equation 2 calculates the total PCB copper area needed to keep the junction temperature
within the defined limits. The thermal pad area required for a single-sided PCB is
calculated. If both sides of the PCB are used as a thermal pad then this value is divided by
2. If thermal vias are not used, it is assumed that the heat is mainly dissipated on one side
of the board. However, the area on both sides of the PCB can be counted when adequate
thermal vias are used.
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• Infrastructure required
Table 6. Infrastructure requirements
Description Limits
DC supply 20 V and 6 A maximum
DC supply maximum 20 V and 20 A maximum
Electronic DC-load (non-inductive) up to 20 A and 20 V
PV panel with cables to charge 70 W or 80 W
controller under test
Pre-charged 12 V lead-acid battery 20 Ah maximum
4-channel data logger two for voltages up to 20 V and two for currents up to
20 A
Current meter 1 A with 1 mA accuracy minimum; 0 A to 20 A
Oscilloscope to measure 500 ms time duration
PC/laptop with MS-Excel and other -
general purpose software packages
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9. Benchmarking strategy
The MPPT charge controller reference system was benchmarked against the best charge
controllers on the market.
• PMPP = 80 W, VMPP = 17 V, IMPP = 4.71 A, Isc = 5.39 A and VOC = 21.20 V at STC
• PMPP = 70 W, VMPP = 17 V, IMPP = 4.12 A, Isc = 4.72 A and VOC = 21.20 V at STC
70 Ah, 12 V, lead-acid battery was used in all the set-ups. A data logger was used for
recording PV voltage/current and battery voltage/current.
• Cumulative ampere hour (Ah) flowing into the battery from the charge controllers
under identical environmental and experimental test conditions
• Percentage difference in Ah of the charge controllers
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The benchmarking results were captured and Figure 15 shows the enhanced
performance provided by the MPT612-based MPPT charge controller reference board
when compared to other charge controllers on the market.
16.0 (1)
VBAT
(V) 15.5
(2)
15.0 (3)
14.5
(4)
14.0
13.5
13.0 (5)
12.5
12.0
12:00 14:00 16:00 18:00
Time (h)
019aaa209
(1) PV MPP.
(2) NXP MPPT charge controller reference design under battery voltage.
(3) MPPT charge controllers available on the market.
(4) Non-MPPT charge controllers available on the market under voltage.
(5) MPPT charge controllers on the market do not charge the battery with the highest available current
for about 2 hours when PV power is available.
Fig 15. Benchmarking results
1. Connect the external load terminal to the L1+/L2+ and L1/L2 terminals of the
reference system ensuring correct polarity.
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2. Connect 12 V battery terminal to the BAT+ and BAT terminals of the reference
system ensuring correct polarity. The battery should meet the specification described
in Section 4.1 on page 9.
3. Connect PV input to the PV+ and PV terminal of MPT612 reference board. The PV
should conform to the specification described in Section 4.1 on page 9.
4. The system function is indicated by the LEDs D16, D17 and D18. Table 8 shows the
LED status for different system functions.
5. When the PV terminals are connected, the system starts booting, indicated by the
LEDs D16, D17 and D18 (if sufficient PV power is available).
6. Measure PV voltage, PV current, battery voltage and battery current, using a
multi-meter. The values will vary depending on the maximum power generated from
the PV panel.
7. When sufficient PV power is available, the charge controller tracks the MPP, charges
the battery and supplies power to the loads after 10 s.
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7. The application, present in the charge controller board waits for 10 seconds for a key
to be pressed on the console:
a. When a key is pressed, it displays a menu on the console for the open-loop
efficiency tests. The user can see the results on the console.
b. When a key is not pressed, the charge controller functionality is executed.
8. The system function is indicated by the LEDs D16, D17 and D18. Table 8 shows the
LED status for different system functions.
9. When the PV terminals are connected, the system starts booting, indicated by LEDs
D16, D17 and D18 (if there is sufficient PV power is available).
10. Measure the PV voltage, PV current, battery voltage and battery current, using a
multi-meter. The values will vary depending on the maximum power generated by the
PV panel.
11. When sufficient PV power is available, the output of the sample charge controller
application program is displayed on the PC’s terminal application (HyperTerminal or
TeraTerm).
Remark: The following output is only a sample and can differ from system to system. In
addition, the connected PV, battery and load parameters will have an effect on the
displayed values.
1
2 *******************************************
3 MPT612 Sample Charge controller Application
4 v1.0
5 *******************************************
6
7 SWCONV_BOOST
8 Waiting for minimum power to be present.........................
9 Scanning => full
10 Prtrb
11
12 *MPP LATCHED: Vmpp(mV) = 16101
13
14 Prtrb
15
16 *MPP LATCHED: Vmpp(mV) = 15992
17 Prtrb
18
19 *MPP LATCHED: Vmpp(mV) = 15956
20
21 SWCONV_BUCK
22 Prtrb
23
24 *MPP LATCHED: Vmpp(mV) = 16177
25 Prtrb
26
27 *MPP LATCHED: Vmpp(mV) = 16439
28 Prtrb
29
30 *MPP LATCHED: Vmpp(mV) = 16613
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31 Prtrb
32
33 *MPP LATCHED: Vmpp(mV) = 16468
34 Prtrb
13. Abbreviations
Table 9. Abbreviations
Acronym Description
ADC Analog-to-Digital Converter
API Application Programming Interface
ESR Equivalent Series Resistance
FIFO First In, First Out
GPIO General Purpose Input/Output
I2C Inter-Integrated Circuit
IRQ Interrupt Request
ISP In-System Programming
LDO Low DropOut regulator
MCU MicroController Unit
MOV Metal-Oxide Varistor
MPPT Maximum Power Point Tracking
NTC Negative Temperature Coefficient
PLL Phase-Locked Loop
PV PhotoVoltaic
PWM Pulse-Width Modulator
RISC Reduced Instruction Set Computer
SMD Surface Mounted Device
SPI Serial Peripheral Interface
SRAM Static Random Access Memory
SSP Synchronous Serial Port
STC Standard Test Conditions
UART Universal Asynchronous Receiver/Transmitter
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14.1 Definitions design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
Draft — The document is a draft version only. The content is still under
customer’s third party customer(s). Customers should provide appropriate
internal review and subject to formal approval, which may result in
design and operating safeguards to minimize the risks associated with their
modifications or additions. NXP Semiconductors does not give any
applications and products.
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of NXP Semiconductors does not accept any liability related to any default,
use of such information. damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
14.2 Disclaimers testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
Limited warranty and liability — Information in this document is believed to
customer(s). NXP does not accept any liability in this respect.
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In no event shall NXP Semiconductors be liable for any indirect, incidental, Evaluation products — This product is provided on an “as is” and “with all
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Notwithstanding any damages that customer might incur for any reason product remains with customer.
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Suitability for use — NXP Semiconductors products are not designed,
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and disclaimers shall apply to the maximum extent permitted by applicable
NXP Semiconductors products in such equipment or applications and
law, even if any remedy fails of its essential purpose.
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no 14.3 Trademarks
representation or warranty that such applications will be suitable for the
specified use without further testing or modification. Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors I2C-bus — logo is a trademark of NXP B.V.
accepts no liability for any assistance with applications or customer product
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15. Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 11 Steps for evaluating the charge controller
1.1 Solar photovoltaic energy and maximum power reference system. . . . . . . . . . . . . . . . . . . . . . . 35
point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 11.1 Testing functionality . . . . . . . . . . . . . . . . . . . . 35
1.2 Solar charge controller . . . . . . . . . . . . . . . . . . . 4 11.2 Testing open loop efficiency . . . . . . . . . . . . . . 36
2 MPT612 IC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 Steps to link and test new applications . . . . 38
3 MPT612 software . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.1 Software memory size . . . . . . . . . . . . . . . . . . . 8 14 Legal information . . . . . . . . . . . . . . . . . . . . . . 39
4 MPPT charge controller reference system . . . 9 14.1 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4.1 System specifications . . . . . . . . . . . . . . . . . . . . 9 14.2 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4.2 MPPT charge controller reference system 14.3 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 39
block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 15 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.1 Charge controller reference system boards . . 12
5.1.1 Charge controller board . . . . . . . . . . . . . . . . . 12
5.1.2 JTAG/UART add-on board . . . . . . . . . . . . . . . 14
5.2 Charge controller reference system; major
circuit blocks . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2.1 PV voltage and current sense circuit . . . . . . . 15
5.2.2 Battery voltage and current circuit . . . . . . . . . 16
5.2.3 DC-DC buck-boost converter power
electronics circuit . . . . . . . . . . . . . . . . . . . . . . 18
5.2.4 MPT612 digital circuit . . . . . . . . . . . . . . . . . . . 19
5.2.5 Charge controller board power supply circuit . 21
5.2.6 JTAG/UART add-on board circuit diagram . . . 22
6 Charge controller reference system bill of
materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.1 Charge controller board Bill Of Materials
(BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.2 JTAG/UART add-on board Bill Of Materials
(BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7 Component selection . . . . . . . . . . . . . . . . . . . 26
7.1 PV System parameters. . . . . . . . . . . . . . . . . . 26
7.2 Major components . . . . . . . . . . . . . . . . . . . . . 26
7.2.1 Frequency of DC-DC converter operation . . . 27
7.2.2 Inductor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.2.3 Input bulk capacitor. . . . . . . . . . . . . . . . . . . . . 27
7.2.4 Switching MOSFET . . . . . . . . . . . . . . . . . . . . 28
7.2.5 Output diode . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.2.6 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . 28
7.2.7 Thermal pads . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.2.7.1 Thermal pad for D2PAK diode . . . . . . . . . . . . 29
7.2.7.2 MOSFET thermal pad calculation. . . . . . . . . . 30
8 System test plan . . . . . . . . . . . . . . . . . . . . . . . 31
9 Benchmarking strategy . . . . . . . . . . . . . . . . . . 34
10 System test and benchmarking results . . . . . 35
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