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Datasheet Pic18f455055
Datasheet Pic18f455055
Datasheet Pic18f455055
10-bit CCP/
# Single- Timers
Device FLASH SRAM EEPROM I/O A/D ECCP SPP Master
Word SPI 8/16-bit
(bytes) (bytes) (bytes) (ch) (PWM) I2C
Instructions
PIC18F2455 24K 12288 2048 256 24 10 2/0 No Y Y 1 2 1/3
PIC18F2550 32K 16384 2048 256 24 10 2/0 No Y Y 1 2 1/3
PIC18F4455 24K 12288 2048 256 35 13 1/1 Yes Y Y 1 2 1/3
PIC18F4550 32K 16384 2048 256 35 13 1/1 Yes Y Y 1 2 1/3
MCLR/VPP/RE3 1 28 RB7/KBI3/PGD
RA0/AN0 2 27 RB6/KBI2/PGC
RA1/AN1 3 26 RB5/KBI1/PGM
RA2/AN2/VREF-/CVREF 4 25 RB4/AN11/KBI0/RCV
5 24 RB3/AN9/CCP2*/VPO
PIC18F2455
PIC18F2550
RA3/AN3/VREF+
RA4/T0CKI/C1OUT 6 23 RB2/AN8/INT2/VMO
RA5/AN4/SS/LVDIN/C2OUT 7 22 RB1/AN10/INT1/SCK/SCL
VSS 8 21 RB0/AN12/INT0/SDI/SDA
OSC1/CLKI/RA7 9 20 VDD
OSC2/CLKO/RA6 10 19 VSS
RC0/T1OSO/T13CKI 11 18 RC7/RX/DT/SDO
RC1/T1OSI/CCP2*/UOE 12 17 RC6/TX/CK
RC2/CCP1 13 16 D+/VP
VUSB 14 15 D-/VM
40-Pin PDIP
MCLR/VPP/RE3 1 40 RB7/KBI3/PGD
RA0/AN0 2 39 RB6/KBI2/PGC
RA1/AN1 3 38 RB5/KBI1/PGM
RA2/AN2/VREF-/CVREF 4 37 RB4/AN11/KBI0/CSSPP
RA3/AN3/VREF+ 5 36 RB3/AN9/CCP2*/VPO
RA4/T0CKI/C1OUT 6 35 RB2/AN8/INT2/VMO
RA5/AN4/SS/LVDIN/C2OUT 7 34 RB1/AN10/INT1/SCK/SCL
RE0/CK1SPP/AN5 8 RB0/AN12/INT0/SDI/SDA
PIC18F4455
PIC18F4550
33
RE1/CK2SPP/AN6 9 32 VDD
RE2/OESPP/AN7 10 31 VSS
AVDD 11 30 RD7/SPP7/P1D
AVSS 12 29 RD6/SPP6/P1C
OSC1/CLKI/RA7 13 28 RD5/SPP5/P1B
OSC2/CLKO/RA6 14 27 RD4/SPP4
RC0/T1OSO/T13CKI 15 26 RC7/RX/DT/SDO
RC1/T1OSI/CCP2*/UOE 16 25 RC6/TX/CK
RC2/CCP1/P1A 17 24 D+/VP
VUSB 18 23 D-/VM
RD0/SPP0 19 22 RD3/SPP3
RD1/SPP1 20 21 RD2/SPP2
RC1/T1OSI/CCP2*/UOE
RC0/T1OSO/T13CKI
RC2/CCP1/P1A
44-Pin QFN
RC6/TX/CK
RD3/SSP3
RD2/SSP2
RD1/SSP1
RD0/SSP0
D+/VP
D-/VM
VUSB
41
40
39
37
36
35
34
42
44
43
38
RC7/RX/DT/SDO 1 33 OSC2/CLKO/RA6
RD4/CCP2*/P2A 2 32 OSC1/CLKI/RA7
RD5/SSP5/P1B 3 31 VSS
RD6/SSP6/P1C 4 30 AVSS
RD7/SSP7/P1D 5 PIC18F4455 29 VDD
VSS 6 28 AVDD
AVDD 7 PIC18F4550 27 RE2/OESPP/AN7
VDD 8 26 RE1/CK2SPP/AN6
RB0/AN12/INT0/SDI 9 25 RE0/CK1SPP/AN5
RB1/AN10/INT1/SCK/SCL 10 24 RA5/AN4/SS/LVDIN/C2OUT
RB2/AN8/INT2/VMO 11 23 RA4/T0CKI/C1OUT
15
16
17
18
19
20
21
22
12
13
14
RA0/AN0
RB4/AN11/KBI0/CSSPP
RB5/KBI1/PGM
RB3/AN9/CCP2*/VPO
MCLR/VPP/RE3
RA1/AN1
RA2/AN2/VREF-/CVREF
NC
RB6/KBI2/PGC
RB7/KBI3/PGD
RA3/AN3/VREF+
RC1/T1OSI/CCP2*/UOE
RC2/CCP1/P1A
RC6/TX/CK
RD3/SPP3
RD2/SPP2
RD1/SPP1
RD0/SPP0
44-Pin TQFP
D+/VP
D-/VM
VUSB
NC
41
40
39
37
36
35
34
42
44
43
38
RC7/RX/DT/SDO 1 33 NC
RD4/SPP4 2 32 RC0/T1OSO/T13CKI
RD5/SPP5/P1B 3 31 OSC2/CLKO/RA6
RD6/SPP6/P1C 4 30 OSC1/CLKI/RA7
RD7/SPP7/P1D 5 PIC18F4455 29 VSS
VSS 6 28 VDD
VDD 7 PIC18F4550 27 RE2/OESPP/AN7
RB0/AN12/INT0/SDI/SDA 8 26 RE1/CK2SPP/AN6
RB1/AN10/INT1/SCK/SCL 9 25 RE0/CK1SPP/AN5
RB2/AN8/INT2/VMO 10 24 RA5/AN4/SS/LVDIN/C2OUT
RB3/AN9/CCP2*/VPO 11 23 RA4/T0CKI/C1OUT
15
16
17
18
19
20
21
22
12
13
14
RB4/AN11/KBI0/CSSPP
RB5/KBI1/PGM
MCLR/VPP/RE3
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CVREF
NC
NC
RB6/KBI2/PGC
RB7/KBI3/PGD
RA3/AN3/VREF+
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.