High Speed Communication Circuits and Systems

Lecture 4
Generalized Reflection Coefficient, Smith Chart,
Integrated Passive Components
Michael H. Perrott
February 11, 2004

Copyright © 2004 by Michael H. Perrott

All rights reserved.

M.H. Perrott 1
 Determine Voltage and Current At Different Positions
ZL

Incident Wave Ex
jwt jkz
V+e e

x
y Hy
jwt jkz
I+e e

z
ZL

Reflected Wave Hy Ex
V-ejwte-jkz

I-ejwte-jkz
z
L 0

 Incident and reflected waves must be added together

M.H. Perrott 2
 Determine Voltage and Current At Different Positions
ZL

Incident Wave Ex
jwt jkz
V+e e

x
y Hy
jwt jkz
I+e e

z
ZL

Reflected Wave Hy Ex
V-ejwte-jkz

I-ejwte-jkz
z
L 0

M.H. Perrott 3
 Define Generalized Reflection Coefficient

Similarly:

M.H. Perrott 4
 A Closer Look at (z)

 Recall L is

Im{Γ(z)}

Note: |ΓL|
Δ = 2kz
ΓL

ΓL
Γ(z)
 We can view (z) |ΓL| Re{Γ(z)}
as a complex 0
number that
rotates clockwise
as z (distance
from the load)
increases
M.H. Perrott 5
 Calculate |Vmax| and |Vmin| Across The Transmission Line

 We found that

 So that the max and min of V(z,t) are calculated as

 We can calculate this geometrically!

M.H. Perrott 6
 A Geometric View of |1 + (z)|

Im{1+Γ(z)}

Γ(z)
|1+Γ(z)|
|ΓL|
Re{1+Γ(z)}
0 1

M.H. Perrott 7
 Reflections Cause Amplitude to Vary Across Line

 Equation:
 Graphical representation:
direction jwt jkz
V+e e
of travel t

|1 + Γ(z)|

max|1+Γ(z)|
|1+Γ(0)|
min|1+Γ(z)|
z
0
M.H. Perrott 8
 Voltage Standing Wave Ratio (VSWR)

 Definition

 For passive load (and line)

 We can infer the magnitude of the reflection

coefficient based on VSWR

M.H. Perrott 9
 Reflections Influence Impedance Across The Line

 From Slide 4

- Note: not a function of time! (only of distance from load)

 Alternatively

- From Lecture 2:

M.H. Perrott 10
 Example: Z(/4) with Shorted Load
λ/4 ZL

x Z(λ/4)
y

z
z
L 0
 Calculate reflection coefficient

 Calculate generalized reflection coefficient

 Calculate impedance
M.H. Perrott 11
 Generalize Relationship Between Z(/4) and Z(0)

 General formulation

 At load (z=0)

 At quarter wavelength away (z = /4)

- Impedance is inverted!
 Shorts turn into opens
 Capacitors turn into inductors

M.H. Perrott 12
 Now Look At Z() (Impedance Close to Load)

 Impedance formula ( very small)

- A useful approximation:

- Recall from Lecture 2:

 Overall approximation:

M.H. Perrott 13
 Example: Look At Z() With Load Shorted
ZL

x
y Z(Δ)

z
z
Δ 0

 Reflection coefficient:

 Resulting impedance looks inductive!

M.H. Perrott 14
 Example: Look At Z() With Load Open
ZL

x
y Z(Δ)

z
z
Δ 0

 Reflection coefficient:

 Resulting impedance looks capacitive!

M.H. Perrott 15
 Consider an Ideal LC Tank Circuit

Zin L C

 Calculate input impedance about resonance

=0 negligible

M.H. Perrott 16
 Transmission Line Version: Z(/4) with Shorted Load
λ0/4 ZL

x Z(λ0/4)
y

z
z
L 0

 As previously calculated

 Impedance calculation

 Relate  to frequency

M.H. Perrott 17
 Calculate Z( f) – Step 1
λ0/4 ZL

x Z(λ0/4)
y

z
z
L 0

 Wavelength as a function of  f

 Generalized reflection coefficient

M.H. Perrott 18
 Calculate Z( f) – Step 2
λ0/4 ZL

x Z(λ0/4)
y

z
z
L 0

 Impedance calculation

 Recall

- Looks like LC tank circuit (but more than one mode)!

M.H. Perrott 19
 Smith Chart

 Define normalized impedance

 Mapping from normalized impedance to 

is one-to-one

- Consider working in coordinate system based on 

 Key relationship between Zn and 

- Equate real and imaginary parts to get Smith Chart

M.H. Perrott 20
 Real Impedance in  Coordinates (Equate Real Parts)
Im{ΓL}

ΓL=j

ΓL=-1 ΓL=0 ΓL=1

Re{ΓL}
0.2 0.5 1 2 5

Zn=0.5

ΓL=-j

M.H. Perrott 21
 Imag. Impedance in  Coordinates (Equate Imag. Parts)
j1 Im{ΓL}

j0.5 ΓL=j j2

j0.2 j5
Zn=j0.5
ΓL=-1 ΓL=0 ΓL=1

0 Re{ΓL}

Zn=-j0.5
-j0.2 -j5

-j0.5 ΓL=-j -j2

-j1

M.H. Perrott 22
 What Happens When We Invert the Impedance?

 Fundamental formulas

 Impact of inverting the impedance

- Derivation:

 We can invert complex impedances in  plane by

simply changing the sign of  !

 How can we best exploit this?

M.H. Perrott 23
 The Smith Chart as a Calculator for Matching Networks

 Consider constructing both impedance and

admittance curves on Smith chart

- Conductance curves derived from resistance curves

- Susceptance curves derived from reactance curves
 For series circuits, work with impedance
- Impedances add for series circuits
 For parallel circuits, work with admittance
- Admittances add for parallel circuits

M.H. Perrott 24
 Resistance and Conductance on the Smith Chart

Im{ΓL}

ΓL=j

Yn=0.5 Zn=0.5

ΓL=-1 ΓL=0 ΓL=1

Yn=2 Zn=2
Re{ΓL}
0.2 0.5 1 2 5

ΓL=-j

M.H. Perrott 25
 Reactance and Susceptance on the Smith Chart

j1 Im{ΓL}

j0.5 ΓL=j j2

Yn=-j2 Zn=j2
j0.2 j5

ΓL=-1 ΓL=0 ΓL=1

0 Re{ΓL}

-j0.2 -j5
Yn=j2 Zn=-j2

-j0.5 ΓL=-j -j2

-j1

M.H. Perrott 26
 Overall Smith Chart

j1

j0.5 j2

j0.2 j5

0
0.2 0.5 1 2 5

−j0.2 −j5

−j0.5 −j2

−j1

M.H. Perrott 27
 Example – Match RC Network to 50 Ohms at 2.5 GHz

 Circuit

Matching
Zin ZL Cp=1pF Rp=200
Network

 Step 1: Calculate ZLn

 Step 2: Plot ZLn on Smith Chart (use admittance, YLn)

M.H. Perrott 28
 Plot Starting Impedance (Admittance) on Smith Chart

j1

j0.5 j2

j0.2 j5

0
0.2 0.5 1 2 5

-j0.2 -j5

-j0.5 YLn=0.25+j0.7854 -j2

-j1
(Note: ZLn=0.37-j1.16)
M.H. Perrott 29
 Develop Matching “Game Plan” Based on Smith Chart

 By inspection, we see that the following matching

network can bring us to Zin = 50 Ohms (center of
Smith chart)
Matching Network
Lm

Zin Cm ZL Cp=1pF Rp=200

 Use the Smith chart to come up with component

- Inductance L shifts impedance up along reactance

values
m

- Capacitance C shifts impedance down along

curve
m
susceptance curve

M.H. Perrott 30
 Add Reactance of Inductor Lm

j1

j0.5 j2

Z2n=0.37+j0.48

j0.2 j5

0
0.2 0.5 1 2 5
normalized
inductor
reactance
= j1.64
-j0.2 -j5

-j0.5 -j2
ZLn=0.37-j1.16
-j1

M.H. Perrott 31
 Inductor Value Calculation Using Smith Chart

 From Smith chart, we found that the desired

normalized inductor reactance is

 Required inductor value is therefore

M.H. Perrott 32
 Add Susceptance of Capacitor Cm (Achieves Match!)

j1

j0.5 j2
Z2n=0.37+j0.48
(note: Y2n=1.00-j1.31)
normalized
j0.2 capacitor j5
susceptance
= j1.31

1.0+j0.0
0
0.2 0.5 1 2 5

-j0.2 -j5

-j0.5 ZLn=0.37-j1.16 -j2

-j1

M.H. Perrott 33
 Capacitor Value Calculation Using Smith Chart

 From Smith chart, we found that the desired

normalized capacitor susceptance is

 Required capacitor value is therefore

M.H. Perrott 34
 Just For Fun

 Play the “matching game” at

http://contact.tm.agilent.com/Agilent/tmo/an-95-1/classes/imatch.html

- Allows you to graphically tune several matching

networks
- Note: game is set up to match source to load impedance
rather than match the load to the source impedance
 Same results, just different viewpoint

M.H. Perrott 35
 Passives

M.H. Perrott 36
 Polysilicon Resistors

 Use unsilicided polysilicon to create resistor

A
Rpoly
A B

 Key parameters
- Resistance (usually 100- 200 Ohms per square)
- Parasitic capacitance (usually small)
 Appropriate for high speed amplifiers
- Linearity (quite linear compared to other options)
- Accuracy (usually can be set within ± 15%)

M.H. Perrott 37
 MOS Resistors

 Bias a MOS device in its triode region

Rds W/L
A B A B

 High resistance values can be achieved in a small

area (MegaOhms within tens of square microns)
 Resistance is quite nonlinear
- Appropriate for small swing circuits

M.H. Perrott 38
 High Density Capacitors (Biasing, Decoupling)

 MOS devices offer the highest capacitance per unit area

- Limited to a one terminal device
- Voltage must be high enough to invert the channel
A A

C1=CoxWL W/L

 Key parameters
- Capacitance value
 Raw cap value from MOS device is 6.1 fF/ m2 for 0.24u
CMOS
- Q (i.e., amount of series resistance)
 Maximized with minimum L (tradeoff with area efficiency)
 See pages 39-40 of Tom Lee’s book
M.H. Perrott 39
 High Q Capacitors (Signal Path)

 Lateral metal capacitors offer high Q and reasonably

large capacitance per unit area
- Stack many levels of metal on top of each other (best
layers are the top ones), via them at maximum density
A

C1

- Accuracy often better than ±10%

B

- Parasitic side cap is symmetric, less than 10% of cap value

 Example: CT = 1.5 fF/m2 for 0.24m process with 7
metals, Lmin = Wmin = 0.24m, tmetal = 0.53m
- see “Capacity Limits and Matching Properties of Integrated
Capacitors”, Aparicio et. al., JSSC, Mar 2002
M.H. Perrott 40
 Spiral Inductors
 Create integrated inductor using spiral shape on top level
metals (may also want a patterned ground shield)
A A

Lm
B
B

- Key parameters are Q (< 10), L (1-10 nH), self resonant freq.
- Usually implemented in top metal layers to minimize series
resistance, coupling to substrate
- Design using Mohan et. al, “Simple, Accurate Expressions
for Planar Spiral Inductances, JSSC, Oct, 1999, pp 1419-1424
- Verify inductor parameters (L, Q, etc.) using ASITIC
http://formosa.eecs.berkeley.edu/~niknejad/asitic.html

M.H. Perrott 41
 Bondwire Inductors
 Used to bond from the package to die
- Can be used to advantage
package
Adjoining pins die

Lbondwire
From board To chip circuits

Cpin Cbonding_pad

 Key parameters
- Inductance ( ≈ 1 nH/mm – usually achieve 1-5 nH)
- Q (much higher than spiral inductors – typically > 40)
M.H. Perrott 42
 Integrated Transformers
 Utilize magnetic coupling between adjoining wires

A B

Cpar1
k C D
L1 L2

Cpar2
C D

 Key parameters
- L (self inductance for primary and secondary windings)
A B

- k (coupling coefficient between primary and secondary)

 Design – ASITIC, other CAD packages

M.H. Perrott 43
 High Speed Transformer Example – A T-Coil Network

 A T-coil consists of a center-tapped inductor with

mutual coupling between each inductor half

L2
CB X
k L1
X

A B


- See S. Galal, B. Ravazi, “10 Gb/s Limiting Amplifier and
Used for bandwidth enhancement

Laser/Modulator Driver in 0.18u CMOS”, ISSCC 2003, pp

188-189 and “Broadband ESD Protection …”, pp. 182-183
M.H. Perrott 44