Analysis and Design of Analog Integrated Circuits

Lecture 24

Bipolar Devices and Their Applications

Michael H. Perrott
April 29, 2012

Copyright © 2012 by Michael H. Perrott

All rights reserved.

M.H. Perrott
 Introducing Bipolar Devices (Within CMOS Processes)

CMOS IB Bipolar
ID
IC
VGS VBE
G
VD N+
S D C B E B C VCE
N+
P-
N+ N+ P+ P- P+ N+
N+

D C
Note: define Ae as
G B area of emitter
S E

 Modern CMOS processes often offer Deep NWELL

- Allows a buried N+ layer to be implanted
- Vertical NPN bipolar device can be achieved
This lecture will discuss modeling and applications
of such “parasitic” bipolar devices
M.H. Perrott 2
 Collector Current as a Function of Vbe

Ic Vce > 200mV

Ic
c
b
Q1
ΔIc
Vbe e Ic_op gm =
ΔVbe
Vbe_op
Vbe
Bipolar Vbe_op

 For 0 < Vce < 200mV, Vbe > 0, device is in saturation

- This region of operation is typically avoided
 For Vce > 200mV, Vbe > 0, device is in forward active mode
Ic = βIb
Ic = AeIs(eVbe/Vt − 1), where Vt = kT /q
δIc Ic
⇒ gm = ≈
δVbe VT
M.H. Perrott 3
 Thevenin Modeling of Bipolar Device

Hybrid-π Model Key Small-Signal Parameters

IC = βIB RC
RB IB IC Parameter Forward Active Definition
b c
IC kT
gm Vt = 26mV at 25oC
Rthb rπ gmvbe ro Rthc Vt q
vbe
β
rπ β is Current Gain
gm
e
Rthe
VA
RE ro VA is Early Voltage
IC

Thevenin Resistances Approximation Proposed Small Signal Transistor Model

b c
Rthc= ro (1+gm(rπ RE))
ie
(RB << rπ, RB << RE ) Rthe
IC RC
Rthb vb Avvb α ie Rthc
c Rthc
RB b Rthb= rπ + (β+1)RE
(RC << ro, RE << ro ) e
Rthb e
Rthe Exact Approximation
1 RB 1
RE Rthe= g + Av = Av = 1 (RC<<βro)
m 1+β 1+(1+RC)/(rπ+βro)
(RB+RC << βro ) β
α = (1+RC /Rthc) α = 1 (RC<<Rthc)
β+1

M.H. Perrott 4
 Bipolar Versus CMOS Devices

CMOS Bipolar
D C

G B

S E

 Bipolar has higher gm for a given amount of current

- Useful for high speed applications
 Bipolar has lower 1/f noise and lower offset issues
- Useful for high precision analog
 Bipolar has well defined behavior over a wide
operating range: Ic = AeIs(eVbe/Vt-1)
 Exponential behavior allows analog multipliers and
dividers to be realized using translinear principle
CMOS is the preferred device for low cost,
high density, and high complexity digital circuits
M.H. Perrott 5
 Consider Adding VBE Voltages
I1

Q1 I2
VBE1
Q2
VBE2
 In general
³ ´
Ic = AeIs eVBE /Vt − 1 ≈ AeIseVBE /Vt
µ ¶
Ic
⇒ VBE ≈ Vt ln
AeIs
 Addition of VBE voltages corresponds to multiplication
of collector currents à ! à !
I1 I2
VBE1 + VBE2 = Vt ln + Vt ln
Ae1Is Ae2Is
à !
I1I2
= Vt ln
Ae1Ae2Is2 6
M.H. Perrott
 Consider Subtracting VBE Voltages

I1 I2

Q1 Q2
VBE1 VBE2

 Subtraction of VBE voltages corresponds to division of

collector currents à ! à !
I1 I2
−VBE1 + VBE2 = −Vt ln + Vt ln
Ae1Is Ae2Is
à !
I2 Ae1
= Vt ln
I1 Ae2

Translinear circuits can be built which achieve

multiplication, division, and power-law relationships
(see: http://en.wikipedia.org/wiki/Translinear_circuit)
M.H. Perrott 7
 A Closer Look at Subtracting VBE Voltages

 Subtract VBE of bipolar devices

I2
1
I1 - Different emitter areas/currents
 I 2 Ae1 
Ae2 Ae1 VBE  VBE 2  VBE1  Vt ln  
 I1 Ae 2 
VBE2 VBE1
kT  I 2 Ae1 
R ΔVBE  ln  
q  I1 Ae 2 
 Assume VBE varies 0.18mV/°C
- True if (I / I )(A
 1 e1 /Ae2) ~ 10

 In general, we see that VBE is a PTAT voltage source

- PTAT : Proportional to Absolute Temperature
 The current through resistor R is also PTAT
- This ignores changes in the resistance due to temperature 8
M.H. Perrott
 Implementation Details of PTAT Current Source

 Let us walk through various issues and circuit

approaches for realizing our PTAT current source

I2 I1

Ae2 Ae1
Ib2 Ib1
R1 ΔVBE

 Simple diode connection leads to Ic2 ≠ I2

- This leads to I c2 = I2 - Ib2 - Ib1
- But, we want I c2 = I2 so that I2 ≈ Ae2Ise
Vbe2/Vt

M.H. Perrott 9
 NMOS Source Follower Mitigates Base Current Issue

I2 I1
M4
Ae2 Ae1

Ibias R1 ΔVBE

 Simple NMOS source follower allows us to supply

base current without corrupting I2
- If available in the fabrication process, use a Native
NMOS device which has VTH ≈ 0
 Leads to improved headroom (lower VDD possible)
M.H. Perrott 10
 Ratioed Currents Achieved with Current Mirror

W2 W1
L L
I2 I1
M4
Ae2 Ae1

Ibias R1

 We can scale I2 relative to I1 by proper choice of W2/W1

- Cascoding technique can be used to achieve better
current ratio accuracy

M.H. Perrott 11
 PTAT Current Output Is Simple Extension of Mirror

W2 W1 W3
L L L I3
I2 I1
M4
Ae2 Ae1

Ibias R1

à !
W3 W3 ∆VBE β
I3 = I1 =
W1 W1 R1 β+1

 Issue: temperature variability of R1 and 

-R 1 is biggest concern assuming  is large
12
M.H. Perrott
 PTAT Current Output Can Be Converted to Voltage

W2 W1 W3
L L L I3
I2 I1 Vo
M4 R3 ρ 0.18mV/oC
Ae2 Ae1

Temp (oC)
Ibias R1 ΔVBE

à !
W3 ∆VBE β W3 R3
Vo = I3R3 = R3 ≈ ∆VBE
W1 R1 β+1 W1 R1

 Output voltage set by ratio of resistor values R3/R1

- Greatly reduces impact of R variation with temperature 13
M.H. Perrott
 Consider Adding VBE to the PTAT Voltage

W2 W1 W3
L L L I3
I2 I1 Vbg
M4 R3
VR3
Ae2 Ae1

Ibias R1 Ae3
VBE3

W3 R3
Vbg = VR3 + VBE3 ≈ ∆VBE + VBE3
W1 R1

 It turns out that this corresponds to a bandgap circuit

- Proper design leads to stable V o across temperature
14
M.H. Perrott
 Temperature Sensitivity of VBE

W2 W1 W3
L L L I3
I2 I1 Vbg
M4 R3 VBE3
VR3
Ae2 Ae1
-2mV/oC
Ibias R1 Ae3
VBE3 Temp (oC)
W3 R3
Vbg = VR3 + VBE3 ≈ ∆VBE + VBE3
W1 R1

 VBE has opposite temperature sensitivity as VBE

- Recall that V BE is a PTAT voltage (≈ +0.18mV/ºC)
15
M.H. Perrott
 Bandgap Achieved Through Proper Scaling

W2 W1 W3 I3
L L L
(ρ 0.18-2)mV/oC
I2 I1 Vbg
M4 R3
VR3
Ae2 Ae1
Temp (oC)
Ibias R1 Ae3
VBE3

W3 R3
Vbg = VR3 + VBE3 ≈ ∆VBE + VBE3
W1 R1

 Set ratio as W3 R3 2mV /◦C

ρ= = ◦
= 11.11
W1 R1 0.18mV / C
M.H. Perrott 16
 The Brokaw Bandgap Circuit

Assume R3 = R4 ∆VBE
I2 = I1 ≈
R4 R3 I1 = I2 R2

Vbg
I2 I1

Ae2 Ae1
VBE2 Vbg = VR1 + VBE2
ΔVBE R2 Ã !
∆VBE
≈ I2 + R1 + VBE2
R2
VR1 R1 2R1
= ∆VBE + VBE2
R2
 Assuming VBE varies at 0.18mV/ºC, set ratio as
2R1 2mV /◦C
= ◦
= 11.11
R2 0.18mV / C 17
M.H. Perrott
 What if Deep NWELL Is Not Available?
IB NPN Bipolar PNP Bipolar
IC
VBE VEB IB IC
N+ N+ P+

C B E B C VCE B E C
N+ P+ P- P+ N+ N- P+
N+ -
P

C E
Note: define Ae as
B area of emitter B

E C

 Deep NWELL allows an NPN device

 A PNP device is possible without Deep NWELL
- A key constraint is that the collector must be grounded!

M.H. Perrott 18
 Grounded Collector PNP Bandgap Circuit

R1 R3 VR3

Vbg
I1 I2

R2 ΔVEB Vbg = VR3 + VEB1

VEB1
Ae1 Ae2 ∆VEB
= R3 + VEB1
R2
R3
= ∆VEB + VEB1
R2
 Assuming VEB varies at 0.18mV/ºC, set ratio as
R3 2mV /◦C
= ◦
= 11.11
R2 0.18mV / C 19
M.H. Perrott
 Voltage Regulation Using a Bandgap Reference

Vdd

Vbg 1.25V Voltage Vref Voltage Vreg

Bandgap
Scale Regulator

Gnd

 Commonly used in modern integrated circuits

- Rejection of power supply variation and noise
- Variable voltage operation of circuits

M.H. Perrott 20
 Temperature Sensing Using Bipolar Devices

Vbg Vref
Bandgap
ADC Out
Circuit
ΔVBE Vin

 Recall that VBE is a linear function of temperature

kT  I 2 Ae1 
VBE  VBE 2  VBE1  ln  
q  I1 Ae 2 
 We can create an accurate temperature sensor by
comparing VBE to a temperature stable bandgap
reference voltage
- Analog-to-digital converter is used to digitize the
temperature signal
M.H. Perrott 21
 Summary

 CMOS processes offer parasitic bipolar devices

- Deep NWELL option allows both NPN and PNP devices
 We can use the same analysis tools for both bipolar
and CMOS devices
- Hybrid  and Thevenin modeling techniques
 Bipolar devices have very useful properties
- Exponential characteristic over a wide operating range
- Higher g for a given current than CMOS devices
m
- Lower 1/f noise and offset issues than CMOS devices
 Bipolar devices are very useful for certain circuits
- Translinear circuits (for multiplication and division)
- Bandgap voltage references
- Temperature sensors
M.H. Perrott 22