Digital Filter Structures Digital Filter Structures

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Digital Filter Structures Digital Filter Structures

• The convolution sum description of an LTI • Here the input-output relation involves a
discrete-time system can, in principle, be finite sum of products:
used to implement the system y[n] = −∑kN=1 d k y[n − k ] + ∑kM=0 pk x[ n − k ]
• For an IIR finite-dimensional system this • On the other hand, an FIR system can be
approach is not practical as here the impulse implemented using the convolution sum
response is of infinite length which is a finite sum of products:
• However, a direct implementation of the IIR y[n] = ∑ kN=0 h[ k ] x[n − k ]
finite-dimensional system is practical
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Digital Filter Structures Digital Filter Structures


• However, a direct implementation of a digital
• The actual implementation of an LTI digital filter based on either the difference equation
filter can be either in software or hardware or the finite convolution sum may not
form, depending on applications provide satisfactory performance due to the
• In either case, the signal variables and the finite precision arithmetic
filter coefficients cannot be represented • It is thus of practical interest to develop
with infinite precision alternate realizations and choose the structure
that provides satisfactory performance under
finite precision arithmetic
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Digital Filter Structures Block Diagram Representation


• A structural representation using
interconnected basic building blocks is the • In the time domain, the input-output
first step in the hardware or software relations of an LTI digital filter is given by
implementation of an LTI digital filter the convolution sum
• The structural representation provides the y[n] = ∑∞k = −∞ h[ k ] x[ n − k ]
key relations between some pertinent or, by the linear constant coefficient
internal variables with the input and output difference equation
that in turn provides the key to the y[n] = −∑kN=1 d k y[n − k ] + ∑kM=0 pk x[ n − k ]
implementation
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1
Block Diagram Representation Block Diagram Representation
• For the implementation of an LTI digital
filter, the input-output relationship must be • The filter is described by the difference
described by a valid computational algorithm equation
• To illustrate what we mean by a y[n] = − d1 y[n − 1] + p0 x[n] + p1x[n − 1]
computational algorithm, consider the causal • Using the above equation we can compute
first-order LTI digital filter shown below y[n] for n ≥ 0 knowing the initial condition
y[−1] and the input x[n] for n ≥ −1:

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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Block Diagram Representation Block Diagram Representation


• Each step of the calculation requires a
y[0] = − d1 y[−1] + p0 x[0] + p1x[−1] knowledge of the previously calculated
y[1] = − d1 y[0] + .p0 x[1] + p1x[0] value of the output sample (delayed value of
.. the output), the present value of the input
y[2] =. − d1 y[1] + p0 x[2] + p1x[1]
.. sample, and the previous value of the input
sample (delayed value of the input)
• We can continue this calculation for any
• As a result, the first-order difference
value of the time index n we desire
equation can be interpreted as a valid
computational algorithm
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Basic Building Blocks Basic Building Blocks


• The computational algorithm of an LTI
digital filter can be conveniently Advantages of block diagram representation
represented in block diagram form using the • (1) Easy to write down the computational
basic building blocks shown below algorithm by inspection
x[n] + y[n]
x[n]
A
y[n] • (2) Easy to analyze the block diagram to
w[n] Multiplier determine the explicit relation between the
Adder
x[n] x[n] output and input
x[n] z −1 y[n]
x[n]
Unit delay Pick-off node
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Basic Building Blocks Analysis of Block Diagrams
• Carried out by writing down the expressions
• (3) Easy to manipulate a block diagram to for the output signals of each adder as a sum
derive other “equivalent” block diagrams of its input signals, and developing a set of
yielding different computational algorithms equations relating the filter input and output
• (4) Easy to determine the hardware signals in terms of all internal signals
requirements • Eliminating the unwanted internal variables
• (5) Easier to develop block diagram then results in the expression for the output
representations from the transfer function signal as a function of the input signal and
directly the filter parameters that are the multiplier
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Analysis of Block Diagrams Analysis of Block Diagrams


• Example - Consider the single-loop feedback
• Eliminating E(z) from the previous two
structure shown below
equations we arrive at
[1 − G1 ( z )G2 ( z )]Y ( z ) = G1( z ) X ( z )
which leads to
• The output E(z) of the adder is
Y ( z) G1 ( z )
E ( z ) = X ( z ) + G2 ( z )Y ( z ) H ( z) = =
X ( z ) 1 − G1( z )G2 ( z )
• But from the figure
Y ( z ) = G1 ( z ) E ( z )
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Analysis of Block Diagrams Analysis of Block Diagrams


• Example - Analyze the cascaded lattice • The output signals of the four adders are
structure shown below where the z- given by
W1 = X − α S2
dependence of signal variables are not
W2 = W1 − δ S1
shown for brevity
W3 = S1 + εW2
Y = β W1 + γ S2
• From the figure we observe
S2 = z −1W3
S1 = z −1W2
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Analysis of Block Diagrams Analysis of Block Diagrams
• Substituting the last two relations in the first
four equations we get • Combining the last two equations we get
W1 = X − α z −1W3 −1
W3 = ε + z −1 W1
W2 = W1 − δ z −1W2 1+ δz
• Substituting the above equation in
W3 = z −1W2 + εW2
W1 = X − α z −1W3 , Y = βW1 + γ z −1W3
Y = βW1 + γ z −1W3
we finally arrive at
• From the second equation we get
W2 = W1 /(1 + δz −1 ) and from the third Y β + (βδ + γε) z −1 + γz − 2
H ( z) = =
equation we get W3 = (ε + z −1)W2 X 1 + (δ + αε) z −1 + αz − 2
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

The Delay-Free Loop Problem The Delay-Free Loop Problem


• For physical realizability of the digital filter • Analysis of this structure yields
structure, it is necessary that the block u[ n] = w[n] + y[n]
diagram representation contains no delay- y[n] = B(v[n] + Au[n])
free loops
which when combined results in
• To illustrate the delay-free loop problem y[n] = B(v[ n] + A( w[n] + y[n]) )
consider the structure below
• The determination of the current
value of y[n] requires the knowledge of the
same value
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

The Delay-Free Loop Problem The Delay-Free Loop Problem


• However, this is physically impossible to • Removal achieved by replacing the portion
achieve due to the finite time required to of the overall structure containing the delay-
carry out all arithmetic operations on a free loops by an equivalent realization with
digital machine no delay-free loops
• Method exists to detect the presence of • Figure below shows such a realization of
delay-free loops in an arbitrary structure, the example structure described earlier
along with methods to locate and remove
these loops without the overall input-output
relation
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

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Canonic and Noncanonic Canonic and Noncanonic
Structures Structures
• The structure shown below is noncanonic as
• A digital filter structure is said to be it employs two delays to realize a first-order
canonic if the number of delays in the block difference equation
diagram representation is equal to the order y[n] = − d1 y[n − 1] + p0 x[n] + p1x[n − 1]
of the transfer function
• Otherwise, it is a noncanonic structure

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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Equivalent Structures Equivalent Structures


• Two digital filter structures are defined to Transpose Operation
be equivalent if they have the same transfer • (1) Reverse all paths
function • (2) Replace pick-off nodes by adders, and
• We describe next a number of methods for vice versa
the generation of equivalent structures • (3) Interchange the input and output nodes
• However, a fairly simple way to generate an
equivalent structure from a given realization
is via the transpose operation
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Equivalent Structures Equivalent Structures


• Redrawn transposed structure is shown
• Example – The transpose operation is below
illustrated below +
_k
_
Y(z)
_ 2 k1
z 1 k2
X(z) + + Y(z) +
_
_ k2 _ _k + z 1 +
k1 z 1
_
k1 k2 2 z_ 1
_k
2 Transpose γ2 γ1
_ _
z 1 + + z 1 +
X(z)
γ1 γ2 γ1 γ2

+ Y(z) X(z)
• All other methods for developing equivalent
Original structure Transposed structure
structures are based on a specific algorithm
for each structure
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

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Equivalent Structures Equivalent Structures
• There are literally an infinite number of • Under infinite precision arithmetic any
equivalent structures realizing the same given realization of a digital filter behaves
transfer function identically to any other equivalent structure
• It is thus impossible to develop all • However, in practice, due to the finite
equivalent realizations wordlength limitations, a specific
• In this course we restrict our attention to a realization behaves totally differently from
discussion of some commonly used its other equivalent realizations
structures
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Equivalent Structures Equivalent Structures


• Hence, it is important to choose a structure
that has the least quantization effects when • In certain cases, it is possible to develop a
implemented using finite precision structure that by construction has the least
arithmetic quantization effects
• One way to arrive at such a structure is to • We defer the review of these structures after
determine a large number of equivalent a discussion of the analysis of quantization
structures, analyze the finite wordlength effects
effects in each case, and select the one • Here, we review some simple realizations
showing the least effects that in many applications are quite adequate
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Basic FIR Digital Filter Direct Form FIR Digital Filter


Structures Structures
• A causal FIR filter of order N is characterized • An FIR filter of order N is characterized by
by a transfer function H(z) given by N+1 coefficients and, in general, require
H ( z ) = ∑nN=0 h[n]z −n N+1 multipliers and N two-input adders
which is a polynomial in z −1 • Structures in which the multiplier
• In the time-domain the input-output relation coefficients are precisely the coefficients of
of the above FIR filter is given by the transfer function are called direct form
structures
y[n] = ∑kN=0 h[k ]x[n − k ]
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Direct Form FIR Digital Filter Direct Form FIR Digital Filter
Structures Structures
• A direct form realization of an FIR filter can • An analysis of this structure yields
be readily developed from the convolution y[n] = h[0]x[n] + h[1]x[n − 1] + h[2]x[n − 2]
sum description as indicated below for N = 4 + h[3]x[n − 3] + h[4]x[n − 4]
which is precisely of the form of the
convolution sum description
• The direct form structure shown on the
previous slide is also known as a
transversal filter
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Direct Form FIR Digital Filter Cascade Form FIR Digital


Filter Structures
Structures
• A higher-order FIR transfer function can
• The transpose of the direct form structure also be realized as a cascade of second-
shown earlier is indicated below order FIR sections and possibly a first-order
section
• To this end we express H(z) as
H ( z ) = h[0]∏kK=1(1 + β1k z −1 + β 2k z −2 )
• Both direct form structures are canonic with where K = N if N is even, and K = N +1 if N
2 2
respect to delays is odd, with β 2 K = 0
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Cascade Form FIR Digital


Polyphase FIR Structures
Filter Structures
• A cascade realization for N = 6 is shown • The polyphase decomposition of H(z) leads
below to a parallel form structure
• To illustrate this approach, consider a causal
FIR transfer function H(z) with N = 8:
H ( z ) = h[0] + h[1]z −1 + h[2]z − 2 + h[3]z −3 + h[4]z − 4
• Each second-order section in the above + h[5]z −5 + h[6]z −6 + h[7]z −7 + h[8]z −8
structure can also be realized in the
transposed direct form
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Polyphase FIR Structures Polyphase FIR Structures
• H(z) can be expressed as a sum of two • By using the notation
terms, with one term containing the even-
indexed coefficients and the other E0 ( z ) = h[0] + h[2]z −1 + h[4]z − 2 + h[6]z −3 + h[8]z −4
containing the odd-indexed coefficients: E1( z ) = h[1] + h[3]z −1 + h[5]z −2 + h[7]z −3
we can express H(z) as
H ( z ) = (h[0] + h[2]z − 2 + h[4]z − 4 + h[6]z −6 + h[8]z −8 )
H ( z ) = E0 ( z 2 ) + z −1E1( z 2 )
+ (h[1]z −1 + h[3]z −3 + h[5]z −5 + h[7]z −7 ) • The above decompostion is more commonly
= (h[0] + h[2]z − 2 + h[4]z − 4 + h[6]z −6 + h[8]z −8 ) known as the 2-branch polyphase
+ z −1(h[1] + h[3]z −2 + h[5]z − 4 + h[7]z −6 ) decomposition
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Polyphase FIR Structures Polyphase FIR Structures


• A realization of H(z) based on the 2-branch • In a similar manner, by grouping the terms
polyphase decomposition is thus as shown in the original expression for H(z), we can
below reexpress it in the form
H ( z ) = E0 ( z 3 ) + z −1E1( z 3 ) + z −2 E2 ( z 3 )
E 0( z 2 ) +
z−1
where now
E1( z 2 ) E0 ( z ) = h[0] + h[3]z −1 + h[6]z − 2
E1( z ) = h[1] + h[4]z −1 + h[7]z − 2
E2 ( z ) = h[2] + h[5]z −1 + h[8]z − 2
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Polyphase FIR Structures Polyphase FIR Structures


• The decomposition of H(z) in the form • A realization of H(z) based on the 3-branch
−1 polyphase decomposition is thus as shown
H ( z ) = E0 ( z ) + z E1( z )
2 2

or below
H ( z ) = E0 ( z 3 ) + z −1E1( z 3 ) + z −2 E2 ( z 3 ) E 0( z3 ) +
−1
is more commonly known as the 3-branch z
E1( z 3 ) +
polyphase decomposition −1
z
E 2( z3 )

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Polyphase FIR Structures Polyphase FIR Structures
• In the general case, an L-branch polyphase • The subfilters Em ( z L ) in the polyphase
decomposition of an FIR transfer function realization of an FIR transfer function are
of order N is of the form also FIR filters and can be realized using
L −1 − m
H ( z ) = ∑m L
=0 z Em ( z )
any methods described so far
where • However, to obtain a canonic realization of
( N +1) / L the overall structure, the delays in all
Em ( z ) = ∑ h[Ln + m]z −m subfilters must be shared
n =0

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with h[n]=0 for n > N 50
Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Polyphase FIR Structures Linear-Phase FIR Structures


• Figure below shows a canonic realization of
a length-9 FIR transfer function obtained • The symmetry (or antisymmetry) property of a
using delay sharing linear-phase FIR filter can be exploited to
reduce the number of multipliers into almost
half of that in the direct form implementations
• Consider a length-7 Type 1 FIR transfer
function with a symmetric impulse response:
H ( z ) = h[0] + h[1]z −1 + h[2]z − 2 + h[3]z −3
+ h[2]z − 4 + h[1]z −5 + h[0]z −6
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Linear-Phase FIR Structures Linear-Phase FIR Structures


• Rewriting H(z) in the form
• A similar decomposition can be applied to a
H ( z ) = h[0](1 + z −6 ) + h[1]( z −1 + z −5 )
Type 2 FIR transfer function
+ h[2]( z − 2 + z − 4 ) + h[3]z −3
• For example, a length-8 Type 2 FIR transfer
we obtain the realization shown below function can be expressed as
H ( z ) = h[0](1 + z −7 ) + h[1]( z −1 + z −6 )
+ h[2]( z − 2 + z −5 ) + h[3]( z −3 + z − 4 )
• The corresponding realization is shown on
the next slide
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

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Linear-Phase FIR Structures Linear-Phase FIR Structures
• Note: The Type 2 linear-phase structure for
a length-8 FIR filter requires 4 multipliers,
whereas a direct form realization requires 8
multipliers
• Similar savings occurs in the realization of
• Note: The Type 1 linear-phase structure for Type 3 and Type 4 linear-phase FIR filters
a length-7 FIR filter requires 4 multipliers, with antisymmetric impulse responses
whereas a direct form realization requires 7
multipliers
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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Tapped Delay Line Tapped Delay Line


• In some applications, such as musical and • The structure consists of a chain of
sound processing, FIR filter structures of M1 + M 2 + M3 unit delays with taps at the
the form shown below are employed input, at the end of first M1 delays, at the
_ _ _
end of next M 2 delays, and at the output
x[n] z M1 z M2 z M3
• Signals at these taps are then multiplied by
α1 α2 α3
α0
constants α 0 , α1 , α 2 , and α3 and added to
+ + + y[n]
form the output

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Copyright © 2005, S. K. Mitra Copyright © 2005, S. K. Mitra

Tapped Delay Line


• Such a structure is usually referred to as the
tapped delay line
• The direct form FIR structure in slide no. 37
is seen to be a special case of the tapped
delay line, where there is a tap after each
unit delay

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Copyright © 2005, S. K. Mitra

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