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CAO module 2

Control Unit
Vinita B.
UMIT,SNDT
Basic Organization of a computer
Basic Organization of a computer
• A computer system mainly consists of the
CPU, Memory, Input/ouutput devices and the
system bus.
– CPU:
• Central processing unit Is the most important part of
the computer.
• Also called as microprocessor or processor.
• It consists of ALU, registers, Control Unit, etc.
• All programs are executed in the CPU.
Basic Organization of a computer
• CPU:
– The main function of CPU is to fetch, decode and
execute instructions.
– Instructions are fetched from memory using
buses.
– Decoded by the control unit to analyze opcode.
– Finally instruction is executed to perform desired
action.
Basic Organization of a computer
• Memory :
– Used to store information.
– Stores the program.
– Has various locations.
– Each location is identified by its own unique address and
contains some data.
– Most basic form- primary memory (RAM,ROM).
– Secondary memory- hard disk, etc.
– Portable memory- pen drives, CDs, etc.
– High speed memory- Cache memory.
– RAM is volatile and rest all others are non volatile.
– (volatile- contents are lost after power supply is
withdrawn).
Basic Organization of a computer
• I/O
– I/O devices are used for the flow of information in
and out of the computer system.
– Keyboard, mouse, screen, printer are some of the
input devices.
Basic Organization of a computer
• System bus:
– A bus is a set of interconnecting lines used to carry
information.
– Size of the bus means its number if lines.
– An 8-bit bus means it has eight lines carrying one
bit each.
– There are 3 type of buses- Address bus, data bus
and control bus.
Basic Organization of a computer
• System bus:
– Address bus:
• It carries the address of the operation.
• During any operation, the address bus identifies the
location where the operation is performed.
• The size of the address bus determines the amount of
primary memory that can be connected.
• Eg: add bus-16 bit, we can connect 216= 64 kb memory.
Basic Organization of a computer
• System bus:
– Data bus:
• It carries data to and from the processor.
• The size of the data bus determines how much data can
be transferred in one operation.()cycle.
• Bigger the data bus, faster the processor, as it can
transfer more data in one operation.
Basic Organization of a computer
• System bus:
– Control bus:
• It carries control signals like RD, Wr etc.
• These signals determine the kind of operation that will
be performed on the system bus.
X86/ Von Neumann model of CPU

X86/ Von Neumann model of CPU
• Von neumann model was the first model
proposed to develop computers that could run
programs.
• As per Von neumann model, a computer must
have three main components.
– The Processor(CPU) that would fetch, decode and
execute instructions.
– A Memory that would store programs and data.
– An I/O section that would have devices to give inputs
and outputs.
X86/ Von Neumann model of CPU
• The von Neumann model further illustrated
the typical design of a CPU.
• A processor can internally divided into two
functional units:
– Program counter unit used to fetch and decode
instructions.
– Data processing unit used to execute instructions.
X86/ Von Neumann model of CPU
X86/ Von Neumann model of CPU
• Program control unit: The main functionis to
fetch and decode instructions. It consists of:
– PC: Program counter-
• ALL INSTRUCTIONS ARE STORED IN MEMORY.
• TO FETCH ANY INSTRUCTION, THE PROCESSOR NEEDS
TO KNOW ITS ADDRESS.
• PC GIVES THE ADDRESS OF THE NEXT INSTRUCTION TO
BE FETCHED.
• IT GETS INCREMENTED AFTER EVERY INSTRUCTION IS
FETCHED.
X86/ Von Neumann model of CPU
• SP: Stack pointer-
– The stack is the set of memory locations operating
in LIFO manner.
– SP gives the address of the top of stack.
– During PUSH operation, SP in decremented.
– During POP operation, SP is incremented.
X86/ Von Neumann model of CPU
• Address generation logic:
– It is used to increment or decrement SP/PC.
PC is incremented after every instruction is
fetched.
SP is decremented after a PUSH and
incremented after a pop operation.
X86/ Von Neumann model of CPU
• Address Register(MAR):
– Address register holds the address on the
address bus for the current operation.
– It is also called MAR(Memory address register).
• Instruction Register (IR):
– It stores the current instruction that has been
fetched from the memory.
– This instruction is then passed to control unit for
decoding.
X86/ Von Neumann model of CPU
• Control unit:
– Control unit decodes the instruction and produces control
signals for its execution.
– An instruction fetched from the memory is in its binary
form.
– Every instruction has a unique opcode.
– Opcode denotes the operation to be performed by the
instruction.
– The control unit decodes the opcode.
– It then produces control signals based on this opcode.
– These control signals are responsible for the execution of
the instruction.
– Eg: opcode: 01101011 is Add operation.
X86/ Von Neumann model of CPU
• Data processing Unit:
– It main function is to execute instructions.
– It is also called the “execution unit”.
– It operates on the basis of control signals sent by
the control unit.
X86/ Von Neumann model of CPU
• Data processing unit-
• Data register(MBR):
– It holds the data transferred between CPU and
the Memory or I/O.
– Data can be transferred between CPU and
Memory and between CPU and I/O.
– It is also called MBR(memory buffer register).
X86/ Von Neumann model of CPU
• Register file(general purpose registers):
– These registers are available to the programmer
for storing operands.
– The programmer can store, modify, read the
values of these registers.
– They are extremely useful during programming.
X86/ Von Neumann model of CPU
• ALU(Arithmetic logic unit):
– This is the execution center of the processor.
– It performs all arithmetic and logic operations.
– It has dedicated circuits to carry out these
operations.
– To perform operations, ALU needs operands
provided by the registers.
– The subsequent result is also stored in the
registers of the register file.
X86/ Von Neumann model of CPU
• Status flag:
– It contains the status of the current result.
– It is changes after every operation, by the ALU.
– It is also called the flag register.
– It has various status flags indicating Sign,carry ,
zero, Parity, etc. about the result.
– Many conditional branch instructions are based
on these flags.
– Eg: JC(jump is carry).

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