Introduction

This lab guides you through the process of using Vivado and IP Integrator to create
a complete ARM Cortex-A9 based processor system targeting the Zybo or ZedBoard
Board.
You will use the IP Integrator and Block Design to create the system and SDK to
create an application to verify the design functionality.

Lab2 Intro
Adding IP in PL

This material exempt per Department of Commerce license exception TSU

Lab1 Intro 11a- 2 © Copyright 2016 Xilinx

ARM Cortex-A9 based Embedded System Design Procedure

DDR3
Create a project using Vivado
Memory Memory
Controller Create the processor system using the IP Integrator and Block Design
Add the two instances of the GPIO IP
RS232 UART
PL Validate the design
ARM
LED
GPIO Cortex-A9
Generate the bitstream
AXI3 AXI Export the project to the SDK
AXI4-Lite
PS M_AXI_GP0 Interconnect
Block
GPIO LEDs

AXI4-Lite
Create an application in the SDK
GPIO Switches
Verify the design functionality in hardware
BTN

Lab1 Intro 11a- 3 © Copyright 2016 Xilinx Lab1 Intro 11a- 4 © Copyright 2016 Xilinx

Summary

In this lab, you created an ARM Cortex-A9 processor based embedded system in
the Zynq device.
You learned how to route the GPIO signal, connected to the PS section, to the
FPGA (PL) pin using the EMIO.
You instantiated the Xilinx standard GPIO IP to provide input and output
functionality.
You constrained the non-dedicated pins through the Xilinx Design Constraints
(XDC) file.
You created the project in Vivado, created the hardware system using IP Integrator,
synthesized and implemented the design and exported the generated bitstream to
the SDK, created a software application in the SDK, and verified the functionality
after programming the PL section and running the application from the DDR
memory.
Lab1 Intro 11a- 5 © Copyright 2016 Xilinx