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Dd Dd Dd P Set Vco: Adiዐ࿔Ӳຕ֩ᆈ࿔Ӳຕ֩ڦᅳ࿔Lj൩ଌᅳዐీ٪ሞڦᇕჾፇኯईᅳٱဃLjadiփܔᅳዐ٪ሞڦֶᅴईᆯׂُิڦٱဃሴĂසႴඓණඪࢆَᇕڦጚඓႠlj൩֖Adi༵ࠃڦ ፌႎᆈ࿔Ӳຕ֩Ă
Dd Dd Dd P Set Vco: Adiዐ࿔Ӳຕ֩ᆈ࿔Ӳຕ֩ڦᅳ࿔Lj൩ଌᅳዐీ٪ሞڦᇕჾፇኯईᅳٱဃLjadiփܔᅳዐ٪ሞڦֶᅴईᆯׂُิڦٱဃሴĂසႴඓණඪࢆَᇕڦጚඓႠlj൩֖Adi༵ࠃڦ ፌႎᆈ࿔Ӳຕ֩Ă
Dd Dd Dd P Set Vco: Adiዐ࿔Ӳຕ֩ᆈ࿔Ӳຕ֩ڦᅳ࿔Lj൩ଌᅳዐీ٪ሞڦᇕჾፇኯईᅳٱဃLjadiփܔᅳዐ٪ሞڦֶᅴईᆯׂُิڦٱဃሴĂසႴඓණඪࢆَᇕڦጚඓႠlj൩֖Adi༵ࠃڦ ፌႎᆈ࿔Ӳຕ֩Ă
ADF4350
༬Ⴀ ᆌᆩ
ೕ୲ྷݔǖ137.5 MHz4400 MHz ၍एإยแ)W-CDMAĂTD-SCDMAĂWiMAXĂGSMĂ
ၭຕNݴೕೕ୲ࢇׯഗࢅኝຕNݴೕೕ୲ࢇׯഗ PCSĂDCSĂDECT*
ਏᆶگ၎࿋ሯำڦVCO ֪ยԢ
Պڦײ1/2/4/8/16ݴೕ ၍ਆᇘྪ(LAN)Ăᆶ၍ۉยԢ
(ߵݛRMS)۶ۯǖ0.5 ps)ۆ႙ߵݛኵ* ้ዓׂิ
ۉᇸۉუǖ3.0 V3.6 V
߁ຎ!
1.8 Vஇडग़ඹ
ADF4350ࢇྔև࣍ୟ୳հഗࢅྔևएጚೕ୲๑ᆩ้Lj
Պײມఇᇨݴೕഗǖ4/5ई8/9
ํ၄ၭຕNݴೕईኝຕNݴೕ၎࣍(PLL)ೕ୲ࢇׯഗă
Պڦײ୲ࠀ
RFৢᅼࠀీ ADF4350ਏᆶᅃ߲णۉׯუ੦ናږഗ(VCO)Ljഄएհ
ෙ၍๕زႜথ੨ ೕ୲ྺྷݔ2200 MHz4400 MHzăُྔLj૧ᆩ1/2/4/8/16
ఇెࢅຕጴۨॠ֪ ݴೕۉୟLjᆩࢽᅜׂิگ137.5 MHzڦRFೕ୲ă
ሞాټۨఇ๕ ܔᇀᄲ൱߰ڦᆌᆩLjRFपᅜํ၄ৢᅼăৢᅼࠀీ
ዜཌ३ณ ़ᅜཚࡗᆅগ੦Ljᄺᅜཚࡗॲ੦ăཞ้༵ࠃޤ
ዺRFLjփᆩ้ᅜ࠲ă
ᆶೌాस٪ഗཚࡗ०ڦڇෙ၍๕থ੨ႜ੦ăഗ
ॲ֑ᆩ3.0 V3.6 VۉᇸࠃۉLjփᆩ้ᅜ࠲ă
ࠀీ
SDVDD AVDD DVDD VP RSET VVCO
MULTIPLEXER MUXOUT
10-BIT R ÷2
×2 COUNTER DIVIDER
REFIN DOUBLER LOCK
DETECT FLO SWITCH SW
LD
CLK
DATA DATA REGISTER FUNCTION CHARGE
LE LATCH CPOUT
PUMP
PHASE
COMPARATOR
VTUNE
VREF
VCO VCOM
CORE TEMP
INTEGER FRACTION MODULUS
REG REG REG
RFOUTA+
THIRD-ORDER OUTPUT
÷1/2/4/8/16
FRACTIONAL STAGE
RFOUTA–
INTERPOLATOR
MULTIPLEXER
PDBRF
OUTPUT RFOUTB+
N COUNTER STAGE RFOUTB–
MULTIPLEXER
ADF4350
07325-001
1
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com
Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.
ADIዐ࿔Ӳຕ֩ᆈ࿔Ӳຕ֩ڦᅳ࿔Lj൩ଌᅳዐీ٪ሞڦᇕჾፇኯईᅳٱဃLjADIփܔᅳዐ٪ሞֶڦᅴईᆯׂُิٱڦဃሴăසႴඓණඪࢆَᇕڦጚඓႠLj൩֖ADI༵ࠃڦ
ፌႎᆈ࿔Ӳຕ֩ă
Rev. 0 | Page 1 of 28
ADF4350
ణ
༬Ⴀ ................................................................................................... 1 स٪ഗ1 .................................................................................. 18
स٪ഗ0 .................................................................................. 18
Ⴊ۩૦๏
200811ሆ—Ⴊ۩Ӳ0ǖ؛๔Ӳ
Rev. 0 | Page 2 of 28
ADF4350
रຍࡀ߭
ݥأଷᆶຫLjAVDD = DVDD = VVCO = SDVDD = VP = 3.3 V ± 10%ǗAGND = DGND = 0 VǗTA = TMINTMAXă߾ፕ࿒ྺྷݔ܈
−40°C+85°Că
1
Bप
֖ຕ ፌၭኵ ۆ႙ኵ ፌٷኵ ڇ࿋ ཉॲ/ጀ
REFIN༬Ⴀ
ೕ୲ 10 105 MHz සࡕf < 10 MHzLjඓԍუӦ୲ٷᇀ21 V/μs
ଳ௺܈ 0.7 AVDD V p-p AVDD/2ೋዃ1
ۉඹ 10 pF
ୁۉ ±60 μA
६၎ഗ
६၎ഗೕ୲2 32 MHz
ࢁۉԭ
ICPဌ/ᇸୁۉ3 RSET = 5.1 kΩ
ߛኵ 5 mA
گኵ 0.312 mA
RSETྷݔ 2.7 10 kΩ
ဌୁۉᇑᇸୁۉದ 2 % 0.5 V ≤ VCP ≤ 2.5 V
ICPᇑVCP 1.5 % 0.5 V ≤ VCP ≤ 2.5 V
ICPᇑ࿒܈ 2 % VCP = 2.0 V
இड
ߛۉუVINH 1.5 V
ۉگუVINL 0.6 V
ୁۉIINH/IINL ±1 μA
ۉඹCIN 3.0 pF
இड
ۉߛუVOH DVDD − 0.4 V ስCMOS
ୁۉߛIOH 500 μA
ۉگუVOL 0.4 V IOL = 500 μA
ۉᇸ
AVDD 3.0 3.6 V
DVDD, VVCO, SDVDD, VP AVDD ኄၵۉუՂႷڪᇀAVDD
DIDD + AIDD4 21 27 mA
ݴೕഗ 6 to 24 mA ߲ܾݴೕၩࡼ6 mA
IVCO4 70 80 mA
IRFOUT4 21 26 mA RFपՊײ
ࡼࠀگລఇ๕ 7 1000 μA
RF༬Ⴀ
ፌٷVCOೕ୲ 4400 MHz
ፌၭVCOೕ୲ 2200 MHz एհVCOఇ๕
๑ᆩݴೕഗ้ፌၭVCOೕ୲ 137.5 MHz 2200 MHzएհLjስ16ݴೕ
VCOଳ௺܈ 33 MHz/V
ླྀೕ)ਸ࣍* 1 MHz/V
ઙೕ)ਸ࣍* 90 kHz ൻۯ2.00 VSWRሜ
ၿհ*ْܾ)ݴׯ −19 dBc एհVCO
ၿհ)ݴׯෙْ* −13 dBc एհVCO
ၿհ*ْܾ)ݴׯ −20 dBc ݴೕVCO
ၿհ)ݴׯෙْ* −10 dBc ݴೕVCO
ፌၭRF୲ࠀ5 −4 dBm 3dBօՊײ
ፌٷRF୲ࠀ5 5 dBm
୲ࠀհۯ ±1 dB
ፌၭVCOۙၿۉუ 0.5 V
ፌٷVCOۙၿۉუ 2.5 V
Rev. 0 | Page 3 of 28
ADF4350
Bप
֖ຕ ፌၭኵ ۆ႙ኵ ፌٷኵ ڇ࿋ ཉॲ/ጀ
ሯำ༬Ⴀ
VCO၎࿋ሯำႠీ6 −89 dBc/Hz 10 kHzೋᅎĂ2.2 GHzሜհ
−114 dBc/Hz 100 kHzೋᅎĂ2.2 GHzሜհ
−134 dBc/Hz 1 MHzೋᅎĂ2.2 GHzሜհ
−148 dBc/Hz 5 MHzೋᅎĂ2.2 GHzሜհ
−86 dBc/Hz 10 kHzೋᅎĂ3.3 GHzሜհ
−111 dBc/Hz 100 kHzೋᅎĂ3.3 GHzሜհ
−134 dBc/Hz 1 MHzೋᅎĂ3.3 GHzሜհ
−145 dBc/Hz 5 MHzೋᅎĂ3.3 GHzሜհ
−83 dBc/Hz 10 kHzೋᅎĂ4.4 GHzሜհ
−110 dBc/Hz 100 kHzೋᅎĂ4.4 GHzሜհ
−132 dBc/Hz 1 MHzೋᅎĂ4.4 GHzሜհ
−145 dBc/Hz 5 MHzೋᅎĂ4.4 GHzሜհ
ࡃᅃࣅాټ၎࿋Ԩڹሯำ7 −213 dBc/Hz
ాټ၎࿋ሯำ8 −97 dBc/Hz 3 kHzೋᅎĂ2113.5 MHzሜհ
ओݴߵݛ۶ۯ9 0.5 ps
PFDೕ୲ᆅഐڦሗො႑ࡽ −70 dBc
๑ీRFৢᅼ้ڦ႑ࡽۉೝ −40 dBm
1
ୁ᳘ࢇඓԍAVDD/2ೋዃă
2
ཚࡗยऺԍኤăᄣೌঢ়ࡗ֪LjᅜඓԍࢇޙՔጚᄲ൱ă
3
ాև߀ՎICPᅜ๑࣍ୟሺᅮሞኝ߲ೕ୲ాྷݔԍ࿘ۨă
4
TA = 25°CǗAVDD = DVDD = VVCO = 3.3 VǗᇨݴೕ = 8/9ǗfREFIN = 100 MHzǗfPFD = 25 MHzǗfRF = 4.4 GHză
5
50 ΩۉፆথVVCOLjൻۯ50 Ωሜă֪ଉࠀ୲้ޤዺRF্ᆩăޤዺࡼࠀڦᇑዷ၎ཞă
6
VCOሯำሞਸ࣍ཉॲူ֪ଉă
7
ኄ߲ຕኵᆩᇀඪࢆᆌᆩڦ၎࿋ሯำऺ໙ăऺ໙VCOాټڦ܋၎࿋ሯำႠీ้Lj൩๑ᆩᅜူࠅ๕ǖ−213 + 10log(fPFD) + 20logNăߴڦኵኍܔፌگ
ሯำఇ๕ă
8
fREFIN = 100 MHzǗfPFD = 25 MHzǗೋᅎೕ୲ = 10 kHzǗVCOೕ୲ = 4227 MHzLj๑ీܾݴೕăRFOUT = 2113.5 MHzǗN = 169Ǘ࣍ୟ = ټ40 kHzLjICP =
313 μAǗگሯำఇ๕ăሯำ૧ᆩEVAL-ADF4350EB1ZࢅAgilent E5052A႑ࡽᇸݴဆᅏ֪ڥă
9
fREFIN = 100 MHzǗfPFD = 25 MHzǗVCOೕ୲ = 4400 MHzLjRFOUT = 4400 MHzǗN = 176Ǘ࣍ୟ = ټ40 kHzLjICP = 313 μAǗگሯำఇ๕ăሯำ૧ᆩ
EVAL-ADF4350EB1ZࢅAgilent E5052A႑ࡽᇸݴဆᅏ֪ڥă
Rev. 0 | Page 4 of 28
ADF4350
้Ⴞ༬Ⴀ
ݥأଷᆶຫLjAVDD = DVDD = VVCO = SDVDD = VP = 3.3 V ± 10%ǗAGND = DGND = 0 VǗ๑ᆩ1.8 Vࢅ3 VஇडۉೝǗTA = TMIN
TMAXă
2
֖ຕ ၌ኵDŽBपDž ڇ࿋ ֪ཉॲ/ጀ
t1 20 ns(ፌၭኵ) LEยዃ้क़
t2 10 ns(ፌၭኵ) DATAڟCLKยዃ้क़
t3 10 ns(ፌၭኵ) DATAڟCLKԍ้क़
t4 25 ns(ፌၭኵ) CLKߛۉೝჄ้क़
t5 25 ns(ፌၭኵ) CLKۉگೝჄ้क़
t6 10 ns(ፌၭኵ) CLKڟLEยዃ้क़
t7 20 ns(ፌၭኵ) LEஞ؋܈
t4 t5
CLK
t2 t3
t7
LE
t1 t6
07325-002
LE
2. ้Ⴞ
Rev. 0 | Page 5 of 28
ADF4350
ਨܔፌۨܮٷኵ
ݥأଷᆶຫLjTA = 25°Că ጀᅪLjגฉຎਨܔፌۨܮٷኵీࣷڞዂഗॲᆦ৳Ⴀ
3 ࣋ăኄኻۨܮᆌ૰ኵLjփภतഗॲሞኄၵईඪࢆഄཉ
֖ຕ ۨܮኵ ॲူגԨरຍࡀ߭ኸՔీࠀڦႠ֡ፕăሞਨܔፌٷ
AVDDGND1 −0.3 V +3.9 V ۨܮኵཉॲူ߾ፕࣷᆖၚഗॲڦ੍Ⴀă
AVDDDVDD −0.3 V +0.3 V
ԨഗॲྺߛႠీRFणۉׯୟLjESDۨܮኵၭᇀ0.5 kVLjܔ
VVCOGND −0.3 V +3.9 V
VVCOAVDD −0.3 V +0.3 V ESD(ৢߌ௺)ۉݣۉăӭሏࢅጎದ้ᆌ֑ൽٯݔݞڦړ
ຕጴI/OۉუGND −0.3 V VDD + 0.3 V แă
ఇెI/OۉუGND −0.3 V VDD + 0.3 V
ৗ༹࠶ຕଉ
REFINGND −0.3 V VDD + 0.3 V
24202 (CMOS)ࢅ918 (ມटႠ)
߾ፕ࿒ྷݔ܈ −40°C +85°C
٪ئ࿒ྷݔ܈ −65°C +125°C ESDয়ߢ
ፌߛ࿒ 150°C
ESD(ৢߌ௺)ۉݣۉഗॲă
LFCSP θJAඤፆੇ 27.3°C/W
ۉټഗॲࢅۉୟӱీࣷሞுᆶִਥڦ൧ူۉݣă
(ࡰಎࡰথ)
࠶Ԩׂਏᆶጆ૧ईጆᆩԍࢺۉୟLjڍሞᇜీߛڟ
࣮ୁࡰ
ଉESD้Ljഗॲీࣷ࣋ăᅺُLjᆌ֑ړൽڦړ
ރኵ࿒܈ 260°C
ރኵ࿒้܈क़ 40 ௱ ESDٯݔݞแLjᅜՆ௨ഗॲႠీူইईࠀీෟ฿ă
1
GND = AGND = DGND = 0 V
Rev. 0 | Page 6 of 28
ADF4350
ᆅগದዃࢅࠀీ௮ຎ
MUXOUT
SDVDD
SDGND
PDBRF
DGND
REFIN
DVDD
LD
32
31
30
29
28
27
26
25
CLK 1 24 VREF
DATA 2 PIN 1 23 VCOM
INDICATOR
LE 3 22 RSET
CE 4
ADF4350 21 AGNDVCO
SW 5
TOP VIEW 20 VTUNE
VP 6 (Not to Scale) 19 TEMP
CPOUT 7 18 AGNDVCO
CPGND 8 17 VVCO
AGNDVCO 11
AGND 9
AVDD 10
RFOUTA+ 12
RFOUTA− 13
RFOUTB+ 14
RFOUTB− 15
VVCO 16
07325-003
NOTES
1. THE LFCSP HAS AN EXPOSED PADDLE THAT MUST BE CONNECTED TO GND.
3. ᆅগದዃ
4. ᆅগࠀీ௮ຎ
ᆅগՊࡽ ᆅগఁ ௮ຎ
1 CLK زႜ้ዓăຕሞCLKฉืᄂ้ደ߲32࿋ᅎ࿋स٪ഗăُྺߛፆੇCMOSă
2 DATA زႜຕăزႜຕᅜMSBᆫံݛ๕ेሜLjෙ߲LSBᆩፕ੦࿋ăُྺߛፆੇCMOSă
3 LE ेሜ๑ీLjCMOSăړLEՎྺߛۉೝ้Lj٪ئሞᅎ࿋स٪ഗዐڦຕሜෙ߲LSBስڦस٪ഗă
4 CE ႊೌ๑ీăُᆅগڦஇडۉگೝॽ࠲ഗॲLjժ๑ࢁۉԭෙༀఇ๕ăߵ࠲࿋ڦጒༀփཞLjُᆅগڦ
இडߛۉೝॽ๑ഗॲฉۉă
5 SW ۨਸ࠲ă๑ᆩۨఇ๕้LjՂႷॽ࣍ୟ୳հഗᇑُᆅগ၎ă
6 VP ࢁۉԭۉᇸăُᆅগႷڪᇀAVDDăڦ֫ںඁ᳘ۉඹᆌీ੍ৎُᆅগă
7 CPOUT ࢁۉԭă๑ీ้Ljُᆅগၠྔև࣍ୟ୳հഗ༵ࠃ±ICPă࣍ୟ୳հഗڦڟVTUNELjᅜൻాۯևVCOă
8 CPGND ࢁۉԭথںăኄCPOUTڦথ࣮ںୟᆅগă
9 AGND ఇెںăኄAVDDڦথ࣮ںୟᆅগă
10 AVDD ఇెۉᇸăྺྷݔ3.0 V3.6 Văఇెڦ֫ںඁ᳘ۉඹᆌీ੍ৎُᆅগăAVDDڦኵՂႷᇑDVDD၎ཞă
14 RFOUTB+ ޤዺVCOăۉೝՊײă༵ࠃVCOएհईݴೕă
15 RFOUTB− ࢻցޤዺVCOăۉೝՊײă༵ࠃVCOएհईݴೕă
19 TEMP ࿒܈ցăڦ֫ںඁ᳘ۉඹᆌీ੍ৎُᆅগă
20 VTUNE VCOڦ੦ăُۉუਦۨೕ୲LjٗܔCPOUTۉუ୳ڦհܸइڥă
Rev. 0 | Page 7 of 28
ADF4350
!
ᆅগՊࡽ ᆅগఁ! ௮ຎ
22 RSET ሞُᆅগᇑGNDኮक़ᅃ߲ۉፆยዃࢁۉԭୁۉăRSETᆅগڦՔۉუೋዃྺ0.55 VăICPᇑRSETڦ
࠲ဣྺǖ
25.5
I CP =
R SET
ഄዐǖ
RSET = 5.1 kΩ
ICP = 5 mA
23 VCOM ೋዃۙၿྷݔᅃӷాڦևցবۅăڦ֫ںඁ᳘ۉඹᆌీ੍ৎُᆅগă
24 VREF एጚۉუăڦ֫ںඁ᳘ۉඹᆌీ੍ৎُᆅগă
25 LD ۨॠ֪ᆅগăُᆅগஇडߛۉೝ้๖PLLۨăஇडۉگೝ๖PLL฿ă
26 PDBRF RF࠲ăُᆅগྺஇडۉگೝ้LjRFৢᅼăُࠀీᄺॲՊڦײă
27 DGND ຕጴںăDVDDڦথ࣮ںୟᆅগă
28 DVDD ຕጴۉᇸăُᆅগۉڦუᆌᇑAVDD၎ཞăڦ֫ںඁ᳘ۉඹᆌీ੍ৎُᆅগă
31 SDGND ຕጴΣ-ΔۙഗথںăΣ-Δۙഗڦথ࣮ںୟᆅগă
32 SDVDD ຕጴΣ-ΔۙഗۉڦᇸᆅগăഄۉუᆌᇑAVDD၎ཞăڦ֫ںඁ᳘ۉඹᆌీ੍ৎُᆅগă
33 EP ࡰಎă
Rev. 0 | Page 8 of 28
ADF4350
ۆ႙߾ፕ༬Ⴀ
–40 –70
FUND
–50 –80 DIV2
DIV4
–60 DIV8
–90
DIV16
–70
PHASE NOISE (dBc/Hz)
–90 –110
–100 –120
–110 –130
–120
–140
–130
–150
–140
–150 –160
–160 –170
07325-028
07325-031
1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz) FREQUENCY (Hz)
–40 –70
FUND
–50 –80 DIV2
DIV4
–60 DIV8
–90
DIV16
–70
PHASE NOISE (dBc/Hz)
PHASE NOISE (dBc/Hz)
–100
–80
–90 –110
–100 –120
–110 –130
–120
–140
–130
–150
–140
–150 –160
–160 –170
07325-032
07325-029
–100
–80
–90 –110
–100 –120
–110 –130
–120
–140
–130
–150
–140
–150 –160
–160 –170
07325-030
07325-033
Rev. 0 | Page 9 of 28
ADF4350
0 0
–20 –20
–40 –40
PHASE NOISE (dBc/Hz)
–80 –80
–100 –100
–120 –120
–140 –140
–160 –160
07325-034
07325-037
1k 10k 100k 1M 10M 1k 10k 100k 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz)
0 0
–20 –20
–60 –60
–80 –80
–100 –100
–120 –120
–140 –140
–160
07325-038
–160
07325-035
0 3.02
CSR OFF
–20 3.01
CSR ON
–40
3.00
PHASE NOISE (dBc/Hz)
FREQUENCY (GHz)
–60
2.99
–80
2.98
–100
2.97
–120
2.96
–140
–160 2.95
07325-036
07325-039
Rev. 0 | Page 10 of 28
ADF4350
ۉୟ௮ຎ
RF N DIVIDER N = INT + FRAC/MOD
एጚۉუև!ݴ FROM
VCO OUTPUT/
एጚۉუपස16๖ăSW1ࢅSW2ྺԿਸ࠲ă OUTPUT DIVIDERS TO PFD
N COUNTER
SW3ਸăഔײ࠲ۯႾࢫLjSW3ԿࢇLjSW1ࢅSW2
THIRD-ORDER
ਸLjඓԍ࠲क़REFINᆅগሜă FRACTIONAL
INTERPOLATOR
POWER-DOWN
CONTROL
INT MOD FRAC
REG REG VALUE
NC 100k
07325-006
SW2
REFIN NC TO R COUNTER
BUFFER
SW1
17. RF INTݴೕഗ
07325-005
SW3
NO
REFINएጚೕ୲Ǘ CHARGE
DELAY U3 CP
PUMP
DREFINԠೕഗ࿋Ǘ
TREFIN 2ݴೕ࿋(0ई1)Ǘ
CLR2 DOWN
R ܾ 10࿋ Պ ݴ ֖ ײೕ ഗ ڦᇨ ย ݴೕ Բ (1 HIGH D2 Q2
U2
07325-007
1023)ă
–IN
18. ᇱ๖ᅪ
Rev. 0 | Page 11 of 28
ADF4350
MUXOUTࢅLOCKॠ֪ स٪ഗ4 (R4)ዐݴڦೕഗስᄺມ࣐؋Ljڍཉॲस٪ഗ
ADF4350ڦܠୟްᆩഗሎႹᆩࢽݡ࿚ႊೌ߳ڦዖాև 2 (R2)ڦDB13ྺߛă
ۅăMUXOUTጒༀᆯM3ĂM2ࢅM1੦(ၘ൧९26)ă VCO
19ᅜႚ๕၂๖କMUXOUTևݴă ADF4350ڦVCOాࢃᆯෙ߲܀૬VCOፇׯLj߲VCO๑ᆩ
R COUNTER INPUT 16߲ዘ۠ೕLjස20๖LjᅜՍޮ߃ডڦೕ୲ྷݔLj
DVDD ܸVCOଳ௺(܈KV)ሶডၭLjփࣷڞዂ၎࿋ሯำࢅሗොႠీ
ডֶă
THREE-STATE-OUTPUT
ฉ้ۉईस٪ഗ0 (R0)߸ႎ้LjVCOࢅೕስஇडࣷጲۯ
DVDD
DGND
ስኟඓڦVCOࢅೕă
R COUNTER OUTPUT
MUX CONTROL VCOࢅೕስൽ10߲PFDዜᇑೕስ้ዓݴೕഗኵ
N COUNTER OUTPUT MUXOUT
ױڦओăVCO VTUNEᇑ࣍ୟ୳հഗڦਸLjాڟև
ANALOG LOCK DETECT
एጚۉუă
DIGITAL LOCK DETECT
RESERVED 2.8
07325-008
2.4
DGND
VTUNE (V)
1.6
ᅎ࿋स٪ഗ
ADF4350ຕጴևݴԈઔᅃ߲10࿋RF RऺຕഗĂᅃ߲16࿋RF 1.2
NऺຕഗĂᅃ߲12࿋FRACऺຕഗࢅᅃ߲12࿋ఇຕऺຕഗă
0.8
ຕሞCLKڦ߲ฉืᄂ้ደ߲32࿋ᅎ࿋स٪ഗăຕ
ݛ๕MSBᆫံăሞLEฉืᄂ้Ljຕٗᅎ࿋स٪ 0.4
ഗدୃ߲٪ഗኮᅃăణՔ٪ഗᆯᅎ࿋स٪ഗዐڦ
0
ෙ߲੦࿋)C3ĂC2ࢅC1*ڦጒༀਦۨăኄၵ੦࿋3߲
07325-009
1800
2000
2200
2400
2600
2800
3000
3200
3400
3600
3800
4000
4200
4400
4600
LSBǖDB2ĂDB1ࢅDB0Ljස2๖ă5ྺኄၵ࿋ڦኈኵ FREQUENCY (MHz)
ă23ጺକኄၵ٪ഗڦՊݛײ๕ă 20. VTUNE ᇑೕ୲࠲ڦဣ
ADF4350ܠڦዖยዃ֑ᆩມ࣐؋LjԈઔఇຕኵĂ၎࿋ኵĂ
RऺݴຕኵĂ֖ԠೕഗĂ֖2ݴೕࢅୁۉยዃăኄᅪ࿆
ጣLjഗॲᄲ๑ᆩඪࢆມ࣐؋ยዃڦႎኵLjՂႷ݀ิଇ߲
๚ॲăံLjཚࡗႀڦړस٪ഗLjॽႎኵ٪ഗॲ
ዐăഄْLjՂႷܔR0ኴႜᅃْႎڦႀ֡ፕă૩සLj߸ႎఇ
ຕኵ้LjՂႷႀस٪ഗ0 (R0)Ljᅜඓԍఇຕኵኟඓेሜă
Rev. 0 | Page 12 of 28
ADF4350
VTUNEሞೕాࢅೕक़Վࣅ้LjVCOڦKVໜኮՎࣅăኍ प
ܔೕ୲ྷݔড)ݴೕഗփՎࣅ*ټڦᆌᆩLjᅙ ADF4350ڦRFOUTA+ࢅRFOUTA−ᆅগڟᆯVCO࣐ڦ؋
ঢ়ኤǖ33 MHz/VፌඓڦKVኵLjᅺྺፌথৎೝ ൻڦۯNPNֶڦܔݴणۉटLjස22๖ăྺକᆫࣅࠀ
ኵă21၂๖କKVໜVCOएೕڦՎࣅᅜतೕڦೝኵă ࡼᇑ୲ࠀኮक़࠲ڦဣLjᆩࢽᅜཚࡗस٪ഗ4 (R4)ዐ
๑ᆩټยऺ้Ljᆩࢽీ߸ൡၠᇀ๑ᆩُă ڦ࿋[D2:D1]ยዃֶڦܔݴ࿂ୁۉăᅜยዃ຺ዖୁۉ
80 ೝă๑ᆩ50 ΩۉፆᇑAVDD၎ժୁ᳘ࢇ50 Ωሜ้Lj
ኄၵୁۉೝݴ՚༵ࠃ−4 dBmĂ−1 dBmĂ+2 dBmࢅ+5 dBm
70
ڦ୲ࠀೝăُྔLjᄺᅜॽଇୟࢇժሞᅃ߲
VCO SENSITIVITY (MHz/V)
60
1 + 1:1Վუഗई180°ྲټ᳘ࢇഗዐ)֖९“ದ”և*ݴă
50 සࡕ܀ڇ๑ᆩኄၵLjሶፌॅपᆌԈࡤᅃ߲ᇑVVCO
40
၎ߌۉୁݴڦă࿄๑ᆩࢻڦցՂႷᆩᇑᅙ๑ᆩ
၎ຼۉڦୟ܋থă
30
ᆅগRFOUTB+ࢅRFOUTB−ฉ٪ሞᅃ߲ޤዺपLj༵ࠃڼ
20
ܾፇֶݴLjᆩઠൻۯഄۉୟLjփᆩ้ᅜ࠲ă
10
07325-133
ADF4350ڦଷᅃ߲༬ႠᅜൎRFपۉڦᇸୁۉLj
0
2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 ڟຕጴۨॠ֪ۉୟॠ֪ڟഗॲํ၄ۨྺኹăُ༬Ⴀ
FREQUENCY (GHz)
ཚࡗस٪ഗ4 (R4)ዐৢ“ڦᅼॠ֪ڟۨ”(MTLD)࿋๑
21. KVᇑೕ୲࠲ڦဣ
ీă
ሞࠦۨೕ୲ᆌᆩዐLjໜጣ࣍ৣ࿒܈ᆯඤገૐLjADF4350 RFOUTA+ RFOUTA–
VTUNEీࣷ߀Վăट܋൧ူLjᅎࣷڞዂVTUNEইݥ
ڦگೝ(<0.25 V)Ljܸٗᆅഐ฿ăኻᆶړVCOएೕၭ
ᇀ2.95 GHz࣍ৣ࿒گ܈ᇀ0°C้Ljኄ֍ࣷྺׯ࿚༶ă
BUFFER/
VCO DIVIDE-BY-
ኄዖ൧ူLjසࡕ࣍ৣ࿒܈ই0°CᅜူLjሶႴᄲዘႎย 1/2/4/8/16
ዃೕ୲)߸ႎR0*Ljᅜ௨VTUNEইথৎ0 Vڦೝăܔഗॲ
07325-010
ዘႎՊײLjስ߸ࢇڦVCOೕLjܸٗၩگأVTUNE࿚
༶ăසࡕ࿒܈ᅃօူইժࡗג20°C)0°Cᅜူ*LjሶᄺႴᄲ
ዘႎՊײă࣍ৣ࿒้ߛื܈LjփႴᄲዘႎՊײă 22. प
Rev. 0 | Page 13 of 28
ADF4350
स٪ഗ
REGISTER 0
RESERVED
CONTROL
16-BIT INTEGER VALUE (INT) 12-BIT FRACTIONAL VALUE (FRAC)
BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 N16 N15 N14 N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 F2 F1 C3(0) C2(0) C1(0)
REGISTER 1
PRESCALER
CONTROL
RESERVED 12-BIT PHASE VALUE (PHASE) DBR1 12-BIT MODULUS VALUE (MOD) DBR 1
BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 PR1 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 C3(0) C2(0) C1(1)
REGISTER 2
DOUBLER DBR 1
DBR 1
DOUBLE BUFF
REFERENCE
RESERVED
CP THREE-
LOW
COUNTER
POLARITY
CHARGE
NOISE AND PUMP
RESET
STATE
RDIV2
LDF
LDP
MODES MUXOUT 10-BIT R COUNTER DBR 1 DBR 1 CONTROL
PD
PD
SETTING
BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 L2 L1 M3 M2 M1 RD2 RD1 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 D1 CP4 CP3 CP2 CP1 U6 U5 U4 U3 U2 U1 C3(0) C2(1) C1(0)
REGISTER 3
RESERVED
CLK
DIV
RESERVED RESERVED
CSR
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
REGISTER 4
AUX OUTPUT
AUX OUTPUT
VCO POWER
RF OUTPUT
FEEDBACK
DBB 2
ENABLE
SELECT
ENABLE
SELECT
AUX
DOWN
MTLD
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 D13 D12 D11 D10 BS8 BS7 BS6 BS5 BS4 BS3 BS2 BS1 D9 D8 D7 D6 D5 D4 D3 D2 D1 C3(1) C2(0) C1(0)
REGISTER 5
RESERVED
LD PIN CONTROL
RESERVED MODE RESERVED RESERVED BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
23. स٪ഗၭ
Rev. 0 | Page 14 of 28
RESERVED
ADF4350
CONTROL
16-BIT INTEGER VALUE (INT) 12-BIT FRACTIONAL VALUE (FRAC) BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 N16 N15 N14 N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 F2 F1 C3(0) C2(0) C1(0)
N16 N15 ... N5 N4 N3 N2 N1 INTEGER VALUE (INT) F12 F11 .......... F2 F1 FRACTIONAL VALUE (FRAC)
0 0 ... 0 0 0 0 0 NOT ALLOWED 0 0 .......... 0 0 0
0 0 ... 0 0 0 0 1 NOT ALLOWED 0 0 .......... 0 1 1
0 0 ... 0 0 0 1 0 NOT ALLOWED 0 0 .......... 1 0 2
. . ... . . . . . ... 0 0 .......... 1 1 3
0 0 ... 1 0 1 1 0 NOT ALLOWED . . .......... . . .
0 0 ... 1 0 1 1 1 23 . . .......... . . .
0 0 ... 1 1 0 0 0 24 . . .......... . . .
. . ... . . . . . ... 1 1 .......... 0 0 4092
1 1 ... 1 1 1 0 1 65533 1 1 .......... 0 1 4093
1 1 ... 1 1 1 1 0 65534 1 1 .......... 1 0 4094
07325-012
1 1 ... 1 1 1 1 1 65535 1 1 ......... 1 1 4095
CONTROL
RESERVED 12-BIT PHASE VALUE (PHASE) DBR 12-BIT MODULUS VALUE (MOD) DBR BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 PR1 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 C3(0) C2(0) C1(1)
P1 PRESCALER P12 P11 .......... P2 P1 PHASE VALUE (PHASE) M12 M11 .......... M2 M1 INTERPOLATOR MODULUS (MOD)
0 4/5 0 0 .......... 0 0 0 0 0 .......... 1 0 2
1 8/9 0 0 .......... 0 1 1 (RECOMMENDED) 0 0 .......... 1 1 3
0 0 .......... 1 0 2 . . .......... . . .
. . .......... . . .
0 0 .......... 1 1 3
. . .......... . . .
. . .......... . . .
1 1 .......... 0 0 4092
. . .......... . . .
1 1 .......... 0 1 4093
. . .......... . . . 1 1 .......... 1 0 4094
1 1 .......... 0 0 4092 1 1 .......... 1 1 4095
1 1 .......... 0 1 4093
07325-013
1 1 .......... 1 0 4094
1 1 .......... 1 1 4095
Rev. 0 | Page 15 of 28
ADF4350
DOUBLER DBR
POWER-DOWN
DOUBLE BUFF
DBR
REFERENCE
RESERVED
CP THREE-
COUNTER
POLARITY
LOW CHARGE
RESET
STATE
PUMP
RDIV2
NOISE AND
LDF
CONTROL
LDP
LOW SPUR CURRENT
PD
MODES MUXOUT 10-BIT R COUNTER DBR SETTING BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 L2 L1 M3 M2 M1 RD2 RD1 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 D1 CP4 CP3 CP2 CP1 U6 U5 U4 U3 U2 U1 C3(0) C2(1) C1(0)
07325-014
1 1 0 DIGITAL LOCK DETECT
1 1 1 RESERVED
RESERVED
CLK
CSR
DIV CONTROL
RESERVED MODE 12-BIT CLOCK DIVIDER VALUE BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Rev. 0 | Page 16 of 28
ADF4350
VCO POWER-
AUX OUTPUT
AUX OUTPUT
RF OUTPUT
FEEDBACK
ENABLE
SELECT
ENABLE
SELECT
DOWN
AUX
MTLD
DIVIDER OUTPUT OUTPUT CONTROL
RESERVED SELECT DBB 8-BIT BAND SELECT CLOCK DIVIDER VALUE POWER POWER BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 D13 D12 D11 D10 BS8 BS7 BS6 BS5 BS4 BS3 BS2 BS1 D9 D8 D7 D6 D5 D4 D3 D2 D1 C3(1) C2(0) C1(0)
FEEDBACK VCO
D13 SELECT D2 D1 OUTPUT POWER
D9 POWER-DOWN
0 DIVIDED 0 VCO POWERED UP 0 0 -4
1 FUNDAMENTAL 1 VCO POWERED DOWN 0 1 -1
1 0 +2
D12 D11 D10 RF DIVIDER SELECT MUTE TILL 1 1 +5
D8 LOCK DETECT
0 0 0 ÷1
0 MUTE DISABLED D3 RF OUT
0 0 1 ÷2
1 MUTE ENABLED 0 DISABLED
0 1 0 ÷4
0 1 1 ÷8 1 ENABLED
AUX OUTPUT
1 0 0 ÷16 D7 SELECT
0 D5 D4 AUX OUTPUT POWER
DIVIDED OUTPUT
BS8 BS7 .......... BS2 BS1 BAND SELECT CLOCK DIVIDER (R) 0 0 -4
1 FUNDAMENTAL
0 1 -1
0 0 .......... 0 1 1
D6 AUX OUT 1 0 +2
0 0 .......... 1 0 2
0 DISABLED 1 1 +5
. . .......... . . .
. . .......... . . . 1 ENABLED
. . .......... . . .
1 1 .......... 0 0 252
1 1 .......... 0 1 253
07325-016
1 1 .......... 1 0 254
1 1 .......... 1 1 255
LD PIN CONTROL
RESERVED MODE RESERVED RESERVED BITS
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
07325-017
1 0 LOW
1 1 HIGH
Rev. 0 | Page 17 of 28
ADF4350
स٪ഗ0 සࡕ၎࿋ምཞօࢅሗොᆫࣅࠀీփ๑ᆩLjॺᅱॽ၎࿋ጴ
ยዃྺ1ă
੦࿋!
ړ࿋[C3:C1]ยዃྺ0Ă0Ă0้Ljܔस٪ഗ0ႜՊײă 12࿋֭ኵഗMODኵ
24၂๖ُܔस٪ഗႜՊڦײຕ߭๕ă ُՊײस٪ഗยዃၭຕఇຕLjनPFDೕ୲ᇑRF܋ཚ
ڢօݴՐ୲ڦԲኵăၘ൧९“RFೕ୲ࢇׯഗǖᅃ߲ࠀׯ
16࿋INTኵ
ݔ૩”ևݴă
ኄ16࿋ยዃINTኵLjਦۨݒઍݴೕဣຕڦኝຕևݴLjᆩ
ᇀࠅ๕1)֖९“INTĂFRACĂMODᇑRݴೕഗ࠲ڦဣ”և स٪ഗ2
*ݴăܔᇀ4/5ᇨݴೕഗLjᅜยዃٗ23ڟ65,535ڦᆶኝຕ ੦࿋!
ኵăܔᇀ8/9ᇨݴೕഗLjፌၭኝຕኵྺ75ă ړ࿋[C3:C1]ยዃྺ0Ă1Ă0้Ljܔस٪ഗ2ႜՊײă
12࿋FRACኵ 26၂๖ُܔस٪ഗႜՊڦײຕ߭๕ă
12߲FRAC࿋ยዃΣ-ΔۙഗၭຕݴڦጱăᇑINTᅃ گሯำࢅگሗොఇ๕!
ഐኸۨೕ୲ࢇׯഗۨڦႎೕ୲ཚڢLj֖९“RFೕ୲ࢇ ADF4350ڦሯำఇ๕ᆯस٪ഗ2ዐڦDB30ࢅDB29੦)֖९
ׯഗǖᅃ߲ݔࠀׯ૩”ևݴăFRACኵྷݔڦٗ0ڟMOD 26*ăሯำఇ๕ሎႹᆩࢽᆫࣅยऺLjᅜ߀ሗොႠీई၎
− 1Ljࡥ߃ڦཚڢೕ୲ྷݔᇑPFDएጚೕ୲၎ཞă ࿋ሯำႠీă
स٪ഗ1 ስፌگሗොยዃॽ๑ీඡۯăኄॽ๑ၭຕଉࣅሯำໜऐ
੦࿋! ࣅLj๑ഄૌຼᇀӣሯำLjܸփሗොሯำăᅺُLjഗॲ
ړ࿋[C3:C1]ยዃྺ0Ă0Ă1้Ljܔस٪ഗ1ႜՊײă ڦሗොႠీՍڥᅜ߀ăܔᇀPLLԿ࣍ټডڦ
25၂๖ُܔस٪ഗႜՊڦײຕ߭๕ă ۨᆌᆩLjᅃӯ๑ᆩُ֡ፕă࣍ୟټኸٷᇀRFOUTཚڢ
օݴՐ୲(fRES) 1/10࣍ڦୟټă࣍ୟ୳հഗ݆ॽሗ
ᇨݴೕഗኵ!
ොປ३ڟᇑ࣍ୟټ၎ཞڦೝă
ມఇᇨݴೕഗ(P/P + 1)ᇑINTĂFRACࢅMODݴೕഗᅃഐLj
ਦۨٗVCOڟPFDڦኝ༹ݴೕԲă ྺइڥፌॅሯำႠీLjᅜ๑ᆩፌگሯำยዃၜăُย
ዃփৈ্ࣷᆩඡۯLjܸࣷඓԍࢁۉԭ߾ፕሞ๑ሯำႠీ
ᇨݴೕഗ߾ፕሞCMLۉೝLjٗVCOइ้ڥዓLjժኍܔ
ፌॅڦ൶ᇘă࣍ړୟ୳հഗټড้Ljُยዃݥᆶ
ݴೕഗႜݴೕăएᇀཞօ4/5ాࢃăړยዃྺ4/5้Lj
ᆩăೕ୲ࢇׯഗࣷඓԍሯำटگLj୳հഗሶࣷປ३ሗොă
ඹႹڦፌٷRFೕ୲ྺ3 GHzăᅺُLjړADF4350߾ڦፕೕ
ཚࡗۆ႙߾ፕ༬ႠLjᆩࢽᅜକۆ႙W-CDMAยዃዐփ
୲ࡗג3 GHz้LjՂႷॽഄยዃྺ8/9ăᇨݴೕഗࣷ၌INT
ཞሯำࢅሗොยዃڦၳࡕă
ኵLjړPྺ4/5้LjNMINྺ23ǗړPྺ8/9้LjNMINྺ75ă
MUXOUT
ADF4350ዐLjस٪ഗ1ዐڦPR1ยዃᇨݴೕഗኵă
ೌాܠୟްᆩഗᆯ࿋[DB28:DB26]੦)֖९26*ă
12࿋၎࿋ኵ
֖Ԡೕഗ!
ኄၵ࿋੦ेሜڦ၎࿋ጴăጴՂႷၭᇀस٪ഗ1ዐย
ړDB25ย ዃ ྺ 0้ Lj Ԡ ೕ ഗ ্ ᆩ Lj REF IN႑ ࡽ থ থ
ዃڦMODኵăጴᆩઠยዃRF၎࿋Ljٗ0°ڟ360°Ljݴ
10-bitڦRݴೕഗăُړ࿋ยዃྺ1้LjREFINೕ୲ेԠLj
Ր୲ྺ360°/MODăၘ൧९“၎࿋ምཞօ”ևݴăܠຕᆌᆩ
ࢫথ10-bitڦRݴೕഗăԠೕഗ্ᆩ้LjREFINူইᄂၭ
ዐLjRF႑ࡽᇑ֖႑ࡽኮक़ڦ၎࿋࠲ဣփዘᄲăܔᇀ
ຕೕ୲ࢇׯഗڦPFDڦ܋ᆶၳᄂăԠೕഗ๑ీ้Lj
ኄၵᆌᆩLj၎࿋ኵᆩઠᆫࣅၭຕࢅْݴၭຕሗොೝă
REFINڦฉืᄂࢅူইᄂPFDڦ܋ᆶၳᄂă
߸ܠ႑တ९“ሗොᅃዂႠࢅၭຕሗොᆫࣅ”ևݴă
Rev. 0 | Page 18 of 28
ADF4350
ړ๑ీԠೕഗስፌگሗොఇ๕้Ljాټ၎࿋ሯำႠీ ६၎ഗटႠ!
ܔREFINԲ௺ߌăܔᇀ45%55%ྷݔኮྔڦREFIN DB6ยዃ६၎ഗटႠăසࡕ๑ᆩᇸ࣍ୟ୳հഗईཞ၎ᆶ
ԲLj၎࿋ሯำႠీူইీٳܠ5 dBăሞፌگሯำఇ๕ူLj ᇸ࣍ୟ୳հഗLjሶᆌॽഄยዃྺ1ăසࡕ๑ᆩݒ၎ᆶᇸ୳
ժԠೕഗ্ᆩ้Lj၎࿋ሯำႠీܔREF INԲփ௺ հഗLjሶᆌॽഄยዃྺ0ă
ߌă
࠲!
Ԡೕഗ๑ీ้LjፌٷඹႹREFINೕ୲ྺ30 MHză DB5༵ࠃՊ࠲ײఇ๕ăُړ࿋ยዃྺ1้Ljኴႜ࠲ײ
Ⴞăُړ࿋ยዃྺ0้Ljೕ୲ࢇׯഗ࣬ްኟ߾ፕăሞ
RDIV2
ॲ࠲ఇ๕ူLjഗॲࣷԍାस٪ഗዐڦᆶ႑တăኻᆶړ
ړDB24ยዃྺ1้LjRݴೕഗᇑPFDኮक़ॽ֭ᅃ߲ܾݴೕ
ൎۉᇸ้Ljस٪ഗాඹ֍۪ࣷ฿ă
݀ةഗLjᅜકٷREFINፌٷ୲ăُࠀీ๑ڥPFD
܋႑ࡽԲྺ50%Ljኄܔᇀ३ณዜཌՂᄲڦă घऄ࠲้Ljॽ݀ิူଚ๚ॲǖ
t ഽೕ୲ࢇׯഗݴڦೕഗेሜጒༀă
10࿋Rݴೕഗ
t 7$0࠲ă
૧ᆩ10࿋RݴೕഗLjᅜဦݴएጚೕ୲(REFIN)ᅜׂิ
t ഽࢁۉԭෙༀఇ๕ă
PFDڦएጚ้ዓăݴೕԲᅜྺ11023ă
t ຕጴۨॠ֪ۉୟް࿋ă
ມ࣐؋ഗ! t 3'065࣐؋ഗ্ᆩă
DB13๑ీई্ᆩܔस٪ഗ4ዐڦ࿋[DB22:DB20]ڦມ࣐؋ă t स٪ഗԍऄۯጒༀLjీࠕेሜժ٪ຕă
“ݴೕഗስ”ևݴຫକມ࣐؋߾ڦፕᇱă
ࢁۉԭෙༀ!
ࢁۉԭୁۉยዃ! DB4ยዃྺ1้Ljࢁۉԭෙༀఇ๕ăኟ߾ፕ้Ljُ࿋
࿋[DB12:DB09]ᆩᇀยዃࢁۉԭୁۉڦăᆌॽࢁۉԭୁۉ ᆌยዃྺ0ă
ยዃྺ࣍ୟ୳հഗڦยऺ֖(ୁۉ९26)ă
ݴೕഗް࿋!
LDF DB3ADF4350ڦRݴೕഗࢅNݴೕഗresest࿋ăُړ࿋ྺ1
ړDB8ยዃྺ1ݴೕഗڦFRACևྺݴ0้LjኝຕNݴೕຕ ้LjRFೕ୲ࢇׯഗNݴೕഗࢅRݴೕഗتᇀް࿋ጒༀăኟ
ጴۨॠ֪๑ీăړDB8ยዃྺ0้LjၭຕNݴೕຕጴۨ ߾ፕ้Ljُ࿋ᆌยዃྺ0ă
ॠ֪๑ీă
ۨॠ֪(܈LDP)
සࡕDB7ยዃྺ0LjሶՂႷঢ়ࡗ40߲Ⴤڦ10 ns PFDዜ
ࢫLj֍ీยዃຕጴۨॠ֪ăසࡕُ࿋ยዃྺ1LjሶՂႷ
ঢ়ࡗ40߲Ⴤڦ6 ns֖ዜࢫLj֍ీยዃຕጴۨॠ֪ă
ኄኸၭຕNݴೕຕጴۨॠ֪(DB8ยዃྺ0)ăړኝຕN
ݴೕຕጴۨॠ֪घऄ้)DB8ยዃྺ1*LjසࡕDB7ยዃྺ
0LjሶႴᄲঢ়ࡗ5߲Ⴤڦ6 nsዜࢫLj֍ీยዃຕጴۨ
ॠ֪ăසࡕDB7ยዃྺ1LjሶႴᄲঢ়ࡗ5߲Ⴤڦ10 nsዜă
Rev. 0 | Page 19 of 28
ADF4350
स٪ഗ3 (>125 kHz)Ljሶᅜഔᆩᅃ߲ݴೕഗLjᅜॽRݴೕഗဦ
ྺݴডၭڦኵ)֖९28*ă
੦࿋!
ړ࿋[C3:C1]ยዃྺ0Ă1Ă1้Ljܔस٪ഗ3ႜՊײă VCO࠲
27၂๖ُܔस٪ഗႜՊڦײຕ߭๕ă ߵስڦኵLjDB11๑VCO࠲ईฉۉă
CSR๑ీ ৢᅼۨॠ֪!
DB18ยዃྺ1ॽ๑ీዜཌ३ณࠀీă૧ᆩُࠀీ܌ සࡕDB10ยዃྺ1LjሶൎRFपۉڦᇸୁۉLjڟຕ
้ۨक़ă൩ጀᅪLjྺ๑ዜཌ३ณᆶၳLj६ೕ६၎ഗ(PFD) ጴۨॠ֪ۉୟॠ֪ڟഗॲํ၄ۨྺኹă
ڦ႑ࡽՂႷᆶ50%ڦԲăࢁۉԭୁۉยዃᄺՂႷยዃ ޤዺስ!
ྺፌၭኵă߸ܠ႑တ९“३ณዜཌᅜ܌้ۨक़”ևݴă DB9ยዃޤዺRFăᅜስRFݴೕഗڦईVCOए
้ዓݴೕഗఇ๕! ೕă
࿋[DB16:DB15]ยዃྺ1Ă0้ॽघऄ၎࿋ምཞօLjยዃྺ ޤዺ๑ీ!
0Ă1้ॽघऄۨLjยዃྺ0Ă0้ॽ্ᆩ้ዓݴೕ ߵስڦኵLjDB8๑ీई্ᆩޤዺRFă
ഗă֖९27ă
ޤዺ!୲ࠀ
12࿋้ዓݴೕഗኵ ࿋[DB7:DB6]ยዃޤዺRF୲ࠀೝڦኵ)֖९28*ă
12࿋้ዓݴೕഗኵยዃघऄ၎࿋ምཞօऺ้גڦຕഗăၘ
RF๑ీ
൧९“၎࿋ምཞօ”ևݴă࣏ยዃۨऺ้גڦຕ
ߵስڦኵLjDB5๑ీई্ᆩዷRFă
ഗăၘ൧९“้ۨۨഗࢅस٪ഗႾଚ”ևݴă
!୲ࠀ
स٪ഗ4
࿋[DB4:DB3]ยዃዷRF୲ࠀೝڦኵ)֖९28*ă
੦࿋!
ړ࿋[C3:C1]ยዃྺ1Ă0Ă0้Ljܔस٪ഗ4ႜՊײă
स٪ഗ5
28၂๖ُܔस٪ഗႜՊڦײຕ߭๕ă ੦࿋!
ړ࿋[C3:C1]ยዃྺ1Ă0Ă1้Ljܔस٪ഗ5ႜՊײă
ݒઍስ!
29၂๖ُܔस٪ഗႜՊڦײຕ߭๕ă
DB23ስٗVCOڟNݴೕഗݒڦઍăยዃྺ1้Lj႑
ࡽথٗVCOइڥăยዃྺ0้Lj႑ࡽٗݴೕഗڦ ۨॠ֪ᆅগ߾ፕݛ๕
इڥăኄၵݴೕഗ๑ڥࡥ߃ডڦೕ୲ྷݔ ࿋[DB23:DB22]ยዃۨॠ֪ᆅগ߾ڦፕݛ๕)֖९29*ă
DŽ137.5 MHz4.4 GHzDžăݴړೕഗ๑ీݒઍ႑ࡽٗഄ
इ้ڥLjଇ߲܀૬ದዃPLLڦRF႑ࡽཞ၎ăኄሞ
Ⴔᄲܔ႑ࡽႜኟ߅ภᅜ༵ߛࠀ୲ڦᅃၵᆌᆩዐᆶᆩă
ݴೕഗስ!
࿋[DB22:DB20]ስݴೕഗڦኵ)֖९28*ă
ೕስ้ዓݴೕഗኵ!
࿋[DB19:DB12]ยዃೕስஇड้ዓݴڦೕഗăRݴ
ೕഗڦఐණᆩፕೕስஇड้ዓLjڍසࡕُኵٷ
Rev. 0 | Page 20 of 28
ADF4350
؛๔ࣅႾଚ! RFݴೕഗڦᄲ൱200 kHzཚݴڢՐ୲(fRESOUT)ăᅺُLj
ۉܔᇸᆅগแेኟඓۉڦუኮࢫLjADF4350Ӏᅜူ๖ڦ VCOڦཚݴڢՐ୲(f RES)Ⴔྺf RESOUTڦଇԠLjन400
स٪ഗႾଚྜׯฉ؛ڦۉ๔ࣅࡗײă kHză
t स٪ഗ5 MOD = REFIN/fRES
t स٪ഗ4 MOD = 10 MHz/400 kHz = 25
t स٪ഗ3
ߵࠅ๕4Lj
t स٪ഗ2
t स٪ഗ1 fPFD = [10 MHz × (1 + 0)/1] = 10 MHz (5)
t स٪ഗ0 2112.6 MHz = 10 MHz × (INT + FRAC/25)/2 (6)
RFೕ୲ࢇׯഗǖᅃ߲ݔࠀׯ૩ ഄዐǖ
ူ௬ڦ૩ጱ၂๖କසࢆܔADF4350ೕ୲ࢇׯഗႜՊײǖ INT = 422
FRAC = 13
RFOUT = [INT + (FRAC/MOD)] × [fPFD]/RFݴೕഗ (3)
ഄዐǖ
ఇຕ!
ఇຕ(MOD)ڦስൽਦᇀᆩ֖ڦ႑ࡽ(REFIN)ᅜतRF
RFOUTRFೕ୲Ǘ
ႴڦཚݴڢՐ୲(f RES)ă૩සLjᅃ߲13 MHz REF INڦ
INTኝຕݴೕဣຕǗ
GSMဣཥॽఇຕยዃྺ65ăኄᅪ࿆ጣLjRFݴՐ୲(fRES)
FRACၭຕǗ
ྺGSMՂႴڦ200 kHz (13 MHz/65)ăඡ࠲ۯԿ้Ljၭຕ
MODఇຕǗ“RFݴೕഗ”ဦݴVCOೕ୲ڦݴೕഗă
ሗොक़߰ൽਦᇀስڦఇຕኵ)֖९6*ă
fPFD = REFIN × [(1 + D)/(R × (1+T))] (4)
֖Ԡೕഗࢅ֖ݴೕഗ
ഄዐǖ ೌా֖Ԡೕഗᅜ๑֖႑ࡽೕ୲ेԠLjኄᆩᇀ
REFINएጚೕ୲Ǘ ༵ߛPFDԲডೕ୲ă༵ߛPFDೕ୲߀ဣཥڦሯำႠ
DRF REFINԠೕഗ࿋Ǘ ీăPFDೕ୲ेԠᅃӯ๑ሯำႠీ߀3 dBăՂႷጀᅪLj
Tएጚ2ݴೕ࿋)0ई1*Ǘ ᆯᇀNݴೕഗڦΣ-Δۉୟ٪ሞ܈၌LjPFD߾ڦፕೕ୲փ
RRFएጚݴೕဣຕă ీߛᇀ32 MHză
૩සLjᅃ߲UMTSဣཥᄲ൱2112.6 MHz RFೕ୲(RFOUT)Lj ֖2ݴೕॽ֖႑ࡽأᅜ2Ljڟڥ50%ԲڦPFDೕ
एጚೕ୲(REFIN)ྺ10 MHzLjժRFᄲ൱200 kHzཚ ୲ăኄዜཌ३ณ(CSR)ࠀీኟ߾ፕՂႴڦă߸ܠ႑
ݴڢՐ୲(fRESOUT)ă൩ጀᅪLjADF4350߾ፕሞ2.2 GHz4.4 တ९“३ณዜཌᅜ܌้ۨक़”ևݴă
GHzೕ୲ాྷݔăᅺُLjᆌ๑ᆩRFܾݴೕ)VCOೕ୲ = 4225.2
MHzLjRFOUT = VCOೕ୲/RFݴೕഗ = 4225.2 MHz/2 = 2112.6
12࿋Պײఇຕ
ᇑഄܠٷຕၭຕNݴೕPLLփཞLjADF4350ሎႹᆩࢽሞ12
MHz*ă
࿋ాྷݔยዃఇຕăኄᅪ࿆ጣLjࢇ֖Ԡೕഗࢅ10࿋R
࣍ୟࢆتԿࢇᄺዘᄲăԨ૩ዐLj࣍ୟԿࢇ֖)ڦ९ ݴೕഗLjᆩࢽᅜํ၄ႹܠփཞڦದዃLjᅜࢇ߳ዖᆌ
30*ă ᆩă
ᅃዖీڦยዃॽ13 MHz႑ࡽথઍPFDLjժॽఇຕ
ยዃྺأᅜ65Ljኄᄣ৽ీइڥႴڦ200 kHzݴՐ୲ă
07325-027
N
DIVIDER
Rev. 0 | Page 21 of 28
ADF4350
ՊײఇຕܔᇀܠՔጚᆌᆩᄺݥᆶᆩăසࡕມఇࣆۉᄲ ॽस٪ഗ3ዐڦDB18࿋ยዃྺ1๑ీዜཌ३ณă൩ጀᅪLj
൱ኧPDCࢅGSM 1800ଇዖՔጚLjሶՊײఇຕݥᆶ ྺ๑ዜཌ३ณ(CSR)ኟ߾ፕLjPFDᄲ൱45%55%ڦ
૧ăPDCᄲ൱25 kHzཚڢօݴՐ୲LjGSM 1800ሶᄲ൱ ԲăසࡕREFINೕ୲ுᆶࢇڦԲLjRDIV2ఇ๕ඓ
200 kHzཚڢยዃݴՐ୲ă ԍPFDڦਏᆶ50%Բă
ᅜॽ13 MHz֖႑ࡽথઍPFDLjሞPDCఇ๕ူLjఇ ሗොᆫࣅࢅۨ!
ຕยዃྺ520 (13 MHz/520 = 25 kHz)ă ࣍ୟټᅜ୳أփႴᄲڦሗො႑ࡽLjڍ้ۨक़ᅃӯ
ሞGSM 1800ఇ๕ူLjሶႴᄲॽఇຕยዃྺ65 (13 MHz/65 = ডăড࣍ڦୟټᅜํ၄ডڦ้ۨक़Lj࣍ڍୟ
200 kHz)ă ڦాټሗො႑ࡽీࣷሺेă
සࡕ၎࿋ဃֶምْሺڟٷీᆼᄲ݀ิዜཌLjADF4350ॽ ᅺُLjሞ“ۨऺ้ഗࢅस٪ഗႾଚ”ևݴຎႾଚڦ
ምഔۯᅃ߲ࢁۉԭڇᇮăኄᅃࡗॽײჄူඁLj ڼᅃօዐLjՂႷॽኵ8ሜस٪ഗ3ዐ้ڦዓݴೕഗኵă
ADF4350ॠ֪ڟVCOೕ୲ᅙࡗגႴڦೕ୲ăࢁۉڦྔܮ
ԭڇᇮደ߲࠲ԿLjᆶࢁۉྔܮԭڇᇮۼᅙ্ᆩLjժ
ೕ୲ሞ؛๔࣍ୟ୳հഗڟٳူټ࿘ۨă
ፌܠᅜഔۯ7߲ࢁۉྔܮԭڇᇮăܠٷຕᆌᆩዐLjኄፁ
ᅜڹןၩأዜཌLjܸٗޗٷ܌้ۨक़ă
Rev. 0 | Page 22 of 28
ADF4350
ۨǖ࣍ୟ୳հഗྊ೫ ሞگሯำఇ๕ူ(্ᆩඡ)ۯLjઠጲΣ-Δۙഗڦଉࣅሯำፕ
๑ᆩۨఇ๕้Lj࣍ୟ୳հഗዐڦፆۉፆইټ ྺၭຕሗො၄ăሗොኮक़ڦक़߰ྺfPFD/LLjഄዐLຕጴ
ఇ๕ူۉፆኵ¼ڦăྺํ၄ড࣍ڦୟ୳հഗټLj Σ-ΔۙഗዐஓႾଚڦዘް܈ăܔᇀADF4350ᆩڦෙ
ࢁۉԭୁۉሺٷ16ԠLjܸྺକԍ࣍ୟ࿘ۨLjፆۉፆՂ ۙഗLjዘް܈ൽਦᇀMODኵLjස6ଚă
Ⴗ ३ ၭ ¼ă ᄲ ๑ ీ ۨ Lj Ⴔ ॽ स ٪ ഗ 3ዐ ڦ࿋ 6. ্ᆩඡڦ้ۯၭຕሗො
[DB16:DB15]ยዃྺ0Ă1Lj๑SWᆅগܔGNDᆅগ܌ୟă ཉॲ)্ᆩඡ*ۯ ዘް܈ ሗොक़߰
ᆩڦྊ೫ࠓᆶଇዖǖ MODీԥ2ኝأLjڍփీԥ3ኝأ 2 × MOD ཚڢօ/2
t ፆۉፆ(R1)ྺݴଇ߲ኵDŽR1ࢅR1ADžLjܾኁኮԲྺ! MODీԥ3ኝأLjڍփీԥ2ኝأ 3 × MOD ཚڢօ/3
! 1:3)֖९31*ă MODీԥ6ኝأ 6 × MOD ཚڢօ/6
t থٗSWᅃ߲ۉྔܮፆ(R1A)Ljස32๖ă!ܮ ഄ൧ MOD ཚڢօ
! ྔۉፆᇑፆۉፆ(R1)ڦժࡕᆌྺR1؛๔ኵ¼ڦ
ሞگሗොఇ๕ူ(๑ీඡ)ۯLjዘް܈કቛ221߲ዜLj
)֖९32*ă
ᇑMODኵ࠲Lj๑ڥଉࣅဃֶೕੂഐઠၟټሯำă
ADF4350
ኄీࣷ๑PLLాټڦ܋၎࿋ሯำႠీူইٳܠ10
R2
CP VCO dBăྺକइڥፌگሯำLj্ᆩඡۯ߸ࡻڦስLjᆮഄ
C1 C2 C3
ړፌዕ࣍ୟڟگټፁᅜປ३ፌگೕ୲ၭຕሗො้ă
R1
ኝຕՉহሗො
SW
ၭຕሗොڦଷᅃׂ߲ิऐRF VCOೕ୲ᇑएጚೕ୲ڦ
R1A
ࢻፕᆩăړኄၵೕ୲փኝຕ࠲ဣ้(ၭຕNݴೕೕ୲ࢇ
07325-018
ׯഗ)ۅڦLjሗොՉॽټᅜᅃۨڦೋᅎೕ୲၄ሞVCO
42/!ۨ࣍ୟ୳հഗྊ೫Ċྊ೫2 ೕฉLjೋᅎೕ୲ᇑኝຕԠຕڦएጚೕ୲ࢅVCOೕ୲
ኮक़ڦಆೕईֶೕ၎ܔᆌăኄၵሗොᆯ࣍ୟ୳հഗᇎᅜປ
ADF4350 ३Ljሞ੍ৎएጚೕ୲ኝຕԠຕڦཚڢฉ၄ྺ߸ڥ၂Ǘ
R2
CP VCO ܔᇀኄၵཚڢLjֶೕ୲ీ࿋ᇀ࣍ୟټᅜాLj“ኝຕՉ
C1 C2 C3
হሗො”ڦఁኟᆯُܸઠă
֖ሗො
R1A R1
ሞၭຕNݴೕೕ୲ࢇׯഗዐLj֖ሗොᅃӯփ࿚༶Ljᅺ
SW
ྺ֖ೋᅎᇺᇺגକ࣍ୟټăփࡗLjಖୟ࣍ୟڦඪࢆ
07325-019
֖ઍཚऐీࣷᆅഐ࿚༶ăঢ়ᆯRFINᆅগ࣮ڟVCOڦ
43/!ۨ࣍ୟ୳հഗྊ೫Ċྊ೫3 ۉگೝೌా֖ൎ࣑ሯำڦઍཚLjీׂࣷิߛ–ٳ90 dBc
֖ڦሗොăPCBքਆႴᄲඓԍVCOጽ၍ᇑ֖ኮक़
ሗොऐ ؊߰ݴLjՆ௨ۉୟӱฉీ၄ઍཚୟ০ă
ԨবຫၭຕNݴೕೕ୲ࢇׯഗڦෙዖփཞሗොऐLjᅜ
तසࢆইگADF4350ڦሗොă
ၭຕሗො
ADF4350ዐڦၭຕ֭ኵഗᅃዖෙΣ-Δۙഗ(SDM)Ljഄ
ఇຕ(MOD)ยዃྺٗ2ڟ4095ڦඪࢆኝຕኵăሞگሗො
ఇ๕ူ(๑ీඡ)ۯLjMODڦፌၭඹႹኵྺ50ăSDM้ዓೕ
୲ྺPFDएጚೕ୲(fPFD)LjሎႹPLLೕ୲ᅜfPFD/MODڦ
ཚڢօݴՐ୲ࢇׯă
Rev. 0 | Page 23 of 28
ADF4350
ሗොᅃዂႠࢅၭຕሗොᆫࣅ! ႎೕ୲ยዃࢫLjLEฉืᄂࢫ߲ܾڼڦཞօஞ؋ᆩઠ๑
ඡ࠲ۯԿ้LjSDMଉࣅሯำᆅഐڦၭຕሗොஓᄺൽਦᇀ ၎࿋ᇑ֖ዘႎཞօătSYNC้क़ڦยዃኵณᆌᇑፌֶ൧
ፕྺۙഗዖጱኵڦ༬ۨ၎࿋ጴă ူڦ้ۨक़၎ཞLjᅜԍኤ၎࿋ምཞօ݀ิᇀPLLॺ૬
ຨༀዐڦፌࢫᅃ߲ዜཌኮࢫă
ᅜ߀Վ၎࿋ጴLjᅜᆫࣅඪࢆ༬ۨೕ୲ฉڦၭຕࢅْݴၭ
ຕሗොೝăᅺُLjᅜࠓॺᅃ߲ᇑ߳ೕ୲၎ܔᆌڦ၎࿋ ሞ33๖ڦ૩ጱዐLjPFD֖ྺ25 MHzLjMOD = 125Lj
ኵֱቴLjᅜՍሞܔADF4350ႜՊ้ײ๑ᆩă ᅺܸཚڢक़߰ྺ200 kHzăॽCLK_DIV_VALUEยዃྺ80Lj
ܸٗtSYNCڪᇀ400 μsă
සࡕփ๑ᆩֱቴLjሶᆌԍ၎࿋ጴփՎLjඓԍඪᅃ༬ۨ
ೕ୲ฉڦሗොೝԍᅃዂă
LE
tSYNC
၎࿋ምཞօ!
ړMODྺၭຕఇຕ้LjၭຕNݴೕPLLڦᅜॺ૬ SYNC
(INTERNAL) LAST CYCLE SLIP
၎ܔᇀ֖ڦඪࢆᅃ߲MOD၎࿋ೋᅎăADF4350ڦ၎
࿋ምཞօ༬Ⴀׂิ၎ܔᇀ֖ڦᅃዂ၎࿋ೋ FREQUENCY
07325-020
ምཞօăړ၎࿋ምཞօ๑ీ้Ljాև้ۨഗᅜူ๕ߴ
–100 0 100 200 300 400 500 600 700 800 900 1000
ڦक़߰tSYNCׂิཞօ႑ࡽǖ TIME (μs)
ഄዐǖtPFDPFD֖ዜǗCLK_DIV_VALUEस٪ഗ3 ၎࿋Պ!ײ
ڦ࿋[DB14:DB3]ยዃڦๆኵLjᅜ14095ྷݔ स٪ഗ1ዐڦ၎࿋ጴ੦RF၎࿋ăُړ၎࿋ጴٗ0
ాڦඪࢆኝຕǗMODस٪ഗ1 (R1)ڦ࿋[DB14:DB3]ย MOD้LjRF၎࿋ᅜ360°/MODڦօࡗ360°ྷݔă
ዃڦఇຕኵă
Rev. 0 | Page 24 of 28
ADF4350
ᆌᆩ႑တ!
থՎೕۙഗ! ADL5375ڦLO܋੨ᅜᆩADF4350ࢻڦցRFOUTAࢅRFOUTB
एበ݀พऐኟሁઠሁ֑ںܠᆩথՎೕࠓă34ྺසࢆ ᅜֶݛݴ๕ൻۯăᇑ܋ڇLOൻۯഗ၎ԲLjኄዖݛ๕
૧ᆩADIࠅິഗॲઠํ၄ဣཥă ༵ࠃ߸ॅڦႠీLjժփႴᄲ๑ᆩәઠॽ܋ڇLOገ
࣑ྺ߸ࢇADL5375ݴֶڦLOăኄዖದዃዐLj LOڦ
ۉୟዐ֑ᆩAD9761 TxDAC®ࢅADL5375ڦਦݛӄă๑
ۆ႙ߵݛ၎࿋ሯำ)100 Hz5 MHz*ྺ0.61°ߵݛኵă
ᆩມཚڢणׯDACLj૩සۨܮሺᅮࢅೋᅎದ༬Ⴀݴ՚ྺ
±0.02 dBࢅ±0.001 dBڦAD9788Ljඓԍُևݴ႑ࡽ૾ࠋ AD8349থ−10 dBm0 dBmڦLOൻ୲ࠀۯăፌॅLOࠀ୲
၅ڦဃֶ)ሞኝ߲࿒*ాྷݔ܈टၭă ᅜཚࡗॲሞADF4350ฉยዃLj߳ୟ༵ࠃ−4 dBm
+5 dBm୲ࠀڦă
Ԩና(LO)૧ᆩADF4350ઠํ၄ă࣍ୟ୳հഗᆩADIsimPLL™
ઠยऺLjཚڢक़߰ྺ200 kHzLjԿ࣍ྺټ35 kHză RFᆩઠൻۯ50 ΩሜLjڍՂႷୁ᳘ࢇLjස34๖ă
සࡕᆩ2 Vރރኵ႑ࡽᅜኟݛ๕ൻۯIࢅQLjሶۙഗ
ׂิڦ୲ࠀሀྺ2 dBmă
51 51
REFIO
IOUTA
LOW-PASS
IOUTB FILTER
MODULATED
AD9761
DIGITAL TxDAC
DATA
QOUTA
LOW-PASS
FILTER
QOUTB
FSADJ 51 51
2k
LOCK
VVCO VDD DETECT
16 17 28 10 4 26 6 32 30 25
VVCO DVDD AVDD CE PDB RF VP SDVDD MUXOUT LD
1nF 1nF IBBP ADL5375
FREF IN 29 REF IN RFOUTB+ 14
VVCO
51 IBBN
SPI-COMPATIBLE SERIAL BUS
1 CLK RFOUTB– 15
2 DATA 3.9nH 3.9nH
3 LE 1nF
QBBP
ADF4350 RFOUTA+ 12 QUADRATURE RFO
PHASE
22 RSET QBBN SPLITTER
RFOUTA– 13
4.7k 1nF
VTUNE 20 DSOP
680
CPOUT 7 LOIP
39nF LOIN
2700pF 1200pF
SW 5
360
CPGND SDGND AGND AGNDVCO DGND TEMP VCOM VREF
8 31 9 11 18 21 27 19 23 24
34. থՎೕۙഗ
Rev. 0 | Page 25 of 28
ADF4350
থ੨! ADSP-21xxথ੨
ADF4350ڦຕጴথ੨ྺᇑSPIग़ඹزڦႜথ੨Ljᆩᇀॽຕ 36၂๖ADF4350ᇑADSP-21xxຕጴ႑ࡽتഗኮक़ڦথ
ႀഗॲăCLKĂDATAࢅLE੦ຕدăሞCLKฉื ੨ăADF4350ڦ߲٪ഗႀႴᄲᅃ߲32࿋زႜጴăܔ
ᄂॽ32࿋ຕደ࿋ႀܔᆌस٪ഗLjړLEՎྺߛۉೝ้Lj ُLj๑ᆩADSP-21xxဣଚڦፌ०ํڇ၄݆ݛ૧ᆩኡ༺
ຕԥدܔᆌڦ٪ഗă้Ⴞ९2Ljस٪ഗں ๕ጲ࣐؋د߾ፕఇ๕ăኄᄣLjዐׂิኮമLjᅜد
९5ă ኝزڦႜຕă
ADuC812থ੨
35၂๖ADF4350ᇑADuC812 MicroConverter®ኮक़ڦথ SCLK CLK
MOSI SDATA
੨ăADuC812एᇀ8051ాࢃLjᅺُথ੨ᅜᆩᇀඪࢆ
TFS LE ADF4350
एᇀ8051ྲڦ੦ഗăMicroConverterยዃྺSPIዷఇ๕Lj ADSP-21xx
CE
CPHA = 0ăැᄲഔ֡ۯፕLjൻۯLEڦI/O܋੨ᆌՎྺۉگ I/O PORTS
MUXOUT
(LOCK DETECT)
ೝăADF4350߳ڦ٪ഗႴᄲᅃ߲32࿋ጴLjഄํ၄݆ݛ
07325-023
ٗMicroConverterႀ຺߲8࿋ጴবഗॲăႀ຺߲ڼ
ጴবኮࢫLjLEᆌՎྺߛۉೝLjᅜྜدׯă 36. ADSP-21xxᇑADF4350থ੨
ॽጴ܈ยዃྺ8࿋Lj߲32࿋ጴ๑ᆩ຺߲٪ئഗ࿋ዃă
SCLOCK CLK
ྺ߳ܔ32࿋٪ഗႜՊײLj٪ئ8࿋ጴবLj๑ీጲ࣐؋
MOSI SDATA ఇ๕LjࢫႀDSPدڦस٪ഗăፌࢫᅃ߲֡ፕഔۯጲ
ADuC812 LE ADF4350 ࣐؋دă
I/O PORTS CE
MUXOUT
ႊೌपހጎڦPCBยऺኸళ
(LOCK DETECT)
ႊೌपހጎ(CP-32-2)ฉࡰڦಎྺݛႚăPCBࡰಎᆌԲހጎ
07325-022
Rev. 0 | Page 26 of 28
ADF4350
ದ! VVCO
ದADF4350ڦᅜํ၄ፌॅ֡ፕ݆ݛڦᆶܠዖLjፌए
Ԩ݆ݛڦॽᅃ߲50 ΩۉፆڟVVCOăස37๖Ljز 3.9nH
ᅃ߲100 pFڦୁಖୟۉඹăۉፆᇑೕ୲࠲Ljᅺܸ
1nF
༵ࠃଆࡻټڦದႠీăُۉୟڦ୲ࠀঢ়ࡗ50 Ω RFOUT
07325-025
ሜዐLjཚ༵ࠃस٪ഗ4 (R4)ڦ࿋D2ࢅD1ስڦኵă 50
VVCO
38. ፌॅADF4350प
50
සࡕփႴᄲֶݴLjሶփᆩڦᅜ܋থഐઠLjईኁ
100pF
RFOUT ૧ᆩәॽଇୟࢇժă
50 07325-021
VVCO
37. ०ᅟADF4350प L2 L1
RFOUTA+
C2
߸ࡻڦਦݛӄॽᅃ߲)ߌۉୁݴ؊ړRFܳୁං*ڟ C1
VVCOăᆯُइڦࡻ߸ڥದႠీLjܸ༵ٗࠃ߸ߛࠀ 50
L1
୲ă RFOUTA–
07325-132
C1
ํᄓLjܔᇀW-CDMA UMTSೕ1)2110 MHz2170
MHz*Lj38๖ۉୟ༵ࠃڦ50 Ωದăኄዖ൧ 39. ADF4350 LCә
ူLjፌٷ୲ࠀሀྺ5 dBmăଇዖ܋ڇࠓᅜ๑ᆩ
૧ᆩݴ૬ۉࢅߌۉඹᅜํ၄39๖ڦәࠓă
EVAL-ADF4350EB1Zೠࠚӱႜᄓኤă
ᇮॲL1ࢅC1ࠓׯLCәLjL2ྺRFOUTA−༵ࠃୁୟ০Ljۉ
ඹC2ᆩᇀ߰ă
7. LCәፇׯᇮॲ
ೕ୲ RFܳୁං ߰ ୲ࠀ
(ྷݔMHz) ߌۉL1(nH) ۉඹC1 (pF) ( ߌۉnH) ۉඹ (pF) ֪ଉࡕ (dBm)
137 300 100 10 390 1000 9
300 460 51 5.6 180 120 10
400 600 30 5.6 120 120 10
600 900 18 4 68 120 10
860 1240 12 2.2 39 10 9
1200 1600 5.6 1.2 15 10 9
1600 3600 3.3 0.7 10 10 8
2800 3800 2.2 0.5 10 10 8
Rev. 0 | Page 27 of 28
ADF4350
ྔႚ٫
5.00 0.60 MAX
BSC SQ 0.60 MAX PIN 1
INDICATOR
25 32
24 1
PIN 1
INDICATOR 0.50
TOP 4.75 BSC EXPOSED 3.25
VIEW BSC SQ PAD 3.10 SQ
(BOTTOM VIEW) 2.95
0.50
0.40 17 8
16 9
0.30
0.25 MIN
0.80 MAX 3.50 REF
12° MAX 0.65 TYP
011708-A
COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2
40. 32ᆅগLFCSP_VQހጎLj
5 mm x 5 mm ,גԋ༹(CP-32-2) ٫ڇ࿋ǖmm
۩ࠔኸళ
႙ࡽ ࿒ྷݔ܈ ހጎ௮ຎ ހጎၜ
ADF4350BCPZ 1 −40°C +85°C 32ᆅগLFCSP_VQ CP-32-2
ADF4350BCPZ-RL1 −40°C +85°C 32ᆅগLFCSP_VQ CP-32-2
ADF4350BCPZ-RL71 −40°C +85°C 32ᆅগLFCSP_VQ CP-32-2
EVAL-ADF4350EB1Z1 ೠࠚӱ
1
Z = ࢇޙRoHSՔጚڦग़ඹഗॲă
Rev. 0 | Page 28 of 28