“The Pure Play Foundry Model

- Enabling Innovation with

Innovative Process Technologies”
Tomas Bauer, SVP Sales and Bus Dev, Silex Microsystems
 Silex Microsystems – Corporate Summary

• The World’s Leading Pure-Play Foundry

– No in-house product design focus
– Focus on innovative MEMS manufacturing
– 140 employees
• Customer focused
– Globally serving fabless, fab-lite and IDM
customers.
– Supporting customers from early prototype to
high volume production.
– Combining well defined process blocks with new
innovative processes and materials.
• Extensive Capabilities and Capacity
– Fab 1 - 6” fab (400k litho layers/ year)
– Fab 2 - 8” fab (1M litho layers / year)
– Fab 3 - 8” fab under construction in China

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 Silex MEMS High Volume Manufacturing

• Fab 3 in Beijing is under construction (200mm Wafer Size)

– First “green field” dedicated MEMS fab in mainland China
– Mitigates the issue of increasing China import tariffs for
semiconductors going into consumer electronics
– Fab 3 offers high volume dedicated MEMS manufacturing for
select customers looking for the most cost competitive solution
– First wafer out scheduled for mid 2017
– Tool compatibility with 8” wafer “motherfab” in Sweden

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 MEMS Chips from Silex in a Range of Applications

Optical DNA analysis

transceivers devices

Optical Drug delivery

switches devices

Medical
sensors

Telecom Life Science

Timing Inertial
devices navigation
sensors
Micromirror
devices Microphones

Thermal Camera
imaging autofocus

Industrial Consumer

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 The MEMS Foundry Landscape

• MEMS Foundry Landscape is Diverse

– One decade ago mainly:
– FTTx “fabs” with excess capacity
– Outdated / converted CMOS fabs
– “Full circle” / “one stop shop” MEMS Foundries
combining design and manufacturing
– Process and design are strongly linked
=> no product platforms
– Silex decided on a “true” Pure Play model*
attracting innovation leaders with own MEMS
design capability

(*Definition of “Pure Play” is the company has

one single business focus.)
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 Silex Microsystems – a “true” Pure-Play MEMS Foundry

• Pure Play MEMS Foundry Business Model

– Offering MEMS foundry services and World leading
generic process technologies
– MEMS innovation is combination of process flow,
material and design and therefore Silex offers
no products or product technology in order to avoid
competition with customer IP
– Ideal manufacturing partner to innovation leaders
who need an “IP Safe” manufacturing solution
• Leader in MEMS Foundry Services
– Independent, full production 6” and 8” Fabs
– Taking customer designs to volume production in
fastest possible time
– Experts in MEMS process integration and
development of “generic” technology blocks
• Diverse Customer Base
– Serving 50 customers ranging from Consumer, to
high-end Industrial and Medical markets

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 Competitive Landscape

* Silex Microsystems is the World’s largest Pure Play

MEMS Foundry based on Yole Development MEMS
Foundry comparison 2014
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 New Wave of MEMS Innovation

• MEMS outside of Smartphones

and Automotive
– MEMS still widely associated with
electrical engineering, due to its link
to semiconductor fabs
– Larger base of engineers in
traditional industries beginning to
apply the potential of this “new”
engineering discipline to achieve
miniaturization in the micro scale
space that were not possible before
– Innovation leaders in this space may
benefit from a foundry engagement
model that has more of a ”machine
shop” approach than an IC Foundry

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 New Product Introduction (NPI) Process

• High Customization and Design dependency of MEMS

calls for a protocol very different from IC manufacturing

Program
Development Manufacturing
Start

Pilot
Prospect TG Concept TG Prototype TG TG Production
Production
Phase 0 Phase 1 Phase 2 3 Phase
Phase

 Initiating program  Demonstrating  Design Freeze  Production Major TG

product functionality
 Statement of Work
 Product Specs (initial)
 Process Flow (initial)  Process Flow (updated)
 Determination of Unknowns  PFMEA (draft)
 Control Plan (draft)
 MSA/Gauge RR Plan
Milestones
 Process Freeze Sustaining
Iteration
 Product Specs (updated)  Product Specs (signed)
Spec
 Process Flow (updated)  Process Flow (final) process
 PFMEA (updated)  PFMEA ( to TRB)
 Control Plan (updated)  Control Plan (final)
 Capability analysis  Capability monitoring
 MSA/Gauge RR analysis (to TRB)
Tools used
 Process Cornering Mfg/Fab Full Ownership

Acronyms Defined
PFMEA - Process Failure Mode Effects Analysis

 Strong IT support throughout productification process

MSA - Measurement Systems Analysis
TRB - Technical Review Board

 SPC fully integrated into production system

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 Leading Innovation in the Generic Process Space

Sil-Via ® DRIE process

• Silex began its ambitions back in 2003
with development of Sil-Via®
(through full wafer thickness silicon via)

• First implementation in MEMS microphone

2.5D interposer substrate – produced for
leading cellphone manufacturer

• Volume production started in 2006

ramping to 2,000 6” wafers / month

• 9 years in volume production 2015

Microphones for mobile telephones

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 Sil-Via ® - Silex Base Technology for TSV Integration

Examples of products
• TSV Integration in MEMS High Vacuum Cavity manufactured at Silex:
[10-3 mbar]
• Accelerometers*
• Cantilevers
• Cell Analysis
• Drug Delivery
• Electrodes
• Filter structures
• Flow sensors*
• Gyros*
• IC Interposers*
• Lab-on-chips*
• Microphones*
• Mirrors*
• Needles
• Optical Membranes
• Optical Benches*
• Pressure sensors*
• Print heads*
• RF switches
• Resonators*
• Touch Membrane
• µBatteries*
• IR Sensors
Sil-Via® Bump Interface MEMS Structure
* Sil-Via® implemented

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 Heterogeneous Integration by Silicon Interposers

• Silicon interposer solutions enabled by Sil-Via ®

Via pitch down Metal routing on both

to 50 µm sides of wafer

Flip-chip
bumping

Wafer thickness from Dielectric resistance in

300 µm to 600 µm isolating trench is >1 TΩ

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 Sil-Cap® - Platform for Vacuum Capping of MEMS

• Key building block for

Sensor Capping
– Based on Silex patented Sil-Via®
base process technology
– Enables smallest footprint and
highest MEMS quality and
reliability

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 Met-Via® Full Wafer Thickness Copper or Au TSVs

• Full wafer (300µm) thickness for wafer handling and structural strength
• Unique construction for high reliability vias
• Thick plating for low ohmic resistance per via (15mΩ typ)

Partialy filled for high

reliability

Hollow plated via for TCE

compensation

Thick copper plating for

high current RDL

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 Met-Cap ® - Metal Via Based Capping Platform

• Cu or Au TSV technology for low resistance applications (<20 mOhm)

Met-Cap® Wafer
Partially filled full
with TSV wafer thickness metal
via technology
Vacuum Sealed
Cavity

AuSi eutectic CMOS

compatible bond
CMOS or MEMS Wafer

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 Met-Cap ® - Metal Via Based Capping Platform

Hermetic seal
ring for die

Hermetic seal
and electric
connection
for Met-Via®

Device cavity

Vacuum level of 1 mbar, 0.75 Torr demonstrated (without getter)

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 Met-Via® - Geometries / Density Roadmap

Frontside Backside
Backside Wafer Minimum Via
Met-Via Via Via
Via Depth Thickness Via Pitch Density
Generation Diameter Diameter
[µm] [µm] [µm] [1/mm2]
[µm] [µm]

Met-Via 200+ 12-24 350-400 355 380 500 <3

Met-Via 90 10-20 90 280 305 240 16
Met-Via 50 8-16 50 280 305 150 36

SEM of Met-Via 90 DRIE Etch SEM of Met-Via 50 DRIE Etch

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 Met-Via® TSV – Solution for 2.5D Integration

Copper RDL on frontside and backside of interposer

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 Met-Via® “Rigid” Si Interposers Enable 2.5D Packaging

Microbump interface and signal routing in Multi Layer RDL

Silex Met-Via®

Silex Met-Via® based thick wafer metal via interposer (300 um)

• Met-Via® TSVs is full wafer thickness TSV, which means the Si interposer
replaces the need for an intermediate BGA laminate in 2.5D solutions
• Rigid interposers take advantage of robust wafer processing
– Eliminates thin wafer handling (temporary bonding / de-bonding)
– Reliable wafer handling at 300-400 µm
• Eliminating organic substrate improves heat transfer and thermal
matching of die to package
• All signal routing is done in a multilayer fanout on top side of the
Met-Via® Interposer – going directly from microbump with 5µm/5µm
line/space to a PCB pitch of 400µm or 500µm.
Copyright © 2015 Silex Microsystems. All rights reserved. 19
 Silex Glass Wafer Via – TGV for RF Applications

• Capping of RF applications now

available with Silex 100um thick
“Through Glass Via” process
D1
• Insertion loss of 1mm line <0.1dB

D2

Insertion loss <0.1dB @ 2.7GHz

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 Example of TGVs

50 μm diameter TGV in glass

5 μm thick Cu Electroplated TGV

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 PZT Sol-Gel Production Process Technology

• Silex Sol-Gel PZT Production Solution

– Excellent film properties
– Uniformity within wafer ~0.5%
– Breakdown voltage >150V/μm
– Piezo Electric Effect (e31=15)
– Integration of PZT in MEMS process flows
– Fully equipped production line
with RTA, XRD, aixacct 4 point bender Sil-Via®

– Integration of PZT and Sil-Via ® TSV

Au top electrode

Pt bottom electrode
PZT

Si membrane

Si membrane

cavity

Copyright © 2015 Silex Microsystems. All rights reserved. 22

 Evolution of the Generic MEMS Foundry Offer

• What ”Moore” can MEMS do for CMOS and Packaging?

– “Functional Capping” - Combining packaging and integration of passives
– Integration of magnetic materials and ”on chip inductors”

Integrated PZT Capacitor Bond Pad Integrated Inductive Coil with

CAP WAFER (or Vertical Capacitor) Magentic Core

Zero-Crosstalk™
Feature

Low Temperature Low Loss Metal Via with Cavities for MEMS or
Hermetic Bonding Optional Coaxial Shielding CMOS MEMS Structures
Integration

CMOS WAFER

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Thank you for your participation!

For more information:

www.silexmicrosystems.com