This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2020.3031671, IEEE
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1

Basic Topology, Modeling and Evaluation of a

T-type Hybrid DC Breaker for HVDC Grid
Jin Zhu, Member, IEEE, Xingming Guo, Student Member, IEEE Jingyuan Yin, Qunhai Huo,
Tongzhen Wei

Abstract--Hybrid circuit breaker (HCB) has shown good branch is composed of many IGBTs-in-series, and these series
performance for interrupting dc fault current. However, a massive IGBTs need accurate synchronization control to withstand the
number of IGBTs in series is needed. These will lead to high costs transient over-voltage, which leads to a significant increase in
and significant difficulty in balancing IGBT dynamic voltage. This
the implementation difficulty of the DCCB [13].
paper proposes a bidirectional hybrid circuit breaker based on a
cascaded half-bridge submodule structure to reduce the overall A full-bridge sub-module HCB (FBSM-HCB) has been
costs and implementation difficulty of HCB. The number of IGBTs proposed in [12]– [17], as shown in Fig.1. The MB is composed
is reduced by 50%, and the operating speed is fast enough. A of cascaded full-bridge sub-module (SM) instead of series
model of a four-terminal modular multilevel converter (MMC) IGBTs to avoid the problem of semiconductor device
system with a proposed hybrid circuit breaker in different stages synchronization control, it is easier to implement in engineering
is developed to describe the fault blocking process more clearly.
and can be used in multi-terminal MMC-HVDC system with
The performance of the proposed HCB is validated and compared
with other HCB structure through both theoretical derivation and bidirectional fault handling capacity. But the number of IGBTs
time-domain simulation. required is twice that of classic IGBT-in-series HCB, the
reverse voltage is established by charging the SM capacitor
Index Terms-- T-type HCB, dc grid, H-bridge, MMC with fault current, the additional capacitor charging stage will
increase the fault current rise time.
I. INTRODUCTION In this paper, a T-type bidirectional hybrid dc circuit breaker
HE voltage-source-converter(VSC) based high-voltage based on a cascaded half-bridge sub-module (HBSM-HCB)
T direct current (HVDC) system is a preferable choice for structure to reduce the number of IGBTs is proposed. The
integration large amounts of renewable energy resources and capacitor of SM in MB can be pre-charged by the DC line
transmitting power from remote energy sources to multiple voltage without additional equipment. Thus, the rise time of
load-centers [1-2]. One of the main challenges to build the fault current can be cut down. The topology and basic working
HVDC grid is the ability to protect against the short-circuit fault. principle of the HBSM-HCB are introduced in Section II. The
Two main methods have been proposed to handle the problem. mathematical model of a four-terminal MMC-HVDC system
The first one is to employ special MMC topology with DC fault with proposed HBSM-HCB is established in Section III as a
blocking capability [3-4], however, the device cost and power case study. The corresponding matrix parameter equation of the
losses increase accordingly, and the complete grid needs to shut whole short-circuit process is given, which can be compared
down once a short-circuit fault occurs until isolation switches with the transient model of FBSM-HCB in [22] to describe the
have isolated the faulty part [5]. The second one is to employ a differences of two solutions in working principles more clearly.
DC circuit breaker (DCCB), which can isolate the faulty part of A comparison between the HBSM-HCB, FBSM-HCB, and
the DC grid without affecting the operation of other lines. IGBT in series HCB has been carried out in Section IV. To
Various kinds of DCCB topologies have been proposed， verify the validity and the feasibility of the proposed topology,
such as resonant circuit breaker, pure semiconductor CB, the simulation studies are presented in Section V. The
mechanical type DCCBs [6-7], and hybrid circuit breaker (HCB) conclusions are given in Section VI.
[8-12]. Among these technical routes, HCB have attracted
widespread attention due to several advantages such as quick II. PROPOSED TOPOLOGY AND OPERATION PRINCIPLE
response, high current breaking capability, and low losses. A. Topology Structure
The classic IGBT-in-series HCB topology with bidirectional The topology structure of the proposed HBSM-HCB is
fault handling capacity has been proposed and successfully shown in Fig.2. Same to other HCB structures, the topology
tested, which contains a main breaker branch (MB), a transfer also contains three branches: the main breaker branch, the
branch, and an energy absorption branch. The transfer branch is transfer branch, and the absorption branch. The difference is the
formed by an ultra-fast mechanical disconnector (UFD) in T-type structure formed by an energy absorption branch, the
series with load current switch (LCS) [1-12]. The main breaker

This work was supported in part by the National Natural Science zhujin@mail.iee.ac.cn, gxmlzh@mail.iee.ac.cn, yinjinyuan@mail.iee.ac.cn,
Foundation of China under Grant 51607171, in part by the National Key huoqunhai@mail.iee.ac.cn, tzwei@mail.iee.ac.cn ) .
Research and Development Program of China under Grant 2016YFB0900900. Xingming Guo is the corresponding author (e-mail: gxmlzh@mail.iee.ac.cn)
The authors are with the Institute of Electrical Engineering, Chinese
Academy of Sciences, Beijing, 100190, China (e-mail:

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main breaker branch formed by cascaded HBSMs, and two than the anode voltage by controlling the cascaded HBSM
diode strings (D1, D2), instead of parallel structure with the structure, so the diode D1 will stop conduction. This will
transfer branch adopted by other topologies. D1 and D2 form a prevent the main breaker branch from connecting with the
symmetrical structure to make the circuit breaker have a system during normal operation to avoid the risk of connecting
bidirectional blocking function. D3 and D4 are a pair of
a parallel device into the HVDC system.
symmetrical freewheeling diodes to provide an accessory
discharging circuit to dissipate the energy stored in the faulted

Charge Bypass
Bypass
line faster.
Transfer branch(TB)

MOV

MOV
UFD LCS

Main breaker branch(MB)

MOV

MOV
Charge

Charge
MOV MOV MOV

MOV

MOV
Energy Absorption Branch
Fig. 1. Structure of the FBSM-HCB
Transfer branch(TB)
UFD LCS
(a) (b)
Fig. 3. Charging state of sub module. (a)charge the first capacitor (b)charge
D1 D2 the second capacitor
....... .......
C. Operation principle of blocking process
When a short-circuit fault occurs, the current only flows
MOV
Main breaker branch(MB)

through the transfer branch. As the fault current is detected, the

D3

D4
Energy Absorption Branch

IGBTs of the HBSMs are conducted, an additional short-circuit

.......

.......

current path is created, as shown in Fig.4(a), and then the LCS

MOV

is blocked to make all the current flow through D1 and the

IGBTs of the cascaded HBSMs instead of the original fault
current path, as shown in Fig.4(b).
MOV

Considering the on-state voltage of semiconductor devices,

the voltage across the LCS is not zero but can be guaranteed
Fig. 2. Structure of the T-type HBSM-HCB
under a fairly low level.
After the transfer branch current drops to zero, the UFD
B. Sub-module capacitors pre-charging principle separates the contacts under the approximately zero voltage
Each capacitor of each SM (Ci of SMi) can be controlled to condition, as shown in Fig.4(c). It will take no more than 2ms
connecting in series to the charging circuit or bypass by for the mechanical to reaches a fully open position [18].
controlling the switch state of IGBTi. Therefore, the number of And then the IGBTs can be blocked, fault current path
sub-modules connected to the charging circuit at the same time transfer to the capacitor of HBSMs, as shown in Fig.4(d), the
can be flexibly controlled. Assuming the number of SMs fault current began to decrease immediately because the sum of
connected in series to the charging circuit at the same time is the capacitance voltages of the sub-modules has been pre-
controlled to n-1, as shown in Fig.3(a) and (b) (Voltage charged above the DC voltage of the DC system voltage.
balancing control method can be introduced, and n-1 SM with However, the capacitors in all the SM are continuously charged
lower voltage are connected in series to the system for charging up by absorbing magnetic energy stored in the system inductor.
each time). Then each SM capacitor voltage can eventually be
When the capacitor voltages of the sub-modules reach the
charged to Udc/n-1. Finally, All IGBTs can be switched off and
clamping voltage of the metal oxide varistor (MOV), the fault
all capacitors will be connected in series to the system. The sum
current will be transferred again to the energy absorption branch
of n capacitor voltages is nUdc/n-1, which is higher than the
nominal DC voltage Udc. (EAB), as shown in Fig.4(e).
UFD LCS UFD LCS
The main risk of connecting a parallel device into the
HVDC system is that it will change the impedance D1 D2 D1 D2

characteristics of the system or cause resonance, additional

D3

D3
D4

D4

switches (such as thyristor) are usually added to avoid parallel

MOV

MOV

connecting problem when the system is running normally [25].

In this paper, when the charging process of the sub-module Stage 1 Stage 2

capacitor is completed, the cathode voltage of D1 can be greater (a) (b)

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UFD LCS UFD LCS Considering that the energy of the MMC store in SM
capacitors contributes to the main short current in fault [19]，
D1 D2 D1 D2
and the ac feeding current can be ignored after 5∼10 ms the dc
fault occurs [20-21]. Therefore, the four-terminal MMC-HVDC
D3

D3
D4

D4
MOV

MOV
system in fault can be simplified as Fig. 6.
Stage 3 Stage 4 A. Matrix Form Circuit Equations of Stage1~2
(c) (d) In a simplified model, the 𝑅𝑖𝑗 (𝑖, 𝑗 = 1,2,3,4) represents the
UFD LCS line resistance between station 𝐴𝑖 to 𝐴𝑗 . Similarly, the
𝐿𝑖𝑗 (𝑖, 𝑗 = 1,2,3,4) represents the line inductor, consisting of
D1 D2
current limiting inductance, between station 𝐴𝑖 to 𝐴𝑗 . The
MMC converters are simplified as resistance𝑅𝑐𝑖 (𝑖 = 1,2,3,4),
D3

D4
capacitance 𝐶𝑐𝑖 (𝑖 = 1,2,3,4) and inductance 𝐿𝑐𝑖 (𝑖 = 1,2,3,4)
MOV

in series.
Stage 5
When the pole-to-pole short-circuit occurs, the positive
transmission line is connected to the negative one though the
(e) short-circuit resistance 𝑅𝑓 at a new node of F as shown in Fig.
Fig.4 Current path of an HBSM-HCB. (a) The first stage of fault interruption
operation. (b) The second stage of fault interruption operation. (c) The third 6(a). The branch A1 to A2 is divided into two new branches i.e.
stage of fault interruption operation. (d) The fourth stage of fault interruption branch 𝑓1 and 𝑓2 . The impedance on it is divided into current
operation. (e) The fifth stage of fault interruption operation. limiting impedance 𝐿𝑠𝑖 & 𝑅𝑠𝑖 (𝑖 = 1,2) and line impedance
𝐿𝑓𝑖 & 𝑅𝑓𝑖 (𝑖 = 1,2). Assuming that the branch current is written
Finally, the fault current decreases to zero, and the voltage as
across the breaker decreases to DC system voltage, the fault- 𝐼0 = [𝑖𝑓1 𝑖𝑓2 𝑖23 𝑖34 𝑖14 ]𝑇 (1)
clearance is finished. And the voltage of equivalent MMC capacitor should be
𝑈0 = [𝑢𝑐1 𝑢𝑐2 𝑢𝑐3 𝑢𝑐4 ] (2)
III. MODELING OF DC GRID WITH THE PROPOSED DC The equation of grid can be written as
BREAKER
𝑇 𝑈 = 𝑅0 𝐼0 + 𝐿0 𝐼0̇
To furtherly evaluate the performance of the proposed DC { 0 0 (3)
𝑈0̇ = −𝐶0 𝑇0𝑇 𝐼0
breaker, a model of the dc grid with it is established in this Where the T0 is transmission matrix and C0 is equivalent
section. The fault structure of the four-terminal MMC-HVDC capacitor matrix of MMC. (R 0 )5×5 and (L0 )5×5 are the basic
system is shown in Fig.5. impedance matrix.
Pole to pole
1 0 0 0
short-circuit
fault
0 1 0 0
MMC1 MMC2
𝑇0 = 0 1 −1 0 (4)
0 0 1 −1
[1 0 0 −1]
Fault current limiter and
1 1 1 1
DC circuit breaker
𝐶0 = 𝑑𝑖𝑎𝑔 [𝐶 𝐶 𝐶 𝐶
] (5)
Circuit breaker 𝑐1 𝑐2 𝑐3 𝑐4
protection area

B. Matrix Form Circuit Equations of Stage 3

After the fault is detected, the IGBTs of each HBSM in main
MMC4 MMC3
breaker branch conduct, and then the LCS is blocked
immediately, the UFD begin to separate the contacts. The
HBSM-HCB at both ends of Line 12 act almost simultaneously,
Fig. 5. Four-terminal MMC-HVDC system
The dc fault mainly includes pole-to-ground short-circuit hence the equivalent model of grid changes to Fig.6(b), the
and pole-to-pole short-circuit. This paper focuses on the pole- short-circuit current is transferred to the transmission branch
to-pole fault situation, which leads to more serious short-current. and the residual inductive current of 𝐿𝑓1 and 𝐿𝑓2 decays to zero
A pole-to-pole short-circuit fault transient process equivalent though the antiparallel diode. Therefore, the original impedance
model has been proposed in [19], the short circuit process of the matrix should be superimposed with the modified variables
four-terminal MMC-HVDC system with FBSM-HCB has been matrix 𝑅0𝑥 and 𝐿0𝑥 to constitute the new system equation as:
analyzed based on this equivalent method in [22]. In this 𝑇 𝑈 = (𝑅0 −𝑅𝑥0 )𝐼0 + (𝐿0 − 𝐿𝑥0 )𝐼0̇
{ 0 0 (6)
section, a model of four-terminal MMC system with proposed 𝑈0̇ = −𝐶0 𝑇0𝑇 𝐼0
HBSM-HCB in different stages based on the same equivalent Where R0x and L0x are given as
modeling method is developed, and it can be compared with the
system model with FBSM-HCB to analyze the difference of
two solutions more clearly.

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2𝐿𝑓1 0 current exhausts in arrester as shown in Fig.6(d). The voltage

⋯ 0
0 2𝐿𝑓2 variable vector is reduced to the initial 𝑈0 . The equation can be
𝐿𝑥0 =[ ] (7)
⋮ ⋱ ⋮ written as
0 ⋯ 0 5×5 𝑇0 𝑈0 = (𝑅0 −𝑅𝑥1 )𝐼0 + (𝐿0 − 𝐿𝑥0 )𝐼0̇ + 𝑈𝑟𝑒𝑓_1
{ (19)
𝑈0̇ = −𝐶0 𝑇0𝑇 𝐼0
2𝑅𝑓1 + 𝑅𝑓 − 𝑅𝑜𝑛 0
0 ⋯ Where
0 2𝑅𝑓2 + 𝑅𝑓 − 𝑅𝑜𝑛 𝑈𝑟𝑒𝑓_1 = [𝑈𝑐𝑏1 𝑈𝑐𝑏2 0 0 0]𝑇
𝑅𝑥0 =[ ] (8) (20)
⋮ ⋱ ⋮ Where the constant 𝑈𝑐𝑏2 represents the rating voltage of
0 ⋯ 0 5×5 arrester. This period will last to both of current decaying to
Where 𝑅𝑜𝑛 is the sum of the on-resistance of all IGBTs in the zero.
main breaker branch. R34 i34 L34
A4 A3
It is pretty obvious that the equivalent model of the system is R14 R23
i14 uc4 i23 uc3
completely different in this stage compared with FBSM-HCB L14 Cc4
ic4 L23 Cc3
ic3
if1 if2
because a new short circuit path was created by main breaker A1
Ls1 Rs1 F Rs2 Ls2
A2 Lc3
branch in proposed HBSM-HCB structure, instead of Cc1
uc1 Lc4 Rf1 Lf1 Rf2 Lf2 Cc2 uc2
ic1 ic2
embedding the MB into the original short circuit path. Rc4
Rf
Rc3
Lc2
The rising rate of short circuit current may increase because Lc1 B4 B3
R14 L34 R34
of the equivalent short circuit points are moved closer to the two Rc1 L14 Rc2
R23

sides converter station, and the line inductance 𝐿𝑓1 and 𝐿𝑓2 are Ls1 Rs1 Rf1 Lf1 Rf2 Lf2 Rs2 Ls2
L23

removed from the basic impedance matrix. But the impact is B1 B2

small because the inductance value of 𝐿𝑓1 and 𝐿𝑓2 is far less (a)
than the converter station inductance 𝐿𝑠1 and 𝐿𝑠1 . A4 R34 i34 L34
A3
R14 R23
i14 uc4 uc3
C. Matrix Form Circuit Equations of Stage 4 L14 Cc4
ic4 L23
i23
Cc3
ic3
Rs2
When the mechanical switch in the transfer branch complete A1
Ls1 Rs1 Lc4 Rf1 Lf1 Rf2 Lf2 Ls2
A2 Lc3
breaks off, which can withstand line voltage, IGBT in the main Cc1
uc1 if1 if2 Cc2 uc2
ic1 ic2
breaker branch begins to turn off. The equivalent on-resistance Rc4
Lc2
Rc3
Ron Rf Ron
is replaced by the parallel equivalent MB capacitor 𝐶𝑐𝑏1 and Lc1
R14
B4
L34
B3
R34
𝐶𝑐𝑏2, as showing in Fig.6(c). Rc1 L14 Rc2
R23

The 𝑈0 vector needs to expand the voltage of the capacitor Ls1 Rs1 Rf1 Lf1 Rf2 Lf2 Rs2 Ls2
L23

𝑢𝑐𝑏1 and 𝑢𝑐𝑏2 in main breaker branch as follow B1 B2

𝑈1 = [𝑢𝑐𝑏1 𝑢𝑐𝑏2 𝑢𝑐1 𝑢𝑐2 𝑢𝑐3 𝑢𝑐4 ] (9) (b)
And the equation changes to A4 R34 i34 L34
A3
𝑇 𝑈 = (𝑅0 −𝑅𝑥1 )𝐼0 + (𝐿0 − 𝐿𝑥0 )𝐼0̇ R14 R23
{ 1 1 i14 uc4 i23 uc3
(10) L14 Cc4 L23 Cc3
𝑈1̇ = −𝐶1 𝑇1𝑇 𝐼0 Ls1 Rs1
ic4
Lc4 Rs2 Ls2
ic3
Lc3
Where A1
uc1 if1 Cc2
A2
uc2
if2
2𝑅𝑓1 + 𝑅𝑓 0 Cc1
ic1 ic2
⋯ 0 Rc4 Rc3
0 2𝑅𝑓2 + 𝑅𝑓 CCB1 ucb1 CCB2 ucb2 Lc2
𝑅𝑥1 = [ ] (11) Lc1
R14
B4 B3
⋮ ⋱ ⋮ L34 R34
R23
Rc1 L14 Rc2
0 ⋯ 0 5×5 Rs1 Rf1 Lf1 Rf2 Lf2 Rs2 Ls2
L23
Ls1
and B1 B2
−1 0 1 0 0 0
0 −1 0 1 0 0 (c)
R34 i34 L34
𝑇1 = 0 0 0 1 −1 0 (12) A4 A3
R14 R23
0 0 0 0 1 −1 i14
Cc4
uc4 i23
Cc3
uc3
L14 L23
[0 0 1 0 0 −1] Ls1 Rs1
ic4
Rs2 Ls2
ic3
Lc4
and A1 A2 Lc3
1 1 1 1 1 1 Cc1
uc1 if1 if2 Cc2 uc2
𝐶1 = 𝑑𝑖𝑎𝑔 [𝐶 𝐶 𝐶 𝐶 𝐶 𝐶
] (13) ic1
Rc4
ic2
Rc3
𝑐𝑏1 𝑐𝑏2 𝑐1 𝑐2 𝑐3 𝑐4
Lc2
Different from the system model based on FBSM-HCB, the Lc1 B4
UCB1 UCB2
B3
R14 L34
capacitor of HBSM-HCB proposed in this paper can be pre- L14
R34
R23
Rc1 Rc2
charged as described in Section II. And the initial voltage of the Ls1 Rs1 Rf1 Lf1 Rf2 Lf2 Rs2 Ls2
L23

capacitor will affect the calculation of fault current in this B1 B2

period.
D. Matrix Form Circuit Equations of Stage 5
When another capacitor voltage has been charged to rating
voltage of its parallel arrester, it will stops charging and the
(d)
Fig. 6. Simplified model of four terminal MMC-HVDC system with HBSM-
HCB in different stages of pole-to-pole short-circuit

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IV. PERFORMANCE EVALUATION I

A. Current Blocking Capability iIGBT

The fault current blocking process of three solutions is shown imov

imain
in Fig.7. The classic HCB proposed can decrease the current
immediately after the IGBTs of MB are turn off as shown in t
0 t0 t1 t2 t3 t4
Fig.7(a). Because of the voltage across the breaker is clamped
(a)
by the arrester which is normally chosen to be 50% higher than
I icapacitor
the nominal DC grid voltage [13]. However, the series IGBT iIGBT
structure will lead to significant difficulty in balancing IGBT imov
dynamic voltage. imain
The modular structure is adopted in FBSM-HCB to avoid the
problem mentioned above. And a larger value of sub-module t
t0 t1 t2 t3 t4
capacitor means that the system has more time to deal with sub- (b)
module faults and a higher tolerance for the inconsistency of the I
sub-module parameters and control systems. But the capacitor icapacitor
iIGBT
value also influences the rise time of fault current, the fault
imov
current will maintain the upward trend as shown in Fig.7(b) (t2- imain
t3) until the sum of sub-module capacitor voltage is charged to t
UDC to establish reverse voltage to block the fault current, the 0 t0 t1 t3 t2 t4
extended time depends on the capacitor value of sub-module. (c)
It is assumed that the equivalent charging current is estimated Fig. 7. Fault interruption process of different HCB topologies. (a) IGBT-in-
series based HCB. (b) FBSM-HCB. (c) HBSM-HCB
to a fixed value Ic, considering the system requirement of fault
current blocking time, the upper limit equation of sub-module Considering that when the most serious sub-module fault
capacitors in FBSM-HCB can be calculated by approximation occurs (For example, one sub-module is connected to the fault
as follow: current path separately by mis-triggering or other faults), the
𝐼 (𝑡 −𝑡 )
𝐶𝑢𝑝 = 𝑁 𝑐 𝑏 𝑈𝐹𝐷 (21) system can still have enough time to respond and bypass the
𝑈𝑑𝑐
Where N is the number of SMs, tb is the requirement of total fault sub-module and redundancy switching before the
fault current blocking time (the duration from fault detection capacitor voltage of the sub module rises to exceed the
until the fault current begins to decrease), tUFD is the operation maximum withstand voltage of IGBT, the capacitor in sub-
time for the UFD to totally recover its dielectric strength. module can be chosen according to (22).
𝑈𝐼𝐺𝐵𝑇 −𝑈𝑝𝑟𝑒_𝑐ℎ𝑎𝑟𝑔𝑒
Smaller capacitor values can be adopted to shorten the 𝐶𝐻𝐵𝑆𝑀 = (22)
𝑎𝐼𝑓𝑎𝑢𝑙𝑡_𝑝𝑒𝑎𝑘 𝑓𝑠𝑎𝑚𝑝𝑙𝑒
capacitor charging time. However, to avoid the partial sub- Where Ifault_peak is the possible peak value of fault current,
module capacitors being overcharged by the large fault current
UIGBT is the maximum withstand voltage of IGBT in sub-
to exceed the withstand voltage of IGBT in a short time, the
module, and the Upre_charge is the maximum possible voltage of
consistency requirements of the control system and sub-module
the sub-module capacitor before mis-triggering and connecting
parameters will also become stricter with the decrease of sub-
into the fault current path, fsample is the sampling frequency of
module capacitor value. This will significantly increase the the system, and a is the redundancy factor.
difficulty of engineering implementation, such as IGBT-in-
series HCB. B. Load Current Interruption
According to the analysis in Section II and Section III, The load current interruption principle (no-fault) of series-
different from FBSM-HCB, the fault current will decrease connected DCCB solution (such as FBSM-HCB) and parallel-
immediately after the IGBTs of MB turn off due to the reverse connected DCCB solution (such as HBSM-HCB) is different,
voltage because the sum of the capacitor voltages in the HBSMs as shown in Fig.8.
has been pre-charged to a slightly higher than nominal DC grid Parallel-connected DCCB solution has to active short-circuit
voltage before a short-circuit fault occurs. Therefore, the value operation in order to cut off the UFD and finally complete the
of the sub-module capacitor does not affect the fault current
current interruption, such as other parallel-connected HCB
blocking speed of HBSM-HCB (the duration from fault
topologies [23], thus will result in a significant increase in the
detection until the fault current begins to decrease). A larger
system current at the initial moment, as shown in Fig.8 (b).
capacitor value can be selected to improve the system tolerance
of control asynchrony, parameter inconsistency, and sub- While the series-connected DCCB will block the load current
module failure, which means the lower difficulty of engineering directly, which the current will not increase as seen in Fig.8 (a).
implementation and higher reliability of the system. The energy dissipated is equivalent to the energy stored in the
inductor, which can be expressed approximately as (24).

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I circuit breaker in the load side converter station could be used

to avoid such a problem.
iLCS iIGBT C. Economic Considerations
icapacitor imov
The principles of the previous stages of three solutions are
t the same until the IGBTs of the MB are turned off, so the
O t0 t1 t2 t3 t4
voltage and current values that the IGBTs of three solutions
(a) need to withstand are equal, and the structure of the transfer
I branch of three solutions are almost the same. The economic
i capacitor

i IGBT difference of these solutions mainly depends on the number of

i LCS i mov
various components in MB such as semiconductor devices,
capacitors.
t Assume that the dc-bus voltage is 500 kV, many different
O t0 t1 t2 t3 t4 IGBT models can be selected, for example, HiPak 5SNA
(b) 1500E330305 is adopted as the IGBT module in [23], and
Fig. 8. Compare the blocking circuit of two topologies. (a) Current curve of 4.5kV/3kA IGBT module is used in [24], the number of IGBTs
FBSM-HCB (b) Current curve of HBSM-HCB.
connected in series or parallel is different when different IGBT
2 module type is used. To facilitate comparative analysis, this
1 𝑈
𝐸1 = 𝐿 (𝐼𝑙𝑜𝑎𝑑 + 𝑑𝑐 (𝑡2 − 𝑡1 )) (23) paper assumes that all three topologies adopt the same IGBT
2 𝐿
1 2 module HiPak 5SNA 1500E330305. Since the rating collector-
𝐸2 = 𝐿𝐼𝑙𝑜𝑎𝑑 (24)
2 emitter voltage of the IGBT module is 3.3 kV, the rating
Where E1 is the energy dissipation of parallel-connected capacitor voltage of HBSM is set as 1.7 kV. Because the
DCCB solutions, 𝐸2 is the energy dissipation of series- voltage across the breaker is normally chosen to be 50% higher
connected DCCB solutions, 𝐿 is the equivalent inductor of the than the nominal DC grid voltage [13], the required sub-module
system, and 𝐼𝑙𝑜𝑎𝑑 is load current before circuit breaker action. number of HBSM-HCB main breaker branches is 441.
Eq. (23) and (24) show that the energy dissipation of Assuming the minimum required breaking capability is 9 kA,
parallel-connected DCCB solutions is much larger than series- the parallel connection of IGBT modules is required and the
connected DCCB solutions (such as FBSM-HCB). The parallel parallel index is 3, hence each SM contains three parallel IGBT
solution is inferior to the series-connected solution in this aspect. modules, 1323 IGBT modules are required. Compared with
AC circuit breaker in load side converter station can be used to IGBT-in-series HCB, additional 441 capacitors are required
realize load current interruption instead of DCCB, in order to and the capacitor value can be calculated according to (22).
avoid the action of parallel-connected DCCB as much as Although the required sub-module number of FBSM-HCB
possible. main breaker branch is also equal to 441, and the parallel index
The analysis of the influence of parallel-connected solutions is 3, the IGBTs of full-bridge submodule can be equivalent to
on the system can be referred to [23]. The duration of the active two parallel paths, only one parallel path needs to be added.
short-circuit operation is only around 2 ms, which is acceptable Hence each FBSM needs 12 parallel IGBT modules in the
for the HVDC system, even if the dc buses are weak. Because FBSM-HCB main breaker branch, 5292 IGBT modules are
of the reactor, the energy stored in the SMs will not be released required. For the convenience of comparison, the capacitor
that soon. The dc-voltage will be maintained at a relatively high value stays the same with HBSM-HCB.
level. The dc-bus voltage will recover to the rated level rapidly Therefore, given the required numbers of various types of
after the MB opens, and the stability of the entire HVDC grid semiconductor devices listed in Table II, the calculated costs of
will not be compromised notably. the three solutions are listed in Table III. The cost of the
According to the above analysis, the performance proposed topology is significantly reduced because the required
comparison of the three solutions is shown in Table I, where number of IGBTs is one-half of the IGBT-in-series solution and
more "+" means the corresponding HCB solution performs one-fourth of the FBSM-HCB solution. Although additional
better in the corresponding characteristic. In general, the diodes are required, the price of diodes is much cheaper than
HBSM-HCB with a larger SM capacitor has advantages in IGBTs.
many aspects except the normal load current blocking. AC

TABLE I
Performance comparison of three solutions
Fault current blocking Energy dissipation of load Implementation Internal fault tolerance
speed current breaking (no fault) difficulty
Classic IGBT-in-series HCB +++ +++ + +
FBSM-HCB with small SM capacitor value ++ ++ ++ +
HBSM-HCB with small SM capacitor value +++ + ++ +
FBSM-HCB with large SM capacitor value + ++ +++ +++
HBSM-HCB with large SM capacitor value +++ + +++ +++

TABLE II

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Comparison of The Quantity of Required Devices of Three same for better comparative analysis.
Solutions
Classic FBSM- HBSM-
HCB HCB HCB
Number of required IGBTs in MB 2646 5292 1323
Number of required capacitors in MB 0 441 441
Number of required diode module in
0 0 2205
MB
Number of sub-module capacitor N/A 441 441
Number of Ultrafast mechanical switch 1 1 1
Number of required IGBTs in LCS 32 32 32
Sub-module capacitor value N/A 2mF
Fig. 9. Short-circuit current in each branch.
TABLE III
Cost Comparison of The Three Solutions A. Fault Current Breaking Process of the HBSM-HCB
classic IGBT- FBSM- HBSM-
in-series HCB HCBIn the simulation, it is assumed that a pole-to-pole fault
HCB
SM Capacitor cost (pu) 0 occurs at 𝑡 = 2𝑠 in the quarter of the transmission line from A1
0.13 0.13
Mechanical switch cost (pu) 0.26 0.26 0.26
to A2. It can be seen from Fig.10 that when a fault occurs at
IGBT cost (pu) 0.74 1.48 0.37
Diode string cost (pu) 0 𝑡 = 2𝑠, current 𝑖𝑓1 and 𝑖𝑓2 on both sides of the short-circuit
0 0.19
Total cost (pu) 1.0 point increase sharply during Stage 1. After 2ms, the fault is
2.24 0.76
detected and the IGBTs of submodules in the MB begin to
conduct. As seen from Fig.10(a)(b)(d), the partial short-circuits
V. SIMULATION RESULTS current transfer from the transfer branch to the main breaker
In this section, simulation results are presented for a selected branch during Stage 2. At the same time, LCS switches off and
number of cases to verify the validity and the feasibility of the the current completely transfers to the main breaker branch,
proposed solution. The simulation parameters of the four- then the UFD begins to open. Since the current in the transfer
terminal MMC-HVDC system with HCB are listed in Table IV branch has decayed to zero, there is no arc when the UFD is
and Table V to make numerical simulation results agree better disconnected.
with reality. The rest of the fault point current decays to zero though the
The station A1 regulates the dc line voltage. The station A2, freewheeling diode, which is shown in Fig.10(c). At 𝑡 =
A3, and A4 regulate active power, which is 750MW, -1500MW, 2.00305𝑠 , considering that the UFD recovers dielectric
and 1500MW. strength, the IGBT of submodule in the MB begins to switch
off. The main part of the short-circuit current transfers to the
TABLE IV capacitor in a submodule during Stage 4. As shown in Fig.10(b),
The parameter of four terminal MMC-HVDC system since the sum of capacitor voltage of HBSM in MB has been
Line parameter
Resistance per length(Ω/km) 0.014 charged to higher value than the DC bus voltage of the
Inductor per length(mH/km) 0.22 converter station, the short-circuit current 𝑖𝑓1 and 𝑖𝑓2 decay
Station Resistance/Ω Inductor/mH Length/km
A1 to A2 2.88 45.30 205.90 immediately and the UFD begin to withstand the DC bus
A2 to A3 2.63 41.38 188.10 voltage. When the capacitor voltage charges to the rating
A3 to A4 2.91 45.85 208.40 voltage of the arrester, as showing in Fig.10(e), the current of
A1 to A4 0.70 10.91 49.60
the capacitor begins to decrease and that of the arrester begins
to increase, which means short-circuit current transfers to
TABLE V
arrester and accelerates decay to zero in stage 5.
The Parameter of MMC and HCB
Parameter Value
AC voltage 525kV B. Comparison Between HBSM-HCB and FBSM-HCB in
DC voltage ±500kV
Arm resistance 0.147Ω
Fault Condition
Arm inductor 75mH A comprehensive comparison between the proposed HBSM-
Limiting current inductor 300mH HCB solution and the original FBSM-HCB solution is carried
Sub-module capacitor in HCB 2mF
Arrester protective voltage in HCB 750kV
out. Two types of breakers are equipped in the same four-
terminal MMC-HVDC system. The main waveform is shown
in Fig.11.
The basic functions of the proposed HBSM-HCB solution
As shown in Fig.11 (a), the initial fault current rises faster
are verified and compared with the FBSM-HCB. A pole-to-pole
when using HBSM-HCB, because IGBT conduction through
short circuit fault occurred between converter station 1 and
the MB creates a fault current path near the converter station,
converter station 2 in 2s as shown in Fig.9. The key parameters
but after 2.00305s, the fault current of the HBSM-HCB solution
such as equivalent capacitance value of multiple submodule
can start to drop immediately due to the pre-charged capacitor
capacitors in series, equivalent conduction resistance value of
voltage of MB, while the current of the FBSM-HCB
multiple submodules IGBTs in series, the arrester protective
voltage rating of FBSM-HCB and HBSM-HCB are set to the

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Stage1~Stage2 Stage3 Stage4 Stage5

(a) (a)

(b) (b)

(c)
(c)

(d)
(d)

(e)
(e)
Fig. 10 Simulation curve of HBSM-HCB (a) Current and voltage of IGBT in
transfer branch. (b) Current and voltage of UFD in transfer branch. (c) Current
of freewheeling diode in A1 and A2 breaker. (d) Current and voltage of IGBT
in MB. (e) Current and voltage of capacitor and arrester.

solution continues to rise until the capacitor is charged to rating

DC voltage.
In general, when the same device parameters are adopted, the
fault current can be blocked more quickly by the HBSM-HCB
solution. Fig.11 (b) and (c) show that the fault point can be cut
off more quickly by LCS of HBSM-HCB, the residual energy
of fault point is less and can be released through the
freewheeling diode circuit.
The sum voltage of equivalent capacitor decay in the MMC
converter of proposed HBSM-HCB is less than that of the
original FBSM-HCB solution, verified by Fig.11 (d) and (e). It
can be found that the energy absorbed by arresters in two
solutions are almost same, as shown in Fig.11(f).
(f)
Fig. 11. Comparison of two kinds of breaker. (a) Current of short-circuit branch
A1 to A2. (b) Current of short-circuit point. (c) Voltage of capacitor in breaker.
(d)Voltage of equivalent capacitor in Station A1. (e) Voltage of equivalent
capacitor in Station A2. (f) Energy dissipated.
C. Influence of capacitor value in sub-module
A larger sub-module capacitor can improve the system
tolerance of control asynchrony, parameter inconsistency, and
sub-module failure, but it also affects DC circuit breaker
performance such as the peak value of system fault current and
the fault blocking time. In this section, the influence of

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capacitor value on DC circuit breaker performance based on
different HCB topology is compared. Assuming the value of
the sub-module capacitor varies from 0 to 4mF. The peak value
of system fault current and blocking time are shown in Fig 12(a)
and (b). Obviously, with the increase of sub-module
capacitance value, HBSM-HCB proposed by this paper has
obvious advantages in fault current blocking performance.
(a)
(b)
Fig. 12. Comparison of two kinds of breaker in different capacitor(a) Max short-
circuit current (b) Max blocking time.
VI. CONCLUSION
In this paper, a T-type hybrid breaker structure based on
cascaded half-bridge submodules is proposed. A T-type
structure formed by an energy absorption branch, a main
breaker branch and two diode string (D1, D2) is adopted,
instead of a series structure with the transfer branch in normal
HCB topology. The topology has the bidirectional blocking
ability and can pre-charge the capacitor of the submodule by the
DC voltage. The detailed model of the fault blocking process
of proposed HBSM-HCB in the DC power grid is established
and analyzed. On this basis, the fault current interruption
performance and cost of the HBSM-HCB are compared to other
solutions through theoretical analysis and simulations. The
proposed topology has its unique advantages:
(1) Based on the same capacitance and semiconductor device
parameters, the proposed HBSM-HCB topology can make the
fault peak current lower and the fault blocking process shorter
compared with FBSM-HCB topology;
(2) The number of IGBTs is reduced by 50% compared with
IGBT-in-series based HCB and FBSM-HCB;
(3) The implementation difficulty can be reduced compared
with IGBT-in-series-based classic HCB because its modular
structure can avoid the dynamic voltage balancing problem
when series-IGBTs are switched off synchronously.
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2020.3031671, IEEE
Transactions on Power Delivery
10

[24] L. Feng, R. Gou, F. Zhuo, et al., “Research on the Breaking Branch for a Jingyuan Yin was born in Jilin, China, in
Hybrid DC Circuit Breaker in ±500 kV VSC-HVDC Grid,” in IET Power
1987. He received his Ph.D. degree from
Electronics, Sep. 2020.
[25] Q. Song et al., “A Modular Multilevel Converter Integrated With DC Beijing Jiaotong University, Beijing,
Circuit Breaker,” in IEEE Transactions on Power Delivery, vol. 33, no. 5, China, in 2015. He is presently working as
pp. 2502-2512, Oct. 2018. an Associate Professor in the Institute of
Electrical Engineering, Chinese Academy
Jin Zhu(M’20) was born in Hubei, of Sciences, Beijing, China. His current
China, in 1987. He received his Ph.D. research interests include His main
degree from the Institute of Electrical research interests include the current
Engineering, Chinese Academy of limiters and direct current circuit breaker.
Sciences, Beijing, China, in 2015. He is
presently working as a Senior Engineer Qunhai Huo was born in Henan, China,
in the Institute of Electrical Engineering, in 1981. He received his Ph.D. degree
Chinese Academy of Sciences. His from the Institute of Electrical
current research interests include control Engineering, Chinese Academy of
modelling and circuit design of modular Sciences, Beijing, China, in 2011. He is
converters for high voltage applications. presently working as an Associate
Professor in the Institute of Electrical
Xinming Guo(M’20) was born in Engineering, Chinese Academy of
Jiangsu, China, in 1995. He received his Sciences. His current research interests
B.S. degree from China University of include control modelling and circuit design of the multilevel
Mining and Technology in 2017. He is converters for high voltage applications.
presently a doctoral student in the
Institute of Electrical Engineering, Tongzhen Wei was born in Shandong,
Chinese Academy of Sciences, and with China, in 1976. He received his Ph.D.
the University of Chinese Academy of degree from the Institute of Electrical
Sciences. His current research interests Engineering, Chinese Academy of Sciences,
include distributed generation and circuit breaker. Beijing, China, in 2004. He is presently
working as a Professor in the Institute of
Electrical Engineering, Chinese Academy
of Sciences, and with the University of
Chinese Academy of Sciences. His current
research interests include power electronics, power storage,
power quality analysis and mitigation.

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