BAHRIA UNIVERSITY, (KARACHI CAMPUS)

Department of Software Engineering

Digital Assignment 2 - Fall 2021

COURSE TITLE: Computer Architecture & Logic Design COURSE CODE: CEN-220
Class: BSE[3]-A/B Shift: Morning
Course Instructor: DR. SYED SAMAR YAZDANI Time Allowed:
Submission Date: 13-01-2022 Max. Marks: 10 Marks

NAME: SHAHAB TAHIR ENROLLMENT :02-131202-011

Cache Sim Demo

Now that we are more familiar with how caches work, let’s get some practice with the cache simulator!
Before generating set:
“Address Width” ⟹ 6, “Cache Size” ⟹ 16, “Block Size” ⟹ 4, “Associativity” ⟹ 2
A) Determine the following:
i) Highest Address in Memory: _0b 0011 1111 ii) Number of Sets in Cache: ______2___________

B) We want to make a read at address 0x2A. Determine the following:

i) The Set containing the block that was read is number _0. ii) The tag bit in this block is: 0b 101.
iii) The full 4 bytes in this block are (in order): 0xe9, 0x36 , 0xae, 0x32

C) We want to write at address 0x1B the value ‘0xB1’. Determine the following:
i) The Set containing the block that was read is number 0 . ii) The tag bit in this block is ___0b 011___.
Notice that the value of the byte at address 0x1B is different in the cache and memory. What indicates this
disparity in the cache? The dirty bit
What would have happened if our write miss policy were “No Write-Allocate” instead? We would write
directly to memory and not cache the block starting at 0x18D) We want to make a read at address 0x01.
Determine the following:
i) The Set containing the block that was read is number _____0______.
ii) The Tag bit in this block is ____0b 000________.
iii) Will this read cause a conflict in the cache? Yes □ No□ iv)
If yes, which block will be evicted? Read made in B Write made in C
E) We want to write at address 0x1C the value ‘0xE9’. Determine the following:
i) The Set containing the block that was read is number _1 _ ii) The tag bit in the block is __0b 011__.
iii) Will this write cause a conflict in the cache? Yes □ No□
iv) If yes, which block will be evicted? Read made in B Write made in C
As a note, your history should look like this:
R(0 × 2a) = M
W(0 × 1b,0 × b1) = M
R(0 × 01) = M
W(0 × 1c,0 × e9) = M

G) Append the following text to the current History:

W(0 × 03,0 × ff )
R(0 × 27)
R(0 × 10)
W(0 × 1d,0 × 00)
You’ll notice that appended to each of these memory accesses is “ = ?”
Determine if ‘?’ will resolve to Hit (H) or Miss (M) for each execution.

W(0 × 03,0 × ff
) = H.
R(0 × 27) = M .
R(0 × 10) = M

W(0 × 1d,0 × 00) =

H

H) The cache, after the 8 executions detailed above should look like this:

The numbers on the right indicate the mode recent use of the cache (where 1 was more
recent).
i) A LRU replacement policy will evict which block on the next cache conflict? LINE 1
ii) What is one benefit of using LRU over Random?

Favors temporal locality, as local variables usually are

reused frequently.

iii)What is one benefit of using Random over LRU?

Cheaper and faster to use as there is no need to

maintain record of the most recently used block.
I) If we were to flush the cache right now (don’t actually) how many bytes in memory would change? 3
How many bytes would change if “Write Hit” policy were “Write Through” instead of “Write Back”? 0

Can you explain why these numbers are the same/different? (If not, try changing the write hit policy and re-
running using the same history above).

Write Back won’t write the new value to memory directly but will instead cache it and mark its block as
dirty. When any dirty block is removed from the cache the memory corresponding to that block will be
updated. Write Through will write any new value to memory directly, thus meaning that no block in the
cache will be dirty and no values in memory need to be updated when flushing the cache.